Including Metal Layer Patents (Class 428/209)
  • Patent number: 11798339
    Abstract: A multi-layer packaging material can include a layer of material with an outer surface and an inner surface. The layer of material formable into a package. An electronic circuit can be fixedly attached to the layer of material. The electronic circuit can include a clock, a processor in logical communication with the clock, a radio receiver, a transmitter, and a digital storage. The digital storage can include software executable upon demand. The software can be operative with the processor to cause the electronic circuit to receive and store radio signals from multiple reference points.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: October 24, 2023
    Assignee: LOCATORX, INC.
    Inventor: William D. Meadow
  • Patent number: 11795117
    Abstract: A porous refractory in the K2O—SiO2—B2O3 system is formed by chemical direct foaming by heating to over 600° C., resulting in adherent black or white foam. The foam can function as highly porous thermal insulation, a high or low thermal emissivity surface, as a sealant for deteriorated refractory surfaces, as a filler for pockmarks/holes/gaps or as a bonding agent for parts with large gaps between them.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: October 24, 2023
    Inventors: Cressie E. Holcombe, Patrick J. Ritt, William Brent Webb
  • Patent number: 11791294
    Abstract: The present application discloses a method for fabricating semiconductor device with a stress relief structure. The method includes providing a substrate, forming an intrinsically conductive pad above the substrate, and forming a stress relief structure above the substrate and distant from the intrinsically conductive pad.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: October 17, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Tse-Yao Huang
  • Patent number: 11792939
    Abstract: A substrate is manufactured by drilling a chip containing groove in a composite inner layer circuit structure, having a component connecting end of a circuit layer protruding from a mounting side wall in the chip containing groove, mounting a chip component in the chip containing groove, and connecting the surface bonding pad to the component connecting end. The chip component in the present invention penetrates at least two circuit layers, and the surface bonding pad is bonded to the component connecting end of the circuit layer directly, reducing the occupied area of the chip component in each one of the circuit layers, and increasing the area for circuit disposing and the possible amount of chip components that may be mounted in the substrate.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: October 17, 2023
    Assignee: UNIMICRON TECHNOLOGY CORP.
    Inventors: Yu-Shen Chen, Chung-Yu Lan
  • Patent number: 11780769
    Abstract: A method includes depositing a glass frit on sidewalls of a plurality of cavities of a shaped article formed from a glass material, a glass ceramic material, or a combination thereof. The glass frit is heated to a firing temperature above a glass transition temperature of the glass frit to sinter the glass frit into a glaze disposed on the sidewalls of the plurality of cavities.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: October 10, 2023
    Assignee: CORNING INCORPORATED
    Inventors: Melinda Ann Drake, Lisa Ann Lamberson, Robert Michael Morena, Linda Frances Reynolds-Heffer
  • Patent number: 11784392
    Abstract: A film transmission line according to an embodiment of the present invention includes a dielectric layer, and an electrode line disposed on the dielectric layer. The electrode line has an effective efficiency of 200%/?m or more at a frequency of 5 GHz or more. The film transmission line may be applied to a high frequency thinned antenna and an image display device.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: October 10, 2023
    Assignee: DONGWOO FINE-CHEM CO., LTD.
    Inventors: Yoon Ho Huh, Jong Min Kim, Dong Pil Park
  • Patent number: 11772410
    Abstract: A magnetic erasable writable material for large format applications is disclosed, and includes a cast polyvinylchloride film with a mount surface opposite an etched receiver surface. Also incorporated is a transparent polyester film that has a marking side with a first predetermined hardness and an opposite seal side, laminated to the receiver surface. The marking side includes a clear superstrate that has a second predetermined hardness and applied to the marking side of the polyester film to lower its surface energy. The receiver surface is treated to have a surface energy adjusted to enable improved adherence of printed and preformed graphic elements, which are encapsulated when laminated between the PET film and receiver surface. The superstrate includes a perfluoropolyether, a polyurethane, an acrylated polyurethane, and/or an acrylate resin to harden the material.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: October 3, 2023
    Inventor: Kelly J. Taylor
  • Patent number: 11772178
    Abstract: An embodiment of the disclosure is directed to a multi-layer contact plate configured to establish electrical bonds to battery cells in a battery module, comprising a first plate section configured with a first set of raised dimples on an inner side of the first plate section, a second plate section configured with a second set of raised dimples on an inner side of the second plate section, a cell terminal connection layer sandwiched between the first and second plate sections, wherein a portion of the cell terminal connection layer is configured to form a set of bonding connectors to provide a direct electrical bond between the multi-layer contact plate and terminals of at least one group of battery cells, and a set of inter-layer connection points arranged between at least the first and second plate sections, each of the set of inter-layer connection points being arranged where raised dimples on the first and second plate sections are aligned with each other.
    Type: Grant
    Filed: January 8, 2020
    Date of Patent: October 3, 2023
    Assignee: AMERICAN BATTERY SOLUTIONS, INC.
    Inventors: Heiner Fees, Andreas Track, Ralf Maisch, Alexander Eichhorn, Jörg Damaske, Valentin Brokop, Hans-Joachim Pflüger, Claus Gerald Pflüger
  • Patent number: 11776870
    Abstract: A method includes applying a sintering precursor material layer to each of a first surface and a second surface of a ceramic tile, and assembling a precursor assembly of a direct bonded copper (DBC) substrate by coupling a first leadframe on the sinter precursor material layer on the first surface of the ceramic tile and a second leadframe on the second surface of the sinter precursor material layer on a second surface of the ceramic tile such that the ceramic tile is disposed between the first leadframe and the second leadframe. The method further includes sinter bonding the first leadframe and the second leadframe to the ceramic tile to form a sinter bonded DBC substrate.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: October 3, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Erik Nino Mercado Tolentino, Shutesh Krishnan, Francis J. Carney
  • Patent number: 11770894
    Abstract: A printed circuit board includes a rigid region and a flexible region; a first substrate disposed on the rigid region and the flexible region and comprising a first insulating layer and a first wiring layer comprising a first groove in the flexible region; and a second substrate disposed on the first substrate in the rigid region and comprising a first adhesive layer, a second insulating layer and a second wiring layer.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: September 26, 2023
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Hiroki Okada
  • Patent number: 11762158
    Abstract: An optoelectronic device, e.g. of a photocell or light barrier, comprising an electrical-to-optical or optical-to-electrical transducer, and an optical tube assembly comprising an optical chamber, a first aperture proximal with respect to the transducer, and a second, distal aperture being formed in chamber wall. In at least one first half-section taken e.g. along optical axis, at least an intermediate portion of the chamber wall extending between a first and a second line has a local tangent at each point (P) oriented so that any stray light ray incoming from the boundary point of the first aperture in the opposite half-section would be so deviated at that point (P) as to impinge upon the chamber wall at an impingement point (Q) in said first halfsection and more distal than the distal line.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: September 19, 2023
    Assignee: Datalogic IP Tech S.R.L.
    Inventor: Piero Lovato
  • Patent number: 11757044
    Abstract: An electrode structure is disclosed, which includes a buffer layer disposed on a substrate; and an electrode disposed on a surface of the buffer layer away from the substrate, an edge of the electrode including an extension surface extending from a surface of the electrode away from the substrate, and the extension surface is in contact with a surface of the buffer layer and forms an included angle with a surface of the buffer layer contacting the electrode. An anti-reflection layer is disposed at the edge of the electrode, the anti-reflection layer surrounds and covers the edge of the electrode, and the anti-reflection layer extends to be in contact with the buffer layer. An undercut structure is formed between an outer surface of the anti-reflection layer and the surface of the buffer layer.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: September 12, 2023
    Assignee: TCL China Star Optoelectronics Technology Co., Ltd.
    Inventors: Wenbo Liu, Yuanke Huang
  • Patent number: 11756799
    Abstract: A ceramic article. In some embodiments, the ceramic article includes a ceramic body composed of a ceramic material; and a first conductive trace, the first conductive trace having a first portion entirely within the ceramic material, the first portion having a length of 0.5 mm and transverse dimensions less than 500 microns, the ceramic material including a plurality of ceramic particles in a ceramic matrix.
    Type: Grant
    Filed: February 2, 2021
    Date of Patent: September 12, 2023
    Assignee: HRL LABORATORIES, LLC
    Inventors: Tobias Schaedler, Kayleigh Porter, Phuong Bui
  • Patent number: 11753725
    Abstract: According to one aspect of the present invention, a non-metal member having a colored surface is provided. The non-metal member having a colored surface includes a non-metal substrate; a metal coating layer disposed on the non-metal substrate; a light-transmissive dielectric layer disposed on the metal coating layer; and a color pattern structure disposed on the light-transmissive dielectric layer.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: September 12, 2023
    Assignee: Korea Institute of Science and Technology
    Inventors: Ji Young Byun, Kwang-deok Choi, In Uk Baek
  • Patent number: 11756924
    Abstract: A method of fabricating a semiconductor chip includes the following steps. A bonding material layer is formed on a first wafer substrate and is patterned to form a first bonding layer having a strength adjustment pattern. A semiconductor component layer and a first interconnect structure layer are formed on a second wafer substrate. The first interconnect structure layer is located. A second bonding layer is formed on the first interconnect structure layer. The second wafer substrate is bonded to the first wafer substrate by contacting the second bonding layer with the first bonding layer. A bonding interface of the second bonding layer and the first bonding layer is smaller than an area of the second bonding layer. A second interconnect structure layer is formed on the semiconductor component layer. A conductor terminal is formed on the second interconnect structure layer.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: September 12, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hong-Wei Chan, Jiing-Feng Yang, Yung-Shih Cheng, Yao-Te Huang, Hui Lee
  • Patent number: 11738103
    Abstract: The present disclosure relates to a device for nebulizing a liquid composition and to methods for disinfecting an internal channel of the nebulizer device. The device includes a channel connecting a liquid composition inlet, a mesh and a liquid composition outlet. The mesh divides the channel into an input channel portion and into an output channel portion. The channel is at least partially optically transparent to bacterial disinfecting electromagnetic radiation. The device includes a first emitter configured to illuminate the input portion of the channel with the bacterial disinfecting electromagnetic radiation and a second emitter configured to illuminate the output portion of the channel with the bacterial disinfecting electromagnetic radiation.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: August 29, 2023
    Assignee: LAINOMEDICAL S.L.
    Inventors: Gonzalo Jabat Rico, Francesc Paris Huguet
  • Patent number: 11731447
    Abstract: It is the object of the present invention to provide a new polymer coating for low temperature plastics and plastic foams that allows for the application of disperse dyes in a sublimation process that preserves the original properties of the underlying plastic substrate. The composition includes an optically clear synthetic organic polymer base holding two layers, a first reflective layer supported by the low temperature plastic substrate that includes IR radiation reflecting additives, and a second layer supported by the first layer having light scattering particulate additives. The disperse dyes utilized in the invention may include additives to absorb IR radiation provided by an external IR source positioned above the disperse dyes causing the dyes to sublimate and diffuse quickly into the light scattering layer. The combination of these layers allows for diffusion of the disperse dye ink into the light scattering layer while protecting the low temperature plastic below.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: August 22, 2023
    Assignee: Conde Systems, Inc.
    Inventor: Paul Andrew Ramsden
  • Patent number: 11730017
    Abstract: A method of fabricating a display device may include forming a preliminary first pixel definition layer by coating a first material on a base substrate including a first electrode, forming a first pixel definition layer by forming a first opening in the preliminary first pixel definition layer, the first opening exposing the first electrode, performing a plasma treatment on the first pixel definition layer, forming a preliminary organic layer by providing a first organic material, forming a preliminary second pixel definition layer by coating a second material on the first pixel definition layer, forming a second pixel definition layer by forming a second opening in the preliminary second pixel definition layer, the second opening overlapping with the first opening, and forming an organic layer by providing a second organic material. A thickness of the organic layer may be greater than a thickness of the preliminary organic layer.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: August 15, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventor: Jaekwon Hwang
  • Patent number: 11715604
    Abstract: A method of producing a multi-layer ceramic electronic component includes: forming a base film formed from an electrically conductive material on a surface of a ceramic body including internal electrodes laminated and drawn to the surface in such a manner that the base film is connected to the internal electrodes; forming a first nickel film on the base film by an electrolytic plating method; performing, after forming the first nickel film, heat treatment in a weakly reducing atmosphere at a temperature equal to or higher than a temperature at which the first nickel film is recrystallized; and forming a second nickel film on the first nickel film, on which the heat treatment is performed, by an electrolytic plating method.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: August 1, 2023
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Tomoki Sakai
  • Patent number: 11709410
    Abstract: Provided is a black partition wall pattern film that comprises: a transparent substrate; an electrode layer provided on the transparent substrate; a black partition wall pattern provided on the electrode layer; and a black UV-curable resin layer provided in a region of the electrode layer where no black partition wall pattern is provided.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: July 25, 2023
    Assignee: LG CHEM, LTD.
    Inventors: Yong Goo Son, Nam Seok Bae, Seung Heon Lee
  • Patent number: 11701912
    Abstract: It is the object of the present invention to provide a new polymer coating for low temperature plastics and plastic foams that allows for the application of disperse dyes in a sublimation process that preserves the original properties of the underlying plastic substrate. The composition includes an optically clear synthetic organic polymer base holding two layers, a first reflective layer supported by the low temperature plastic substrate that includes IR radiation reflecting additives, and a second layer supported by the first layer having light scattering particulate additives. The disperse dyes utilized in the invention may include additives to absorb IR radiation provided by an external IR source positioned above the disperse dyes causing the dyes to sublimate and diffuse quickly into the light scattering layer. The combination of these layers allows for diffusion of the disperse dye ink into the light scattering layer while protecting the low temperature plastic below.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: July 18, 2023
    Assignee: Conde Systems, Inc.
    Inventor: Paul Andrew Ramsden
  • Patent number: 11702725
    Abstract: A bonding structure includes: a plurality of carbon nanotubes; a first bonded member, and a first metal sintered compact bonding first end portions of the plurality of carbon nanotubes and the first bonded member, wherein the first metal sintered compact enters spaces between the first end portions of the plurality of carbon nanotubes, and bonds to the plurality of carbon nanotubes while covering side faces and end faces of the first end portions of the plurality of carbon nanotubes.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: July 18, 2023
    Assignee: FUJITSU LIMITED
    Inventors: Shinichi Hirose, Daiyu Kondo
  • Patent number: 11700697
    Abstract: The insertion loss of a multilayer substrate and an antenna element is reduced. A multilayer substrate according to an embodiment of the present disclosure includes a multilayer body, a wire conductor, and a first ground electrode. The multilayer body is formed by dielectric layers being layered. The wire conductor is formed in the multilayer body, and a radio frequency signal passes through the wire conductor. The first ground electrode is formed in or on the multilayer body and includes a first surface that faces the wire conductor. The first surface includes a first region and a second region. The surface roughness of the first region is lower than the surface roughness of the second region. The first region overlaps at least part of the wire conductor in plan view in a direction normal to the first ground electrode.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: July 11, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Saneaki Ariumi, Tomoshige Furuhi, Sho Suzuki
  • Patent number: 11697230
    Abstract: A method may include coating an electronic module in a tool, where the electronic module has a first sub-module and a second sub-module, where the tool has a first tool part and a second tool part, where the tool has a cavity at least partially formed between the first tool part and the second tool part, and where the first sub-module and the second sub-module are supported on the tool and held in the cavity at a spatially defined distance relative to one another in a contactless manner during the coating process. A tool for performing such method may include a first tool part and a second tool part that form a cavity, where the first tool part has a first molding surface section and at least one first supporting section that extends over the first molding surface section and the second tool part has a second molding surface section and at least one second supporting section that extends over the second molding surface section.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: July 11, 2023
    Assignee: ZF Friedrichshafen AG
    Inventors: Marco Knier, Thomas Deichler, Christoph Schikora
  • Patent number: 11692049
    Abstract: A thermoset resin for forming parts to be metal plated includes a vat photopolymerization (VPP) thermoset resin and an etchable phase disposed in the VPP thermoset resin. The etchable phase is etched from a surface of a part formed from the VPP thermoset resin such that a plurality of micro-mechanical locking sites is formed on the surface of the part. The etchable phase is at least one of organic particles, organic resins, inorganic particles, and copolymers of the VPP thermoset resin. For example, the etchable phase can be a polybutadiene phase and/or a mineral such as calcium carbonate.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: July 4, 2023
    Assignee: Ford Global Technologies, LLC
    Inventors: Xiaojiang Wang, Shannon Christine Bollin, Robert D. Bedard, Matthew Cassoli, Ellen Cheng-chi Lee
  • Patent number: 11685185
    Abstract: A three-dimensionally shaped object forming sheet includes: a thermally expansive layer distending at a predetermined temperature or higher; a base laminated on one side thereof with the thermally expansive layer; and a photothermal conversion layer for converting absorbed light to heat, formed on at least one side, wherein the base includes a first base and a second base that are laminated; and the first base has an elasticity that is greater than an elasticity of the second base.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: June 27, 2023
    Assignee: CASIO COMPUTER CO., LTD.
    Inventors: Yuji Horiuchi, Yoshimune Motoyanagi, Satoshi Mitsui, Hideki Takahashi
  • Patent number: 11687040
    Abstract: A method for fabricating a composite timepiece or jewellery component: a base is made in a substrate with an apparent surface remaining visible; each visible apparent surface is mirror polished; each polished apparent surface is coated with a first transparent or coloured semi-transparent layer of a first material in a dry process, or PVD or CVD or ALD process, or lacquering or zapon varnish process; a decorative element is affixed and bonded to an external surface of the first layer; the first layer and each decorative element is coated with a second layer of a transparent treatment material in a dry process, or PVD or CVD or ALD process, or lacquering or zapon varnish process.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: June 27, 2023
    Assignee: OMEGA SA
    Inventors: Frederic Jeanrenaud, Gregory Kissling
  • Patent number: 11685987
    Abstract: A layer of lanthanum boride of stoichiometry LaBx where x is between 9 and 12 is deposited on substrate, for example a stainless steel watch dial, and subsequently treated with a laser, such that the portion(s) of the layer treated with the laser change colour according to the laser power. This produces multicoloured surfaces having high resistance to corrosion and abrasion. The layer of LaBx is deposited by PVD and by cathode sputtering, using a LaB6 target of purple-violet colour, such that the colour of the deposited layer differs from the colour of the target. The laser treatment at specific powers changes the stoichiometry of the layer in the treatment portions, such that the colour of these portions changes according to the stoichiometry obtained. At higher powers, the laser will remove the layer of LaBx. Thus the colour of the treated portions is determined by the material of the substrate.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: June 27, 2023
    Assignee: The Swatch Group Research and Develonment Ltd
    Inventors: Christian Manasterski, Marion Gstalter
  • Patent number: 11680332
    Abstract: Provided is a surface-treated copper foil excellent in laser processability. The surface-treated copper foil includes a roughened surface formed by subjecting a surface to a roughening treatment, in which when measured using a three-dimensional roughness meter, the roughened surface has a surface skewness Ssk within a range of from ?0.300 to less than 0 and an arithmetic mean summit curvature Ssc within a range of from 0.0220 nm?1 to less than 0.0300 nm?1.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: June 20, 2023
    Assignees: Furukawa Electric Co., Ltd., Murata Manufacturing Co., Ltd.
    Inventors: Takahiro Tsuruta, Takeo Uno, Yuko Okuno, Sunao Fukutake, Yoshimasa Nishi
  • Patent number: 11673842
    Abstract: A method of forming one or more high temperature co-fired ceramic articles, comprising the steps of:— a) forming a plurality of green compacts, by a process comprising dry pressing a powder comprising ceramic and organic binder to form a green compact; b) disposing a conductor or conductor precursor to at least one surface of at least one of the plurality of green compacts to form at least one patterned green compact; c) assembling the at least one patterned green compact with one or more of the plurality of green compacts or patterned green compacts or both to form a laminated assembly; d) isostatically pressing the laminated assembly to form a pressed laminated assembly; e) firing the pressed laminated assembly at a temperature sufficient to sinter the ceramic layers together.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: June 13, 2023
    Assignee: Morgan Advanced Ceramics, Inc.
    Inventors: Samuel H. Ahrendes, Gary D. Harland, Chengtsin Lee, Edward Tomasek, George York
  • Patent number: 11667107
    Abstract: This metal-carbon fiber reinforced resin material composite includes a metal member, a coating layer that is disposed on at least a part of a surface of the metal member and contains a resin, a carbon fiber reinforced resin material layer that is disposed on at least a part of a surface of the coating layer and contains a matrix resin and a carbon fiber material that is present in the matrix resin, and an electrodeposition film disposed so as to cover at least all of surfaces of the carbon fiber reinforced resin material layer, an interface between the metal member and the coating layer, and an interface between the coating layer and the carbon fiber reinforced resin material layer, in which an average film thickness A of the electrodeposition film formed on the surface of the carbon fiber reinforced resin material layer is 0.3 to 1.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: June 6, 2023
    Assignee: NIPPON STEEL CORPORATION
    Inventors: Yasuaki Kawamura, Kohei Ueda, Masumi Koori
  • Patent number: 11665828
    Abstract: Disclosed is a method for manufacturing an FCCL capable of controlling flexibility and stiffness of a conductive pattern. The method for manufacturing an FCCL (Flexible Copper Clad Laminate) includes: an electroforming step of forming a conductive pattern on a mold for electroforming through electroforming; and a transfer step of transferring the conductive pattern from the mold for electroforming to the bottom of a polymer plastic film, wherein the electroforming process is performed in a plating bath equipped with a first metal, a second metal and a third metal, wherein the first metal is copper (Cu), the second metal serves to add flexibility and is one of tin (Sn), gold (Au), silver (Ag) and aluminum (Al), and the third metal serves to add stiffness and is one of nickel (Ni), cobalt (Co), chrome (Cr), iron (Fe), tungsten (W) and titanium (Ti).
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: May 30, 2023
    Assignee: SAMWON ACT CO., LTD.
    Inventors: Kyung Yul Lee, Kwang Jong Choi, Pyoung Woo Lee, Doo Yul Baek
  • Patent number: 11654709
    Abstract: An optically variable security element has a multicolored, reflective areal region including a first relief structure disposed at a higher level than a second relief structure. The first relief structure has a first ink coating and the second relief structure has a second, different ink coating. The two relief structures overlap in an overlap region. The first ink coating of the first relief structure is disposed at a higher level in the overlap region and has at least one recess the dimension of which is more than 140 ?m. The first ink coating comprises an edge region adjoining the recess, and as a bicolor register feature the first relief structure lets the edge region of the first ink coating appear with a first color impression and the second relief structure through the recess lets the second ink coating appear with a second, different color impression in mutual register.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: May 23, 2023
    Assignee: GIESECKE+DEVRIENT CURRENCY TECHNOLOGY GMBH
    Inventors: Kai Herrmann Scherer, Maik Rudolf Johann Scherer, Raphael Dehmel, Michael Rahm, Giselher Dorff, Andreas Rauch, Christian Fuhse, Tobias Sattler
  • Patent number: 11647581
    Abstract: A ceramic electronic component that includes an electronic component body having a superficial base ceramic layer; a surface electrode on a surface of the electronic component body, a peripheral section of the surface electrode having an opening therein; and a covering ceramic layer covering the peripheral section of the surface electrode and the opening therein.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: May 9, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yuki Takemori
  • Patent number: 11647584
    Abstract: A circuit board includes a first metal layer; a second metal layer that is arranged on the first metal layer; and a sealing resin with which a space between the first metal layer and the second metal layer is filled, wherein the second metal layer includes an electrode that protrudes from an upper surface of the sealing resin and that has an end face on which an electronic part is mountable; and an interlayer connector whose upper surface is exposed in a position lower than the end face of the electrode from the upper surface of the sealing resin and that makes contact with the first metal layer.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: May 9, 2023
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Tetsuichiro Kasahara, Tsukasa Nakanishi, Koji Watanabe, Jun Izuoka
  • Patent number: 11643596
    Abstract: A layer in which a primary phase composed of a columnar crystal material and a secondary phase composed of a material different from the primary phase are phase-separated being included as a base for forming a columnar crystal of scintillator plate improves separation of columnar crystals from each other and suppresses light scattering from occurring so as to realize a scintillator having high resolution.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: May 9, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tomoyuki Oike
  • Patent number: 11637058
    Abstract: An interconnection structure includes a dielectric layer, and a wiring pattern in the dielectric layer. The wiring pattern includes a via body, a first pad body that vertically overlaps the via body, and a line body that extends from the first pad body. The via body, the first pad body, and the line body are integrally connected to each other, and a level of a bottom surface of the first pad body is lower than a level of a bottom surface of the line body.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: April 25, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ju-Il Choi, Jumyong Park, Jin Ho An, Chungsun Lee, Teahwa Jeong, Jeonggi Jin
  • Patent number: 11638348
    Abstract: A conductive interconnect structure comprises a polymeric substrate (e.g., a thermoplastic) and a plurality of compliant conductive microstructures (e.g., conductive carbon nanofibers) embedded in the polymeric substrate. The microstructures can be arranged linearly or in a grid pattern. In response to heating, the polymeric substrate transitions from an unshrunk state to a shrunken state to move the microstructures closer together, thereby increasing an interconnect density of the compliant conductive microstructures. Thus, the gap or pitch between adjacent microstructures is reduced in response to heat-induced shrinkage of the polymeric substrate to generate finely-pitched microstructures that are densely pitched, thereby increasing the current-carrying capacity of the microstructures.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: April 25, 2023
    Assignee: Raytheon Company
    Inventors: Kyle L. Grosse, Catherine Trent
  • Patent number: 11634830
    Abstract: Exemplary methods of electroplating include contacting a patterned substrate with a plating bath in an electroplating chamber, where the pattern substrate includes at least one opening having a bottom surface and one or more sidewall surfaces. The methods may further include forming a nanotwin-containing metal material in the at least one opening. The metal material may be formed by two or more cycles that include delivering a forward current from a power supply through the plating bath of the electroplating chamber for a first period of time, plating a first amount of the metal on the bottom surface of the opening on the patterned substrate and a second amount of the metal on the sidewall surfaces of the opening, and delivering a reverse current from the power supply through the plating bath of the electroplating chamber to remove some of the metal plated in the opening on the patterned substrate.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: April 25, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Jing Xu, John L. Klocke, Marvin L. Bernt, Eric J. Bergman, Kwan Wook Roh
  • Patent number: 11638380
    Abstract: An illumination apparatus including a transparent substrate, an opposite substrate and an electroluminescence structure disposed between the transparent substrate and the opposite substrate is provided. The transparent substrate has a first region and a second region adjacent to the first region. The electroluminescence structure is disposed on the transparent substrate. The electroluminescence structure includes a first electrode disposed in the first region, an optical adjusting layer disposed in the second region, an organic electroluminescence layer disposed above the first electrode and the optical adjusting layer and a common electrode disposed above the organic electroluminescence layer. The optical adjusting layer is disposed between the organic electroluminescence layer and the transparent substrate.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: April 25, 2023
    Assignee: Au Optronics Corporation
    Inventors: Hsin-Hui Wu, Kuan-Heng Lin, Meng-Ting Lee
  • Patent number: 11623133
    Abstract: A security-enhanced document including a substrate, at least one lower portion of graphic imaging with or without first variable indicia directly or indirectly digitally imaged on the substrate, at least one release coat applied over the lower portion, at least one scratch-off layer over the release coat to maintain the lower portion imaging unreadable until removal of the scratch-off layer, and at least one second surface material portion.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: April 11, 2023
    Assignee: Hydragraphix LLC
    Inventors: Kenneth Earl Irwin, Jr., Keith Cash, George Adkins
  • Patent number: 11619837
    Abstract: An active IR camouflage device may include a base layer, a first dielectric layer over the base layer, a phase transition material layer over the first dielectric layer, a second dielectric layer over the phase transition material layer, and a first metal layer over the second dielectric layer and defining a pattern of openings therein. The active IR camouflage device may have circuitry configured to selectively cause a transition from a first phase state to a second phase state of the phase transition material layer to control IR reflectance/emission of a top plasmonic layer, making it appear/disappear from the IR detector/camera. In some embodiments, the active IR camouflage device may also include a second metal layer between the base layer and the first dielectric layer.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: April 4, 2023
    Assignee: UNIVERSITY OF CENTRAL FLORIDA RESEARCH FOUNDATION, INC.
    Inventors: Debashis Chanda, Sayan Chandra
  • Patent number: 11621382
    Abstract: The present invention relates generally to an anodic oxide film for electric contact, to an optoelectronic display, and to a method of manufacturing the optoelectronic display. More particularly, the present invention relates to an anodic oxide film for electric contact to electrically connect an optical element and a substrate in a position therebetween, to an optoelectronic display, and to a method of manufacturing the optoelectronic display.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: April 4, 2023
    Assignee: POINT ENGINEERING CO., LTD.
    Inventors: Bum Mo Ahn, Seung Ho Park, Dong Hyeok Seo
  • Patent number: 11617272
    Abstract: A multilayer circuit board structure includes superconducting connections to internal layers thereof, for example by inclusion of superconducting vias. Two or more panels can each comprise respective electrically insulative substrates, each have one or more through-holes, and also include a respective bimetal foil on at least a portion of a respective surface thereof, which is patterned to form traces. The bimetal foil includes a first metal that is non-superconductive in a first temperature range and a second metal that is superconductive in the first temperature range. The panels are plated to deposit a third metal on exposed traces of the second metal, the third metal superconductive in the first temperature range. Panels are join (e.g., laminated) to form at least a three-layer superconducting printed circuit board with an inner layer, two outer layers, and superconducting vias between the inner layer and at least one of the two outer layers.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: March 28, 2023
    Assignee: D-WAVE SYSTEMS INC.
    Inventor: Richard D. Neufeld
  • Patent number: 11610799
    Abstract: In one example, an electrostatic chuck comprises a chuck body having a top surface configured to support a substrate and a bottom surface opposite the top surface. The chuck body comprises one or more chucking electrodes, and one or more heating elements. The chuck body further comprises first terminals disposed on the bottom surface of the chuck body and coupled with the one or more heating elements, second terminals disposed on the bottom surface of the chuck body and coupled with the one or more chucking electrodes, and third terminals disposed on the bottom first surface of the chuck body and coupled with the one or more chucking electrodes.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: March 21, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Bhaskar Prasad, Kirankumar Neelasandra Savandaiah, Srinivasa Rao Yedla, Nitin Bharadwaj Satyavolu, Hari Prasath Rajendran, Lakshmikanth Krishnamurthy Shirahatti, Thomas Brezoczky
  • Patent number: 11612056
    Abstract: A first substrate includes a first surface and a second surface opposite to the first surface. A second substrate includes a third surface and a fourth surface opposite to the third surface. A third substrate includes a fifth surface and a sixth surface opposite to the fifth surface. The first substrate is made of an insulator, and includes a mounting portion for mounting an electronic element at the first surface, and the mounting portion for mounting the electronic element is a rectangular shape. The third substrate is made of a carbon material, and the fifth surface is connected to at least the second surface at location overlapped with the mounting portion for mounting the electronic element in plan view. The third substrate has a larger heat conduction in a direction perpendicular to the longitudinal direction of the mounting portion than heat conduction in the longitudinal direction of the mounting portion in plan view.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: March 21, 2023
    Assignee: KYOCERA Corporation
    Inventors: Yukio Morita, Noboru Kitazumi, Yousuke Moriyama
  • Patent number: 11598001
    Abstract: A film forming method includes: preparing a substrate having a metal layer formed on a surface of a first region and an insulating layer formed on a surface of a second region, wherein the metal layer is formed of a first metal; forming a self-assembled film on a surface of the metal layer by supplying a source gas of the self-assembled film; after forming the self-assembled film, forming an oxide film of a second metal on the insulating layer through an atomic layer deposition method by repeating a supply of a precursor gas containing the second metal and a supply of an oxidizing gas; and reducing an oxide film of the first metal formed on a surface of the first metal by supplying a reducing gas after the supply of the oxidizing gas and before the supply of the precursor gas.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: March 7, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Shuji Azumo, Shinichi Ike, Yumiko Kawano
  • Patent number: 11588093
    Abstract: There is provided a method for fabricating a device. On a top surface of a substrate, a first layer of a first deposition material is formed. The first layer of the first deposition material is patterned to create a seed pattern of remaining first deposition material. Homoepitaxy is used to grow a second layer of the first deposition material on the seed pattern.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: February 21, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Pavel Aseev, Philippe Caroff-Gaonac'h
  • Patent number: 11589462
    Abstract: A semi-flexible component carrier includes a stack having at least one electrically conductive layer structure and at least one electrically insulating layer structure. The layer structures are stacked on top of each other in a stacking direction s. A recess extends from a first main surface of the stack into the stack and extends only partially into one of the at least one electrically insulating layer structure so that an electrically insulating layer structure having a stepped portion is formed. The stepped portion provides a flexible region of the stack with respect to a rigid region of the stack.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: February 21, 2023
    Assignee: AT&S(China) Co. Ltd.
    Inventors: Nick Xin, Mikael Andreas Tuominen, Seok Kim Tay
  • Patent number: 11587844
    Abstract: Electronic device package on package (POP) technology is disclosed. A POP can comprise a first electronic device package including a heat source. The POP can also comprise a second electronic device package disposed on the first electronic device package. The second electronic device package can include a substrate having a heat transfer portion proximate the heat source that facilitates heat transfer from the heat source through a thickness of the substrate. The substrate can also have an electronic component portion at least partially about the heat transfer portion that facilitates electrical communication. In addition, the POP can comprise an electronic component operably coupled to the electronic component portion.
    Type: Grant
    Filed: July 2, 2016
    Date of Patent: February 21, 2023
    Assignee: Intel Corporation
    Inventors: Eng Huat Goh, Jiun Hann Sir, Min Suet Lim, Xi Guo