Printed Circuit Patents (Class 428/901)
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Patent number: 6706409Abstract: An incombustible resin composition in which a silicone oligomer, a metal hydrate and a resin material are contained as essential components, the metal hydrate is 20% by weight or more in the total solids of the resin composition is provided.Type: GrantFiled: October 11, 2001Date of Patent: March 16, 2004Assignee: Hitachi Chemical Co., Ltd.Inventors: Nozomu Takano, Tomio Fukuda, Masato Miyatake
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Patent number: 6703144Abstract: A semiconductor structure including a first substrate, and an epitaxial layer bonded to the substrate. The epitaxial layer has a threading dislocation density of less than 107 cm−2 and an in-plane lattice constant that is different from that of the first substrate and a second substrate on which the epitaxial layer is fabricated. In another embodiment, there is provided a method of processing a semiconductor structure including providing a first substrate; providing a layered structure including a second substrate having an epitaxial layer provided thereon, the epitaxial layer having an in-plane lattice constant that is different from that of the first substrate and a threading dislocation density of less than 107 cm−2; bonding the first substrate to the layered structure; and removing the second substrate.Type: GrantFiled: March 18, 2003Date of Patent: March 9, 2004Assignee: AmberWave Systems CorporationInventor: Eugene A. Fitzgerald
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Patent number: 6704207Abstract: A printed circuit board (PCB) includes a first layer having first and second surfaces, with an above-board device mounted thereon. The PCB includes a second layer having third and fourth surfaces. One of the surfaces can include a recessed portion for securedly holding an interstitial component. A via, electrically connecting the PCB layers, is also coupled to a lead of the interstitial component.Type: GrantFiled: September 20, 2002Date of Patent: March 9, 2004Assignee: Hewlett-Packard Development Company, L.P.Inventor: Dale R. Kopf
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Publication number: 20040040651Abstract: To provide a simplified method of making a multi-layer circuit board capable of observing a high density surface mounting of electronic parts, a method is provided for making a multi-layer circuit board including a first film (A) and at least two more films, second and third films (B and C), each being made of thermoplastic polymer capable of forming an optically anisotropic melt phase. The first film (A) has a low melting point (Tm1), and the second and third films (B and C) have respective melting points (Tm2B and Tm2C) higher than the melting point (Tm1) of the first film (A). And at least one of the second and the third films have a circuit pattern thereon. The first to third films (A to C) are thermo compressed together with the first film (A) interposed between the second and third films (B and C).Type: ApplicationFiled: August 13, 2003Publication date: March 4, 2004Applicant: Kuraray Co., Ltd.Inventors: Toshinori Tsugaru, Tatsuya Sunamoto, Tadao Yoshikawa
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Publication number: 20040038049Abstract: The present invention is to provide an ultra-thin copper foil with a carrier which comprises a release layer, a diffusion preventive layer and a copper electroplating layer laminated in this order, or a diffusion preventive layer, a release layer and a copper electroplating layer laminated in this order on the surface of a carrier foil, wherein a surface of the copper electroplating layer is roughened; a copper-clad laminated board comprising the ultra-thin copper foil with a carrier being laminated on a resin substrate; a printed wiring board comprising the copper-clad laminated board on the ultra-thin copper foil of which is formed a wiring pattern; and a multi-layered printed wiring board which comprising a plural number of the above printed wiring board being laminated.Type: ApplicationFiled: March 20, 2003Publication date: February 26, 2004Applicant: CIRCUIT FOIL JAPAN CO., LTD.Inventors: Akitoshi Suzuki, Shin Fukuda, Kazuhiro Hoshino, Tadao Nakaoka
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Patent number: 6692818Abstract: A method for manufacturing a circuit board with high thermal dissipation includes the following steps: preparing a thermal conductive resin composition including 70 to 95 mass % of an inorganic filler and 5 to 30 mass % of a resin composition that includes a liquid thermosetting resin, a thermoplastic resin powder, and a latent curing agent; bonding the thermal conductive resin composition and a metal foil together by heating at a temperature lower than a temperature at which the thermosetting resin starts to cure while applying pressure so that the thermal conductive resin composition increases in viscosity and thus is solidified irreversibly; providing holes and curing the thermosetting resin to form an insulating substrate; and forming through holes and a circuit pattern. This method can achieve improved productivity and low cost in processing the holes. It is preferable that the thermal conductive resin composition is integral with a reinforcing material.Type: GrantFiled: June 5, 2002Date of Patent: February 17, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Koichi Hirano, Yoshihisa Yamashita, Seiichi Nakatani
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Publication number: 20040028883Abstract: A printed circuit board for an electronic circuit, especially for the ultra-high frequencies located in the GHz range that comprises at least one conductor layer, which is arranged on top of an insulating layer and which is flatly joined to said insulating layer. Improved mechanical, thermal and electrical properties are attained by virtue of the fact that the insulating layer is a thin glass layer.Type: ApplicationFiled: April 11, 2003Publication date: February 12, 2004Inventors: Peter Straub, Peter Weber
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Patent number: 6689471Abstract: A thermal management device includes anisotropic carbon encapsulated in an encapsulating material that is applied directly to the anisotropic carbon, wherein the anisotropic carbon includes graphite. An electrical system includes the thermal management device and electrical contacts and/or devices provided on the surface of the thermal management device. A method of fabricating a thermal management device includes cleaning a surface of anisotropic carbon, applying a coat of encapsulating material directly to the cleaned surface, and repeating the step of applying until the anisotropic carbon is encapsulated. Other embodiments of the invention are also described.Type: GrantFiled: January 2, 2003Date of Patent: February 10, 2004Assignees: Queen Mary and Westfield College, University of LondonInventors: Angelo Gandi, Rui De Oliveira, Anthony Arthur Carter
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Patent number: 6686029Abstract: A circuit board includes an electrical insulator layer formed of a reinforcer sheet with density distribution in its in-plane direction, an electrical conductor filled in a plurality of inner via holes provided in the electrical insulator layer in its thickness direction, and a wiring layer connected to the electrical conductor. The inner via holes provided in a high-density portion of the reinforcer sheet are formed to have a smaller cross-section than the inner via holes provided in a low-density portion of the reinforcer sheet. In this manner, it is possible to provide a circuit board that can achieve a high-density wiring and an inner via connection resistance with less variation, when a base material including a reinforcer sheet with density distribution in its in-plane direction such as a glass-epoxy base material is used for an insulator layer.Type: GrantFiled: February 24, 2003Date of Patent: February 3, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takeshi Suzuki, Toshihiro Nishii, Satoru Tomekawa, Fumio Echigo
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Publication number: 20040018373Abstract: The invention provides a method for manufacturing printed wiring substrates which can manufacture printed wiring substrates each having resin dielectric layers of uniform thickness and excellent surface flatness while maintaining favorable cutting performance in a dicing step. A multi-printed wiring-substrate panel is manufactured which includes a metal plate having a first main surface and a second main surface, and resin dielectric layers disposed on the first and second main surfaces. The metal plate has first depression portions and second depression portions. The first depression portions are opened at the first main surface and arranged discontinuously along predetermined cutting lines. The second depression portions are opened at the second main surface and arranged discontinuously along the predetermined cutting lines. The multi-printed wiring-substrate panel is cut along the predetermined cutting lines into a plurality of printed wiring substrates.Type: ApplicationFiled: January 10, 2003Publication date: January 29, 2004Inventors: Tomoe Suzuki, Shinji Yuri, Kazuhisa Sato, Kozo Yamasaki
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Patent number: 6682802Abstract: Apparatus and methods are presented for reinforcing and stiffening a printed circuit board (PCB) in selected locations by utilizing preferentially oriented fibers. Selected fibers within the polymeric material matrix of the PCB fiber-matrix layer are removed and replaced with a similar quantity of fibers in a preferential orientation. Various combinations of layering of modified fiber-matrix layer material with conventional fiber-matrix layer material are presented to achieve the desired PCB stiffening. Printed circuit boards, under the weight of heavy attached electronic components, may deflect or flex along an axis, defined as the characteristic fold. This flexing is exasperated with manufacturing and handling loading, particularly when mounted in a chassis. Preferentially orientated fibers laid transverse to the characteristic fold reinforces the area to resist flexure within the area surrounding the characteristic fold.Type: GrantFiled: December 14, 2000Date of Patent: January 27, 2004Assignee: Intel CorporationInventors: George Hsieh, Terrance J. Dishongh, Scott Dixon
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Publication number: 20040009335Abstract: A solvent-free filling material comprising a filler, a thermosetting resin, a curing agent, and a curing catalyst, wherein the thermosetting resin is an epoxy resin, and the curing agent is a dicyandiamide curing agent; a multilayer printed wiring board comprising a substrate, a through-hole, the filling material filling the through-hole, and a conductor layer formed on an exposed surface of the filling material in the through-hole; and a process for producing the multilayer printed wiring board.Type: ApplicationFiled: July 9, 2003Publication date: January 15, 2004Applicant: NGK SPARK PLUG CO., LTD.Inventors: Toshifumi Kojima, Makoto Wakazono, Toshikatu Takada
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Publication number: 20040009334Abstract: A plurality of single cells 10a to 10d, each being packaged by laminate films 12 and 13, are attached onto one surface of a flexible printed circuit board 20, in a state of being interconnected in series to each other, by the use of a double faced tape. Single cells 10a′ to 10d′ are attached in a similar way onto the other surface of the flexible printed circuit board 20. Each group of the cells on the both surfaces of the flexible printed circuit board 20 are interconnected in parallel. Voltage detection lines 30a to 30e are wired on the flexible printed circuit board 20. Positive and negative electrode tabs 14 and 15 of the respective single cells are connected to the respectively corresponding voltage detection lines 30a to 30e through connection terminals 31a to 31e provided on the flexible printed circuit board 20.Type: ApplicationFiled: July 2, 2003Publication date: January 15, 2004Applicant: NISSAN MOTOR CO., LTD.Inventors: Takeshi Miyamoto, Yuji Nakada
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Patent number: 6673441Abstract: An adhesive which comprises (1) 100 parts by weight of an epoxy resin and a hardener therefor, (2) 75 to 300 parts by weight of an epoxidized acrylic copolymer having a glycidyl (meth)acrylate unit content of 0.5 to 6 wt. %, a glass transition temperature of −10° C. or higher and a weight average molecular weight of 100,000 or more and (3) 0.1 to 20 parts by weight of a latent curing accelerator; an adhesive member having a layer of the adhesive; an interconnecting substrate for semiconductor mounting having the adhesive member; and a semiconductor device containing the same.Type: GrantFiled: November 29, 2001Date of Patent: January 6, 2004Assignee: Hitachi Chemical Company, Ltd.Inventors: Yuko Tanaka, Yasushi Shimada, Teiichi Inada, Hiroyuki Kuriya, Kazunori Yamamoto, Yasushi Kumashiro, Keiji Sumiya
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Patent number: 6667090Abstract: A registration coupon is provided for a printed circuit board or other substrate. The registration coupon may be used to determine a hole-to-outer layer feature registration and a solder mask registration. The registration coupon may include a registration hole provided on the circuit board, a metal pad and an anti-pad provided on the circuit board about the registration hole, and a solder mask covering the metal pad.Type: GrantFiled: September 26, 2001Date of Patent: December 23, 2003Assignee: Intel CorporationInventors: David W. Boggs, Rebecca A. Jessep, Carolyn McCormick, Daryl A. Sato, John H. Dungan
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Publication number: 20030231471Abstract: The invention relates to a structure of and a process of forming an integrated circuit package that utilizes a thermal interface material layer having an aligned array of carbon nanotubes affixed to a surface of the layer. The thermal interface material is diamond deposited by chemical vapor deposition. The carbon nanotubes are formed by a plasma discharge process on the surface of the CVDD and also may be formed on the surface of the die.Type: ApplicationFiled: June 12, 2002Publication date: December 18, 2003Applicant: Intel CorporationInventors: David S. De Lorenzo, Stephen W. Montgomery, Robert J. Fite
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Patent number: 6663946Abstract: An object of the invention is to satisfy all of a high-density wiring package, soldering thermal resistance, an insulating property and high-frequency transmission characteristics. The invention is a multi-layer wiring substrate having a lamination of a plurality of dielectric layers which are each provided with a wiring conductor made of a metallic foil on at least one of upper and bottom surfaces of the dielectric layer, the wiring conductors between which the dielectric layer is disposed being electrically connected with each other via a through conductor formed in the dielectric layer; on this occasion, the dielectric layers each individually are composed of a liquid crystal polymer layer and cladding layers made of a polyphenyleneether-type organic substance and formed on upper and bottom surfaces of the liquid crystal polymer layer.Type: GrantFiled: February 28, 2002Date of Patent: December 16, 2003Assignee: Kyocera CorporationInventors: Takuji Seri, Katsura Hayashi, Tadashi Nagasawa, Kenji Kume, Takahiro Matsunaga, Isao Miyatani
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Patent number: 6661676Abstract: A protective shielding device includes a circuit board having a notch and one or more holes formed in one side, and a shielding member engaged onto the circuit board for shielding the circuit board and having a leg extended from one side for engaging through the notch and for extending toward the lower portion of the circuit board. The leg includes one or more catches for engaging into the holes and for latching the shielding member to the circuit board. The other sides of the shielding member and the circuit board may then be secured together with fasteners.Type: GrantFiled: August 21, 2002Date of Patent: December 9, 2003Assignee: Global Sun Technology Inc.Inventor: I-Tao Chen
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Publication number: 20030224156Abstract: Low dielectric materials and films comprising same have been identified for improved performance when used as interlevel dielectrics in integrated circuits as well as methods for making same. These materials are characterized as having a dielectric constant (&kgr;) a dielectric constant of about 3.7 or less; a normalized wall elastic modulus (E0′), derived in part from the dielectric constant of the material, of about 15 GPa or greater; and a metal impurity level of about 500 ppm or less. Low dielectric materials are also disclosed having a dielectric constant of less than about 1.95 and a normalized wall elastic modulus (E0′), derived in part from the dielectric constant of the material, of greater than about 26 GPa.Type: ApplicationFiled: May 30, 2002Publication date: December 4, 2003Inventors: John Francis Kirner, James Edward MacDougall, Brian Keith Peterson, Scott Jeffrey Weigel, Thomas Alan Deis, Martin Devenney, C. Eric Ramberg, Konstantinos Chondroudis, Keith Cendak
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Patent number: 6656389Abstract: A thermal paste for low temperature applications made from a combination of a thermally conducting solid filler, dispersant and linear alkylbenzene carrier. The thermal paste may be applied to an electronic component to increase the cooling of the electronic component.Type: GrantFiled: June 29, 2001Date of Patent: December 2, 2003Assignee: International Business Machines CorporationInventors: Sushumna Iruvanti, Edward Louis Yankowski, Jr.
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Patent number: 6652993Abstract: The object of the present invention is to provide a copper clad laminate with a copper-plated circuit layer, and a method for manufacturing a printed wiring board that excels the conventional ones in the aspect ratio of a circuit pattern when processed to a printed wiring board comprising a fine-pitch circuit. The object of the present invention is achieved by manufacturing a printed wiring board with the use of a copper clad laminate with a copper-plated circuit layer characterized by a copper-plated circuit layer and an outer-layer copper foil layer that satisfied the relationship in a case where a specific etchant is used, the R v value (Vsc/Vsp), which is the ratio of the dissolution rate (Vsp) of deposited copper that constitutes said copper-plated circuit layer to the dissolution rate (Vsc) of copper that constitutes said outer-layer copper foil layer, is 1.0 or more.Type: GrantFiled: April 25, 2002Date of Patent: November 25, 2003Assignee: Mitsui Mining & Smelting Co., Ltd.Inventors: Takuya Yamamoto, Takashi Syoujiguchi
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Patent number: 6652962Abstract: The invention provides a resin-coated composite foil characterized in that an organic insulating layer is disposed on an ultra-thin copper foil is disposed on a supporting metal layer through an intermediate organic release layer. The resin-coated composite foil is free from the peeling or blistering between the supporting metal foil and the ultra-thin copper foil during the production of a copper clad laminate.Type: GrantFiled: May 27, 1999Date of Patent: November 25, 2003Assignee: Mitsui Mining & Smelting Co. Ltd.Inventors: Tetsuro Sato, Tsutomu Asai, Kenichiro Iwakiri
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Patent number: 6649325Abstract: Methods and formulations for use in preparing thermally conductive dielectric mounts for heat generating semi-conductor devices and associated circuitry. The formulations include a thermoplastic resin selected from the group consisting of polysulfone, poly-ethersulfone, poly-phenylsulfone, and poly-etherimides, with these resins being applied as a dispersion onto the surfaces of opposed metallic members. The dispersion is dried and thereafter treated under heat and pressure at temperatures greater than the glass transition temperature under unit pressures of between 100 psi and 800 psi and for periods in excess of about 30 minutes. The polymer resin may be filled with solid particulate such as alumina and/or boron nitride.Type: GrantFiled: May 25, 2001Date of Patent: November 18, 2003Assignee: The Bergquist CompanyInventors: Benjamin P. Gundale, Sanjay Misra
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Publication number: 20030211312Abstract: A dielectric material formed by contacting a low dielectric constant polymer with liquid or supercritical carbon dioxide, under thermodynamic conditions which maintain the carbon dioxide in the liquid or supercritical state, wherein a porous product is formed. Thereupon, thermodynamic conditions are changed to ambient wherein carbon dioxide escapes from the pores and is replaced with air.Type: ApplicationFiled: June 6, 2003Publication date: November 13, 2003Applicant: International Business Machines CorporationInventors: John M. Cotte, Kenneth John McCullough, Wayne Martin Moreau, Kevin Petrarca, John P. Simons, Charles J. Taft, Richard Volant
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Patent number: 6645630Abstract: An epoxy resin composition, which comprises, as an essential component, a phosphorus compound having an average of not less than 1.8 and less than 3 of phenolic hydroxy groups reactive with an epoxy resin and an average of not less than 0.8 of a phosphorus element in the molecule, an inorganic filler having an average particle diameter of not greater than 30 &mgr;m, a bifunctional epoxy resin having an average of not less than 1.8 and less than 2.6 of epoxy groups in the molecule and a hardener, wherein the bifunctional epoxy resin is contained at an amount of not less than 51% by mass relative to the whole epoxy resin, at least one of dicyandiamide and a polyfunctional phenol system compound having an average of not less than 3 of phenolic hydroxy groups in the molecule is used as the hardener and a ratio (a/c) of equivalent (a) of a phenolic hydroxy group of the phosphorus compound and equivalent (c) of an epoxy group of the bifunctional epoxy resin is not less than 0.3 and less than 0.Type: GrantFiled: November 27, 2000Date of Patent: November 11, 2003Assignee: Matsushita Electric Works, Ltd.Inventors: Yoshihiko Nakamura, Takuya Asano, Kenji Ogasawara, Naoki Ito
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Patent number: 6638607Abstract: A method of forming a member for joining to form a composite wiring board. The member includes a dielectric substrate. Adhesive tape is applied to at least one face of said substrate. At least one opening is formed through the substrate extending from one face to the other and through each adhesive tape. An electrically conductive material is dispensed in each of the openings and partially cured. The adhesive tape is removed to allow a nub of the conductive material to extend above the substrate face to form a wiring structure with other elements.Type: GrantFiled: October 30, 2002Date of Patent: October 28, 2003Assignee: International Business Machines CorporationInventors: Brian E. Curcio, Donald S. Farquhar, Lisa J. Jimarez, Keith P. Brodock
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Publication number: 20030198021Abstract: A structure comprises a thermal energy generating component and a thermal dissipating device in thermal conductive contact with the component, the device comprising a substrate with a fullerene coating. A method of producing a computer comprises applying a layer of fullerene onto a substrate and disposing the substrate in a heat dissipation relationship to a microprocessor.Type: ApplicationFiled: April 23, 2002Publication date: October 23, 2003Inventor: Philip D. Freedman
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Patent number: 6635335Abstract: Methods and apparatus for etching substrates such as silicon wafers are provided. In one specific approach, a surface of the substrate assembly is covered with a resist that is patterned to define features to be etched. In this approach, the surface is then exposed to a plasma in a plasma etcher so that surface areas not covered with the resist are etched, while the thickness of the resist increases or etches at a rate that is at least ten times slower than that of the exposed areas of the surface. This etching process can be followed with a conventional plasma etch. By combining the etching that increases the resist thickness with the conventional etching of resist in which the resist thins during etching, features having high aspect ratios can be etched.Type: GrantFiled: June 29, 1999Date of Patent: October 21, 2003Assignee: Micron Technology, Inc.Inventors: Kevin G. Donohoe, Rich Stocks
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Publication number: 20030180536Abstract: Printed wiring boards improved in the drilling processability and insulation properties are produced either by treating the surfaces of base materials or inorganic fillers with silicone oligomers having specified structures, particularly, a three-dimensionally crosslinked silicone oligomer, or by using resin varnish prepared by compounding such a silicone oligomer with a resin varnish for impregnation of the base materials, or by dipping the inorganic fillers in a solution of such a silicone oligomer for surface treatment and then directly compounding resin materials with the solution.Type: ApplicationFiled: April 30, 2003Publication date: September 25, 2003Inventors: Nozomu Takano, Shigeo Sase, Tomio Fukuda, Michitoshi Arata
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Patent number: 6623843Abstract: The present invention provides a resin composition for a wiring circuit board; a substrate for a wiring circuit board in which a base insulating layer has been formed from the resin composition for a wiring circuit board; and a wiring circuit board having insulating layers including a cover insulating layer formed from the resin composition for a wiring circuit board. The resin composition for a wiring circuit board, the substrate for a wiring circuit board, and the wiring circuit board can prevent warpage and curling, increase adhesion between the insulating layer and the conductor layer, and enhance the durability and reliability of the wiring circuit board. The resin composition for a wiring circuit board contains a polyimide resin precursor, and a polyhydric phenol compound.Type: GrantFiled: January 10, 2002Date of Patent: September 23, 2003Assignee: Nitto Denko CorporationInventors: Hirofumi Fujii, Shunichi Hayashi
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Patent number: 6620513Abstract: The subject matter of the invention is a base sheet for the preparation of a flexible printed circuit board which is a three-layered laminate consisting of (a) an electrically insulating film of a plastic resin such as a polyimide, (b) an epoxy resin-based adhesive layer and (c) a copper foil bonded to the film (a) with intervention of the adhesive layer (b). The base sheet can exhibit excellent performance in respect of peeling resistance, soldering heat resistance, dimensional stability and solvent resistance as well as workability into a printed circuit board only when each of the layers (a), (b) and (c) has a specified thickness in a narrow range of 10-30 &mgr;m, 5-15 &mgr;m and 5-15 &mgr;m, respectively.Type: GrantFiled: July 2, 2001Date of Patent: September 16, 2003Assignee: Shin-Etsu Chemical Co., Ltd.Inventors: Masahiro Yuyama, Hitoshi Arai, Yoshitsugu Eguchi
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Patent number: 6618939Abstract: A process for producing a resonant tag, wherein a metal foil having a thermal adhesion adhesive applied to at least one face thereof is stamped out into a circuit-like shape and is adhered to a base sheet, the process comprising: stamping out the metal foil into a predetermined shaped metal foil portion (4c) while being passed through a die roll (1) having thereon a stamping blade with a predetermined shape and a transfer roll (2) in contact with the die roll (1) which functions also as a die back-up roll; holding this metal foil portion obtained by the stamping-out operation onto the surface of the transfer roll by suction holes formed in the transfer roll; and thermally adhering the stamped metal foil portion to the base sheet (7) in contact with the transfer roll (2) at its another face by an adhesive roll (3) in contact with the transfer roll through the base sheet.Type: GrantFiled: September 15, 1999Date of Patent: September 16, 2003Assignee: Kabushiki Kaisha MiyakeInventors: Shinya Uchibori, Takaaki Mizukawa, Yoshinori Hatanaka
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Publication number: 20030170433Abstract: A contact hole is formed, by etching that uses buffered hydrofluoric acid, in a gate insulating film made of SiO2 and an interlayer insulating layer, formed on the gate insulating film, which is made of SiN. In this contact hole, there is formed an electrode which includes: a first protective metal layer made of a refractory metal; a wiring layer, formed on the first protective metal layer, which is made of a metal whose resistance is lower than that of the refractory metal; and a second protective metal layer, made of a refractory metal, which is formed thicker than the gate insulating film.Type: ApplicationFiled: March 5, 2003Publication date: September 11, 2003Applicant: Sanyo Electric Co., Ltd.Inventors: Isao Hasegawa, Koji Suzuki
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Patent number: 6617021Abstract: An adhesive composition for semiconductor devices contains as essential components (A) epoxy resin, (B) phonolic resin, (C) epoxidized styrene-butadiene-styrene block copolymer and (D) diaminosiloxane compound. The adhesive composition is excellent in heat resistance, thermal cycle test and humidity resistance. An adhesive sheet employing the above adhesive composition is also provided.Type: GrantFiled: February 11, 2002Date of Patent: September 9, 2003Assignee: Tomoegawa Paper Co., Inc.Inventors: Masaharu Kobayashi, Osamu Oka, Yasuhiro Yoshii
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Patent number: 6616984Abstract: A process of forming vias in a composition comprising (a) applying a layer of a composition containing (i) a cyanate ester, (ii) a bismaleimide, (iii) a co-curing agent having the structure R1—Ar—R2 wherein Ar is at least one aryl moiety, R1 is at least one unsaturated aliphatic moiety and R2 is at least one glycidyl moiety, (iv) an epoxy resin and, optionally, (v) a free-radical initiator; (b) covering the layer with a mask having windows through which radiation can be transmitted; (c) exposing part of the composition to radiation to at least partially cure it in the exposed areas; (d) removing the non-cured portions of the composition; and (e) completing the cure of the resin compositions.Type: GrantFiled: July 16, 2001Date of Patent: September 9, 2003Inventors: Miguel Albert Capote, Edward S. Harrison, Yong-Joon Lee, Howard A. Lenos
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Patent number: 6613413Abstract: Power and ground planes used in Printed Circuit Boards (PCBs) having porous, conductive materials allow liquids (e.g., water and/or other solvents) to pass through the power and ground planes, thus decreasing failures in PCBs (or PCBs used as laminate chip carriers) caused by cathodic/anodic filament growth and delamination of insulators. Porous conductive materials suitable for use in PCBs may be formed by using metal-coated organic cloths (such as polyester or liquid crystal polymers) or fabrics (such as those made from carbon/graphite or glass fibers), using metal wire mesh instead of metal sheets, using sintered metal, or making metal sheets porous by forming an array of holes in the metal sheets. Fabrics and mesh may be woven or random. If an array of holes is formed in a metal sheet, such an array may be formed with no additional processing steps than are performed using conventional PCB assembly methods.Type: GrantFiled: April 26, 1999Date of Patent: September 2, 2003Assignee: International Business Machines CorporationInventors: Robert M. Japp, Mark D. Poliks
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Patent number: 6613987Abstract: Herein is disclosed an insulating resin composition for a multilayer printed-wiring board, comprising two or more kinds of resins which are different in etching rate by plasma treatment and which are not compatible with each other, so that the surface of the resulting insulating layer can be made uneven by the plasma treatment, whereby the bonding strength of the conductor layer to the said resulting insulating layer can be ensured, and heat resistance and electrically insulating properties required can be satisfied.Type: GrantFiled: March 31, 2000Date of Patent: September 2, 2003Assignee: Ajinomoto Co., Inc.Inventors: Yasuaki Seki, Takashi Ito, Shuji Mochizuki, Kiyonori Furuta, Toshihiko Hatajima
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Patent number: 6610430Abstract: A method of soldering a ball grid array device onto a circuit board which includes: positioning a solder paste brick on top of a contact pad of the circuit board, said solder past brick defining an irregularly shaped structure such that a majority of a top surface of the solder paste brick is not in contact with the solder ball terminal, wherein volatized flux gases formed during heating escape via the top surface without migrating upwardly into the solder ball terminal; attaching the ball grid array device onto the circuit board such that a solder ball terminal of the ball grid array device makes contact with a portion of an edge of the solder paste brick while remaining substantially aligned with a center of the pad; and heating the ball grid array device and the circuit board so as to melt the solder ball terminal and the solder paste brick, thereby forming a solder joint between the ball grid array device and the circuit board.Type: GrantFiled: July 18, 1997Date of Patent: August 26, 2003Assignee: Plexus Services Corp.Inventor: Curtis C. Thompson, Sr.
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Patent number: 6610459Abstract: An improved method of and apparatus that is continuously automatically operative in an in-line system is described for applying under vacuum, heat and mechanical pressure a dry film photoresist-forming layer to printed circuit boards (200) that already have been prelaminated by the loose application thereto of the dry film resist as discrete cut sheets within the confines of the surface of the boards whereby a laminate without entrapped air bubbles and closely conforming to the raised circuit traces and irregular surface contours of the printed circuit board is obtained. Featured is a conveyorized vacuum applicator (12) comprising two independent vacuum lamination chambers (18,20) in end-to-end relation. The first vacuum chamber operates at ambient temperature to draw off all of the air entrapped between the dry film resist and the surface of the printed circuit board at conditions that do not result in premature tacking of the dry film to the surface of the board.Type: GrantFiled: August 25, 2000Date of Patent: August 26, 2003Assignee: Shipley Company, L.L.C.Inventors: Charles R. Keil, Osvaldo Novello, Roberto Stanich
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Publication number: 20030151898Abstract: A heat-dissipating member sandwiched between a heat dissipating electronic component which reaches a higher temperature than room temperature due to operation, and a heat-dissipating component for dissipating the heat produced from this heat dissipating electronic component. The heat-dissipating member of this invention has an interlayer comprising a metal foil and/or metal mesh having a thickness of 1-50 &mgr;m and heat conductivity of 10-500 W/mK, and a layer comprising a thermally-conducting composition containing 100 wt parts of a silicone resin and 1,000-3,000 wt parts of a thermally-conducting filler formed on both surfaces of the interlayer such that the overall thickness is within the range of 40-500 &mgr;m.Type: ApplicationFiled: January 22, 2003Publication date: August 14, 2003Applicant: Shin-Etsu Chemical Co., Ltd.Inventors: Hiroaki Tetsuka, Kunihiko Mita, Kunihiro Yamada, Yoshitaka Aoki, Tsutomu Yoneyama
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Patent number: 6605369Abstract: The present invention is directed to provision of a surface-treated copper foil exhibiting a maximum effect of a silane coupling agent which is adsorbed onto the copper foil and is employed in order to enhance adhesion between the copper foil and a substrate during manufacture of printed wiring boards. The invention is also directed to provision of a method for producing such a copper foil. To attain these goals, a surface-treated copper foil for producing printed wiring boards is provided, wherein an anti-corrosion treatment comprises forming a zinc layer or a zinc alloy layer on a surface of the copper foil and forming an electrodeposited chromate layer on the zinc or zinc alloy layer; forming a silane-coupling-agent-adsorbed layer on the electrodeposited chromate layer without causing the electrodeposited chromate layer of the nodular-treated surface to dry; and drying.Type: GrantFiled: August 14, 2001Date of Patent: August 12, 2003Assignee: Mitsui Mining & Smelting Co., Ltd.Inventors: Naotomi Takahashi, Yutaka Hirasawa
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Patent number: 6605324Abstract: Disclosed are a liquid-crystalline resin laminated film comprising a liquid-crystalline resin layer and a non-liquid-crystalline thermoplastic resin layer laminated on at least one surface of the liquid-crystalline resin layer, and having an interlayer adhesiveness of at least 30 N/cm; and a liquid-crystalline resin laminated film comprising a liquid-crystalline resin layer and a non-liquid-crystalline thermoplastic resin layer laminated on at least one surface of the liquid-crystalline resin layer, and satisfying TN≧TL wherein TN and TL indicate the thermal deformation temperature of the non-liquid-crystalline thermoplastic resin layer and that of the liquid-crystalline resin layer, respectively, measured through thermal mechanical analysis (TMA). These are obtained by forming a non-liquid-crystalline thermoplastic resin layer on at least one surface of a liquid-crystalline resin layer through co-extrusion, followed by stretching the resulting laminated film.Type: GrantFiled: June 1, 2001Date of Patent: August 12, 2003Assignee: Toray Industries, Inc.Inventors: Tetsuya Machida, Kenji Tsunashima, Jun Sakamoto
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Patent number: 6605353Abstract: An object of the present invention is to provide an epoxy modified polyimide, which is a resin capable of treating at a low processing temperature and having an excellent heat resistance; photosensitive composition; coverlay film, which is excellent in electrical insulation property, heat resistance for soldering, film-formability, flexibility, and chemical resistance; solder resist; and printed wiring board. The epoxy modified polyimide is obtained by synthesizing polyimide having a hydroxy group or carboxy group and subsequently reacting the polyimide with an epoxy compound. The photosensitive composition is obtained by adding a photoreaction initiator or the like to the epoxy modified polyimide. The coverlay film and the solder resist can be formed from the photosensitive composition. The printed wiring board is produced using the coverlay film and the solder resist.Type: GrantFiled: December 28, 2000Date of Patent: August 12, 2003Assignee: Kaneka CorporationInventors: Koji Okada, Hitoshi Nojiri, Shoji Hara
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Patent number: 6605355Abstract: An epoxy resin composition comprising, as main components, (a) 100 parts by weight of a polyfunctional epoxy resin which stays liquid at an ordinary temperature and has two or more glycidyl groups in the molecule thereof, (b) 3 to 80 parts by weight of a curing agent and (c) 1 to 100 parts by weight of a modified epoxy resin, is suitable as an underfill sealing agent, is capable of heat-curing in a short time with a good productivity, is capable of surely connecting a semiconductor device such as a CSP and a BGA on a wiring board without giving an adverse effect on each part disposed on the wiring board by heat-curing at a relatively low temperature, has excellent heat shock property (temperature cycling property) and impact resistance, is free from bleeding of contaminants from its cured product, and is capable of easily detaching the CSP or BGA from the wiring board in the case where a defect is found, making it possible to reuse a normal wiring board or semiconductor device.Type: GrantFiled: August 13, 2001Date of Patent: August 12, 2003Assignee: Three Bond Co., Ltd.Inventor: Ken Nazuka
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Patent number: 6602584Abstract: A flexible printed circuit board with a reinforcing plate, which comprises: a flexible printed circuit board including i) a conductive circuit pattern layer, and ii) an insulating layer made of a plastic film; a reinforcing plate; and an adhesive layer so that the reinforcing plate is attached to the flexible printed circuit board via the adhesive layer, wherein the adhesive layer is formed from an adhesive composition containing a composite metal hydroxide represented by formula (1): M1-xQx(OH)2 (1) wherein M is at least one metal atom selected from the group consisting of Mg, Ca, Sn and Ti; Q is at least one metal atom selected from the group consisting of Mn, Fe, Co, Ni, Cu and Zn; and x is a positive number from 0.01 to 0.5.Type: GrantFiled: April 10, 2002Date of Patent: August 5, 2003Assignee: Nitto Denko CorporationInventors: Kyouyuu Jo, Yasufumi Miyake
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Patent number: 6602583Abstract: A multi-layer circuit board comprises a liquid crystalline polymer bond ply disposed between two circuit layers wherein the liquid crystalline polymer bond ply is formed by treating a film comprising a liquid crystalline polymer with an amount of heat and pressure effective to produce a liquid crystalline polymer bond ply with an in-plane coefficient of thermal expansion (CTE) of 0 to about 50 ppm/° C. and further wherein the multi-layer circuit is formed by lamination at a temperature of 0° C. to about 10° C. less than the melt temperature of the liquid crystalline polymer.Type: GrantFiled: December 4, 2001Date of Patent: August 5, 2003Assignee: World Properties, Inc.Inventors: Michael E. St. Lawrence, Scott Kennedy
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Publication number: 20030143382Abstract: A thermal interface material may be covalently bonded to a bottom surface of a heat dissipating device and/or a backside surface of a heat generating device. The heat dissipating device may be thermally coupled to the heat generating device, the thermal interface material disposed between the bottom surface of the heat dissipating device and the backside surface of the heat generating device. The thermal interface material may comprise a polymer material with thermally conductive filler components dispersed therein. For one embodiment, the thermally conductive filler components may be covalently bonded together. For one embodiment, the thermally conductive filler components may be covalently bonded with the polymer material.Type: ApplicationFiled: January 31, 2002Publication date: July 31, 2003Inventor: Youzhi E. Xu
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Publication number: 20030142477Abstract: An apparatus for absorbing thermal energy has an electronic component, a support structure for the electronic component having a first set of surfaces defining an interior volume containing a plurality of secondary surfaces, and a thermal energy absorbing material integrated within the interior volume, in contact with at least a portion of the secondary surfaces to form a composite structure. The thermal energy absorbing material is in operative thermal communication with the electronic component such that at least a portion of the thermal energy generated by the electronic component flows, via the support structure, into the thermal energy absorbing material. A method for controlling a temperature of an electronic component mounts an electronic component on a support structure in thermal communication with a thermal energy absorbing material integrated into an interior volume of the support structure.Type: ApplicationFiled: June 11, 2002Publication date: July 31, 2003Inventors: J. Michael Elias, Bruce M. Cepas
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Patent number: 6596391Abstract: Disclosed is a metal-clad laminate product having a carrier film, a aqueous soluble release or parting layer deposited onto the carrier film and which can be mechanically separated from the carrier film, and an ultra thin metal layer deposited onto the parting layer. Also disclosed is a method for making the metal-clad laminate product.Type: GrantFiled: May 11, 1998Date of Patent: July 22, 2003Assignee: Honeywell International Inc.Inventor: Gordon C. Smith
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Patent number: 6592973Abstract: A card sealed by using a composition which includes an acrylate compound polymerizable by an ionizing radiation and 1 to 40 parts by weight of a polyfunctional isocyanate compound per 100 parts by weight of the acrylate compound and can be cured by irradiation of the ionizing radiation and a process for producing a card disposing a coating layer of the composition between a substrate sheet and a cover sheet and curing the coating layer by irradiation of an ionizing radiation.Type: GrantFiled: August 21, 2000Date of Patent: July 15, 2003Assignee: Lintec CorporationInventors: Yasukazu Nakata, Akira Ichikawa, Katsuhisa Taguchi, Yuichi Iwakata