Registration Or Layout Process Other Than Color Proofing Patents (Class 430/22)
  • Patent number: 10750318
    Abstract: A positioning method including following steps is provided. Firstly, several base stations are commanded to detect a tracked object. Then, a first position of the tracked object is obtained according to the first return information. Then, several fixed-type signal transceivers are selected according to the first position. Then, the selected fixed-type signal transceivers are commanded to detect the tracked object, and a second position of the tracked object is obtained according to the second return information received from the fixed-type signal transceivers.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: August 18, 2020
    Assignees: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, LITE-ON TECHNOLOGY CORPORATION
    Inventors: Pei-Yuan Lien, Johnson Lee, Chun-Tao Chen, Yao-Chung Yeh
  • Patent number: 10727126
    Abstract: A method for forming a semiconductor device includes forming a laser marking buried within a semiconductor substrate and thinning the semiconductor substrate from a backside of the semiconductor substrate. For example, a semiconductor device includes a semiconductor substrate located in a semiconductor package. A laser marking is buried within the semiconductor substrate. For example, another semiconductor device includes a semiconductor substrate. A laser marking is located at a backside surface of the semiconductor substrate. Further, a portion of the backside surface located adjacent to the laser marking is free of recast material.
    Type: Grant
    Filed: May 24, 2017
    Date of Patent: July 28, 2020
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Korbinian Kaspar, Franco Mariani
  • Patent number: 10702044
    Abstract: A cosmetic activator system for activating a cosmetic is provided including: an activator having an energy source configured to emit an energy pulse and a controller; and an imprinter having an imprint pattern and at least one activation element configured to be in communication with the energy source, wherein the imprinter is configured to create an imprint on the cosmetic.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: July 7, 2020
    Assignee: L'OREAL
    Inventor: John Streeter
  • Patent number: 10649346
    Abstract: A table for a lithographic apparatus, the table having an encoder plate located on the table, a gap between the encoder plate and a top surface of the table, the gap located radially inward of the encoder plate relative to the periphery of the table, and a fluid extraction system with an opening in the surface of the gap to extract liquid from the gap.
    Type: Grant
    Filed: February 8, 2019
    Date of Patent: May 12, 2020
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Takeshi Kaneko, Joost Jeroen Ottens, Raymond Wilhelmus Louis Lafarre
  • Patent number: 10629698
    Abstract: Sacrificial gate structures having an aspect ratio of greater than 5:1 are formed on a substrate. In some embodiments, each sacrificial gate structure straddles a portion of a semiconductor fin that is present on the substrate. An anchoring element is formed orthogonal to each sacrificial gate structure rendering the sacrificial gate structures mechanically stable. After formation of a planarization dielectric layer, each anchoring element can be removed and thereafter each sacrificial gate structure can be replaced with a functional gate structure.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: April 21, 2020
    Assignee: International Business Machines Corporation
    Inventors: Kangguo Cheng, Ryan O. Jung, Fee Li Lie, Jeffrey C. Shearer, John R. Sporre, Sean Teehan
  • Patent number: 10570499
    Abstract: Disclosed are a mask frame, for mask frame manufacturing method and mask. The mask frame includes a main frame and shielding bars, an evaporation-deposition area penetrating the main frame in a thickness direction being formed on the main frame, the main frame being provided with pairs of first receiving slots, the two first receiving slots in each pair being located on both sides of the evaporation-deposition area in a first direction, respectively, each shielding bar corresponding to a pair of first receiving slot, two ends of shielding bars being disposed within corresponding two first receiving slots, respectively. The mask frame comprises at least one pair of first positioning holes, each pair of which corresponds to one pair of first receiving slots, and the two first positioning holes in each pair correspond to positions of the two first receiving slots in a corresponding pair, respectively.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: February 25, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventor: Zhiming Lin
  • Patent number: 10566252
    Abstract: A method of correcting an overlay includes: forming a first pattern on a first substrate; forming a second pattern on the first pattern; obtaining a first overlay error profile of the second pattern and obtaining a first overlay correction profile from the first overlay error profile; forming a third pattern on the second pattern; obtaining a second overlay error profile of the third pattern and obtaining a second overlay correction profile from the second overlay error profile; and forming the second pattern on a second substrate, wherein the forming of the second pattern on the second substrate includes: determining whether the second overlay correction profile has a non-correctable model parameter; and when the second overlay correction profile has the non-correctable model, obtaining a preliminary correction profile to correct a position of the second pattern to be formed on the second substrate.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: February 18, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seungyoon Lee, Chan Hwang
  • Patent number: 10558127
    Abstract: The purpose of the present invention is to provide an exposure condition evaluation device that appropriately evaluates a wafer exposure condition or calculates an appropriate exposure condition, on the basis of information obtained from an FEM wafer, without relying on the formation state of the FEM wafer. In order to achieve the foregoing, the present invention proposes an exposure condition evaluation device which evaluates an exposure condition of a reduction projection exposure device, on the basis of the information of patterns exposed on a sample by the reduction projection exposure device, and which uses a second feature amount of a plurality of patterns formed by making exposure conditions uniform to correct a first feature amount of a plurality of patterns formed by a plurality of different exposure condition settings.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: February 11, 2020
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Shinichi Shinoda, Yasutaka Toyoda, Hiroyuki Ushiba, Hitoshi Sugahara
  • Patent number: 10527953
    Abstract: A method including evaluating a plurality of substrate measurement recipes for measurement of a metrology target processed using a patterning process, against stack sensitivity and overlay sensitivity, and selecting one or more substrate measurement recipes from the plurality of substrate measurement recipes that have a value of the stack sensitivity that meets or crosses a threshold and that have a value of the overlay sensitivity within a certain finite range from a maximum or minimum value of the overlay sensitivity.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: January 7, 2020
    Assignee: ASML Netherlands B.V.
    Inventors: Kaustuve Bhattacharyya, Arie Jeffrey Den Boef, Martin Jacobus Johan Jak
  • Patent number: 10520839
    Abstract: In a beam irradiation apparatus in which a movable body holds an object, a mark detection system detects a first mark on the movable body while moving the movable body in a first direction and changing an irradiation position of a measurement beam in the first direction, the mark detection system detects a second mark while moving the movable body in the first direction and changing the irradiation position of the measurement beam in the first direction, a controller controls a position of the movable body in a second direction intersecting he first direction during a time period between the detection of the first mark and the detection of the second mark, and the controller controls the movement of the movable body to adjust a positional relation between the object on the movable body and a processing beam, based on results of the detection of the first and second marks.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: December 31, 2019
    Assignee: NIKON CORPORATION
    Inventor: Akihiro Ueda
  • Patent number: 10515186
    Abstract: A method of decomposing a layout for multiple-patterning lithography includes receiving an input that represents a layout of a semiconductor device. The layout includes a plurality of conductive lines of a cell. A first set of conductive lines are overlaid by a second set of conductive lines. The method further includes partitioning the second set of conductive lines into groups. A first group has a different number of conductive lines from the second set than a second group. The method further includes assigning conductive lines from the first set overlaid by conductive lines of the first group to a first photomask and assigning conductive lines from the first set overlaid by conductive lines of the second group to second and third photomasks.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: December 24, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Meng-Kai Hsu, Wen-Hao Chen
  • Patent number: 10509881
    Abstract: Implementations of the present disclosure provide coloring methods that sort and pre-color nodes of G0-linked networks in a multiple-patterning technology (MPT)-compliant layout design by coordinate. In one embodiment, a method includes identifying target networks in a circuit layout, each target network having two or more linked nodes representing circuit patterns, and each target network being presented in an imaginary X-Y coordinate plane, assigning a first feature to a first node in each target network, the first node is determined using a coordinate-based method, and assigning the first feature and a second feature to remaining nodes in each target network in an alternating manner so that any two immediately adjacent linked nodes in each target network have different features.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: December 17, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Ping Chiang, Ming-Hui Chih, Chih-Wei Hsu, Ping-Chieh Wu, Ya-Ting Chang, Tsung-Yu Wang, Wen-Li Cheng, Hui En Yin, Wen-Chun Huang, Ru-Gun Liu, Tsai-Sheng Gau
  • Patent number: 10503071
    Abstract: Systems and methods described herein relate to the manufacture of optical elements and optical systems. An example method includes overlaying a first mask on a photoresist material and a substrate, and causing a light source to illuminate the photoresist material through the first mask during a first exposure so as to define a first feature. During the first exposure, the light source is positioned at a non-normal angle with respect to a plane parallel to the substrate. The method includes developing the photoresist material so as to retain an elongate portion of the photoresist material on the substrate. A first end of the elongate portion includes an angled portion that is sloped at an angle with respect to a long axis of the elongate portion. The method also includes depositing a reflective material through a second mask onto the angled portion.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: December 10, 2019
    Assignee: Waymo LLC
    Inventors: Bernard Fidric, Pierre-yves Droz, David Hutchison
  • Patent number: 10495983
    Abstract: Methods are provided and generally relate to adjusting exposure parameters of a substrate in response to an overlay error. The method includes partitioning the substrate into one or more sections. Each section corresponds to an image projection system. A total overlay error of a first layer deposited on the substrate is determined. For each section, a sectional overlay error is calculated. For each overlap area, in which two or more sections overlap, an average overlay error is calculated. The exposure parameters are adjusted in response to the total overlay error.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: December 3, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Tamer Coskun, Hwan J. Jeong
  • Patent number: 10453876
    Abstract: In the present invention, a gate electrode is formed on a substrate surface, and an insulation film is formed on the substrate surface whereon the gate electrode has been formed. A first amorphous silicon layer is formed on the substrate surface whereon the insulation film has been formed. An energy beam is irradiated onto a plurality of required sites spaced from each other in the first amorphous silicon layer to transform each of the required sites into a polysilicon layer. Each of the required sites is situated on the upper side of the gate electrode and serves as a channel region between a source and a drain. This allows other sites, which are in the first amorphous silicon layer and related to the plurality of required sites, to also be irradiated by the energy beam and ablated so as to form at the other sites a cleared portion having a required shape.
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: October 22, 2019
    Assignee: Sakai Display Products Corporation
    Inventors: Nobutake Nodera, Shigeru Ishida, Ryohei Takakura, Yoshiaki Matsushima, Takao Matsumoto
  • Patent number: 10444639
    Abstract: A process control system includes a controller configured to generate a reference overlay signature based on one or more overlay reference layers of a sample, extrapolate the reference overlay signature to a set of correctable fields for the exposure of a current layer of the sample to generate a full-field reference overlay signature, identify one or more alignment fields of the set of correctable fields, generate an alignment-correctable signature by modeling alignment corrections for the set of correctable fields, subtract the alignment-correctable signature from the full-field reference overlay signature to generate feedforward overlay corrections for the current layer when the one or more overlay reference layers are the same as the one or more alignment reference layers, generate lithography tool corrections based on the feedforward overlay corrections, and provide the lithography tool corrections for the current layer to the lithography tool.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: October 15, 2019
    Assignee: KLA-Tencor Corporation
    Inventors: Onur Nihat Demirer, William Pierson, Mark D. Smith, Jeremy S. Nabeth, Miguel Garcia-Medina, Lipkong Yap
  • Patent number: 10446430
    Abstract: A chuck for wafer processing that counters the deleterious effects of thermal expansion of the wafer. Also, a combination of chuck and shadow mask arrangement that maintains relative alignment between openings in the mask and the wafer in spite of thermal expansion of the wafer. A method for fabricating a solar cell by ion implant, while maintaining relative alignment of the implanted features during thermal expansion of the wafer.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: October 15, 2019
    Assignee: INTEVAC, INC.
    Inventors: Terry Bluck, Babak Adibi, Vinay Prabhakar, William Eugene Runstadler, Jr.
  • Patent number: 10429743
    Abstract: An embodiment of the invention may include a method for ensuring semiconductor design integrity. The method may include analyzing a photomask design for a semiconductor circuit. The photomask may include an electrical design necessary for the operation of the semiconductor circuit, and white space, which has no electrical design. The method may include inserting an optical design into the white space of the photomask design for the semiconductor circuit. The optical design may have known optical patterns for validating the semiconductor circuit design. In an embodiment of the invention, the optical design may be physically isolated from the electrical design. In another embodiment of the invention, the optical design may comprise one or more photomask layers and overlay the electrical design. In another embodiment of the invention, the optical design may comprise covershapes.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: October 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Daniel Corliss, Derren N. Dunn, Michael A. Guillorn, Shawn P. Fetterolf
  • Patent number: 10416578
    Abstract: A method for pre-aligning a substrate includes the steps of: 1) providing a substrate having a plurality of marks are arranged circumferentially on a surface thereof, wherein each of the plurality of marks consists of at least one first stripe extending in a first direction and at least one second stripe extending in a first direction; 2) aligning a center of the substrate with a given point on a substrate carrier stage; 3) illuminating a mark selected from the plurality of marks on the surface of the substrate with light and obtaining an image of the selected mark; 4) processing the image to obtain first projection data corresponding to the first direction and second projection data corresponding to the second direction; 5) identifying a set of first peak values corresponding to the at least one first stripe of the selected mark from the first projection data and a set of second peak values corresponding to the at least one second stripe of the selected mark from the second projection data; 6) selecting firs
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: September 17, 2019
    Assignee: SHANGHAI MICRO ELECTRONICS EQUIPMENT (GROUP) CO., LTD.
    Inventors: Xiwen Zhou, Weiwang Sun, Cuixia Tian, Jiaozeng Zheng
  • Patent number: 10401837
    Abstract: A method disclosed herein includes: converting an image of a manufactured circuit to a plurality of representative contours, the plurality of representative contours corresponding to printed features in the manufactured circuit; generating a risk inventory for the manufactured circuit based on the plurality of representative contours, the risk inventory being configured to identify at least one process sensitive geometry (PSG) in the manufactured circuit; generating a common process window (CPW) for the manufactured circuit based on the plurality of representative contours and the risk inventory, the CPW being indicative of manufacturing reliability of each feature in the manufactured circuit; and generating instructions to adjust a manufacturing tool for creating the manufactured circuit, based on the generated CPW.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: September 3, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Hongxin Zhang, Shaowen Gao, Norman Chen
  • Patent number: 10379447
    Abstract: A method for simulation of lithography overlay is disclosed which comprises storing alignment parameters used to align a semiconductor wafer prior to a lithography step; storing process control parameters used during the lithography step on the semiconductor wafer; storing overlay parameters measured after the lithography step; calculating alternative alignment parameters and alternative process control parameters. The alternative alignment parameters and the alternative process control parameters are added to cleansed overlay parameters to obtain simulated lithography overlay data.
    Type: Grant
    Filed: July 10, 2013
    Date of Patent: August 13, 2019
    Assignee: Qoniac GmbH
    Inventor: Boris Habets
  • Patent number: 10365568
    Abstract: In a beam irradiation apparatus in which a movable body holds an object, a mark detection system detects a first mark on the movable body while moving the movable body in a first direction and changing an irradiation position of a measurement beam in the first direction, the mark detection system detects a second mark while moving the movable body in the first direction and changing the irradiation position of the measurement beam in the first direction, a controller controls a position of the movable body in a second direction intersecting the first direction during a time period between the detection of the first mark and the detection of the second mark, and the controller controls the movement of the movable body to adjust a positional relation between the object on the movable body and a processing beam, based on results of the detection of the first and second marks.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: July 30, 2019
    Assignee: NIKON CORPORATION
    Inventor: Akihiro Ueda
  • Patent number: 10355209
    Abstract: A vapor deposition mask includes a metal mask and a resin mask having an opening. An inner wall surface for composing the opening has an inflection point in a thicknesswise cross section of the resin mask. When an intersection of a first surface, not facing the metal mask, of the resin mask and the inner wall surface is set to be a first intersection, an intersection of a second surface, facing the metal mask, of the resin mask and the inner wall surface is set to be a second intersection, and there is set a first inflection point first positioned from the first intersection toward the second intersection, an angle formed by a line connecting the first intersection and the first inflection point and the first surface is larger than an angle formed by a line connecting the first inflection point and the second intersection and the second surface.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: July 16, 2019
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Toshihiko Takeda, Katsunari Obata, Hiroshi Kawasaki
  • Patent number: 10331036
    Abstract: In various embodiments, an exposure mask may include a carrier, a first exposure structure in a first structure plane of the carrier, and a second exposure structure in a second structure plane of the carrier. The two structure planes differ from one another.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: June 25, 2019
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Heiko Assmann, Markus Dankelmann, Uwe Winkler
  • Patent number: 10324371
    Abstract: The present disclosure provides a system for generating a mask pattern, a method for generating a mask pattern, and an exposure system. According to an embodiment of the present disclosure, the system for generating a mask pattern comprises: a mask pattern provision device configured to provide a mask pattern signal via a wired or wireless network; a mask pattern transmission device configured to process the mask pattern signal provided by the mask pattern provision device to generate mask pattern information, and to transmit the generated mask pattern information over a Radio Frequency Identification (RFID) signal; and a mask pattern generation device configured to generate a mask pattern corresponding to the mask pattern information based on the mask pattern information and display the generated mask pattern.
    Type: Grant
    Filed: May 6, 2016
    Date of Patent: June 18, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tailiang Li, Junmin Sun, Hongli Ding, Hongtao Guan
  • Patent number: 10317757
    Abstract: A manufacture method of a black matrix is provided. The COA technology is utilized to manufacture organic photoresist blocks with an increased thickness on alignment marks. Then, a black matrix thin film is set on and covers the organic photoresist blocks to tremendously increase the level differences of the positions of the alignment marks and adjacent areas. A contour recognition apparatus can accurately recognize positions of the alignment marks. The issue that the alignment marks are difficult to recognize after the black matrix thin film is coated in the BOA process can be solved.
    Type: Grant
    Filed: August 21, 2017
    Date of Patent: June 11, 2019
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Yuan Xiong
  • Patent number: 10310385
    Abstract: An optical system for producing lithographic structures is disclosed. Also disclosed is a method for determining relative coordinates of a position of a writing field relative to a position of a preview field in such an optical system, and a method for producing lithographic structures using such an optical system.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: June 4, 2019
    Assignee: Carl Zeiss AG
    Inventors: Philipp Huebner, Gerhard Krampert, Stefan Richter, Timo Mappes
  • Patent number: 10303050
    Abstract: This disclosure provides an imprint apparatus configured to form a pattern with an imprint material by bringing the imprint material on a substrate and a pattern of the mold into contact with each other including a drive unit to bring part of the pattern of the mold into contact with the imprint material, and bring the pattern into contact with the imprint material so a contact surface area between the pattern of the mold and the imprint material increases, an interference fringe detecting unit to detect an interference fringe generated by reflected light from the pattern of the mold and reflected light from the substrate, and a state detecting unit to detect a contact state between the pattern of the mold and the imprint material on the basis of the interference fringe.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: May 28, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hiroshi Sato
  • Patent number: 10303068
    Abstract: A projection exposure tool for microlithography for imaging mask structures of an image-providing substrate onto a substrate to be structured includes a measuring apparatus configured to determine a relative position of measurement structures disposed on a surface of one of the substrates in relation to one another in at least one lateral direction with respect to the substrate surface and to thereby simultaneously measure a number of measurement structures disposed laterally offset in relation to one another.
    Type: Grant
    Filed: June 15, 2017
    Date of Patent: May 28, 2019
    Assignee: Carl Zeiss SMT GmbH
    Inventors: Jochen Hetzler, Aksel Goehnermeier
  • Patent number: 10275562
    Abstract: A method of decomposing a layout for multiple-patterning lithography includes receiving an input that represents a layout of a semiconductor device. The layout includes a plurality of conductive lines of a cell. A first set of conductive lines are overlaid by a second set of conductive lines. The method further includes partitioning the second set of conductive lines into groups. A first group has a different number of conductive lines from the second set than a second group. The method further includes assigning conductive lines from the first set overlaid by conductive lines of the first group to a first photomask and assigning conductive lines from the first set overlaid by conductive lines of the second group to second and third photomasks.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Meng-Kai Hsu, Wen-Hao Chen
  • Patent number: 10241419
    Abstract: At least one lithography apparatus that suppresses a decrease in the accuracy of stage control is provided. A lithography apparatus includes a moving unit configured to move with an original or a substrate mounted thereon, a plurality of measurement units configured to obtain information about a position of the moving unit, measurement areas of the respective measurement units overlapping each other, and a control unit configured to switch the measurement units used to obtain the information about the position of the moving unit, based on a switching position lying in an overlapping measurement area, wherein, in a case where a plurality of processes is performed on one of a plurality of processing targets on the original or on the substrate, the control unit makes the switching position changeable and controls the measurement units so that the same one of the measurement units is used in performing the plurality of processes.
    Type: Grant
    Filed: August 25, 2016
    Date of Patent: March 26, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Masanori Yamada
  • Patent number: 10234775
    Abstract: The present invention provides an exposure apparatus which exposes a substrate, comprising a measurement unit configured to measure a height of the substrate at each of a plurality of measurement points, and a control unit configured to control the height of the substrate based on measurement results obtained by the measurement unit, and control an operation to arrange a shot region of the substrate in a first position and expose the shot region, wherein the shot region includes a plurality of partial regions, and the control unit causes the measurement unit to measure the height of the substrate by arranging the shot region in a second position different from the first position so that the number of measurement points arranged in the plurality of partial regions is larger than that when arranging the shot region in the first position.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: March 19, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Shinichiro Hirai, Junichi Motojima, Naoto Ohkawa
  • Patent number: 10214012
    Abstract: A liquid ejecting apparatus includes a head unit that ejects ink onto a medium, a transport unit that transports the medium, and a control unit that forms an adjustment pattern on the medium, and the control unit forms, as the adjustment pattern, a pattern including a first pattern that is formed in a transport direction, a plurality of scales that are formed in the transport direction, and a second pattern that is formed at a position corresponding to the scales in the transport direction while the position thereof in a main-scanning direction that intersects the transport direction is changed.
    Type: Grant
    Filed: January 17, 2018
    Date of Patent: February 26, 2019
    Assignee: Seiko Epson Corporation
    Inventor: Hiroya Hochi
  • Patent number: 10197923
    Abstract: In an exposure apparatus and a method for defocus and tilt error compensation, each of alignment sensors (500a, 500b, 500c, 500d, 500e, 500f) corresponds to and has the same coordinate in the first direction as a respective one of focusing sensors (600a, 600b, 600c, 600d, 600e, 600f), so that each of the alignment sensors (500a, 500b, 500c, 500d, 500e, 500f) is arranged on the same straight line as a respective one of the focusing sensors (600a, 600b, 600c, 600d, 600e, 600f). As such, alignment marks can be characterized with both focusing information and alignment information. This enables the correction of errors in the alignment information and thus achieves defocus and tilt error compensation, resulting in significant improvements in alignment accuracy and the production yield.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: February 5, 2019
    Assignee: SHANGHAI MICRO ELECTRONICS EQUIPMENT (GROUP) CO., LTD.
    Inventors: Feibiao Chen, Chang Zhou, Yuefei Chen, Qi Cheng, Lei Diao, Jingchao Qi
  • Patent number: 10197863
    Abstract: A mask including a plurality of baffles, a frame and a light transmission region, and a photo alignment method are provided. A support component and a movable component are disposed on the frame. The baffle is configured to block the light transmission region. The support component is configured to support the baffle which blocks the light transmission region. The movable component is configured to move the baffle to a position blocking the light transmission region.
    Type: Grant
    Filed: May 5, 2016
    Date of Patent: February 5, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Guojing Ma, Changjian Xu, Dan Wang
  • Patent number: 10186662
    Abstract: A mask frame assembly for deposition includes: a frame including an opening portion; a first support extending in a first direction across the opening portion and including opposing ends in the first direction which are each coupled to the frame; a mask stick through which a deposition material passes to a plurality of display regions of a substrate, the mask stick disposed on the first support and extending in a second direction crossing the first direction, the mask stick including: opposing ends in the second direction which are each coupled to the frame, and a deposition region common to each of the plurality of display regions of the substrate; and a magnet coupled to the first support and overlapping the deposition region of the mask stick.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: January 22, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Yonghwan Kim
  • Patent number: 10133177
    Abstract: An exposure method of exposing a plurality of exposure regions on a substrate includes the steps of acquiring first reference information indicating a reference height of the substrate, measuring heights of some exposure regions among the plurality of exposure regions, acquiring temporary height information indicating a temporary height of the substrate on the basis of a measurement result in the measuring step, and exposing one exposure region among the plurality of exposure regions after the substrate is moved on the basis of second reference information indicating a reference height of the one exposure region and a difference between the first reference information and the temporary height information.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: November 20, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Mitsuhide Nishimura
  • Patent number: 10118315
    Abstract: Techniques for producing composites outside of an autoclave that have smooth surface finishes are disclosed. The smooth composite surface, free of porosity, can be fabricated by curing the prepreg in a tool that includes a novel microstructure. In conventional composite manufacturing, some degree of porosity appears to originate from trapped gas bubbles that form during curing. The microstructure can provide a mechanism for the gas bubbles to escape from the tooling, thereby eliminating porosity and yielding a smooth surface finish on the out-of-autoclave composite. The microstructure can be applied to the tool surface using an inkjet process applying an acrylic resin curable with ultraviolet light.
    Type: Grant
    Filed: May 6, 2014
    Date of Patent: November 6, 2018
    Assignee: Surfx Technologies LLC
    Inventors: Siu F. Cheng, Mikhail M. Grigoriev, Robert F. Hicks
  • Patent number: 10112324
    Abstract: An imprint method for forming a pattern on a substrate by using a mold includes carrying the substrate into an imprint apparatus, removing, after the substrate is carried into the imprint apparatus, a whole or a portion of foreign particles adhering to a pattern formed on the mold by bringing into contact the mold and an imprint material supplied to a member different from the substrate within the imprint apparatus, and curing the imprint material so as to form the pattern, and forming the pattern on the substrate that has carried into the imprint apparatus, by using the mold from which the foreign particles are removed.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: October 30, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yoshikazu Miyajima, Yukio Takabayashi, Shinichi Shudo
  • Patent number: 10094658
    Abstract: To address the problem in which when measuring the overlay of patterns formed on upper and lower layers of a semiconductor pattern by comparing a reference image and measurement image obtained through imaging by an SEM, the contrast of the SEM image of the pattern of the lower layer is low relative to that of the SEM image of the pattern of the upper layer and alignment state verification is difficult even if the reference image and measurement image are superposed on the basis of measurement results, the present invention determines the amount of positional displacement of patterns of an object of overlay measurement from a reference image and measurement image obtained through imaging by an SEM, carries out differential processing on the reference image and measurement image, aligns the reference image and measurement image that have been subjected to differential processing on the basis of the positional displacement amount determined previously, expresses the gradation values of the aligned differential r
    Type: Grant
    Filed: August 3, 2015
    Date of Patent: October 9, 2018
    Assignee: HITACHI HIGH-TECHNOLOGIES CORPORATION
    Inventors: Yuji Takagi, Fumihiko Fukunaga, Yasunori Goto
  • Patent number: 10062543
    Abstract: Methods and systems for determining overlay error between different patterned features of a design printed on a wafer in a multi-patterning step process are provided. For multi-patterning step designs, the design for a first patterning step is used as a reference and designs for each of the remaining patterning steps are synthetically shifted until the synthetically shifted designs have the best global alignment with the entire image based on global image-to-design alignment. The final synthetic shift of each design for each patterning step relative to the design for the first patterning step provides a measurement of relative overlay error between any two features printed on the wafer using multi-patterning technology.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: August 28, 2018
    Assignee: KLA-Tencor Corp.
    Inventors: Ajay Gupta, Thanh Huy Ha, Olivier Moreau, Kumar Raja
  • Patent number: 10061215
    Abstract: In a method for fabricating a resist pattern, a substrate coated with a photo resist is loaded on a stage of an exposure apparatus. Underlying patterns are fabricated on the substrate. A surface slope of an exposure area on the substrate is measured. An alignment measurement is performed by detecting an alignment pattern formed in the underlying patterns. An alignment measurement result is corrected based on the measured surface slope. The substrate is aligned to a photo mask by using the corrected alignment measurement result. The photo resist is exposed to radiation passing through the photo mask to form patterns.
    Type: Grant
    Filed: June 14, 2016
    Date of Patent: August 28, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yung-Yao Lee, Jui-Chun Peng, Ho-Ping Chen, Heng-Hsin Liu
  • Patent number: 10053766
    Abstract: A mask frame assembly and a method of manufacturing the same are disclosed. In one aspect, the mask frame assembly for an organic light-emitting diode display includes a frame including a supporting unit, wherein an opening is formed in the frame. The assembly also includes a unit mask including a deposition pattern portion, wherein the unit mask extends in a first direction, and is fixed to the supporting unit. The assembly further includes a first supporter configured to support the unit mask, wherein a magnet is placed on at least one portion of the first supporter.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: August 21, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventor: Yonghwan Kim
  • Patent number: 10042269
    Abstract: The present disclosure provides apparatus and methods for overlay measurement. An exemplary overlay measurement apparatus includes an illuminating unit, configured to generate light to illuminate a first overlay marker having a first sub-overlay marker along a first direction and a second overlay marker along a second direction; a first measuring unit, configured to receive light reflected from the first overlay marker to cause the reflected light to laterally shift and shear to generate interference light, to receive the interference light to form a first image and to determine existence of overlay offsets along the first direction and the second direction and values of the overlay offset; and a first drive unit connected to the first measuring unit, and configured to drive the first measuring unit to rotate from a first position to a second position to measure the first sub-overlay marker and the second sub-overlay marker, respectively.
    Type: Grant
    Filed: April 22, 2016
    Date of Patent: August 7, 2018
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Liwan Yue, Qiang Wu, Yang Liu
  • Patent number: 10036968
    Abstract: A control method of a movable body includes: a step of detecting a part of a plurality of grating marks provided at a wafer placed on a movable body that is movable within an XY plane, while scanning a measurement beam, that is irradiated from a mark detection system, in a Y-axis direction with respect to the part of plurality of grating marks, as moving the movable body in the Y-axis direction; a step of measuring an irradiation position of the measurement beam on the part of the plurality of grating marks; and a step of relatively moving the measurement beam and the movable body in an X-axis direction on the basis of the measurement result of the irradiation position and also detecting another grating mark while scanning the measurement beam in the Y-axis direction.
    Type: Grant
    Filed: June 20, 2017
    Date of Patent: July 31, 2018
    Assignee: NIKON CORPORATION
    Inventor: Akihiro Ueda
  • Patent number: 10031429
    Abstract: The present invention provides a method of obtaining a position of a second shot region next to a first shot region, out of a plurality of shot regions formed on a substrate, comprising a first detection step of detecting a position of a first mark arranged in the first shot region, a second detection step of detecting a position of a mark more distant from the first mark, out of a second mark and a third mark arranged in the second shot region, and a determination step of determining the position of the second shot region based on a detection result in the first detection step and a detection result in the second detection step.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: July 24, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Masatoshi Endo, Akihiko Kawamura, Naoto Ohkawa, Tetsuji Kazaana, Takanori Morooka
  • Patent number: 9996011
    Abstract: A method provides an integrated circuit (IC) substrate having first and second alignment marks defined in a first pattern layer, and third and fourth alignment marks defined in a second pattern layer. The first and second alignment marks are illuminated, through a photomask, with a first light to determine a first layer alignment error including a first alignment error and a second alignment error. The first alignment error has more weight than the second alignment error in determining the first layer alignment error. The third and fourth alignment marks are illuminated with a second light to determine a second layer alignment error including a third alignment error in relation to the third alignment mark and a fourth alignment error in relation to the fourth alignment mark. The third alignment error has more weight than the fourth alignment error in determining the second layer alignment error.
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: June 12, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hsien Lin, Hung-Chang Hsieh, Feng-Jia Shiu, Chun-Yi Lee
  • Patent number: 9975291
    Abstract: A nanostructure that is visually recognized as being seamless by its more regularly and more uniformly formed fine concave-convex structure and that exhibits an excellent antireflection effect against light in a visible wavelength range is provided. Such a nanostructure is configured by a number of rows of tracks each including structures, formed by protrusions or depressions on a surface of a substrate, arranged at a predetermined fine pitch. In this nanostructure, a distance between centers of the structures adjacent to each other across a strip-shaped portion (seam) in which portions with no structures within the predetermined pitch are continuously formed in a track arrangement direction is adjusted so as to prevent visual recognition of the seam.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: May 22, 2018
    Assignee: DEXERIALS CORPORATION
    Inventor: Sohmei Endoh
  • Patent number: 9966284
    Abstract: According to one embodiment, an alignment method includes calculating a position gap of a predetermined point in a device area of a wafer based on a stress applied to the device area, and correcting an exposure condition in a lithography process of the device area based on the position gap of the predetermined point.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: May 8, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Manabu Takakuwa
  • Patent number: 9927725
    Abstract: A lithography apparatus has a plurality of processing units configured to respectively perform patternings on a plurality of substrates that belong to a lot, and a controller configured to perform, based on specific information that specifies one of the plurality of substrates, determination of one of the plurality of processing units that processes the one of the plurality of substrates, and control the plurality of processing units such that the patternings are performed on the plurality of substrates respectively with the plurality of processing units in parallel based on recipe information corresponding to the lot.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: March 27, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Yoshikazu Miyajima, Hitoshi Nakano