Abstract: A mark detecting method of detecting a notch as a mark formed on the outer circumference of a wafer held on a holding table. The mark detecting method includes the steps of index-rotating the holding table to image at least three points on the outer circumference of the wafer and to thereby detect the coordinates at the three points on the outer circumference of the wafer, calculating the center of the wafer from the coordinates at the three points, centering the wafer with respect to the holding table, and continuously rotating the holding table through 360° to image the whole of the outer circumference of the wafer by using a minimum imaging area corresponding to the outer circumference of the wafer and to thereby detect the angle where the notch is located.

Abstract: A method of fabrication of alignment marks for a non-STI CMOS image sensor is introduced. In some embodiments, zero layer alignment marks and active are alignment marks may be simultaneously formed on a wafer. A substrate of the wafer may be patterned to form one or more recesses in the substrate. The recesses may be filled with a dielectric material using, for example, a field oxidation method and/or suitable deposition methods. Structures formed by the above process may correspond to elements of the zero layer alignment marks and/or to elements the active area alignment marks.

Abstract: In an overlay displacement amount measuring method according to an embodiment, a temperature distribution of a substrate during a pattern forming process and a temperature distribution of the substrate during a measuring process for measuring a positional displacement amount between patterns on the substrate by an electron microscope are measured. An expansion/contraction amount of the substrate between two processes is calculated based upon the two temperature distributions, and the positional displacement amount is corrected based upon the expansion/contraction amount. An overlay displacement amount between the pattern and a pattern formed on a layer different from the pattern is measured by an optical measuring apparatus, and the overlay displacement amount is corrected based upon the corrected positional displacement amount.

Abstract: Aspects of the present disclosure describe systems and methods for calibrating a metrology tool by using proportionality factors. The proportionality factors may be obtained by measuring a substrate under different measurement conditions. Then calculating the measured metrology value and one or more quality merits. From this information, proportionality factors may be determined. Thereafter the proportionality factors may be used to quantify the inaccuracy in a metrology measurement. The proportionality factors may also be used to determine an optimize measurement recipe. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Abstract: The present disclosure provides an embodiment of a method, for a lithography process for reducing a critical dimension (CD) by a factor n wherein n<1. The method includes providing a pattern generator having a first pixel size S1 to generate an alternating data grid having a second pixel size S2 that is <S1, wherein the pattern generator includes multiple grid segments configured to offset from each other in a first direction; and scanning the pattern generator in a second direction perpendicular to the first direction during the lithography process such that each subsequent segment of the grid segments is controlled to have a time delay relative to a preceding segment of the grid segments.

Abstract: The present invention provides a method of forming a detection mark from line patterns formed on a substrate, including a first step of deciding a first region for forming the detection mark on the substrate, and a second region which surrounds the first region and in which formation of the detection mark is forbidden, and a second step of projecting, onto the substrate by a projection optical system, patterns including a first cut pattern for partially cutting the line pattern in the first region to form a plurality of mark elements, and a removal pattern for removing the line pattern in the second region, and forming the detection mark including the plurality of mark elements.

Abstract: A substrate is loaded onto a substrate support of a lithographic apparatus, after which the apparatus measures locations of substrate alignment marks. These measurements define first correction information allowing the apparatus to apply a pattern at one or more desired locations on the substrate. Additional second correction information is used to enhance accuracy of pattern positioning, in particular to correct higher order distortions of a nominal alignment grid. The second correction information may be based on measurements of locations of alignment marks made when applying a previous pattern to the same substrate. The second correction information may alternatively or in addition be based on measurements made on similar substrates that have been patterned prior to the current substrate.

Abstract: The present invention discloses a test method for monitoring the stability of process and a test module device thereof. The test module device comprises: a substrate, a certain number of the first metal wires, a certain number of the second metal wires, an insulating block is disposed between the adjacent first metal wires. The method comprises: a preconfigured value of the test current in the test module is provided in the process; the multiple test module devices are provided. The present invention adopts a method adopting an offset to set the upper metal wire and lower metal wire in the test module instead of regular equal interval setting. Consequently, the safety zone of the overlay in the process can be determined. The present invention can monitor the stability of the process.

Abstract: A substrate stage is used in a lithographic apparatus. The substrate stage includes a substrate table constructed to hold a substrate and a positioning device for in use positioning the substrate table relative to a projection system of the lithographic apparatus. The positioning device includes a first positioning member mounted to the substrate table and a second positioning member co-operating with the first positioning member to position the substrate table. The second positioning member is mounted to a support structure. The substrate stage further comprises an actuator that is arranged to exert a vertical force on a bottom surface of the substrate table at a substantially fixed horizontal position relative to the support structure.

Abstract: A method identifies, as an independent node, any node representing a circuit pattern in any odd loop of a layout of a region of a layer of an IC that is not included in any other odd loop of the layout. The layer is to have a plurality of circuit patterns to be patterned using at least three photomasks. The method identifies, as a safe independent node, any independent node not closer than a threshold distance from any other independent nodes in another odd loop of the layout. The layout is modified, if the circuit patterns in the layout include any odd loop without any safe independent node, so that that after the modifying, each odd loop has at least one safe independent node.

Abstract: The general inventive concepts relate to the field of display technology, and provide a mask plate and a method for producing a substrate mark to increase the accuracy of the production of a substrate mark, and decrease the difficulty in monitoring products and the production cost. An exemplary mask plate comprises: a display region mask part; at least one pair of test mark mask parts, a test mark mask part being located on either side of the display region mask part and their positions being opposite to each other; and a protection mark mask part correspondingly disposed on the outside of each test mark mask part relative to the display region mask part, wherein the pattern outline of the protection mark mask part is larger than that of the test mark mask part.

Abstract: According to one embodiment, a method for measuring pattern misalignment, includes: a first step obtaining image data; a second step specifying a measurement region; a third step calculating a first shift amount (x1, y1); a fourth step determining, after calculating the first shift amount, a first distribution; a fifth step executing a plurality of times the second step, the third step, and the fourth step; a seventh step calculating a second shift amount (x2, y2); an eighth step determining, after calculating the second shift amount, a second distribution; a ninth step executing a plurality of times the sixth step, the seventh step, and the eighth step; and a tenth step calculating a difference (x2?x1, y2?y1) between the second pattern misalignment and the first pattern misalignment.

Abstract: A method of fabricating a semiconductor device includes providing a semiconductor substrate having a first surface and a second surface opposite the first surface, forming an alignment key and a connection contact that penetrate a portion of the semiconductor substrate and extend from the first surface toward the second surface, forming a first circuit on the first surface of the semiconductor substrate such that the first circuit is electrically connected to the connection contact, recessing the second surface of the semiconductor substrate to form a third surface exposing the alignment key and the connection contact, and forming a second circuit on the third surface of the semiconductor substrate such that the second circuit is electrically connected to the connection contact.

Abstract: At a time of aligning a thin plate-shaped work of which both front and rear surfaces are subjected to work, a deflection caused at a central portion of the thin plate-shaped work is corrected and the thin plate-shaped work is controlled to be parallel state with respect to a photomask.

Abstract: A sheet conveying apparatus includes a sheet conveying unit that conveys a sheet including a drive roller, a driven roller, and a rotary encoder provided on a rotational axle of one of the drive roller and the driven roller; a conveying amount measuring unit that measures a conveying amount of the sheet; a first detection unit positioned downstream of the sheet conveying unit, the first detection unit being positioned apart from the drive roller and the driven roller not to overlap with the drive roller and the driven roller in the conveying direction; a second detection unit positioned upstream of the sheet conveying unit; and a conveying distance calculation unit that calculates a conveying distance of the sheet based on the measured result by the conveying amount measuring unit and the detected results detected by the first detection unit and the second detection unit.

Abstract: Methods for forming an alignment mark and the resulting mark are disclosed. Embodiments may include forming a first shape having rotational symmetry; forming a second shape; and forming an alignment mark by combining the first shape and one or more of the second shape, wherein the alignment mark has rotational symmetry.

Abstract: A method of focus measurement of the embodiment irradiates exposure light from a first direction and projects first and second line-and-space patterns on a substrate. Further, exposure light is irradiated from a second direction and third and fourth line-and-space patterns are projected on the substrate. By measuring a distance between the first and third line-and-space patterns on the substrate, a sum of a dislocated amount caused by dislocation of focus and an overlap dislocation amount between the first and third line-and-space patterns is calculated as a first dislocated amount. Further, by measuring a distance between the second and fourth line-and-space patterns on the substrate, an overlap dislocation amount between the second and fourth line-and-space patterns is calculated as a second dislocation amount. Further, based on the first and second dislocation amounts, the focus dislocation amount is calculated.

Abstract: Embodiments of the invention discloses a space imaging overlay inspection method and an array substrate; the method comprises: forming a thin film having a space imaging overlay mark by photolithography; when the thin film is a transparent thin film, performing a color developing treatment on the space imaging overlay mark on the transparent thin film, so as to make the space imaging overlay mark appear in a non-transparent color; and conducting a space imaging overlay inspection between the transparent thin film and an adjacent thin film by using the space imaging overlay mark appear appearing in the non-transparent color. In the method, by conducting the color developing treatment to the space imaging overlay mark on the transparent thin film and then conducting positioning, the space imaging overlay mark can be positioned quickly and accurately, thus alignment condition between two photolithography procedures can be detected swiftly and effectively.

Abstract: The embodiments described herein relate to methods, devices, and systems for masking a substrate using a photomasking process. An adaptive photomask configured to generate a photomasking pattern in accordance with dimensions of a surface feature on substrate is described. The adaptive photomask can be used to create customized photomask patterns for individual substrates. Methods and devices described herein can be used in manufacturing processes where similar parts having slight differences due to built-in tolerances are manufactured. Methods and a devices described herein can also be used in manufacture processes involving masking of three-dimensional portions of a part. A photomasking system that includes a translational mechanism for scanning a substrate surface is described.

Abstract: A compressed print having one or more compressed images of a symbol is disclosed. The compressed images are formed on an image forming surface under a lenticular sheet. The lenticular sheet has a plurality of lenticules and each of the compressed images has a plurality of image elements formed under a lenticule. Each of the image elements is corresponding to a different portion of the symbol. The lenticules are designed to be so small that the compressed image formed under each of the lenticules is not discernible when a viewer looks at the compressed print at a normal viewing distance. As such, the miniaturized compressed images of the symbol can be used as an identification tag, hidden in the compressed print.

Abstract: Even in case that a wafer is so greatly deviated that a peripheral portion of the wafer cannot be detected, position determination of the wafer can be performed without inflicting a damage on the wafer. The wafer peripheral portion, which is a target, is detected based on output images from a plurality of imaging units disposed along a peripheral portion shape of the wafer (step S210), and a wafer position deviation correcting step (step S220) or a rough correcting step (step 230) is performed according to the number of the imaging units capable of detecting the wafer peripheral portion. In case that the wafer peripheral portion cannot be detected by all the imaging units, a wafer position adjusting step (step 240) for moving the wafer is performed in a position adjusting direction acquired by a combination of the output images by each imaging unit.

Abstract: One embodiment relates to a method of measuring overlay errors for a programmable pattern, area-imaging electron beam lithography apparatus. Patterned cells of an overlay measurement target array may be printed in swaths such that they are superposed on patterned cells of a first (base) array. In addition, the overlay array may have controlled-exposure areas distributed within the swaths. The superposed cells of the overlay and base arrays are imaged. The overlay errors are then measured based on distortions between the two arrays in the image data. Alternatively, non-imaging methods, such as using scatterometry, may be used. Another embodiment relates to a method for correcting overlay errors for an electron beam lithography apparatus. Overlay errors for a pattern to be printed are determined based on within-swath exposure conditions. The pattern is then pre-distorted to compensate for the overlay errors. Other embodiments, aspects and features are also disclosed.

Abstract: The invention relates to the technical field of an alignment method, and discloses a method for aligning substrate and mask, including: firstly forming at least one set of alignment marks on a mask plate; selecting a certain number of large-size substrates as sample substrates; forming a plurality of sets of alignment marks on each sample substrate using the mask plate and the at least one set of alignment marks formed thereon to divide the sample substrate into a plurality of sub-substrate areas; and then performing mask process on the respective sample substrates, accurate alignment for each sub-substrate area can be realized by means of the plurality of sets of alignment marks on the sample substrate, and one sub-substrate area can be accurately aligned by means of at least two sets of alignment marks formed on the sample substrate.

Abstract: Provided is a circuit board in which visibility of an alignment mark is improved. In a case of manufacturing a substrate module in which a touch panel (20) and an FPC (50) are electrically connected, an alignment mark in the FPC (50) is formed by an opaque metal film, so that visibility is high. Consequently, when an alignment mark (25) in the touch panel (20) is also formed by an opaque metal film, the visibility of the alignment mark (25) also becomes high. By performing alignment using the alignment marks having high visibility, alignment between the touch panel (20) and the FPC (50) can be performed easily with high precision. As a result, the yield of the substrate module increases and modification of an alignment apparatus used for alignment becomes unnecessary, so that the manufacturing cost of the substrate module can be decreased.

Abstract: A projection exposure tool for microlithography for imaging mask structures of an image-providing substrate onto a substrate to be structured includes a measuring apparatus configured to determine a relative position of measurement structures disposed on a surface of one of the substrates in relation to one another in at least one lateral direction with respect to the substrate surface and to thereby simultaneously measure a number of measurement structures disposed laterally offset in relation to one another.

Abstract: A method of providing a photolithography pattern can be provided by identifying at least one weak feature from among a plurality of features included in a photolithography pattern based on a feature parameter that is compared to a predetermined identification threshold value for the feature parameter. A first region of the weak feature can be classified as a first dosage region and a second region of the weak feature can be classified as a second dosage region. Related methods and apparatus are also disclosed.

Abstract: A substrate is loaded onto a substrate support of a lithographic apparatus, after which the apparatus measures locations of substrate alignment marks. These measurements define first correction information allowing the apparatus to apply a pattern at one or more desired locations on the substrate. Additional second correction information is used to enhance accuracy of pattern positioning, in particular to correct higher order distortions of a nominal alignment grid. The second correction information may be based on measurements of locations of alignment marks made when applying a previous pattern to the same substrate. The second correction information may alternatively or in addition be based on measurements made on similar substrates that have been patterned prior to the current substrate.

Abstract: A method forming a pattern includes a process in which self-assembly material is formed on the substrate where on which a fiducial mark is formed, and the self-assembly material is separated in micro phase to form a self-assembled pattern. The position error from a predetermined formation position of the self-assembled pattern is measured on the basis of the fiducial mark, and a pattern for an alignment as well as a peripheral circuit pattern are formed on the substrate. The formation position of at least one pattern among the pattern for alignment and peripheral circuit pattern is corrected using the position error.

Abstract: In a multiple patterning techniques, where two or more exposures are used to form a single layer of a device, the splitting of features in a single layer between the multiple exposures is carried out additionally with reference to features of another associated layer and the splitting of that layer into two or more sets of features for separate exposure. The multiple exposure process can be a process involving repeated litho-etch steps desirably, the alignment scheme utilized during exposure of the split layers is optimized with reference to the splitting approach.

Abstract: The present invention relates to a multilayer substrate containing a substrate and a multilayer film provided on the substrate, in which a concave or convex fiducial mark that indicates a fiducial position of the multilayer substrate is formed on the surface of the multilayer film on the opposite side to the side of the substrate; and a material of at least a part of the surface of the fiducial mark is different from a material of a most superficial layer of the multilayer film on the opposite side to the side of the substrate.

Abstract: The present invention relates to a reflective mask blank containing in this order, a substrate, a multilayer reflective film that reflects exposure light, and an absorber layer that absorbs the exposure light, in which the reflective mask blank further contains a fiducial mark indicating a reference position of the multilayer reflective film, which is formed in a concave shape or in a convex shape on a surface of the multilayer reflective film or on a surface of one layer formed between the multilayer reflective film and the absorber layer, and the fiducial mark is formed so as to have a reflectivity different from an area surrounding the fiducial mark with respect to a light with a prescribed wavelength and is transferred to a layer formed on the fiducial mark.

Abstract: A semiconductor device includes a cell mask pattern disposed in a cell region of a mask substrate and a vernier mask pattern disposed in a vernier region of the mask substrate. The vernier mask pattern includes a variable mask pattern portion to transfer a different shape of pattern depending on the magnitude of exposure energy.

Abstract: On a film where an exposure material coating has been formed in a exposure pattern formation region on a film base material, a colored firing material, colored light-curable material, or colored ink is applied to at least one of two widthwise side edges to form a side part application coating, which is irradiated with laser light by an alignment mark formation unit to form an alignment mark. The alignment mark is then used to detect film meandering and adjust the positions of masks. This makes it easy to form the alignment mark and detect the alignment mark thus formed and makes it possible to accurately correct for meandering of a film and stably expose the film in the process of continuous exposure of a film where an exposure material coating has been formed in a exposure pattern formation region on a film base material.

Abstract: According to one embodiment, a positional deviation measuring method includes measuring a positional deviation of a device pattern formed in a lower layer portion using an alignment mark of the lower layer portion as a reference; measuring a positional deviation of a device pattern formed in an upper layer portion above the lower layer portion using an alignment mark of the upper layer portion as a reference; measuring a positional deviation between the alignment mark of the lower layer portion and the alignment mark of the upper layer portion; and calculating a positional deviation between the device patterns based on the positional deviation between the alignment marks.

Abstract: A method for fabricating a semiconductor device is disclosed. An exemplary method includes receiving an integrated circuit (IC) layout design including a target pattern on a grid. The method further includes receiving a multiple-grid structure. The multiple-grid structure includes a number of exposure grid segments offset one from the other by an offset amount in a first direction. The method further includes performing a multiple-grid exposure to expose the target pattern on a substrate and thereby form a circuit feature pattern on the substrate. Performing the multiple-grid exposure includes scanning the substrate with the multiple-grid structure in a second direction such that a sub-pixel shift of the exposed target pattern occurs in the first direction, and using a delta time (?t) such that a sub-pixel shift of the exposed target pattern occurs in the second direction.

Abstract: A method for verifying stitching accuracy of a stitched chip on a wafer is disclosed. Initially, a set of test structures are inserted within a reticle layout. An exposure program is executed to control a photolithography equipment having a stepper to perform multiple exposures of the reticle on a wafer to generate a stitched chip on the wafer. Electrical measurements are then performed on the test structures at actual stitch boundaries of the stitched chip to evaluate stitching accuracy of the stitched chip.

Abstract: An exposure apparatus for a photoalignment process includes; a first photomask including a plurality of transmission parts; and a second photomask including a plurality of transmission parts, where the first photomask and the second photomask partially overlap each other such that each of the first photomask and the second photomask includes an overlapping region and a non-overlapping region, the overlapping region of at least one of the first photomask and the overlapping region of the second photomask includes at least two subregions, and shapes or arrangements of the transmission parts in the at least two subregions are different from each other.

Abstract: A photo mask for exposing according to an embodiment includes a mark pattern arranged in a mark region that is different from an effective region to form a semiconductor device; and a regular pattern arranged in the mark region and around the mark pattern and smaller than the mark pattern in size and pitch.

Abstract: A method of forming a pattern of doped region includes the following steps. At first, a device layout pattern including a gate layout pattern and a doped region layout pattern is provided to a computer system. Subsequently, the device layout pattern is split into a plurality of sub regions, and the sub regions have different pattern densities of the gate layout pattern. Then, at least an optical proximity correction (OPC) calculation is respectively performed on the doped region layout pattern in each of the sub regions to respectively form a corrected sub doped region layout pattern in each of the sub regions. Afterwards, the corrected sub doped region layout patterns are combined to form a corrected doped region layout pattern, and the corrected doped region layout pattern is outputted onto a mask through the computer system.

Abstract: Disclosed is an LCD panel photolithography process, employed in a lithography system for manufacturing a plurality of LCD panel, comprising steps of: performing photolithography to a glass substrate with a first mask, and the first mask comprises a plurality of sets of alignment marks corresponding to a plurality of following masks thereafter, and a plurality of sets of alignment marks corresponding to the plurality of following masks thereafter are formed on the glass substrate; and employing the plurality of sets of alignment marks on the glass substrate respectively, to perform alignment procedure and photolithography for the plurality of following masks with the plurality of sets of alignment marks on the glass substrate to form patterns; wherein corresponding to the same LCD panel area, the plurality of sets of alignment marks on the glass substrate have different position coordinates respectively.

Abstract: Reflection type blank masks are provided. The blank mask includes a substrate, a reflection layer substantially on the substrate, at least one fiducial mark substantially on the reflection layer, an absorption layer substantially on the at least one fiducial mark and the reflection layer, and a resist layer substantially on the absorption layer.

Abstract: The present invention provides a mask and a repairing method therefor. A reference area is selected in a configuration pattern of a mask template, the reference area is corresponding to a to-be-shaded area of a mask; a repair area is formed on a drillable member according to the reference area; a hollow area is formed in the repair area of the drillable member, the hollow area is corresponding to the to-be-shaded area; the drillable member is attached to the mask, the hollow area is corresponding to the to-be-shaded area; and shading material is coated on the drillable member, so as to form a shaded layer on the to-be-shaded layer.

Abstract: Exposure apparatus is equipped with an illumination optical device which illuminates a mask with an exposure beam, a mask table which holds a periphery of a pattern area of the mask from above so that a pattern surface of the mask becomes substantially parallel to an XY plane and makes a force at least parallel to an XY plane and on the mask, and a wafer stage which moves along the XY plane, holding a wafer substantially parallel to the XY plane. Therefore, an overlay with high precision of a pattern of a mask and an underlying pattern on the substrate can be realized, even though the exposure apparatus employs a proximity method, that is, the exposure apparatus does not use a projection optical system.

Abstract: A method for producing a measurement structure for measuring alignment of patterns formed in one or more layers of patternable material uses multiple exposure tools having different resolution limits and maximum expose field sizes. The measurement structure includes multiple complementary and coincident parts. An abutting field pattern is exposed and stitched in a layer of patternable material using a first exposure tool and a first mask. The abutting field pattern includes a first portion of the multiple complementary parts. A periphery pattern is exposed in the same layer or in a different layer of patternable material using a second exposure tool and a second mask. The periphery pattern includes a second portion of the multiple complementary parts. A maximum expose field of the first exposure tool is smaller than the maximum expose field of the second exposure tool.

Abstract: In the present invention, a number of times the brightness changes detected at the same position while a substrate conveys are added up in the conveying direction, thereby obtaining a plurality of edge count data, and then, a plurality of positions of long sides of patterns parallel to the conveying direction is identified based on the plurality of edge count data exceeding a predetermined threshold value, middle point positions of a plurality of proximity pairs are calculated, and a middle point position close to the target position preset in the imaging device is selected from the plurality of middle point positions of the proximity pairs, an amount of position displacement between the selected middle point position and the target position of imaging device is calculated, and the photomask in the direction substantially perpendicular to the conveying direction so that the amount of position displacement is a predetermined value.

Abstract: A pattern from a patterning device is applied to a substrate by a lithographic apparatus. The applied pattern includes product features and metrology targets. The metrology targets include large targets and small targets which are for measuring overlay. Some of the smaller targets are distributed at locations between the larger targets, while other small targets are placed at the same locations as a large target. By comparing values measured using a small target and large target at the same location, parameter values measured using all the small targets can be corrected for better accuracy. The large targets can be located primarily within scribe lanes while the small targets are distributed within product areas.

Abstract: In a method of generating a three-dimensional process window qualification, a photoresist layer is coated on a substrate including an underlying structure. A plurality of circular-shaped regions of the substrate are distinguished into 1 to n regions to partition the substrate into a center portion and an edge portion, n being a natural number greater than 2. 1 to n exposing ranges are set, including a common exposing condition for the 1 to n regions. A photoresist pattern is fox led by exposing each shot portion in the 1 to n regions using a split exposing condition in the 1 to n exposing ranges. The photoresist pattern is detected, and a normal photoresist pattern with respect to each of the 1 to n regions is selected to generate the three-dimensional process window qualification.

Abstract: A process for use in lithography, such as photolithography for patterning a semiconductor wafer, is disclosed. The process includes receiving an incoming semiconductor wafer having various features and layers formed thereon. A unit-induced overlay (uniiOVL) correction is received and a deformation measurement is performed on the incoming semiconductor wafer in an overlay module. A deformation-induced overlay (defiOVL) correction is generated from the deformation measurement results by employing a predetermined algorithm on the deformation measurement results. The defiOVL and uniiOVL corrections are fed-forward to an exposure module and an exposure process is performed on the incoming semiconductor wafer.

Abstract: A method of printing an image on a wafer. The method includes the steps of printing a main image, wherein the main image includes fields which are fully on the wafer, and printing an alternate image, wherein the alternate image includes fields which are only partially on the wafer. The alternate image could be placed on a separate mask which is loaded onto the exposure tool after the mask with the main image has completed printing. Alternatively, it could be an extra image specially inserted on the mask with the main image for that layer.

Abstract: There is provided a photomask capable of improving alignment accuracy with respective photomasks disposed on the front and rear faces of a substrate. A photomask has a drawing pattern for exposure formed on one face opposing a substrate, a first alignment mark for alignment with a substrate side mark formed on the substrate, the first alignment mark being provided in a region of the one face, the region opposing the substrate when the substrate is retained and the drawing pattern is not formed in the region, and a second alignment mark for alignment with a third alignment mark provided on another photomask, the second alignment mark being provided in a region which does not oppose the substrate when the substrate is retained.