Including Control Feature Responsive To A Test Or Measurement Patents (Class 430/30)
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Patent number: 12656672Abstract: An exposure mask is provided. The exposure mask includes a plurality of pattern blocks for defining a plurality of pattern profiles. Each pattern block includes a plurality of pattern units having mask patterns, and the mask patterns are formed in an asymmetric arrangement. The exposure mask may be a binary exposure mask for forming pattern profiles with curved surfaces.Type: GrantFiled: February 3, 2021Date of Patent: June 16, 2026Assignee: VisEra Technologies Company LimitedInventors: Yueh-Ching Cheng, Linya Tseng, Jyun-You Lu
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Patent number: 12619167Abstract: An optical inspection device for a surface of a reticle pod includes a carrier platform having a carrier surface, a light source module, a photographic module, and a control module. The light source module includes first and second light sources for irradiating the carrier surface in first and second directions, respectively. An angle of an included angle between the first direction and the carrier surface is greater than an angle of an included angle between the second direction and the carrier surface. The control module is signally connected to the camera module, first light source, and second light source. The control module controls one of the first light source and second light source to turn on and the other one to turn off. An optical inspection method for a surface of a reticle pod is further provided to operate to inspect a reticle pod efficiently and precisely.Type: GrantFiled: May 18, 2023Date of Patent: May 5, 2026Assignee: GUDENG EQUIPMENT CO., LTD.Inventors: Yin-Feng Chan, Lin-Hsin Tu, Ming-Mo Lo
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Patent number: 12613470Abstract: Methods for optical proximity correction (OPC), which may include inputting curved layout data corresponding to a target layer to be formed; performing manhattanization based on the curved layout data and acquiring manhattanized data; performing fragmentation on the manhattanized data and decomposing the manhattanized data into a plurality of data components; generating an OPC model based on the plurality of data components and performing a simulation on the OPC model to extract a contour of the OPC model; calculating an overlap score between the contour of the OPC model and a layer that is adjacent to the target layer and reflecting the calculated overlap score in the OPC model; and acquiring design data for forming the target layer based on the simulation result.Type: GrantFiled: August 19, 2022Date of Patent: April 28, 2026Assignee: Samsung Electronics Co., Ltd.Inventors: Yujeong Sin, Sunggon Jung
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Patent number: 12612693Abstract: A manufacturing method of a mask assembly includes tensioning a mask sheet, connecting the tensioned mask sheet with a mask frame, and defining opening processing areas in the tensioned mask sheet to form openings respectively corresponding to the opening processing areas. The defining of the opening processing areas includes defining initial opening processing areas in the tensioned mask sheet in a first direction and in a second direction crossing the first direction to determine a processing sequence of the initial opening processing areas, calculating cumulative deformation amounts accumulated in each of the initial opening processing areas based on the processing sequence, and correcting a size and a position of each of the initial opening processing areas based on the cumulative deformation amounts.Type: GrantFiled: January 31, 2023Date of Patent: April 28, 2026Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Hwi Kim, Jeongkuk Kim, Seungyong Song, Areum Lee, Eunbee Jo, Kyu Hwan Hwang
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Patent number: 12601976Abstract: Process condition management facilitates the combination of dry development and post-development treatment into a single process chamber, eliminating the necessity for a post-dry development bake step in a separate chamber during semiconductor manufacturing. Thermal dry development and plasma dry development may be performed in the same chamber. Thermal dry development, plasma dry development and passivation such as an O2 flash treatment; or thermal dry development, plasma dry development, passivation and hardening operations are enabled without wafer transfer.Type: GrantFiled: July 26, 2024Date of Patent: April 14, 2026Assignee: Lam Research CorporationInventors: Da Li, Ji Yeon Kim, Younghee Lee, Hongxiang Zhao, Yisi Zhu, Samantha S.H. Tan, Mengnan Zou, Zhiwei Sun, Jun Xue
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System and method for performing local CDU modeling and control in a virtual fabrication environment
Patent number: 12596300Abstract: Systems and methods for performing local Critical Dimension Uniformity (CDU) modeling in a virtual fabrication environment are discussed. More particularly, local CD variance is replicated in the virtual fabrication environment in order to produce a CDU mask that can be used during a virtual fabrication sequence to produce more accurate results reflecting the CD variance of features that occurs in a pattern for a semiconductor device being physically fabricated.Type: GrantFiled: April 21, 2021Date of Patent: April 7, 2026Assignee: Coventor, Inc.Inventors: Qing Peng Wang, Yu De Chen, Shi-hao Huang, Rui Bao, Joseph Ervin -
Patent number: 12593660Abstract: The method including forming a first photoresist (PR) pattern by exposing first field areas of a first PR layer, forming a second PR pattern by exposing first top field areas and first bottom field areas of a second PR layer, measuring a first top intra-field overlay for the first top field areas and a first bottom intra-field overlay for the first bottom field areas, and determining a top intra-field correction parameter and a bottom intra-field correction parameter based on the first top intra-field overlay and the first bottom intra-field overlay, respectively, may be provided.Type: GrantFiled: August 23, 2023Date of Patent: March 31, 2026Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Inbeom Yim, Jeongjin Lee, Seungyoon Lee, Chan Hwang
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Patent number: 12571119Abstract: Methods and apparatus for electroplating a substrate incorporate aspects of digital lithography and feedback from electroplating processes to improve characteristics of plating material based on die patterns. In some embodiments, a method of electroplating a substrate may include receiving a die design, forming a first lithographic pattern for a first substrate based on the die design, using a digital lithography process to pattern the first substrate with the first lithographic pattern, using an electroplating process to deposit material on the first substrate, using a metrology process to determine at least one parameter of the deposited material on the first substrate, and forming a second lithographic pattern from the first lithographic pattern for a second substrate based, at least in part, on the at least one parameter received directly from the metrology process on the first substrate by the digital lithographic process for the second substrate.Type: GrantFiled: March 7, 2023Date of Patent: March 10, 2026Assignee: Applied Materials Inc.Inventors: Marvin Louis Bernt, Jon Woodyard, Niranjan Khasgiwale, Vincent Dicaprio
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Patent number: 12557602Abstract: In an embodiment, a method includes: placing a wafer on an implanter platen, the wafer including alignment marks; measuring a position of the wafer by measuring positions of the alignment marks with one or more cameras; determining an angular displacement between the position of the wafer and a reference position of the wafer; and rotating the implanter platen by the angular displacement.Type: GrantFiled: April 4, 2024Date of Patent: February 17, 2026Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chia-Cheng Chen, Chih-Kai Yang, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo
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Patent number: 12518969Abstract: The present disclosure provides a semiconductor structure and a method of manufacturing a semiconductor structure. The semiconductor structure includes a first set of photoresist structures, a second photoresist structure, and a third photoresist structure. The first set of photoresist structures is disposed along a first orientation. The second photoresist structure is disposed non-parallel to the first orientation. The third photoresist structure is disposed non-parallel to the first orientation. The second photoresist structure and the third photoresist structure contact at least one of the first set of photoresist structures.Type: GrantFiled: July 7, 2022Date of Patent: January 6, 2026Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Liang-Shiuan Peng, Chih-Hung Lu
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Patent number: 12510828Abstract: Disclosed is a method of determining a process window within a process space comprising obtaining contour data relating to features to be provided to a substrate across a plurality of layers, for each of a plurality of process conditions associated with providing the features across said plurality of layers and failure mode data describing constraints on the contour data across the plurality of layers. The failure mode data is applied to the contour data to determine a failure count for each process condition; and the process window is determined by associating each process condition to its corresponding failure count. Also disclosed is a method of determining an actuation constrained subspace of the process window based on actuation constraints imposed by the plurality of actuators.Type: GrantFiled: January 20, 2023Date of Patent: December 30, 2025Assignee: ASML Netherlands B.V.Inventors: Pioter Nikolski, Thomas Theeuwes, Antonio Corradi, Duan-Fu Stephen Hsu, Sun Wook Jung
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Patent number: 12505524Abstract: A method for training a patterning process model, the patterning process model configured to predict a pattern that will be formed by a patterning process. The method involves obtaining an image data associated with a desired pattern, a measured pattern of the substrate, a first model including a first set of parameters, and a machine learning model including a second set of parameters; and iteratively determining values of the first set of parameters and the second set of parameters to train the patterning process model. An iteration involves executing, using the image data, the first model and the machine learning model to cooperatively predict a printed pattern of the substrate; and modifying the values of the first set of parameters and the second set of parameters such that a difference between the measured pattern and the predicted pattern is reduced.Type: GrantFiled: March 5, 2020Date of Patent: December 23, 2025Assignee: ASML NETHERLANDS B.V.Inventors: Ziyang Ma, Jin Cheng, Ya Luo, Leiwu Zheng, Xin Guo, Jen-Shiang Wang, Yongfa Fan, Feng Chen, Yi-Yin Chen, Chenji Zhang, Yen-Wen Lu
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Patent number: 12493248Abstract: A method and associated apparatuses for optimizing a sampling scheme which defines sampling locations on a bonded substrate, having undergone a wafer to wafer bonding process. The method includes determining a sampling scheme for a metrology process and optimizing the sampling scheme with respect to a singularity defined by a large overlay error and/or grid deformation at a central location on the bonded substrate to obtain a modified sampling scheme.Type: GrantFiled: April 20, 2021Date of Patent: December 9, 2025Assignee: ASML NETHERLANDS B.V.Inventors: Sarathi Roy, Wolfgang Helmut Henke, Peter Ten Berge
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Patent number: 12474632Abstract: A pellicle frame includes: a first portion; and a plurality of second portions. The first portion is for connection to a border of a pellicle. The first portion includes a hollow and generally rectangular body. The plurality of second portions are for connection to a patterning device. The first portion and the plurality of second portions are all formed from a first material. Each of the second portions is connected to the first portion by a spring portion formed from the first material. Such a pellicle frame is advantageous since the first portion, the plurality of second portions and the spring portions are all formed from a same material.Type: GrantFiled: March 25, 2021Date of Patent: November 18, 2025Assignee: ASML NETHERLANDS B.V.Inventors: Kristof Custers, Ron Geeraard Catharina De Bruijn, Matthias Kruizinga, Lodewijk Alexander Schijvenaars
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Patent number: 12474641Abstract: An exposure method includes predicting a change in an optical characteristic of a projection optical system in exposing in which exposure processing is performed on a plurality of substrates via the projection optical system, adjusting the optical characteristic based on a prediction result of the predicting before the exposing, and performing the exposing after the adjusting, wherein, in the adjusting, the optical characteristic at a start of the exposing is adjusted in a direction different from a direction in which the optical characteristic changes, based on a change in the optical characteristic predicted in the predicting.Type: GrantFiled: October 27, 2023Date of Patent: November 18, 2025Assignee: Canon Kabushiki KaishaInventors: Jinnai Watanabe, Jun Moizumi
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Patent number: 12466135Abstract: A three-dimensional printing system includes a tank containing a liquid photopolymer resin. An arm is configured to be movable relative to the tank. A rigid base is connected to the arm. A light source is configured to emit light to the tank to form an object on the rigid base. An actuator is connected to at least one of the build plate and the tank. The actuator is configured to deform when power is supplied to the actuator.Type: GrantFiled: February 28, 2024Date of Patent: November 11, 2025Assignee: NISSAN NORTH AMERICA, INC.Inventors: Federico Venturi, Nanzhu Zhao
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Patent number: 12449736Abstract: A measurement apparatus which measures a relative positional displacement amount of a partial pattern to another pattern in a complex pattern on a surface of an object, includes: a measurement part to measure two-dimensional intensity distributions having a first and a second two-dimensional intensity distribution, the first distribution being formed by applying first light having a first shape to a region on which the complex pattern is measured and detecting only zero order diffraction light from the region via a first filter, and the second distribution being formed by applying second light having a second shape to the region and detecting only zero order diffraction light from the region via a second filter; a storage part to store measurement data indicating the distributions; and a calculation part to form a synthesized intensity distribution obtained by the two-dimensional intensity distributions to calculate a positional displacement amount of the partial pattern.Type: GrantFiled: September 9, 2022Date of Patent: October 21, 2025Assignee: Kioxia CorporationInventors: Kentaro Kasa, Soichi Inoue, Satoshi Tanaka, Hiroyuki Tanizaki
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Patent number: 12443111Abstract: Systems and methods for reducing prediction uncertainty in a prediction model associated with a patterning process are described. These may be used in calibrating a process model associated with the patterning process, for example. Reducing the uncertainty in the prediction model may include determining a prediction uncertainty parameter based on prediction data. The prediction data may be determined using the prediction model. The prediction model may have been calibrated with calibration data. The prediction uncertainty parameter may be associated with variation in the prediction data. Reducing the uncertainty in the prediction model may include selecting a subset of process data based on the prediction uncertainty parameter; and recalibrating the prediction model using the calibration data and the selected subset of the process data.Type: GrantFiled: June 15, 2020Date of Patent: October 14, 2025Assignee: ASML NETHERLANDSInventors: Lei Wang, Yi-Yin Chen, Mu Feng, Qian Zhao
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Patent number: 12437388Abstract: Various embodiments provide computer vision techniques for ensuring system- and component-level integrity via component characterization. Various embodiments may comprise computer vision systems that are configured to extract pin information from surface-mount device (“SMD”) contours. Accordingly, the disclosed embodiments may include a computer vision system configured to detect the extremities of each pin in a SMD contour image based on a combination of at least one of machine learning and one or more PCB image collection datasets.Type: GrantFiled: June 2, 2023Date of Patent: October 7, 2025Assignee: University of Florida Research Foundation, IncorporatedInventors: Navid Asadi-Zanjani, Mark M. Tehranipoor, Nathan Jessurun, Jacob C. Harrison
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Patent number: 12437962Abstract: Provided is a technique and the like capable of specifying irradiation areas or irradiation positions of a beam and a light as clearly as possible. A charged particle beam apparatus 1 includes: a position adjustment mark 10 provided on a stage 6 and irradiated with a beam bl and a light a1; and a mechanism setting an irradiation position of the beam bl and an irradiation position of the light a1 with respect to the stage 6 and changing a relative positional relationship including a distance between the irradiation position of the light a1 and the stage 6.Type: GrantFiled: September 30, 2020Date of Patent: October 7, 2025Assignee: Hitachi High-Tech CorporationInventors: Naoko Takeda, Natsuki Tsuno, Satoshi Takada, Yuto Hattori
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Patent number: 12436464Abstract: Disclosed herein are methods and apparatuses for exposing an organic metal-oxide film to a blanket UV treatment prior to a lithographic patterning operation. A blanket UV treatment may be used to shift a solubility curve of the film, such that a lower EUV dose may be used to pattern the film. Additionally, a blanket UV treatment may be used after development to further cure the film.Type: GrantFiled: March 31, 2021Date of Patent: October 7, 2025Assignee: Lam Research CorporationInventors: Timothy William Weidman, Kevin Li Gu, Chenghao Wu, Katie Lynn Nardi, Boris Volosskiy
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Patent number: 12431374Abstract: An information acquisition system configured to acquire information upon a substrate processing apparatus configured to process a substrate held by a substrate holder includes a base body, instead of the substrate, held by the substrate holder; and multiple position sensors provided at the base body such that detection directions thereof are different from each other, and each configured to detect a position of a common detection target object located outside the base body.Type: GrantFiled: March 30, 2022Date of Patent: September 30, 2025Assignee: TOKYO ELECTRON LIMITEDInventors: Junnosuke Maki, Koudai Higashi, Ryo Konishi
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Patent number: 12416855Abstract: A photomask structure including a layout pattern and at least one assist pattern is provided. The layout pattern includes corners. The assist pattern wraps at least one of the corners. There is a gap between the edge of the layout pattern and the assist pattern.Type: GrantFiled: July 31, 2022Date of Patent: September 16, 2025Assignee: United Microelectronics Corp.Inventors: Chia-Chen Sun, Song-Yi Lin, En-Chiuan Liou
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Patent number: 12405198Abstract: method for selecting a photosensitive resin composition exposing a resin film of a photosensitive resin composition at 100 to 2000 mJ/cm2 and heat-treating the resin film at 150° C. to 5 250° C. for 1 to 3 hours under nitrogen to produce a strip sample of a cured film having a film thickness of 10 ?m and a width of 10 mm; performing a fatigue test of repeatedly pulling the strip sample under specific conditions; and selecting a photosensitive resin composition satisfying the following condition: the number of times of pulling required until the 15 strip sample breaks in the fatigue test is 100 or more cycles.Type: GrantFiled: October 26, 2020Date of Patent: September 2, 2025Assignee: Resonac CorporationInventors: Kazuyuki Mitsukura, Yuki Imazu, Yu Aoki, Takuya Komine
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Patent number: 12379670Abstract: Disclosed is a method for determining a focus parameter value used to expose at least one structure on a substrate. The method comprises obtaining measurement data relating to a measurement of said at least one structure, wherein the at least one structure comprises a single periodic structure per measurement location and decomposing said measurement data into component data comprising one or more components of said measurement data. At least one of said components is processed to extract processed component data having a reduced dependence on non-focus related effects and a value for the focus parameter is determined from said processed component data. Associated apparatuses and patterning devices are also disclosed.Type: GrantFiled: May 10, 2021Date of Patent: August 5, 2025Assignee: ASML Netherlands B.V.Inventors: Mattia Marelli, Mohammadreza Hajiahmadi
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Patent number: 12372877Abstract: A projection exposure apparatus comprises an optical element. The optical element comprises a main body and an actuator for deforming an optically effective surface formed on the main body. The actuator is in a recess in the rear side of the main body.Type: GrantFiled: June 22, 2023Date of Patent: July 29, 2025Assignee: Carl Zeiss SMT GmbHInventors: Markus Raab, Andreas Raba, Mirko Buechsenschuetz, Matthias Manger
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Patent number: 12372862Abstract: A reticle includes a mask substrate, a reflective layer on the mask substrate, and a mask pattern on the reflective layer, the mask pattern having image patterns to absorb light, and first patterns between the image patterns, the first patterns being openings, the first patterns having a honeycomb arrangement, in a plan view, such that seven of the first patterns are arranged at corresponding vertices and a center of a first regular hexagon, and each of the first patterns having a shape of a second regular hexagon that is rotated by 90 degrees relative to the first regular hexagon.Type: GrantFiled: May 25, 2022Date of Patent: July 29, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Soeun Shin, Jin Choi
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Patent number: 12326407Abstract: A method of inspection for defects on a substrate, such as a reflective reticle substrate, and associated apparatuses. The method includes performing the inspection using inspection radiation obtained from a high harmonic generation source and having one or more wavelengths within a wavelength range of between 20 nm and 150 nm. Also, a method including performing a coarse inspection using first inspection radiation having one or more first wavelengths within a first wavelength range; and performing a fine inspection using second inspection radiation having one or more second wavelengths within a second wavelength range, the second wavelength range comprising wavelengths shorter than the first wavelength range.Type: GrantFiled: May 23, 2023Date of Patent: June 10, 2025Assignee: ASML NETHERLANDS B.V.Inventors: Nitish Kumar, Richard Quintanilha, Markus Gerardus Martinus Maria Van Kraaij, Konstantin Tsigutkin, Willem Marie Julia Marcel Coene
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Patent number: 12271676Abstract: Embodiments of the present disclosure relate to parallel mask rule checking on evolving mask shapes in optical proximity correction (OPC) flows for integrated circuit designs. Systems and methods are disclosed that perform mask (manufacturing) rule checks (MRC) in parallel, sharing information to maintain symmetry when violations are corrected. In an embodiment the shared information is also used to minimize changes to the geometric area of proposed mask shapes resulting from the OPC. In contrast to conventional systems, MRC is performed for multiple edges in parallel, sharing information between the different edges to encourage symmetry. In an embodiment, all edges may be adjusted in parallel to reduce mask-edge traversal bias.Type: GrantFiled: March 11, 2022Date of Patent: April 8, 2025Assignee: NVIDIA CorporationInventors: Kumara Narasimha Sastry Kunigal, Saumyadip Mukhopadhyay, Kasyap Thottasserymana Vasudevan, Vivek Kumar Singh
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Patent number: 12254602Abstract: A method for improving a quality of a secondary electron image of a region of a sample, the method may include obtaining a backscattered electron (BSE) image of the region and a secondary electron (SE) image of the region; wherein the BSE image and the SE image are generated by scanning of the region with an electron beam; processing the BSE image and the SE image to provide a processed BSE image and a processed SE image; and generating a BSE compensated SE image, wherein the generating comprises applying one or more selected BSE correction factors on one or more parts of the processed BSE image.Type: GrantFiled: February 23, 2022Date of Patent: March 18, 2025Assignee: Applied Materials Israel Ltd.Inventor: Lior Akerman
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Patent number: 12254258Abstract: A method includes receiving a pattern layout for a mask, shrinking the pattern layout to form a shrunk pattern, determining centerlines for each of a plurality of features within the shrunk pattern, and snapping the centerline for each of the plurality of features to a grid. The grid represents a minimum resolution size of a mask fabrication tool. The method further includes, after snapping the centerline for each of the plurality of features to the grid, fabricating the mask with the shrunk pattern.Type: GrantFiled: July 27, 2023Date of Patent: March 18, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chi-Ta Lu, Chi-Ming Tsai
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Patent number: 12243271Abstract: This application discloses a calibration method, a calibration system, and a calibration board. The calibration board includes checkerboard cells arranged on a surface of the calibration board, where at least one dot is arranged in each of the checkerboard cells, the dots of the calibration board include at least a first feature dot and a second feature dot, the first feature dot and the second feature dot are arranged in the checkerboard cells according to a random rule or a specific rule, and a diameter of the first feature dot is greater than a diameter of the second feature dot. The calibration board in this application improves the stability and accuracy of calibration board detection by utilizing characteristics such as a high detection accuracy and a strong anti-blur capability of a dot mark, combining with corner points of checkerboard cells.Type: GrantFiled: May 26, 2022Date of Patent: March 4, 2025Assignee: Orbbec Inc.Inventors: Lihua Wu, Xianzhuo Liu, Minjian Pang, Zhiming Huang, Xiaomeng Wang, Jie Zeng, Hongfei Yang
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Patent number: 12228454Abstract: A light detection module, a light detection method and a display device are provided. The light detection module includes N light sensing circuits, a control circuit, a conversion circuits and a detection circuits; N being a positive integer; the N light sensing circuits respectively sense light signals of different colors to generate corresponding photocurrents; the control circuit is configured to control to provide the photocurrents generated by the light sensing circuits to the conversion circuit in a time division manner, and to control a transfer coefficient of the conversion circuit; the conversion circuit is configured to convert the photocurrent according to the transfer coefficient to obtain an analog output voltage; the detection circuit is configured to obtain characteristics of the light signal according to the analog output voltage.Type: GrantFiled: November 25, 2021Date of Patent: February 18, 2025Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Xinshe Yin, Hui Zhao, Xinbin Han
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Patent number: 12204247Abstract: A lithography film stack applied to an immersion lithography process includes a photoresist, a wavelength adjusting layer and a top coating layer. The photoresist is disposed on a substrate. The wavelength adjusting layer is disposed on the photoresist. The top coating layer is disposed on the wavelength adjusting layer. A refractive index of the wavelength adjusting layer is greater than a refractive index of the top coating layer and a refractive index of an immersion fluid of the immersion lithography process.Type: GrantFiled: February 9, 2023Date of Patent: January 21, 2025Assignee: United Semiconductor (Xiamen) Co., Ltd.Inventors: Ching-Shu Lo, Yuan-Chi Pai, Maohua Ren, Wen Yi Tan
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Patent number: 12197132Abstract: An exposure system according to an aspect of the present disclosure includes a laser apparatus that outputs pulsed laser light, an illuminating optical system that guides the pulsed laser light to a reticle, a reticle stage, and a processor that controls the output of the pulsed laser light from the laser apparatus and the movement of the reticle performed by the reticle stage. The reticle has a first region where a first pattern is disposed and a second region where a second pattern is disposed, and the first and second regions are each a region continuous in a scan width direction perpendicular to a scan direction of the pulsed laser light, with the first and second regions arranged side by side in the scan direction. The processor controls the laser apparatus to output the pulsed laser light according to each of the first and second regions by changing the values of control parameters of the pulsed laser light in accordance with each of the first and second regions.Type: GrantFiled: August 3, 2022Date of Patent: January 14, 2025Assignee: Gigaphoton Inc.Inventors: Koichi Fujii, Osamu Wakabayashi
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Patent number: 12191174Abstract: In an embodiment, a pattern transfer processing chamber includes a pattern transfer processing chamber and a loading area external to the pattern transfer processing chamber. The loading area is configured to transfer a wafer to or from the pattern transfer processing chamber. The loading area comprises a first region including a loadport, a second region including a load-lock between the first region and the pattern transfer processing chamber, and an embedded baking chamber configured to heat a patterned photoresist on the wafer.Type: GrantFiled: April 14, 2022Date of Patent: January 7, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chia-Cheng Chen, Chih-Kai Yang, Chun-Liang Chen, Wei-Ting Chien, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo
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Patent number: 12168301Abstract: A robot calibration system includes a calibration fixture configured to be mounted on a substrate processing chamber. The calibration fixture includes at least one camera arranged to capture an image including an outer edge of a test substrate and an edge ring surrounding the test substrate. A controller is configured to receive the captured image, analyze the captured image to measure a distance between the outer edge of the test substrate and the edge ring, calculate a center of the test substrate based on the measured distance, and calibrate a robot configured to transfer substrate to and from the substrate processing chamber based on the calculated center of the test substrate.Type: GrantFiled: February 27, 2020Date of Patent: December 17, 2024Assignee: LAM RESEARCH CORPORATIONInventors: Richard Blank, Aravind Alwan, Behnam Behziz, Peter Thaulad, Mark E. Emerson
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Patent number: 12168072Abstract: The present disclosure provides methods and systems for optically-induced auto-encapsulation. A method of the present disclosure comprises providing a media chamber comprising a medium comprising (i) a three-dimensional (3D) object comprising a photo-emitter, (ii) at least one polymeric precursor, and (iii) a photoinitiator, and subjecting the medium in the media chamber to a stimulus (e.g., an energy beam or a chemical stimulus) to induce photo-emission from the photo-emitter to trigger the formation of a polymer matrix from the at least one polymeric precursor, which polymer matrix at least partially encapsulates the 3D object.Type: GrantFiled: January 29, 2021Date of Patent: December 17, 2024Assignee: PRELLIS BIOLOGICS, INC.Inventors: Melanie P. Matheu, Erik Busby, Christopher Rogers, Milad Khorrami
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Patent number: 12154862Abstract: A method for manufacturing semiconductor devices include steps of depositing a first photoresist over a first dielectric layer, first exposing the first photoresist to a first light-exposure using a first lithographic mask, and second exposing the first photoresist to a second light-exposure using a second lithographic mask. An overlap region of the first photoresist is exposed to both the first light-exposure and the second light-exposure. The first dielectric layer is thereafter patterned to form a mask overlay alignment mark in the overlap region. The patterning includes etching the first dielectric layer form a trench, and filling the trench with a conductive material to produce the alignment mark. A second dielectric layer is deposited over the alignment mark, and a second photoresist is deposited over the second dielectric layer. A third lithographic mask is aligned to the second photoresist using the underlying mask overlay alignment mark for registration.Type: GrantFiled: May 2, 2023Date of Patent: November 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Chia Hu, Chang-Ching Yu, Ming-Fa Chen
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Patent number: 12147157Abstract: A photomask includes a plurality of main patterns, a plurality of first sub-resolution assist feature patterns and a plurality of second sub-resolution assist feature patterns. The first sub-resolution assist feature patterns are located aside the main patterns. The second sub-resolution assist feature patterns are disposed between and connected to adjacent two of the first sub-resolution assist feature patterns.Type: GrantFiled: April 9, 2023Date of Patent: November 19, 2024Assignee: Powerchip Semiconductor Manufacturing CorporationInventor: Yi-Kai Lai
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Patent number: 12147163Abstract: A method for correcting critical dimension (CD) measurements of a lithographic tool includes steps as follows. A correction pattern having a first sub-pattern parallel to a first direction and a second sub-pattern parallel to a second direction is provided on a lithographic mask; wherein the first sub-pattern and the second sub-pattern come cross with each other. A first After-Develop-Inspection critical dimension (ADI CD) of a developed pattern formed on a photo-sensitive layer and transferred from the correction pattern is measured using the lithographic tool along a first scanning direction. A second ADI CD of the developed pattern is measured using the lithographic tool along a second scanning direction. The first ADI CD is subtracted from the second ADI CD to obtain a measurement bias value. Exposure conditions and/or measuring parameters of the lithographic tool are adjusted according to the measurement bias value.Type: GrantFiled: November 17, 2021Date of Patent: November 19, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Hsin-Yu Hsieh, Kuan-Ying LAi, Chang-Mao Wang, Chien-Hao Chen, Chun-Chi Yu
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Patent number: 12117730Abstract: A method for reducing M3D effects on imaging is described. The method includes identifying points within a source plane of the photolithography system that are associated with pattern shifts resulting from diffraction of light off a photomask under an angle of incidence between an imaging beam of radiation and the mask normal, determining pattern shifts associated with the identified source plane points, and modifying the source to reduce the determined pattern shifts.Type: GrantFiled: April 7, 2020Date of Patent: October 15, 2024Assignee: ASML NETHERLANDS B.V.Inventors: Joern-Holger Franke, Eric Henri Jan Hendrickx, Guido Constant Simon Schiffelers
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Patent number: 12115724Abstract: A three-dimensional object printing system includes: a printing table for a plurality of three-dimensional objects to be placed on, the printing table having a plurality of detection reference marks; detecting means for detecting positions and orientations of the three-dimensional objects placed on the printing table and the detection reference marks; printing data generating means generating printing data corresponding to the three-dimensional objects based on the positions and orientations of the three-dimensional objects detected by the detecting means, the printing data generating means obtaining reference coordinates of the detection reference marks based on part of the detection reference marks; and printing means for executing printing on the three-dimensional objects using the printing data generated by the printing data generating means.Type: GrantFiled: June 10, 2020Date of Patent: October 15, 2024Assignee: WILL BEE CO., LTDInventors: Makoto Ota, Haruhiko Moriguchi, Shigeru Sato
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Patent number: 12099306Abstract: A lithographic system comprises a radiation source and a lithographic apparatus. The radiation source provides radiation to the lithographic apparatus. The lithographic apparatus uses the radiation for imaging a pattern onto multiple target areas on a layer of photo-resist on a semiconductor substrate. The imaging requires a pre-determined dose of radiation. The system is controlled so as to set a level of a power of the radiation in dependence on a magnitude of the pre-determined dose.Type: GrantFiled: February 20, 2020Date of Patent: September 24, 2024Assignee: ASML Netherlands B.V.Inventors: Oscar Franciscus Jozephus Noordman, Antonius Theodorus Wilhelmus Kempen, Jan Bernard Plechelmus Van Schoot, Marinus Aart Van Den Brink
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Patent number: 12072634Abstract: A method for writing an imageable material using multiple beams includes preparing subsequent patterns each having Y rows of N pixel locations, said subsequent patterns including first and second patterns; where the first and the second pattern overlap with each other in an overlap area consisting of O columns and Y rows of pixel locations; selecting for each row i of said first pattern Mi1 pixel locations; selecting for each row i of said second pattern Mi2 pixel locations; writing simultaneously, for each row i, said Mi1 selected pixel locations by moving the N beams in a fast scan direction relative to said imageable material; and moving said N beams relative to said imageable material in a slow scan direction over (N-O) pixel locations; writing simultaneously, for each row i, said Mi2 selected pixel locations by moving the N beams in a fast scan direction relative to said imageable material.Type: GrantFiled: March 15, 2022Date of Patent: August 27, 2024Assignee: XSYS PREPRESS N.V.Inventors: Bart Mark Luc Wattyn, Dirk Ludo Julien De Rauw
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Patent number: 12066658Abstract: An integrated optical device includes a substrate, a waveguide structure and a grating structure. The substrate has a waveguide region and a grating region adjacent to each other. The waveguide structure is disposed on the substrate in the waveguide region. The grating structure is disposed on the substrate in the grating region. In some embodiments, the grating structure includes grating bars and grating intervals arranged alternately, and widths of the grating bars of the grating structure are varied.Type: GrantFiled: April 21, 2022Date of Patent: August 20, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Feng-Wei Kuo, Wen-Shiang Liao
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Patent number: 12062562Abstract: Air curtain devices can reduce defects on semiconductor wafers when implemented on a track equipped with robotic wafer transport. The air curtain devices can be added to one or more processing devices arranged along the track to prevent defects from landing on wafer surfaces. For example, the air curtain devices can prevent volatile organic solvent mist from drifting towards processing devices on the track and preventing contamination via a wafer transport system.Type: GrantFiled: November 1, 2021Date of Patent: August 13, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wei-Chih Liao, Shih-Yu Tseng
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Patent number: 12055867Abstract: A lithography system is provided capable of deterring contaminants, such as tin debris from entering into the scanner. The lithography system in accordance with various embodiments of the present disclosure includes a processor, an extreme ultraviolet light source, a scanner, and a hollow connection member. The light source includes a droplet generator for generating a droplet, a collector for reflecting extreme ultraviolet light into an intermediate focus point, and a light generator for generating pre-pulse light and main pulse light. The droplet generates the extreme ultraviolet light in response to the droplet being illuminated with the pre-pulse light and the main pulse light. The scanner includes a wafer stage. The hollow connection member includes an inlet that is in fluid communication with an exhaust pump. The hollow connection member provides a hollow space in which the intermediate focus point is disposed.Type: GrantFiled: May 3, 2023Date of Patent: August 6, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chieh Hsieh, Tai-Yu Chen, Cho-Ying Lin, Heng-Hsin Liu, Li-Jui Chen, Shang-Chieh Chien
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Patent number: 12044961Abstract: A mask forming method includes providing preliminary mask data including a Manhattan path such as a quadrangle, a bar, a polygon or a combination thereof based on a layout. Mask data including a curvilinear shape is prepared by correcting the preliminary mask data through application of an elliptical function, a B-spline curve, or a combination thereof. A mask pattern is formed on a mask substrate based on the mask data.Type: GrantFiled: March 1, 2021Date of Patent: July 23, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Pilsoo Kang, Wonchan Lee, Sangwook Kim, Sungyong Moon, Seunghune Yang, Jeeeun Jung
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Patent number: 12033844Abstract: Methods and systems for loading an ion trap are provided herein in which the total ion beam intensity and/or content of the ion beam are quickly interrogated so as to determine an optimum fill time for an ion trap. In various aspects, the methods and systems described herein are effective to prevent overfilling of the ion trap while decreasing the time associated with known techniques utilized to obtain a survey scan of the ion beam.Type: GrantFiled: January 28, 2020Date of Patent: July 9, 2024Assignee: DH Technologies Development Pte. Ltd.Inventor: James W Hager