Including Etching Substrate Patents (Class 430/323)
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Patent number: 11557515Abstract: Disclosed are approaches for forming a semiconductor device. In some embodiments, a method may include providing a plurality of patterning structures over a device layer, each of the plurality of patterning structures including a first sidewall, a second sidewall, and an upper surface, and forming a mask by depositing a masking material at a non-zero angle of inclination relative to a perpendicular to a plane defined by a top surface of the device layer. The mask may be formed over the plurality of patterning structures without being formed along the second sidewall. The method may further include selectively forming a metal layer along the second sidewall of each of the plurality of patterning structures.Type: GrantFiled: August 10, 2020Date of Patent: January 17, 2023Assignee: Applied Materials, Inc.Inventor: Sony Varghese
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Patent number: 11515178Abstract: In one example, a method for wafer drying includes providing a surface of a first wafer, the surface of the first wafer including a liquid to be removed with a drying process. The method further includes replacing the liquid with a first solid film in a first processing chamber, the first solid film covering the surface of the first wafer. The method further includes transferring the first wafer from the first processing chamber to a second processing chamber. The method further includes processing the first wafer in the second processing chamber by flowing a supercritical fluid through the second processing chamber, where the supercritical fluid removes the first solid film.Type: GrantFiled: March 16, 2020Date of Patent: November 29, 2022Assignee: Tokyo Electron LimitedInventors: Trace Hurd, Antonio Luis Pacheco Rotondaro, Derek William Bassett, Hitoshi Kosugi
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Patent number: 11501977Abstract: A semiconductor device includes a substrate, a conductive layer, a nitride mask layer, a carbon mask layer and an anti-reflective coating stack. The conductive layer is disposed on the substrate. The nitride mask layer is disposed on the conductive layer, wherein the nitride mask layer has a first stress. The carbon mask layer is disposed on the nitride mask layer, wherein the carbon mask layer has a second stress and a difference between the second stress and the first stress is smaller than 200 MPa. The anti-reflective coating stack is disposed on the carbon mask layer.Type: GrantFiled: May 10, 2021Date of Patent: November 15, 2022Assignee: NANYA TECHNOLOGY CORPORATIONInventor: Chen-Hao Lien
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Patent number: 11422464Abstract: A photosensitive resin composition includes electrically conductive particles (A) whose surfaces are coated with a carbon simple substance and/or a carbon compound; an alkali-soluble resin (B) containing an acid-dissociation group; and a metal chelate compound (C) wherein the metal chelate compound (C) includes at least one selected from the group consisting of Au, Ag, Cu, Cr, Fe, Co, Ni, Bi, Pb, Zn, Pd, Pt, Al, Ti, Zr, W and Mo.Type: GrantFiled: July 6, 2017Date of Patent: August 23, 2022Assignee: Toray Industries, Inc.Inventors: Yohei Konoshima, Mitsuhito Suwa, Yuka Yamashiki
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Patent number: 11374203Abstract: An organic light-emitting diode (OLED) display panel and a mask are disclosed. The OLED display panel includes a first film layer, and a second film layer disposed on the first film layer and made of an organic material. The second film layer includes an edge slope corner formed at an acute angle less than a predetermined value. Since the edge slope corner of the second film layer is formed at the acute angle less than a predetermined value, a technical problem existing in conventional OLED display panels that edge slope corners of organic layers are formed at approximately a right angle can be mitigated.Type: GrantFiled: September 20, 2019Date of Patent: June 28, 2022Assignee: Wuhan China Star Optoelectronics Sexiconduetor Display Technology Co., Ltd.Inventors: Yonghui Zhang, Peng Li
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Patent number: 11353995Abstract: Embodiments enhance graphic capabilities in projected-capacitive (PCAP) touch sensitive systems, and more specifically to a border component of a PCAP touchscreen. Embodiments include a method and an apparatus for a PCAP touchscreen layered structure. Some embodiments include screen printing a border component on a cover sheet, curing the border component, ablating a pattern on the border component, and screen printing one colored ink onto the pattern on the border component. In some embodiments the border layer is black, and the colored ink is coupled to a cover sheet. The pattern causes the colored ink to appear as a continuous gradient of the colored ink. In some embodiments the border component includes two or more border-layer components. At least one of the border-layer components may include an ablated pattern. Each ablated pattern may be coupled to a different colored ink.Type: GrantFiled: April 15, 2019Date of Patent: June 7, 2022Assignee: Elo Touch Solutions, Inc.Inventors: ShiPeng Wang, Joel C. Kent
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Patent number: 11333968Abstract: An additional non-photoresist layer may be formed on patterned photoresist layers. The additional layer may be preferentially formed on the tops of the photoresist layer versus the sidewalls of the photoresist layer. In addition, the additional layer may be preferential formed on the tops of the photoresist layer versus exposed surfaces of layers underlying the photoresist layer. In this manner, the patterned structures formed by the photoresist layer are less likely to have line opens due to photoresist height variability or the relative thinness of the photoresist height used. Further, the formation of the additional layer may be through a cyclic deposition/trim process. The trim step of the cyclic process may also serve as a descum step that helps reduce line bridging and scumming. In one embodiment, the additional non-photoresist layer may be an organic polymer layer.Type: GrantFiled: February 22, 2018Date of Patent: May 17, 2022Assignee: Tokyo Electron LimitedInventors: Angelique D. Raley, Eric Chih-Fang Liu, Nihar Mohanty
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Patent number: 11307493Abstract: Micro- and nano-patterns in imprint layers formed on a substrate and lithographic methods for forming such layers. The layers include a plurality of structures, and a residual layer having a residual layer thickness (RLT) that extends from the surface of the substrate to a base of the structures, where the RLT varies across the surface of the substrate according to a predefined pattern.Type: GrantFiled: October 9, 2020Date of Patent: April 19, 2022Assignee: Molecular Imprints, Inc.Inventors: Vikramjit Singh, Kang Luo, Michael Nevin Miller, Shuqiang Yang, Frank Y. Xu
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Patent number: 11130911Abstract: A compound represented by formula I, a negative liquid crystal composition comprising such a compound, and a liquid crystal display element or liquid crystal display comprising the compound or liquid crystal composition are provided. The compound represented by formula I contains two hydroxy groups. In an ODF process for a panel, due to an intermolecular force between the hydroxyl groups and the surface of the panel (a glass surface or an ITO electrode surface), the compound is spontaneously aligned, in a standing manner, on the panel glass or transparent ITO electrode substrate, causing liquid crystal molecules similar to the compound represented by formula ITO be vertically aligned, and UV light irradiation, a polymer layer with a rough surface is formed on the substrate by means of polymerization, and achieves the effects of PI insulation and vertical alignment of the liquid crystal molecules.Type: GrantFiled: April 29, 2019Date of Patent: September 28, 2021Assignee: SHIJIAZHUANG CHENGZHI YONGHUA DISPLAY MATERIAL CO., LTD.Inventors: Guoliang Yun, Ming Li, Jinsong Meng, Zhian Liang, Gang Wen, Zhengqiang Li
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Patent number: 11054740Abstract: An imprint mold and a method for manufacturing the same are provided. The imprint mold includes a plurality of substantially identical or different mold patterns, wherein there isn't any height difference between the mold patterns.Type: GrantFiled: September 10, 2018Date of Patent: July 6, 2021Assignee: AU OPTRONICS CORPORATIONInventors: Sheng-Ming Huang, Sheng-Kai Lin, Chih-Chiang Chen, Hui-Ku Chang, Chia-Hsin Chung, Wei-Chi Wang, Ming-Jui Wang, Jen-Kuei Lu, Tsai-Sheng Lo, Huang-Kai Shen
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Patent number: 10998191Abstract: A patterning stack and methods are provided for semiconductor processing. The method includes forming a graded hardmask, the graded hardmask including a first material and a second material with extreme ultraviolet (EUV) absorption cross sections for absorption of EUV wavelengths, the second material configured to provide adhesion to photoresist materials. The method also includes depositing a photoresist layer over the graded hardmask. The method additionally includes patterning the photoresist layer. The method further includes etching the graded hardmask. The method also includes removing the photoresist layer.Type: GrantFiled: November 13, 2018Date of Patent: May 4, 2021Assignee: International Business Machines CorporationInventors: Jennifer Church, Ekmini A. De Silva, Dario Goldfarb
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Patent number: 10872760Abstract: A cluster tool includes a polyhedral transfer chamber, at least one processing chamber, at least one load lock chamber, and an electron beam (e-beam) source. The processing chamber is connected to the polyhedral transfer chamber. The processing chamber is configured to perform a manufacturing procedure to a wafer present therein. The load lock chamber is connected to the polyhedral transfer chamber. The e-beam source is configured to performing an e-beam treatment to the wafer after the wafer is performed the manufacturing procedure.Type: GrantFiled: July 26, 2016Date of Patent: December 22, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventor: Han-Wen Liao
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Patent number: 10866362Abstract: A system and method for manufacturing semiconductor devices is provided. An embodiment comprises using an etchant to remove a portion of a substrate to form an opening with a 45° angle with a major surface of the substrate. The etchant comprises a base, a surfactant, and an oxidant. The oxidant may be hydrogen peroxide.Type: GrantFiled: June 14, 2019Date of Patent: December 15, 2020Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wan-Yu Lee, Ying-Hao Kuo, Hai-Ching Chen, Tien-l Bao
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Patent number: 10840338Abstract: A semiconductor device includes a substrate and a graphene layer. The substrate includes an insulator and a semiconductor. The graphene layer is grown on a surface of the semiconductor. The semiconductor includes at least one of a group IV material and a group III-V compound. A method of manufacturing the semiconductor device is disclosed.Type: GrantFiled: November 8, 2017Date of Patent: November 17, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Keunwook Shin, Hyeonjin Shin, Yeonchoo Cho, Seunggeol Nam, Seongjun Park, Yunseong Lee
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Patent number: 10773542Abstract: The present disclosure relates to a method for manufacturing decorative panels made of flat glass for electronic household appliances, in particular household appliances that are fixed in position. The method comprises, in the specified order, at least the steps of providing a flat glass, producing a blank decorative panel by forming the provided flat glass with at least one of the steps of forming the outer contour of the decorative panel, edge treatment, or making at least one indentation on the operational front, the thermal tempering of the produced blank decorative panel, and applying at least one decorative print on the operational back of the thermally tempered blank decorative panel by means of a digital printing method.Type: GrantFiled: October 20, 2017Date of Patent: September 15, 2020Assignees: Schott Gemtron Corp., Schott AGInventors: Adam O'Ryan, Carsten Schwabe, Grant Mason
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Patent number: 10658179Abstract: Aspects of the disclosure provide a method. The method includes providing a substrate having a structure formed on the substrate, and forming a spacer layer on the structure. Then, the method includes forming a mask layer over the spacer layer. The mask layer includes a first layer, a second layer over the first layer, and a third layer over the second layer. Further, the method includes patterning the third layer of the mask layer, and etching the first layer and the second layer of the mask layer with a dry etching process using the third layer as an etch mask to form an opening that exposes a portion of the spacer layer. Then, the method includes removing the second layer using a wet etchant before a formation of a backfill material layer in the opening and over the first layer.Type: GrantFiled: August 17, 2018Date of Patent: May 19, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Nai-Chia Chen, Wan Hsuan Hsu, Chia-Wei Wu, Neng-Jye Yang, Chun-Li Chou
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Patent number: 10625289Abstract: A mask and a method of manufacturing a mask assembly, the mask including a body, and the body including one end and another end facing each other in a length direction and having a first surface and a second surface facing each other in a thickness direction; and a pattern region between the one end and the other end, the pattern region including a plurality of pattern holes and a plurality of ribs between the plurality of pattern holes, wherein a curl value of the mask, which is defined as a shortest distance from a plane tangent to a center of the body to the one end or the other end of the body, is 1,000 ?m to 4,000 ?m.Type: GrantFiled: July 17, 2017Date of Patent: April 21, 2020Assignee: Samsung Display Co., Ltd.Inventors: Su Cheol Gong, Min Goo Kang, Taek Kyo Kang, Jung Woo Ko, Min Ju Kim, Young Eun Ryu, Jae Suk Moon, Soo Hyun Min
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Patent number: 10613438Abstract: Lithographic patterning methods are provided which implement directed self-assembly (DSA) of block copolymers to enable self-aligned cutting of features. A first layer and second layer of material are formed on a substrate. The second layer of material is lithographically patterning to form a guiding pattern. A DSA process is performed to form a block copolymer pattern around the guiding pattern, which comprises a repeating block chain that includes at least a first block material and a second block material, which have etch selectivity with respect to each other. A selective etch process is performed to selectively etching one of the first block material and the second block material to form self-aligned openings in the block copolymer pattern which expose portions of the first layer of material. The first layer of material is patterned by etching the exposed portions of the first layer of material.Type: GrantFiled: January 15, 2018Date of Patent: April 7, 2020Assignee: International Business Machines CorporationInventors: Sean D. Burns, Sivananda K Kanakasabapathy, Kafai Lai, Chi-Chun Liu, Kristin Schmidt, Ankit Vora
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Patent number: 10581003Abstract: Methods for patterning highly sensitive materials, such as organic materials, organic semiconductors, biomolecular materials, and the like, with photolithographic resolution are disclosed. In some embodiments, a germanium mask (304) is formed on the surface of the sensitive material (302), thereby protecting it from subsequent processes that employ harsh chemicals that would otherwise destroy the sensitive material (302). A microlithography mask (306) is patterned on the germanium mask layer (304), after which the germanium exposed by the microlithography mask (306) is removed by dissolving it in water. After transferring the pattern of the germanium mask (304) into the sensitive material (302), the germanium and microlithography masks (304, 306) are completely removed by immersing the substrate in water, which dissolves the remaining germanium and lifts off the microlithography mask material.Type: GrantFiled: September 1, 2017Date of Patent: March 3, 2020Assignee: The Board of Trustee of the Leland Stanford Junior UniverstiyInventors: Nicholas Alexander Melosh, Matt R. Angle, Mina-elraheb S. Hanna, Yifan Kong
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Patent number: 10453812Abstract: Techniques that can assist with fabricating a semiconductor package that includes a zero misalignment-via (ZMV) and/or a trace formed using a polarization process are described. The disclosed techniques can result in creation of ZMVs and/or traces between the ZMVs using a process comprising application of polarized light to one or more resist layers (e.g., a photoresist layer, etc.). One embodiment of a technique includes modulating an intensity of light applied to one or more resist layers by interaction of a light source with a photomask and at least one polarizer such that one or more patterns are created on the one or more resist layers. One embodiment of another technique includes creating patterns on one or more resist layers with different types of polarized light formed from a photomask and at least one polarizer. The disclosed techniques can assist with reducing manufacturing costs, reducing development time, and increasing I/O density.Type: GrantFiled: December 27, 2017Date of Patent: October 22, 2019Assignee: Intel CorporationInventors: Hiroki Tanaka, Aleksandar Aleksov, Sri Ranga Sai Boyapati, Robert A. May, Kristof Darmawikarta
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Patent number: 10438797Abstract: Techniques herein include an etch process that etches a layer of material incrementally, similar to mono-layer etching of atomic layer etching (ALE), but not necessarily including self-limiting, mono-layer action of ALE. Such techniques can be considered as quasi-atomic layer etching (Q-ALE). Techniques herein are beneficial to precision etching applications such as during soft-mask open. Techniques herein enable precise transfer of a given mask pattern into an underlying layer. By carefully controlling the polymer deposition relative to polymer assisted etching through its temporal cycle, a very thin layer of conformal polymer can be activated and used to precisely etch and transfer the desired patterns.Type: GrantFiled: September 6, 2017Date of Patent: October 8, 2019Assignee: Tokyo Electron LimitedInventors: Hongyun Cottle, Andrew W. Metz
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Patent number: 10409164Abstract: A heat-reactive resist material contains copper oxide, and silicon or silicon oxide, and is formed so that the content of silicon or silicon oxide in the heat-reactive resist material is 4.0 mol % or more less than 10.0 mol % in terms of mole of silicon. A heat-reactive resist layer is formed using the heat-reactive resist material, is exposed, and then, is developed with a developing solution. Using the obtained heat-reactive resist layer as a mask, dry etching is performed on a substrate with a fluorocarbon to manufacture a mold having a concavo-convex shape on the substrate surface. At this point, it is possible to control a fine pattern comprised of the concavo-convex shape.Type: GrantFiled: July 3, 2018Date of Patent: September 10, 2019Assignee: ASAHI KASEI KABUSHIKI KAISHAInventors: Yoshimichi Mitamura, Takuto Nakata
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Patent number: 10395899Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming a first film on a substrate. The method further includes housing the substrate provided with the first film in a chamber, and introducing a first gas into the chamber. The method further includes generating plasma discharge of the first gas in the chamber or applying radiation to the first gas in the chamber. The method further includes introducing a second gas containing a metal component into the chamber to cause the metal component to infiltrate into the first film after the generation of the plasma discharge or the application of the radiation is started.Type: GrantFiled: February 8, 2018Date of Patent: August 27, 2019Assignee: Toshiba Memory CorporationInventors: Ryuichi Saito, Seiji Morita, Ryosuke Yamamoto
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Patent number: 10381423Abstract: A mask frame assembly for an electronic display device includes a frame, and a mask coupled to the frame, in which the mask includes a pattern hole defining a first area over which material may be deposited, and a dam surrounding the pattern hole and defining a second area smaller than the first area over which the material may be deposited. A method of manufacturing a mask frame assembly for an electronic display device is also disclosed.Type: GrantFiled: May 9, 2017Date of Patent: August 13, 2019Assignee: Samsung Display Co., Ltd.Inventor: Sungwoo Jung
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Patent number: 10372039Abstract: A resist underlayer film forming composition for lithography for a resist underlayer film usable as a hardmask. A resist underlayer film forming composition for lithography, including: as a silane, a hydrolyzable silane, a hydrolysis product thereof, or a hydrolysis-condensation product thereof, wherein the hydrolyzable silane includes a hydrolyzable silane of Formula (1) or a hydrolyzable silane containing a combination of a hydrolyzable silane of Formula (1) with a hydrolyzable silane of Formula (2), and a content of the hydrolyzable silane of Formula (1) or the hydrolyzable silane containing a combination of a hydrolyzable silane of Formula (1) with a hydrolyzable silane of Formula (2) in all silanes is less than 50% by mole, R1aR2bSi(R3)4?(a+b)??Formula (1) R4a1R5b1Si(R6)4?(a1+b1)??Formula (2).Type: GrantFiled: October 24, 2013Date of Patent: August 6, 2019Assignee: NISSAN CHEMICAL INDUSTRIES, LTD.Inventors: Yuta Kanno, Makoto Nakajima, Satoshi Takeda, Hiroyuki Wakayama
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Patent number: 10323159Abstract: An organic layer composition includes a first compound having a thermal shrinkage ratio of about 10% to about 70%, a second compound having a smaller thermal shrinkage ratio than the first compound, and a solvent, and an organic layer obtained by curing the organic layer composition and a method of forming patterns using the organic layer composition are disclosed. A method of measuring the thermal shrinkage ratio is described in the detailed description.Type: GrantFiled: March 22, 2016Date of Patent: June 18, 2019Assignee: Samsung SDI Co., Ltd.Inventors: Minsoo Kim, Younhee Nam, Jaeyeol Baek, Hyunji Song, Byeri Yoon, Seulgi Jeong, Seunghee Hong, Sunmin Hwang
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Patent number: 10266471Abstract: A phenolic hydroxyl-containing compound is provided. The compound dissolves well in solvents and can be formulated into compositions that give coatings superior in thermal decomposition resistance, alkali developability, resolution, and dry-etch resistance. Specifically, the compound is a phenolic hydroxyl-containing calixarene represented by structural formula (1): (where A is a structural unit including a dihydroxynaphthalene- or naphthol-derived structure optionally with a substituent alkyl, alkoxy, aryl, or aralkyl group or halogen atom on the aromatic rings and a methylene group optionally having an alkyl or aryl group in place of one of the hydrogen atoms) and obtained using a dihydroxynaphthalene in combination with a naphthol, with the total repeat number p being an integer of 2 to 10.Type: GrantFiled: November 19, 2015Date of Patent: April 23, 2019Assignee: DIC CorporationInventors: Tomoyuki Imada, Norio Nagae
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Patent number: 10170591Abstract: A method for fabricating a semiconductor device comprises forming a first hardmask, a planarizing layer, and a second hardmask on a substrate. Removing portions of the second hardmask and forming alternating blocks of a first material and a second material over the second hardmask. The blocks of the second material are removed to expose portions of the planarizing layer. Exposed portions of the planarizing layer and the first hardmask are removed to expose portions of the first hardmask. Portions of the first hardmask and portions of the substrate are removed to form a first fin and a second fin. Portions of the substrate are removed to further increase the height of the first fin and substantially remove the second fin. A gate stack is formed over a channel region of the first fin.Type: GrantFiled: June 10, 2016Date of Patent: January 1, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Cheng Chi, Fee Li Lie, Chi-Chun Liu, Ruilong Xie
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Patent number: 10161567Abstract: A method of and apparatus for controlling pressure in a process chamber having a continuous gas inlet flow and a continuous gas outlet flow comprising providing a pulsed valve at a gas outlet, a pressure gauge, and a programmable controller and varying the pulse rate of the pulsed valve, wherein either the open time or closed time, or both open and closed times, is lengthened or shortened, depending on whether the gauge pressure is above or below the programmed setpoint.Type: GrantFiled: July 14, 2010Date of Patent: December 25, 2018Assignee: SPTS Technologies LimitedInventor: Daniel J. Vestyck
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Patent number: 10114291Abstract: A method includes forming a first layer over a substrate; forming a patterned photoresist layer over the first layer; applying a solution over the patterned photoresist layer to form a conformal layer over the pattern photoresist layer, wherein the conformal layer further includes a first portion over a top surface of the patterned photoresist layer and second portion extending along sidewalls of the patterned photoresist layer; selectively removing the first portion of the conformal layer formed over the top surface of the patterned photoresist layer; and selectively removing the patterned photoresist layer thereby leaving the second portion of the conformal layer.Type: GrantFiled: March 4, 2016Date of Patent: October 30, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ya-Ling Cheng, Ching-Yu Chang, Chien-Chih Chen, Chun-Kuang Chen, Siao-Shan Wang, Wei-Liang Lin
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Patent number: 10082735Abstract: A resist underlayer film-forming composition for lithography having an aliphatic polycyclic structure including, as a silane, a hydrolyzable silane, a hydrolysis product thereof, a hydrolysis-condensation product thereof, or a combination thereof, in which the aliphatic polycyclic structure is a structure which a hydrolyzable silane of Formula (1): R1aR2bSi(R3)4-(a+b)??Formula (1) (where R1 is an organic group having an aliphatic polycyclic structure and bonded to a Si atom through a Si—C bond; R3 is an ethoxy group; a is an integer of 1; b is an integer of 0 to 2; and a+b is an integer of 1 to 3) has, or a structure included in a compound added as an aliphatic polycyclic compound, an aliphatic polycyclic dicarboxylic acid, or an aliphatic polycyclic dicarboxylic acid anhydride, each optionally having a double bond, a hydroxy group, or an epoxy group.Type: GrantFiled: July 10, 2015Date of Patent: September 25, 2018Assignee: NISSAN CHEMICAL INDUSTRIES, LTD.Inventors: Wataru Shibayama, Shuhei Shigaki, Makoto Nakajima, Satoshi Takeda, Hiroyuki Wakayama, Rikimaru Sakamoto
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Patent number: 10068768Abstract: Provided is a semiconductor device. The device includes a plurality of line patterns, which extend in a first direction and are arranged a first space apart from one another in a second direction perpendicular to the first direction. The line patterns include a line pattern set including two sub-line patterns that are arranged the first space apart from each other in the second direction and have a first width of a minimum feature size (1F) in the second direction, and a wide-width line pattern that is arranged the first space apart from one side of the line pattern set in the second direction and has a second width larger than the first width in the second direction.Type: GrantFiled: January 29, 2016Date of Patent: September 4, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: In-wook Oh, Jong-hyun Lee
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Patent number: 10062674Abstract: Embodiments are related to scalable surface structure (e.g., a well or other structure) formation in a substrate and, more particularly, to systems and methods for forming displays using a photo-machinable material layer.Type: GrantFiled: April 28, 2017Date of Patent: August 28, 2018Assignee: Corning IncorporatedInventors: Adam James Ellison, Sean Matthew Garner, Timothy James Kiczenski, Michelle Diane Pierson-Stull
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Patent number: 10007183Abstract: The invention provides a compound for forming an organic film having a partial structure represented by the following formula (ii), wherein the ring structures Ar1, Ar2 and Ar3 each represent a substituted or unsubstituted benzene ring or naphthalene ring; e is 0 or 1; R0 represents a hydrogen atom or a linear, branched or cyclic monovalent organic group having 1 to 30 carbon atoms; L0 represents a linear, branched or cyclic divalent organic group having 1 to 32 carbon atoms; and the methylene group constituting L0 may be substituted by an oxygen atom or a carbonyl group. There can be provided an organic film composition for forming an organic film having high dry etching resistance as well as advanced filling/planarizing characteristics.Type: GrantFiled: September 16, 2015Date of Patent: June 26, 2018Assignee: SHIN-ETSU CHEMICAL CO., LTD.Inventors: Seiichiro Tachibana, Daisuke Kori, Tsutomu Ogihara, Takeru Watanabe, Kazumi Noda, Toshiharu Yano
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Patent number: 9957339Abstract: A copolymer is prepared by the polymerization of monomers that include an ultraviolet absorbing monomer, and a base-solubility-enhancing monomer. The copolymer is useful for forming a topcoat layer for electron beam and extreme ultraviolet lithographies. Also described are a layered article including the topcoat layer, and an associated method of forming an electronic device.Type: GrantFiled: August 7, 2015Date of Patent: May 1, 2018Assignees: ROHM AND HAAS ELECTRONIC MATERIALS LLC, THE UNIVERSITY OF QUEENSLANDInventors: James W. Thackeray, Ke Du, Peter Trefonas, III, Idriss Blakey, Andrew Keith Whittaker
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Patent number: 9908831Abstract: A resist composition containing a compound represented by the general formula (1) or (2), a method for forming a resist pattern using the composition, a polyphenolic compound for use in the composition, and an alcoholic compound that can be derived therefrom are described.Type: GrantFiled: January 19, 2016Date of Patent: March 6, 2018Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.Inventors: Masatoshi Echigo, Masako Yamakawa
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Patent number: 9899220Abstract: A method for patterning a substrate is disclosed. The method includes applying a first directed self-assembly (DSA) patterning process that defines a first patterned layer on top of the substrate. The pattern of the first patterned layer is to be transferred into the substrate. The method also includes applying a planarizing layer on top of the first patterned layer. The method further includes applying a second DSA patterning process that defines a second patterned layer on top of the planarizing layer, thereby not patterning the planarizing layer. A pattern of the second patterned layer is to be transferred into the substrate. Projections of the pattern of the second patterned layer and the pattern of the first patterned layer on the substrate have no overlap. Additionally, the method includes transferring the patterns defined by the first patterned layer and the second patterned layer into the substrate.Type: GrantFiled: October 10, 2016Date of Patent: February 20, 2018Assignees: IMEC VZW, KATHOLIEKE UNIVERSITEIT LEUVEN, KU LEUVEN R&DInventors: Boon Teik Chan, Zheng Tao, Arjun Singh, Jan Doise
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Patent number: 9824916Abstract: A method of forming a mask layout includes forming a layout of a first mask including a lower wiring structure pattern and a dummy lower wiring structure pattern. A layout of a second mask overlapping the first mask and including an upper wiring structure pattern and a dummy upper wiring structure pattern is formed. A layout of a third mask including a first via structure pattern and a first dummy via structure pattern is formed. A layout of a fourth mask including a second via structure pattern and a second dummy via structure pattern is formed. The second via structure pattern may commonly overlap the lower wiring structure pattern and the upper wiring structure pattern, and the second dummy via structure pattern may commonly overlap the dummy lower wiring structure pattern and the dummy upper wiring structure pattern. The fourth mask may overlap the third mask.Type: GrantFiled: August 29, 2016Date of Patent: November 21, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: In-Wook Oh, Jong-Hyun Lee, Sung-Wook Hwang
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Patent number: 9786511Abstract: A plasma etch resist material modified by an inorganic protective component via sequential infiltration synthesis (SIS) and methods of preparing the modified resist material. The modified resist material is characterized by an improved resistance to a plasma etching or related process relative to the unmodified resist material, thereby allowing formation of patterned features into a substrate material, which may be high-aspect ratio features. The SIS process forms the protective component within the bulk resist material through a plurality of alternating exposures to gas phase precursors which infiltrate the resist material. The plasma etch resist material may be initially patterned using photolithography, electron-beam lithography or a block copolymer self-assembly process.Type: GrantFiled: March 11, 2015Date of Patent: October 10, 2017Assignee: UCHICAGO ARGONNE, LLCInventors: Seth B. Darling, Jeffrey W. Elam, Yu-Chih Tseng, Qing Peng
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Patent number: 9768022Abstract: A lithography method is provided in accordance with some embodiments. The lithography method includes providing a substrate, forming a crosslinked layer over the substrate, wherein the crosslinked layer is in contact with the substrate, forming a patterned layer over the crosslinked layer, forming a pattern in the crosslinked layer and further in the substrate by using the patterned layer as a mask, treating the crosslinked layer by using a radiation source to transition the crosslinked layer to a de-crosslinked layer with a reduced molecular weight, and removing the de-crosslinked layer by using a solution that is not subject to cause damage on the substrate.Type: GrantFiled: January 27, 2016Date of Patent: September 19, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ming-Huei Weng, Chen-Yu Liu, Ching-Yu Chang
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Patent number: 9726977Abstract: Organic coating compositions, particularly antireflective coating compositions, are provided that can be developed with an aqueous alkaline developer, including in a single step during development of an overcoated photoresist layer. Preferred coating compositions comprise a tetrapolymer that comprises at least four distinct functional groups.Type: GrantFiled: February 8, 2010Date of Patent: August 8, 2017Assignee: GlobalFoundries Inc.Inventors: James F. Cameron, Jin Wuk Sung, John P. Amara, Greogory P. Prokopowicz, David A. Valeri, Libor Vyklicky, Wu-Song S. Huang, Wenjie Li, Pushkara R. Varanasi, Irene Y. Popova
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Patent number: 9721808Abstract: Methods of fabricating a semiconductor device are provided. The methods may include forming a stopper layer on a target layer including a cell area and an edge area, forming a hard mask including first upper openings and dam trench on the stopper layer, forming opening spacers on inner walls of the first upper openings and a dam pattern in the dam trench, removing the stopper layer exposed in the first upper openings to form first lower openings, forming pillar patterns in the first lower openings and the first upper openings and an eaves pattern on the dam pattern, removing the hard mask in the cell area, forming a first polymer block between the pillar patterns including second upper openings, etching the stopper layer exposed in the second upper openings to form second lower openings, and removing the first polymer block, the pillar patterns, the dam pattern and the eaves pattern.Type: GrantFiled: February 22, 2016Date of Patent: August 1, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Dae-Yong Kang, Eunsung Kim, Byungjun Jeon, Joonsoo Park, Soonmok Ha
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Patent number: 9697931Abstract: Provided are a method of preparing a large-area, three-dimensional graphene transparent electrode using an electrospray deposition method and a large-area, three-dimensional graphene transparent electrode prepared therefrom. More particularly, the present invention is related to a method of preparing a large-area, three-dimensional graphene transparent electrode using an electrospray deposition method, which may easily prepare a large-area graphene transparent electrode having high transparency and conductivity through an electrospray process and may obtain effects, which may not be realized in a two-dimensional transparent electrode prepared by a typical method such as CVD, due to a three-dimensional stack structure in which graphene is arranged perpendicular to a substrate, and a large-area, three-dimensional graphene transparent electrode prepared therefrom.Type: GrantFiled: August 6, 2012Date of Patent: July 4, 2017Assignee: KOREA INSTITUTE OF INDUSTRIAL TECHNOLOGYInventors: Hoon Huh, Woo Sik Kim, Hui Jin Kim, Eun Sung Yoo, Suk Hoon Choi, Ji Young Hwang, Jee Young Jang, Tae Il Kim
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Patent number: 9665003Abstract: A hardmask composition includes a monomer represented by the following Chemical Formula 1, a polymer including a moiety represented by the following Chemical Formula 2, a polymer including a moiety represented by the following Chemical Formula 3, or a combination thereof, and a solvent,Type: GrantFiled: April 28, 2014Date of Patent: May 30, 2017Assignee: Cheil Industries, Inc.Inventors: Yoo-Jeong Choi, Yun-Jun Kim, Go-Un Kim, Young-Min Kim, Hea-Jung Kim, Joon-Young Moon, Yo-Choul Park, Yu-Shin Park, You-Jung Park, Hyun-Ji Song, Seung-Wook Shin, Yong-Woon Yoon, Chung-Heon Lee, Seung-Hee Hong
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Patent number: 9570349Abstract: A method of an aspect includes forming a directed self assembly alignment promotion layer over a surface of a substrate having a first patterned region and a second patterned region. A first directed self assembly alignment promotion material is formed selectively over the first patterned region without using lithographic patterning. The method also includes forming an assembled layer over the directed self assembly alignment promotion layer by directed self assembly. A plurality of assembled structures are formed that each include predominantly a first type of polymer over the first directed self assembly alignment promotion material. The assembled structures are each adjacently surrounded by predominantly a second different type of polymer over the second patterned region. The first directed self assembly alignment promotion material has a greater chemical affinity for the first type of polymer than for the second different type of polymer.Type: GrantFiled: August 15, 2016Date of Patent: February 14, 2017Assignee: Intel CorporationInventors: Robert L. Bristol, Rami Hourani, Eungnak Han, James M. Blackwell
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Patent number: 9551925Abstract: A blankmask and a photomask using the same are provided. The blankmask can be useful in preventing the loss in thickness of lateral, top and bottom surfaces of a pattern of a light shielding film or a phase shifting film after the manufacture of the photomask by forming protective film, which has an etch selectivity with respect to a pattern of a hard film or the light shielding film, on the light shielding film or the phase shifting film so that the loss of the phase shifting film formed under the light shielding film or the phase shifting film can be prevented when a process of removing the light shielding film disposed under the hard film or a pattern of the light shielding film is performed during a washing process and a process of removing a pattern of the hard film in a method of manufacturing a photomask, thereby securing uniformity in thickness.Type: GrantFiled: January 23, 2015Date of Patent: January 24, 2017Assignee: S&S TECH CO., LTDInventors: Kee-Soo Nam, Chul-Kyu Yang, Geung-Won Kang, Cheol Shin, Jong-Hwa Lee, Min-Ki Choi, Chang-Jun Kim, Kyu-Jin Jang
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Patent number: 9530660Abstract: Disclosed is a method of forming a target pattern for a semiconductor device using multiple directed self-assembly (DSA) patterning processes. The method includes receiving a substrate and forming a guide pattern over the substrate by performing a process that includes a first DSA process. The method further includes performing a second DSA process over the substrate using the guide pattern. In an embodiment, the first DSA process controls the first pitch of a dense pattern in a first direction and the second DSA process controls the second pitch of the dense pattern in a second direction.Type: GrantFiled: May 15, 2015Date of Patent: December 27, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chin-Yuan Tseng, Chi-Cheng Hung, Chun-Kuang Chen, Kuan-Hsin Lo, Ru-Gun Liu, Tsai-Sheng Gau, Wei-Liang Lin
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Patent number: 9529257Abstract: Disclosed are a polymer represented by the Chemical Formula 1, a monomer represented by the Chemical Formula 2, and a solvent, wherein the monomer is included in the same or a higher amount than the polymer, and a method of forming patterns using the same.Type: GrantFiled: September 2, 2013Date of Patent: December 27, 2016Assignee: CHEIL INDUSTRIES, INC.Inventors: Chul-Ho Lee, You-Jung Park, Yong-Woon Yoon, Sung-Jae Lee, Youn-Jin Cho, Young-Min Kim, Chung-Heon Lee
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Patent number: 9508560Abstract: A method that allows effective removal of a silicon-containing antireflective coating (SiARC) layer in a block mask after defining an unblock area in a sidewall image transfer (SIT) patterning process without causing a height loss of the SIT spacers is provided. The method includes first modifying the SiARC layer with a dry etch utilizing an etching gas comprising a nitrogen gas followed by treating the modified SiARC layer with a wet chemical etch utilizing an aqueous solution including dilute hydrofluoric acid and citric acid.Type: GrantFiled: June 18, 2015Date of Patent: November 29, 2016Assignee: International Business Machines CorporationInventors: Yann Mignot, Brown C. Peethala, Shariq Siddiqui
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Patent number: 9418836Abstract: The present invention relates to novel compositions comprising a metal component selected from a group chosen from at least one polyoxometalate, at least one heteropolyoxometalate and a mixture thereof; and, at least one organic component. The present invention also relates to methods of preparing the nanorod arrays and the nanorod materials and films. The present invention also relates to novel compositions to generate metal-oxide rich films, and also relates to processes for via or trench filling, reverse via or trench filling and imaging with underlayers. The materials are useful in wide range of manufacturing applications in many industries, including the semiconductor devices, electro-optical devices and energy storage industry.Type: GrantFiled: July 29, 2014Date of Patent: August 16, 2016Assignee: AZ ELECTRONIC MATERIALS (LUXEMBOURG) S.A.R.L.Inventors: Venkata Gopal Reddy Chada, Huirong Yao, Munirathna Padmanaban, JoonYeon Cho, Elizabeth Wolfer, Alberto D. Dioses, Salem K. Mullen