Electron Beam Patents (Class 430/942)
  • Patent number: 6258511
    Abstract: An exposure method using a charged particle beam is used to improve the accuracy of stitching the patterns according to the divided pattern transfer. The exposure method according to the present invention comprises dividing the pattern into a plurality of subfields arranged in stripes; forming the subfields (41L) and (41R) laid around the boundary in the adjacent stripes (49L) and (49R), exposing the subfields (41L) and (41R) by half the exposure time amount, and overlapping the images of the patterns of the subfields (41L) and (41R) at substantially the same position on the wafer.
    Type: Grant
    Filed: October 14, 1999
    Date of Patent: July 10, 2001
    Assignee: Nikon Corporation
    Inventor: Teruaki Okino
  • Patent number: 6243487
    Abstract: Disclosed is a pattern exposure method for conducting an overlay exposure to a base pattern previously formed by using electron beam, which has the steps of: 1) dividing a group of patterns formed on the base pattern into arbitrary regions; 2) calculating an area density of the base pattern in each of the arbitrary regions; 3) generating a pattern according to the area density; 4) conducting sub-exposure using the pattern; and 5) conducting main exposure to expose a desired pattern.
    Type: Grant
    Filed: March 31, 1998
    Date of Patent: June 5, 2001
    Assignee: NEC Corporation
    Inventor: Ken Nakajima
  • Patent number: 6235450
    Abstract: A light exposure and an electron-beam exposure are used to expose respective portions of the same resist layer. The respective portions may overlap to form a double exposure region in which the resist is exposed by both light radiation and electron-beam radiation. The dosage of the light exposure and of the electron-beam exposure in the double exposure region may desirably be a gradually sloped dosage. The sum of the light exposure dosage and the electron-beam exposure dosage in the double exposure region is chosen to be at least equal to or, desirably, somewhat larger than the dosage in the non-overlapping portions of the light exposure region and the electron-beam exposure region. Alternatively, a light exposure and an electron-beam exposure are used to expose the same resist layer, with a narrow electron-beam exposure region extending into or cutting into a wider light exposure region, with no overlapping or small overlapping at the end of the narrow electron-beam exposure region.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: May 22, 2001
    Assignee: Nikon Corporation
    Inventor: Mamoru Nakasuji
  • Patent number: 6232040
    Abstract: The specification describes a method and apparatus for electron beam lithography wherein a Wehnelt electron gun is modified to improve the uniformity of the electron beam. A mesh grid is applied to the Wehnelt aperture and the mesh grid functions as a multiple secondary emitter to produce a uniform beam flux over a wide area. The grid voltage of the modified gun is substantially lower than in a conventional Wehnelt gun, i.e. less than 100 volts, which can be switched conveniently and economically using semiconductor drive circuits.
    Type: Grant
    Filed: May 6, 1999
    Date of Patent: May 15, 2001
    Assignee: Agere Systems, Inc.
    Inventors: Victor Katsap, James Alexander Liddle, Warren Kazmir Waskiewicz
  • Patent number: 6232046
    Abstract: Three-dimensional, patterned surfaces, which were produced by dry-etching technology and have zones with different degrees of polymerization, are subjected to a time-limited dry-etching process in fluorine-containing plasma, In this context, an ablation process is used, which proceeds as a function of time, from incompletely polymerized material to completely polymerized material. Weakly polymerized regions, in particular those resulting from the proximity effect, may be removed.
    Type: Grant
    Filed: September 22, 1998
    Date of Patent: May 15, 2001
    Assignee: Deutsche Telekom AG
    Inventors: Hans Wilfried Peter Koops, Sergey Babine, Gerold Dahm, Alexey Holopkin
  • Patent number: 6225011
    Abstract: A pattern can be written in accordance with a distortion which changes depending upon exposure conditions of the optical exposure system and exposed pattern features, and a pattern can be written with a high alignment accuracy by the optical exposure system and an electron beam lithography system or two optical exposure systems. A pattern which is exposed by optical exposure system divided into very small areas shown by broken lines, and pattern feature amounts (fx), (fy) at each area are calculated. A correction amount is obtained by using the pattern feature amount and the position within an exposure field as parameters based on exposure distortion examined by a standard pattern predeterminedly.
    Type: Grant
    Filed: April 20, 1999
    Date of Patent: May 1, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Yasuko Gotoh, Norio Hasegawa, Naoko Asai, Katsuya Hayano, Takashi Matsuzaka, Katsuhiro Kawasaki
  • Patent number: 6218090
    Abstract: A process for forming a photoresist image on a substrate and a process for forming metal contacts on a substrate are described. The process of forming a photoresist image includes depositing a positive working photoresist composition onto a metal layer which is on a substrate to thereby form a photoresist layer then imagewise exposing the photoresist layer to actinic radiation and developing said photoresist layer to form a plurality of cavities through the photoresist layer thereby revealing portions of the metal layer. Then the inventions provides for etching away the revealed portions of the metal layer followed by an overall exposing both the substrate and the remaining photoresist layer and remaining metal layer portions to sufficient electron beam radiation to render a part of the photoresist layer directly adjacent to the metal layer more soluble in a developer than the balance of the photoresist layer.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: April 17, 2001
    Assignee: Electron Vision Corporation
    Inventors: Jason P. Minter, William R. Livesay
  • Patent number: 6218060
    Abstract: The present invention relates to a multicolumn electron-beam lithography system. An object of the present invention is to realize, at low cost, a multicolumn electron-beam lithography system capable of concurrently exposing chips on one wafer. The multicolumn electron-beam lithography system has a plurality of columns (8-1, 8-2, 8-3, 8-4) each includes a main deflector (16), and a sub deflector (14). The main deflector offers a large magnitude of deflection. The sub deflector offers a small magnitude of deflection. The plurality of columns irradiates an electron beam to a sample while deflecting it according to main deflector-related data (62) and sub deflector-related data (61). Herein, the plurality of columns concurrently draws a pattern on one wafer (50). The multicolumn electron-beam lithography system further includes a deviation memory (63) and a correction unit (64). Deviations of the optical axes of the columns measured in advance are stored in the deviation memory.
    Type: Grant
    Filed: January 10, 2000
    Date of Patent: April 17, 2001
    Assignee: Advantest Corporation
    Inventors: Hiroshi Yasuda, Hideaki Komami
  • Patent number: 6180296
    Abstract: A lithographically patterned three dimensional stencil type mask is formed on a substrate over a specific area that is to undergo processing. The three dimensional mask functionally provides an energy beam stencil at a precise height over the specific area. The stencil has surface properties that provide a resist function for any scattering of a focused particle beam that passes through an aperture or opening in the center of the stencil, and is formed using standard in the art additive and subtractive processes so that it can be removed after the particle beam processing. It has a particular advantage in an application where it is desired to have sub regions in a pixel area in a liquid crystal display that can provide different domains which operate to provide different pretilt states to the liquid crystal which in turn widens the viewing range of the display.
    Type: Grant
    Filed: October 29, 1999
    Date of Patent: January 30, 2001
    Assignee: International Business Machines Corporation
    Inventors: Michael James Cordes, James Louis Speidell
  • Patent number: 6177218
    Abstract: A lithographic process for device fabrication in which a pattern is transferred from a mask into an energy sensitive material by projecting charged particle (e.g. electron beam) radiation onto the mask is disclosed. The pattern on the mask is divided into segments. The radiation transmitted through the mask and incident on the layer of energy sensitive material transfers a continuous image of the segmented mask pattern into the energy sensitive material. The images of each segment are joined together to form the continuous image by seam blending techniques. The seam blending techniques employ duplicate pattern information on segments for which the images are joined together. The image of the duplicate pattern information from a first segment is overlapped with the image of the duplicate pattern information from the second segment to blend the seams together.
    Type: Grant
    Filed: March 15, 1999
    Date of Patent: January 23, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: Joseph Allen Felker, James Alexander Liddle, Stuart Thomas Stanton
  • Patent number: 6171760
    Abstract: A lithography method is applied to a lithography system comprising a charged particle beam generation section for generating a charged particle beam, a mask stage for holding a transfer mask to which the charged particle beam is applied, and a wafer stage for holding a wafer to be processed so as to face the charged particle beam generation section via the transfer mask. A fluorescent film is disposed between the transfer mask and the wafer coated with a photoresist thereon. When the fluorescent film is irradiated with the charged particle beam which passes through an opening of the transfer mask, an ultraviolet light is emitted from the fluorescent film and applied onto the photoresist film formed on the wafer.
    Type: Grant
    Filed: July 1, 1999
    Date of Patent: January 9, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuichiro Yamazaki, Motosuke Miyoshi
  • Patent number: 6171736
    Abstract: Projection-microlithography masks and methods are disclosed for aligning a mask in a pattern-transfer apparatus and transferring a pattern image as defined by the mask onto a sensitized substrate using a charged-particle beam or other suitable microlithography energy source. A mask of the present invention can comprise a pattern defined on a plurality of thin mask reticles or films. The plurality of mask reticles are secured to a single retention member. The mask further comprises fiducial marks, defined on the retention member and fine-alignment marks defined on each of the mask reticles, to facilitate alignment of the mask and correction of pattern-image errors resulting from distortion or movement of the mask reticles prior to exposing the substrate to the pattern image.
    Type: Grant
    Filed: September 24, 1999
    Date of Patent: January 9, 2001
    Assignee: Nikon Corporation
    Inventor: Noriyuki Hirayanagi
  • Patent number: 6162581
    Abstract: Charged-particle-beam pattern-transfer methods and apparatus are disclosed. Circuit patterns on a mask are divided into a plurality of fields, each field including respective connection ends. Fields that are to be adjacent as transferred to a substrate include a common portion of the circuit pattern in their respective connection ends. The common portions are projected onto the substrate to substantially overlap. The connection ends are illuminated by an image of a shaping aperture image that is illuminated with a charged-particle beam. The shaping-aperture image can be scanned across the fields so that wafer areas corresponding to the connection ends are exposed during exposure of the connecting adjacent fields and so that the dose received by the wafer is substantially uniform. The shaping-aperture image can be vibrated in a direction perpendicular to a scanning direction to illuminate connection ends. The vibration provides uniform dose on the wafer in areas corresponding to the connection ends.
    Type: Grant
    Filed: December 1, 1998
    Date of Patent: December 19, 2000
    Assignee: Nikon Corporation
    Inventors: Mamoru Nakasuji, Teruaki Okino
  • Patent number: 6162567
    Abstract: A process for producing a halftone mask comprises the steps of: (a) forming an electron beam resist film on a mask blank which includes a translucent film and a light-block film sequentially formed on a transparent substrate; (b) irradiating an electron beam to the electron beam resist film in such a dose that the electron beam resist film remains in a predetermined thickness by development in a first write area and is completely removed by development in a second write area; (c) developing the electron beam resist film thereby to form an electron beam resist film retaining the predetermined thickness in the first write area and having an opening in the second write area; (d) patterning the light-block film using the resulting electron beam resist film as a mask; (e) ashing the electron beam resist film to remove the electron beam resist film from the first write area completely; (f) patterning the translucent film using the patterned light-block film as a mask; and (g) patterning the light-block film using t
    Type: Grant
    Filed: August 11, 1999
    Date of Patent: December 19, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Kunio Watanabe
  • Patent number: 6159644
    Abstract: In a semiconductor circuit device fabricating process in which a reduction image projection exposure apparatus and an electron beam exposure apparatus are in a mixed use in its exposure process, pattern position shift errors for each exposure apparatus are measured and corrected at the time of drawing by means of an electron beam drawing apparatus, thereby enhancing the alignment accuracy.First, a pattern for measuring position shifts is exposed using a stepper and the electron beam drawing apparatus. Then, the position shift errors are measured using an identical coordinate position measuring device. Accidental errors have been mixed in the measurement result at this time. On account of this, measurement data at a certain point are smoothed by taking a summation average with data on the periphery thereof, thus decreasing influences of the accidental errors. Moreover, by inverting positive or negative signs of the data on the position shift errors, the data are made into correction data.
    Type: Grant
    Filed: September 1, 1998
    Date of Patent: December 12, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Hidetoshi Satoh, Yoshinori Nakayama, Masahide Okumura, Hiroya Ohta, Norio Saitou
  • Patent number: 6156464
    Abstract: Methods are disclosed for improving the yield of acceptable product from microlithography using a charged particle beam. According to the methods, exposure defects caused by an unsuitable stage velocity are reduced, and exposure-defect areas can be re-exposed after detection of an exposure defect. In preparation for exposure, pattern data are read. Next, stage position is read, and stage velocity is calculated. A determination is made of whether the stage velocity is greater than a specified value. If the stage velocity is greater than the specified value, the stage velocity is decreased to avoid exceeding a velocity limit at which continuous exposure is impossible. Exposure of the die commences. If exposure of all of the pattern portions of the die are successfully completed, then processing is terminated. If exposure of all the pattern portions were not successfully completed, processing returns to the step at which the error occurred and repeated.
    Type: Grant
    Filed: March 2, 1999
    Date of Patent: December 5, 2000
    Assignee: Nikon Corporation
    Inventor: Kazunari Hada
  • Patent number: 6153340
    Abstract: Methods and reticles are provided for performing charged-particle-beam microlithography in which degradations in transfer accuracy arising from the space-charge effect and/or resist heating are reduced. A reticle is divided into multiple exposure units (e.g., subfields) each having at least one pattern feature, and each exposure unit is divided into multiple subunits. Certain features include non-exposed regions having dimensions larger than the resolution limit of the projection-optical system used to project the reticle pattern onto the substrate. Also, the non-exposed regions are desirably smaller than the dimensional limit at which resolution is impossible due to the proximity effect. With stencil reticles, the non-exposed regions are preferably provided at boundaries between complimentary pairs of large-dimension features inside exposure units having different feature densities. The non-exposed regions absorb backscattered electrons from the exposure doses received by surrounding portions of the feature.
    Type: Grant
    Filed: May 28, 1999
    Date of Patent: November 28, 2000
    Assignee: Nikon Corporation
    Inventor: Mamoru Nakasuji
  • Patent number: 6150070
    Abstract: A process for forming a photoresist image on a substrate and a process for forming metal contacts on a substrate are described.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: November 21, 2000
    Assignee: AlliedSignal Inc.
    Inventors: Jason P. Minter, William R. Livesay
  • Patent number: 6146794
    Abstract: In an antistatic method for a photomask including a conductive optical shield layer, at least two conductive pins are inserted into the photomask, so that the conductive pins are in contact with the conductive optical shield layer. Then, the photomask is set in a cassette of an electron beam exposure apparatus. Then, the conductive pins are electrically connected to the cassette by conductive plates. Thus, electrons charged at the conductive optical shield layer by electron beams are effectively discharged from the conductive pins to the cassette.
    Type: Grant
    Filed: August 24, 1998
    Date of Patent: November 14, 2000
    Assignee: NEC Corporation
    Inventor: Hiroshi Yamazaki
  • Patent number: 6140020
    Abstract: A lithographic mask (FIG. 9 or FIG. 10) that is primarily used for SCALPEL processing has a substrate (100). Layers (102, 104, 106, 108, 110, and 112) are formed and selectively patterned and etched to form E-beam exposure windows (118) and skirt regions (120) framing the windows (118). The skirt regions (120) and some portions of the patterned features (124) within the window (118) are formed having thicker/thinner regions of material or formed of different material whereby different regions of the mask (FIG. 9) scatter energy to differing degrees. The different scattering regions on the mask allow SCALPEL patterns to be formed on the wafer with improved critical dimension (CD) control, reduced aberrant feature formation, and improved yield.
    Type: Grant
    Filed: November 30, 1998
    Date of Patent: October 31, 2000
    Assignee: Motorola, Inc.
    Inventor: Kevin David Cummings
  • Patent number: 6140021
    Abstract: This invention provides the charged particle beam transfer method, which can control adverse effect of distortion or blur that arises from the space charge effect due to the non-uniform pattern density to a minimum.A pattern formed on reticle is raster or step-and-repeat scanned with a charged particle beam and is illuminated in consecutive order, and a pattern image of a sub-field, which is illuminated, is to be formed on a certain position of a radiation sensitive substrate. On the radiation sensitive substrate whole pattern is projected through stitching the said pattern image. The pattern is to be divided into plural areas A and B which differ in pattern density one another, and the above-described scan boundary is made to coincide with the boundary of these plural areas.
    Type: Grant
    Filed: May 7, 1999
    Date of Patent: October 31, 2000
    Assignee: Mamoru Nakasuji
    Inventors: Mamoru Nakasuji, Shintaro Kawata
  • Patent number: 6117600
    Abstract: Charged-particle-beam pattern-transfer methods, apparatus, and masks are disclosed that reduce the effects of resist-heating, avoid the so-called stencil problem, and exhibit high throughput. A circuit pattern is divided into low-resolution and high-resolution features that are defined by respective mask patterns in different areas of a mask or on different masks. The respective mask patterns are projected overlappingly onto the substrate. In another embodiment, a mask pattern defines low-resolution circuit features and a portion of high-resolution features. A second mask pattern defines a substantial portion of the high-resolution circuit features. The first and second mask patterns are projected onto the substrate with the charged-particle beam at first and second doses. The first dose, corresponding to the low-resolution circuit features, is larger than the second dose, and the first and second doses are independently selectable.
    Type: Grant
    Filed: January 13, 1999
    Date of Patent: September 12, 2000
    Assignee: Nikon Corporation
    Inventor: Mamoru Nakasuji
  • Patent number: 6117617
    Abstract: A high-resolution patterning method of a resist layer is disclosed by patternwise irradiation of the resist layer with electron beams utilizing a methanofullerene compound as the electron beam resist material, which is graphitized and made insoluble in an organic solvent by the electron beam irradiation in a dose of, for example, 1.times.10.sup.-4 C/cm.sup.2 or larger. The thus formed resist layer is highly resistant against dry etching to ensure utilizability of the method in the fine patterning work for the manufacture of semiconductor devices.
    Type: Grant
    Filed: September 18, 1998
    Date of Patent: September 12, 2000
    Assignees: Japan as represented by Director of Agency of Industrial Science and Technology, The University of Birmingham
    Inventors: Toshihiko Kanayama, Tetsuya Tada, Richard Edward Palmer, Alexander Phillip Robinson
  • Patent number: 6117618
    Abstract: In one embodiment, the present invention relates to a method of making a carbonized antireflection coating involving the steps of depositing a polymer layer on a semiconductor substrate; and carbonizing at least a portion of the polymer layer in an inert atmosphere to provide the carbonized antireflection coating. In another embodiment, the present invention relates to a method of improving critical dimensional control during lithography, involving the steps of providing a semiconductor substrate; depositing a polymer layer on the semiconductor substrate; carbonizing at least a portion of the polymer layer in an inert atmosphere to provide a carbonized antireflection coating; depositing a photoresist over the carbonized antireflection coating; and patterning the photoresist.
    Type: Grant
    Filed: November 4, 1998
    Date of Patent: September 12, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Sanjay Yedur, Bhanwar Singh, Bharath Rangarajan, Michael Templeton
  • Patent number: 6114093
    Abstract: A pattern drawing method by directly writing a pattern with a charged particle electron beam, in which a resist containing metal powders is applied on a substrate having a substrate pattern formed thereon, so to form a resist film, and a desired pattern is written by exposing the resist film with a charged particle electron beam.
    Type: Grant
    Filed: June 17, 1999
    Date of Patent: September 5, 2000
    Assignee: NEC Corporation
    Inventor: Yasuhisa Yamada
  • Patent number: 6115453
    Abstract: A direct-heated flat emitter for generating a homogenous electron beam, particularly for x-ray tubes, has two terminal lugs for the heating current supply formed at the edge of the perimeter of the emission surface and the emission surface is subdivided into interconnects by slits. The slits have a width no less than 10 .mu.m and no greater than 1% of the length of a diagonal of the smallest rectangle which can circumscribe the emission surface.
    Type: Grant
    Filed: August 20, 1998
    Date of Patent: September 5, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventors: Erich Hell, Detlef Mattern, Peter Schardt
  • Patent number: 6107011
    Abstract: A method of high resolution imaging for integrated circuits employs two masks and a laser source to impart an image onto a thermoresist coated image receiving surface. A primary mask carries a principal image to be recorded and a secondary mask contains an array of lenslets. The lenslet array concentrates light from a pulsed laser source onto a plurality of exposure points on the primary mask and the image features contained within that plurality of exposure points are imagewise reproduced in a corresponding plurality of exposure points on the image receiving surface. The lenslets in the lenslet array are dimensioned and positioned such that the plurality of exposure points formed on the image receiving surface have sufficient separation to avoid interaction. Relative motion ("scanning") between the primary and secondary mask creates raster lines on the primary mask to be exposed onto corresponding raster lines on the image receiving surface.
    Type: Grant
    Filed: August 31, 1999
    Date of Patent: August 22, 2000
    Assignee: Creo SRL
    Inventor: Daniel Gelbart
  • Patent number: 6107008
    Abstract: An object comprised of a curable material and formed by stereolithography or another three-dimensional prototyping method, in which the object has undergone initial curing, is subjected to post-curing by ionizing radiation, such as an electron beam having a predetermined beam output energy, which is applied in a predetermined dosage and at a predetermined dose rate. The post-cured object exhibits a property profile which is superior to that which existed prior to the ionizing radiation post-curing.
    Type: Grant
    Filed: August 29, 1997
    Date of Patent: August 22, 2000
    Assignees: Lockheed Martin Energy Research, Lockheed Martin Energy Systems, Inc.
    Inventors: David H. Howell, Claude C. Eberle, Christopher J. Janke
  • Patent number: 6093520
    Abstract: A method is disclosed for the manufacture of microstructures and devices. The method is relatively easy to implement, and has the capability to produce features having a resolution of ten microns or smaller with a high aspect ratio (60, 75, 100, 200, or even higher). A master mask, appropriately designed and fabricated, is used in an initial exposure step with visible light, ultraviolet light, x-rays, an electron beam, or an ion beam to make a "transfer mask" directly on the surface of the sample. It is not necessary to produce an expensive x-ray master mask, even if x-ray exposure of the sample is desired. There is no necessity for gap control during exposure of the resist through the transfer mask. The resulting structures may, if desired, have a higher aspect ratio than microstructures that have previously been produced through other methods. The "transfer mask" is not a unit separate from the sample, but is formed directly on the surface of each sample.
    Type: Grant
    Filed: July 18, 1996
    Date of Patent: July 25, 2000
    Assignee: Board of Supervisors of Louisiana State University and Agricultural and Mechanical College
    Inventors: Yuli Vladimirsky, Olga Vladimirsky, Volker Saile
  • Patent number: 6090528
    Abstract: The invention relates to the field of electron beam lithography. More particularly, the invention relates to shaped beam lithography for generating variable-shaped spots on photoresist for use in integrated circuit manufacturing processes. According to an aspect of the invention, an electron beam lithography method is provided, having the steps of generating an electron beam and directing it through a first square aperture in a first lamina, the first square aperture having a first serrated edge. According to a further aspect of the invention, the beam emanating from the first square aperture in the first lamina is focused onto a second square aperture in a second lamina having a second serrated edge. The spot generated has a subresolution edge zone induced at least in part by the first serrated edge and/or the second serrated edge.
    Type: Grant
    Filed: October 27, 1999
    Date of Patent: July 18, 2000
    Inventors: Michael S. Gordon, John G. Hartley
  • Patent number: 6087071
    Abstract: A process for curing a resist in which a resist is cured quickly and with high efficiency without gas, which is formed by irradiation with electron beams with which the resist is irradiated for curing, remaining in it and thereby increase its thermostability, is achieved by the following process steps:a first, the resist is irradiated with electron beams and kept at a temperature such that gas is produced and released in the resist, but no gas bubbles are formed in the resist;second, the resist is heated so that the gas produced in the first process step is dissipated to the outside from the resist; andthird, the resist is irradiated with electron beams so that macromolecules are formed in the resist and the resist is cured.
    Type: Grant
    Filed: September 13, 1999
    Date of Patent: July 11, 2000
    Assignee: Ushiodenki Kabushiki Kaisha
    Inventor: Minoru Komori
  • Patent number: 6080526
    Abstract: A process for the preparation of substrates used in the manufacture of integrated circuits wherein spin-on low dielectric constant (low-k) polymer films are applied on semiconductor substrates. A non-etchback processing of spin-on low-k polymer films, without losing the low dielectric constant feature of the film, especially in between metal lines, is achieved utilizing electron beam radiation. A polymeric dielectric film is applied and dried onto a substrate and exposed to electron beam radiation under conditions sufficient to partially cure the dielectric layer. The exposing forms a relatively more hardened topmost portion of the dielectric layer and a relatively less hardened underlying portion of the dielectric layer.
    Type: Grant
    Filed: February 24, 1998
    Date of Patent: June 27, 2000
    Assignee: AlliedSignal Inc.
    Inventors: Jingjun Yang, Lynn Forester, Dong Kyu Choi, Shi-Qing Wang, Neil H. Hendricks
  • Patent number: 6051347
    Abstract: A method of correcting, or compensating for errors encountered in the transfer of patterns is disclosed for use with high resolution e-beam lithography. In a first embodiment, optical proximity effects are incorporated into the e-beam proximity effects by superimposing the two effects to arrive at a compensated dosage level database to produce the desired patterns. In a second embodiment, etching effects are also superimposed on the previous driving database by compensating the e-beam proximity data twice, that is, by over correcting it, to further improve the transfer of patterns without the undesirable effects. It is shown that corrections for a number of other process steps can also be incorporated into the database that drives the e-beam lithography machine in order to achieve high resolution patterns of about one-quarter-micron technology.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: April 18, 2000
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: San-De Tzu, Chia-Hui Lin
  • Patent number: 6048668
    Abstract: Patterning a film by accumulating a first electric charge in a first area of a film under treatment, applying a resist to the film, and subsequently exposing a second area of the resist adjoining the first area to the first electric charge.
    Type: Grant
    Filed: February 3, 1998
    Date of Patent: April 11, 2000
    Assignee: Fujitsu Limited
    Inventor: Tsunehiro Hato
  • Patent number: 6042993
    Abstract: In a process for photolithographic generation of structures in the sub-200 nm range, a layer of amorphous hydrogen-containing carbon (a-C:H) with an optical energy gap of <1 eV or a layer of sputtered amorphous carbon (a-C) is applied as the bottom resist to a substrate (layer thickness .ltoreq.500 nm); the bottom resist is provided with a layer of an electron beam-sensitive silicon-containing or silylatable photoresist as the top resist (layer thickness .ltoreq.50 nm); the top resist is structured by means of scanning tunneling microscopy (STM) or scanning force microscopy (SFM) with electrons of an energy of .ltoreq.80 eV; and then the structure is transferred to the bottom resist by etching with an anisotropic oxygen plasma and next is transferred to the substrate by plasma etching.
    Type: Grant
    Filed: August 7, 1997
    Date of Patent: March 28, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventors: Rainer Leuschner, Ewald Gunther, Albert Hammerschmidt, Gertrud Falk
  • Patent number: 6037097
    Abstract: The present invention relates to chemically amplified resists and resist systems wherein some of the polar functional groups of the aqueous base soluble polymer or copolymers are protected with a cyclic aliphatic ketal protecting group such as methoxycyclohexanyl. The resists and the resist systems of the present invention containing the new protecting group have improved shelf-life and vacuum stability as compared to the prior art resists. Thus, the resists of the present invention are highly useful in e-beam lithographic applications.
    Type: Grant
    Filed: January 27, 1998
    Date of Patent: March 14, 2000
    Assignee: International Business Machines Corporation
    Inventors: James J. Bucchignano, Wu-Song Huang, Ahmad D. Katnani, Kim Y. Lee, Wayne M. Moreau, Karen E. Petrillo
  • Patent number: 6033814
    Abstract: A computer-implemented method for matching parameters of outputs generated by a first and second process. The first process generates a first output having a characteristic measurable by a first parameter, and the second process generates a second output having the characteristic measurable by a second parameter. A computer having a processing unit and memory is provided. The computer generates a first model of the first parameter for the first process and a second model of the second parameter for the second process. The computer generates a first simulated output of the first process using the first model. A correction, which is a function of the second model and which compensates for the effect of the second process on the second parameter, is applied to the first simulated output to obtain a corrected output. The second process is applied to the corrected output to generate with the computer thereby a third output matching the first parameter of the first output.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: March 7, 2000
    Assignee: Micron Technology, Inc.
    Inventors: James Burdorf, Christophe Pierrat
  • Patent number: 6019850
    Abstract: A method of continuous manufacture of semiconductor integrated circuits, said method and apparatus adapted to contain the semiconductor substrate, semiconductor deposition coating processes, and etching processes within a substantially collocated series of process chambers so that the semiconductor travels from one chamber to the next without exposure to airborne impurities and contact with manufacturing personnel. The invention has particular utility in the high volume fabrication of large surface area semiconductor circuits such as active matrix liquid crystal displays. The present invention contains a roll-to-roll and continuous belt embodiment.
    Type: Grant
    Filed: June 3, 1996
    Date of Patent: February 1, 2000
    Inventor: Jeffrey Frey
  • Patent number: 6017682
    Abstract: A solid state chain extension method provides for the formation of a solid state film comprised of a high molecular weight polymer by chain extending a deblocked Lewis base with Lewis acid oligomers while the reactants are in a solid state form. In one embodiment, a negative resist is prepared by selectively exposing regions of the solid state film. The Lewis base is deblocked at the exposed regions by a suitable deblocking means. The Lewis acid oligomers and the deblocked Lewis base chain extend at the exposed regions. Development of the film removes the non-polymerized reactants. Optionally, the Lewis acid oligomers, when radiation-cross-linking, are cross-linked with one another prior to deblocking the Lewis base to form a negative resist. The cross-linked oligomers polymerize with the subsequently deblocked base to provide a high molecular weight polymer film.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: January 25, 2000
    Assignee: Internatonal Business Machines Corporation
    Inventors: Marie Angelopoulos, Claudius Feger, Jeffrey Donald Gelorme, Jane Margaret Shaw
  • Patent number: 5994007
    Abstract: Disclosed is a pattern forming method, comprising the steps of providing a resist film, applying a light exposure to the resist film, with a film directly above the resist film and another film directly below the resist film being made insulative, applying a charged beam exposure to the resist film, with the film directly above the resist film and the other film directly below the resist film being made conductive, and developing the resist film to form a resist pattern.
    Type: Grant
    Filed: December 17, 1998
    Date of Patent: November 30, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiko Sato, Atsushi Ando, Yasunobu Onishi, Yoshihiko Nakano, Shuji Hayase, Rikako Kani
  • Patent number: 5989759
    Abstract: To achieve down-sizing and improvements of throughputs, light exposure and charge beam exposure are sometimes used together. In case of performing exposure of a desired pattern in a plurality of stages, a positional displacement of each of exposure patterns in the stages leads to a decrease in exposure accuracy. According to the present invention, in case of forming a fine pattern by exposure after exposure of a rough pattern, the exposure position of the rough pattern is adjusted, based on a latent image of the rough pattern which has been subjected to exposure. As a result, a positional displacement between rough and fine patterns is reduced so that a desired pattern can be formed with high accuracy.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: November 23, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsushi Ando, Kazuyoshi Sugihara, Katsuya Okumura, Tetsuro Nakasugi
  • Patent number: 5989760
    Abstract: A substrate (10) having a central region (32) and a peripheral region (34) is processed using a chuck (40) that contacts peripheral regions (34) of the substrate but not the central region. A fabrication step is performed while the substrate (10) is on the chuck (40, 60, 70). The chuck can be used in the formation of a lithographic mask or a semiconductor device.
    Type: Grant
    Filed: March 18, 1998
    Date of Patent: November 23, 1999
    Assignee: Motorola, Inc.
    Inventors: Pawitter Jit Singh Mangat, William Joseph Dauksher
  • Patent number: 5958636
    Abstract: Each of two pattern scheduled areas to be formed a pattern is divided into two areas of an outer edge section and a central section surrounded by the outer edge section. Further, the outer edge section which is in contact with a space area is divided into outline portions from both end portion of the outer edge section, with a 5 .mu.m distance. An outline portion is formed at a portion of the outer edge section sandwiched by the outline portions. An outline portion is formed at a position of the outer edge section orthogonal with these outline portions. Next, a suitable exposure level to each of the divided outline portions is controlled by a controlling unit based on the intensity of electron beams.
    Type: Grant
    Filed: November 10, 1997
    Date of Patent: September 28, 1999
    Assignee: NEC Corporation
    Inventor: Takao Tamura
  • Patent number: 5958635
    Abstract: Lithographic Proximity Correction (LPC) shapes are added (503) to a layer of a layout database file (501). Geometric criteria such as feature width are then used to filter the added LPC shapes (502). The LPC shapes are then modified (505) by determining which LPC shapes are within a predetermined distance from a shape in a layer of the second data base (504). The database file, including the modified LPC shapes, is then used to manufacture a set of lithographic masks (506). The lithographic masks are then used to pattern a set of wafers in the manufacture of integrated circuits (507).
    Type: Grant
    Filed: October 20, 1997
    Date of Patent: September 28, 1999
    Assignee: Motorola, Inc.
    Inventors: Alfred John Reich, Hak-Lay Chuang, Michael E. Kling, Paul G. Y. Tsui, Kevin Lucas, James N. Conner
  • Patent number: 5958626
    Abstract: A method for dividing a pattern according to the present invention is used in a charged particle beam projecting apparatus, in which: a plurality of block patterns into which a projected pattern to be projected on a substrate is divided are respectively formed in a plurality of regions of a mask; the plurality of regions of the mask are successively irradiated with a charged particle beam so that the block patterns are successively projected on the substrate; and as a result the projected pattern is formed on the substrate. The method includes a step of dividing the projected pattern into the block patterns by parting lines which are plotted in accordance with profiles of pattern elements that constitute the projected pattern when the block patterns are determined.
    Type: Grant
    Filed: September 27, 1996
    Date of Patent: September 28, 1999
    Assignee: Nikon Corporation
    Inventor: Mamoru Nakasuji
  • Patent number: 5942373
    Abstract: Methods of forming patterns in photo-sensitive resist layers with high aspect ratio features are described. The photosensitive layer is patterned exposed to actinic radiation and thereafter developed. For high aspect ratio patterns, the inventors have often observed a residue of resist material at the bottom of such features, and that this residue interferes with subsequent processing, such as filling the pattern with metal by a plating operation. To remove this residue, the patterned locations of the resist are exposed to a low dose of low-energy electron beam radiation, preferably having energy of less than 6 KeV and dosage of less than 200 .mu.C/cm.sup.2. After the electron beam exposure, the aperture is again exposed to a developer solution, which may be of the same composition as the developer initially used to develop the patterns.
    Type: Grant
    Filed: January 26, 1998
    Date of Patent: August 24, 1999
    Assignee: Fujitsu Limited
    Inventors: William T. Chou, Solomon I. Beilin, Wen-chou Vincent Wang
  • Patent number: 5935744
    Abstract: In a method of drawing patterns by an electron beam exposure apparatus, a target pattern is divided into subpatterns and one of the subpatterns is sequentially selected. The dimensions of the selected subpattern are compared with dimensions of a reference electron beam which are determined in accordance with design dimensions. When at least one of the dimensions of the selected subpattern is not larger than the corresponding one of the dimensions of the reference electron beam, dimensions of the use electron beam for the selected subpattern are estimated. Also, the use exposure quantity for the selected subpattern is determined based on the estimated dimensions of the use electron beam for the selected subpattern. Then, the use electron beam is irradiated to the subpattern with the use exposure quantity.
    Type: Grant
    Filed: December 2, 1997
    Date of Patent: August 10, 1999
    Assignee: NEC Corporation
    Inventor: Ken Nakajima
  • Patent number: 5932379
    Abstract: The specification describes a technique for repairing wafer fractures that occur during wafer fabrication. The fractured pieces are joined edge-to-edge at the fracture line and bonded with epoxy adhesive. The method succeeds because the dimensions of the fracture line after bonding is within the reregistration tolerance of commercial step-and-repeat cameras and the reregistration capability of the camera allows normal exposure of sites that do not intersect the fracture line.
    Type: Grant
    Filed: February 24, 1998
    Date of Patent: August 3, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: Jinwook Burm, Robert Alan Hamm, Rose Fasano Kopf, Robert William Ryan, Alaric Tate
  • Patent number: 5916716
    Abstract: Across chip line width variations and other repetitive deviations from the design pattern desired in E-Beam lithography are compensated for by examining each of the regions (i.e., frames, stripes, etc.) of a patterned substrate, determining the amount of deviation for each region, and using the determined regional deviation as a local bias when patterning subsequent substrates. Thus, the E-Beam lithography tool will utilize both global and local biases in order to produce new patterned substrates which lack the deviations found when local bias was not applied. In this way, the root cause of the deviation does not need to be determined. The local bias can be applied directly by modifying the E-Beam lithography system tool commands to provide for patterning wider or thinner lines or to provide for greater or lesser exposure time. Alternatively, the local bias can be applied by varying the emission current of the electron gun for different regions of the substrate.
    Type: Grant
    Filed: March 13, 1997
    Date of Patent: June 29, 1999
    Assignee: International Business Machines Corporation
    Inventors: Rainer Butsch, Timothy R. Groves, John G. Hartley
  • Patent number: RE36964
    Abstract: Fabrication of devices of micron and submicron minimum feature size is accomplished by lithographic processing involving a back focal plane filter. A particularly important fabrication approach depends upon mask patterns which produce images based on discrimination as between scattered and unscattered radiation by accelerated electrons.
    Type: Grant
    Filed: April 29, 1994
    Date of Patent: November 21, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: Steven David Berger, John Murray Gibson