Abstract: According to one embodiment, a method for manufacturing a semiconductor device, includes forming a first insulating film which covers a gate electrode, forming an island-shaped oxide semiconductor in contact with the first insulating film, forming a second insulating film which covers the oxide semiconductor, forming a source electrode in contact with the oxide semiconductor, forming a drain electrode in contact with the oxide semiconductor, forming a third insulating film which covers the source electrode and the drain electrode and forming a channel region between the source electrode and the drain electrode by supplying oxygen from the third insulating film to the oxide semiconductor via the second insulating film.

Abstract: A semiconductor device in which variations in characteristics, deterioration of elements, and abnormality in shape are inhibited is provided. The semiconductor device includes a first region including a plurality of elements and a second region including a plurality of dummy elements. The second region is provided in an outer edge of the first region, and the element and the dummy element each include an oxide semiconductor. The element and the dummy element have the same structure, and a structure body included in the element and a structure body included in the dummy element are formed with the same material and provided in the same layer. The oxide semiconductor includes In, an element M (M is Al, Ga, Y, or Sn), and Zn.

Abstract: A method for manufacturing a semiconductor device comprises: forming isolation layers in a front surface of an upper wafer substrate; forming a through hole that exposes one of the isolation layers, through the upper wafer substrate from a back surface of the upper wafer substrate; forming a first dielectric layer that fills the through hole; defining a lower wafer including a lower wafer substrate, a second dielectric layer defined on the lower wafer substrate, and a first wiring line disposed in the second dielectric layer; bonding a top surface of the second dielectric layer and a bottom surface of the first dielectric layer; forming a third dielectric layer on the front surface of the upper wafer substrate; forming a through via that passes through the third dielectric layer, the one isolation layer, the first dielectric layer; and forming a second wiring line coupled to the through via.

Abstract: One embodiment of the present disclosure provides a thin film transistor comprising an auxiliary electrode, a gate electrode and an active layer disposed between the auxiliary electrode and the gate electrode, wherein the active layer includes a channel portion overlapped with the gate electrode, a first connection portion disposed at one side of the channel portion, and a second connection portion disposed at the other side of the channel portion, and the channel portion includes a first portion overlapped with the auxiliary electrode and a second portion not overlapped with the auxiliary electrode. One embodiment of the present disclosure also provides a display apparatus comprising the thin film transistor.

Abstract: A transistor includes a gate electrode, a gate dielectric located over the gate electrode, a channel layer that includes an oxide semiconductor material and that is located over the gate dielectric, a buffer located to cover at least a portion of the channel layer, and source/drain contacts disposed on the buffer. The buffer includes a material that receives hydrogen. A method for manufacturing the transistor is also provided.

Abstract: Provided are a display substrate and a preparation method thereof, and a display apparatus. The display substrate includes a first display region and a second display region within the first display region, wherein the first display region includes a plurality of emitting units, and the second display region includes a plurality of electrophoretic units, the plurality of emitting units are configured to realize display, and the plurality of electrophoretic units are configured to realize switch between a display state and a transparent state.

Abstract: A method for depositing a metal oxynitride film by epitaxial growth at a low temperature is provided. It is a method for manufacturing a metal oxynitride film, in which the metal oxynitride film is epitaxially grown on a single crystal substrate by a sputtering method using an oxide target with a gas containing a nitrogen gas introduced. The oxide target contains zinc, the substrate during the deposition of the metal oxynitride film is higher than or equal to 80° C. and lower than or equal to 400° C., and the flow rate of the nitrogen gas is greater than or equal to 50% and lower than or equal to 100% of the total flow rate of the gas.

Abstract: The reliability of a transistor including an oxide semiconductor can be improved by suppressing a change in electrical characteristics. A transistor included in a semiconductor device includes a first oxide semiconductor film over a first insulating film, a gate insulating film over the first oxide semiconductor film, a second oxide semiconductor film over the gate insulating film, and a second insulating film over the first oxide semiconductor film and the second oxide semiconductor film. The first oxide semiconductor film includes a channel region in contact with the gate insulating film, a source region in contact with the second insulating film, and a drain region in contact with the second insulating film. The second oxide semiconductor film has a higher carrier density than the first oxide semiconductor film.

Abstract: Provided are a display substrate, a preparation method thereof, and a display device. The display substrate includes: a substrate, a thin film transistor disposed in a pixel island region of the substrate, a first signal line disposed in the pixel island region and a first connecting bridge disposed in a bridge region of the substrate, wherein the first connecting bridge is electrically connected to a gate of the thin film transistor.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming an organosilicon compound layer on a surface of an oxide semiconductor substrate, heating the oxide semiconductor substrate provided with the organosilicon compound layer at a first temperature to form a silicon diffusion layer inside the oxide semiconductor substrate, and removing the organosilicon compound layer from the surface of the oxide semiconductor substrate after heating the oxide semiconductor substrate at the first temperature.

Abstract: A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer. In the periphery of the pixel portion in this display device, a pad portion is provided to be electrically connected to a common electrode layer formed on a counter substrate through a conductive layer made of the same material as the pixel electrode layer. One objection of our invention to prevent a defect due to separation of a thin film in various kinds of display devices is realized, by providing a structure suitable for a pad portion provided in a display panel.

Abstract: A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes a first opening, a second opening, and a third opening which are formed by performing first etching and second etching. By the first etching, the first insulator is etched for forming the first opening, the second opening, and the third opening. By the second etching, the first metal oxide, the second insulator, the third insulator, the fourth insulator, the second metal oxide, and the fifth insulator are etched for forming the first opening; the first metal oxide, the second insulator, and the third insulator are etched for forming the second opening; and the first metal oxide is etched for forming the third opening.

Abstract: A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film.

Abstract: The present invention generally relates to a method for preparing metal oxide nanosheets. In a preferred embodiment, graphene oxide (GO) or graphite oxide is employed as a template or structure directing agent for the formation of the metal oxide nanosheets, wherein the template is mixed with metal oxide precursor to form a metal oxide precursor-bonded template. Subsequently, the metal oxide precursor-bonded template is calcined to form the metal oxide nanosheets. The present invention also relates to a lithium-ion battery anode comprising the metal oxide nanosheets. In a further preferred embodiment, the battery anode may comprising reduced template, which is reduced graphene oxide (rGO) or reduced graphite oxide.

Abstract: Techniques are provided for programming a multi-level self-selecting memory cell that includes a chalcogenide material. To program one or more intermediate memory states to the self-selecting memory cell, a programming pulse sequence that includes two pulses may be used. A first pulse of the programming pulse sequence may have a first polarity and a first magnitude and the second pulse of the programming pulse sequence may have a second polarity different than the first polarity and a second magnitude different than the first magnitude. After applying both pulses in the programming pulse sequence, the self-selecting memory cell may store an intermediate state that represents two bits of data (e.g., a logic ‘01’ or a logic ‘10’).

Abstract: A thin film transistor includes an active layer over a substrate, a gate electrode over the active layer, a gate line connected with the gate electrode, and a gate insulation film between the active layer and the gate electrode. The active layer includes a channel region overlapping the gate electrode, and a drain region and a source region on respective sides of the channel region. A length of a straight line connecting the drain region and the source region by a shortest distance may be greater than a width of the gate line parallel to the straight line.

Abstract: Various embodiments of the present application are directed towards an integrated circuit comprising a resistive random-access memory (RRAM) cell with recessed bottom electrode sidewalls to mitigate the effect of sidewall plasma damage. In some embodiments, the RRAM cell includes a lower electrode, a data storage element, and an upper electrode. The lower electrode includes a pair of recessed bottom electrode sidewalls respectively on opposite sides of the lower electrode. The data storage element overlies the lower electrode and includes a pair of storage sidewalls. The storage sidewalls are respectively on the opposite sides of the lower electrode, and the recessed bottom electrode sidewalls are laterally spaced from and laterally between the storage sidewalls. The upper electrode overlies the data storage element.

Abstract: A semiconductor device having high operation frequency is provided. The semiconductor device includes a transistor including a first conductive layer, a first insulating layer, a second insulating layer, a first oxide, a second oxide, a third oxide, a third insulating layer, and a second conductive layer that are stacked in this order, and a fourth insulating layer. The first conductive layer and the second conductive layer include a region overlapping with the second oxide. In a channel width direction of the transistor, a level of the bottom surface of the second oxide is from more than or equal to ?5 nm to less than 0 nm when a level of a region of the bottom surface of the second conductive layer which does not overlap with the second oxide is regarded as a reference.

Abstract: A method for synthesizing a copper-silver alloy includes an ink preparation step, a coating step, a crystal nucleus formation step and a crystal nucleus synthesis step. In the ink preparation step, a copper salt particle, an amine-based solvent, and a silver salt particle are mixed, thereby preparing a copper-silver ink. In the coating step, a member to be coated is coated with the copper-silver ink. In the crystal nucleus formation step, at least one of a crystal nucleus of copper having a crystal grain diameter of 0.2 ?m or less and a crystal nucleus of silver having a crystal grain diameter of 0.2 ?m or less is formed from the copper-silver ink. In the crystal nucleus synthesis step, the crystal nucleus of copper and the crystal nucleus of silver are synthesized.

Abstract: The present disclosure relates to a thin film transistor and a manufacturing method thereof, a flexible display screen and a display device. The thin film transistor is disposed on a substrate. The thin film transistor includes: an active layer, a source-drain conductive layer, and a gate conductive layer. The gate conductive layer includes a gate electrode, and the gate conductive layer is disposed on one side of the active layer away from the substrate and insulated from the active layer. The source-drain conductive layer includes a first electrode and a second electrode. The orthogonal projections of the first electrode, the gate electrode, and the second electrode on the substrate are sequentially nested from inside to outside and separately disposed. The reliability of image display may be improved.

Abstract: Cross bar arrays and a method for forming cross-bar arrays are provided. The cross bar array device includes first conductive lines spaced apart and extending in a first direction in a first plane, the first conductive lines including a bottom electrode layer. Second conductive lines are spaced apart and arranged transversely to the first conductive lines in a second plane, the second conductive lines including a top electrode layer. An oxide layer formed on the bottom electrode layer of the first conductive lines and in contact with the top electrode layer of the second conductive lines such that a resistive element is formed through the oxide layer at intersection points between the first conductive lines and the second conductive lines. A multivalent oxide spacer that switches between at least two oxidative states on at least one sidewall of the oxide layer between the first plane and the second plane.

Abstract: A semiconductor device with favorable electrical characteristics, a semiconductor device with stable electrical characteristics, or a highly reliable semiconductor device or display device is provided. A first insulating layer and a first conductive layer are stacked over a first region of a first metal oxide layer. A first layer is formed in contact with a second metal oxide layer and a second region of the first metal oxide layer that is not overlapped by the first insulating layer. Heat treatment is performed to lower the resistance of the second region and the second metal oxide layer. A second insulating layer is formed. A second conductive layer electrically connected to the second region is formed over the second insulating layer. Here, the first layer is formed to contain at least one of aluminum, titanium, tantalum, and tungsten.

Abstract: A method for manufacturing an active matrix board includes (E) a step of forming a source contact hole and a drain contact hole in an interlayer insulating layer such that a portion of a source contact region of an oxide semiconductor layer and a portion of a drain contact region thereof are exposed and forming a connecting portion contact hole in the interlayer insulating layer and a lower insulating layer such that a portion of a lower conductive layer is exposed; and (F) a step of forming a source electrode, a drain electrode, and an upper conductive layer on the interlayer insulating layer; and the step (E) includes (e-1) a step of forming a photoresist film on the interlayer insulating layer and (e-2) a step of forming a photoresist layer in such a manner that the photoresist film is exposed to light using a multi-tone mask and is then developed.

Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes a first insulator, a second insulator over the first insulator, a third insulator over the second insulator, a fourth insulator and a first conductor over the third insulator, a fifth insulator over the fourth insulator and the first conductor, a first oxide over the fifth insulator, a second conductor and a third conductor over the first oxide, a second oxide over the first oxide and between the second conductor and the third conductor, a sixth insulator over the second oxide, and a fourth conductor over the sixth insulator. The hydrogen concentration of the second insulator is lower than that of the first insulator. The hydrogen concentration of the third insulator is lower than that of the second insulator.

Abstract: A method of forming an oxide film including two non-oxygen elements includes providing a first source material on a substrate, the first source material including a first central element, providing an electron donor compound to be bonded to the first source material, providing a second source material on the substrate after the providing of the electron donor compound, the second source material including a second central element, and providing an oxidant on the substrate.

Abstract: A dual-gate thin film transistor, a manufacturing method thereof, an array substrate and a display device are provided. The dual-gate thin film transistor includes: a base substrate and a first gate, a first gate insulating layer, an active layer, a second gate insulating layer, a first electrode, a second electrode, a second gate and a connection electrode, formed on the base substrate. The second gate, the first electrode and the second electrode are formed on the same level. The first gate insulating layer includes a first via hole exposing a portion of the first gate, and the connection electrode is electrically connected with the second gate and is electrically connected with the first gate through the first via hole.

Abstract: A switch includes a first electrode layer, a second electrode layer disposed over the first electrode layer, and a selecting element layer interposed between the first electrode layer and the second electrode layer. The selecting element layer includes a gas region in which a current flows or does not flow according to a voltage applied to the switch. When the current flows, the switch is in an on-state, and, when the current does not flow, the switch is in an off-state.

Abstract: Non-planar thin film transistors (TFTs) incorporating an oxide semiconductor for the channel material. Memory devices may include an array of one thin film transistor and one capacitor (1TFT-1C) memory cells. Methods for fabricating non-planar thin film transistors may include a sacrificial gate/top-gate replacement technique with self-alignment of source/drain contacts.

Abstract: A thin-film transistor is disclosed. The thin-film transistor includes an oxide semiconductor layer disposed on a substrate, a gate electrode disposed so as to overlap at least a portion of the oxide semiconductor layer and isolated from the oxide semiconductor layer, a source electrode connected to the oxide semiconductor layer, and a drain electrode connected to the oxide semiconductor layer and spaced apart from the source electrode, wherein the oxide semiconductor layer includes a first sub layer disposed on the substrate, a second sub layer disposed on the first sub layer, and a third sub layer disposed on the second sub layer, the second sub layer has larger resistance than the first sub layer and the third sub layer and lower carrier concentration than the first sub layer and the third sub layer, the first sub layer has higher hydrogen concentration than the second sub layer and the third sub layer, and each of the first sub layer and the second sub layer has crystallinity.

Abstract: A subtractive forming method that includes providing a material stack including a samarium and selenium containing layer and an aluminum containing layer in direct contact with the samarium and selenium containing layer. The samarium component of the samarium and selenium containing layer of the exposed portion of the material stack is etched with an etch chemistry comprising citric acid and hydrogen peroxide that is selective to the aluminum containing layer. The hydrogen peroxide reacts with the aluminum containing layer to provide an oxide etch protectant surface on the aluminum containing layer, and the citric acid etches samarium selectively to the oxide etch protectant surface. Thereafter, a remaining selenium component of is removed by elevating a temperature of the selenium component.

Abstract: A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes a first opening, a second opening, and a third opening which are formed by performing first etching and second etching. By the first etching, the first insulator is etched for forming the first opening, the second opening, and the third opening. By the second etching, the first metal oxide, the second insulator, the third insulator, the fourth insulator, the second metal oxide, and the fifth insulator are etched for forming the first opening; the first metal oxide, the second insulator, and the third insulator are etched for forming the second opening; and the first metal oxide is etched for forming the third opening.

Abstract: A method of creating a polymer surface with surface structures is disclosed. The method includes creating a mold, forming a metal sheet into the molds, creating a surface structure on a surface of the metal sheet by exposing the surface to laser pulses, and bringing a curable polymer to be in contact with the surface of the metal sheet containing the surface structure, curing the curable polymer, and separating the cured polymer from the metal sheet, resulting in a polymer surface containing the surface structure. The polymer surfaces with the surface structures can be hydrophobic or superhydrophobic depending on the micro and nano features contained by the surface structures.

Abstract: A semiconductor device includes a first conductor; a first insulator thereover; a first oxide thereover; a second oxide thereover; a second conductor and a third conductor that are separate from each other thereover; a third oxide over the first insulator, the second oxide, the second conductor, and the third conductor; a second insulator thereover; a fourth conductor thereover; and a third insulator over the first insulator, the second insulator, and the fourth conductor. The second oxide includes a region where the energy of the conduction band minimum of an energy band is low and a region where the energy of the conduction band minimum of the energy band is high. The energy of the conduction band minimum of the third oxide is higher than that of the region of the second oxide where the energy of the conduction band minimum is low. Side surfaces of the first oxide and the second oxide are covered with the third oxide.

Abstract: A display substrate, a method for manufacturing the same and a display device are provided. The method includes steps of forming a common electrode line, a semiconductor pattern, and a data line on a base substrate, so that the semiconductor pattern is located between the common electrode line and the data line; and irradiating the semiconductor pattern by using light in a predetermined wavelength range from a side of the base substrate distal to the semiconductor pattern, to generate a dangling-bond defect state in a band gap of the semiconductor pattern.

Abstract: An organic light emitting diode display includes a first thin film transistor of which a channel is formed in a polycrystalline transistor, a second thin film transistor of which a channel is formed in an oxide semiconductor layer, an organic light emitting diode electrically connected to the first thin film transistor, a storage capacitor having a first electrode and a second electrode, wherein the second electrode of the storage capacitor is electrically connected to a gate electrode of the first thin film transistor, and an overlapping layer overlapping the oxide semiconductor layer in a plan view and receiving a positive voltage. The oxide semiconductor layer is positioned higher than the gate electrode of the first thin film transistor and the second electrode of the storage capacitor.

Abstract: Systems and methods for reducing RRAM relaxation in crossbar array circuits for low current applications are provided. In some implementations, an apparatus comprises: a first row wire; a first column wire; an RRAM device; an access control device, wherein the RRAM device and the access control device serially connected and connecting between the first row wire and the first column wire, and wherein the RRAM device comprises: a first electrode; a first switching layer formed on the first electrode; and a second electrode formed on the first switching layer, wherein the first switching layer is doped with a first oxide material comprising SiO2, or Al2O3. The first electrode and the second electrode are, in some implementations, made of one of the following materials: Pt, Pd, Ta, Ti, Hf, W, TiN, and TaN.

Abstract: It is an object to manufacture and provide a highly reliable display device including a thin film transistor with a high aperture ratio which has stable electric characteristics. In a manufacturing method of a semiconductor device having a thin film transistor in which a semiconductor layer including a channel formation region is formed using an oxide semiconductor film, a heat treatment for reducing moisture and the like which are impurities and for improving the purity of the oxide semiconductor film (a heat treatment for dehydration or dehydrogenation) is performed. Further, an aperture ratio is improved by forming a gate electrode layer, a source electrode layer, and a drain electrode layer using conductive films having light transmitting properties.

Abstract: A high-performance semiconductor device is provided. The semiconductor device includes a transistor, an insulating film over the transistor, an electrode, and a metal oxide over the insulating film. The transistor includes a first gate electrode, a first gate insulating film over the first gate electrode, an oxide over the first gate insulating film, a source electrode and a drain electrode electrically connected to the oxide, a second gate insulating film over the oxide, and a second gate electrode over the second gate insulating film. The electrode includes a region in contact with the insulating film. The first gate insulating film is in contact with the insulating film. The thicknesses of the insulating film over the second gate electrode, the insulating film over the source electrode, and the insulating film over the drain electrode are substantially the same, and the insulating film includes excess oxygen.

Abstract: The reliability of a transistor including an oxide semiconductor can be improved by suppressing a change in electrical characteristics. A transistor included in a semiconductor device includes a first oxide semiconductor film over a first insulating film, a gate insulating film over the first oxide semiconductor film, a second oxide semiconductor film over the gate insulating film, and a second insulating film over the first oxide semiconductor film and the second oxide semiconductor film. The first oxide semiconductor film includes a channel region in contact with the gate insulating film, a source region in contact with the second insulating film, and a drain region in contact with the second insulating film. The second oxide semiconductor film has a higher carrier density than the first oxide semiconductor film.

Abstract: There have been cases where transistors formed using oxide semiconductors are inferior in reliability to transistors formed using amorphous silicon. Thus, in the present invention, a semiconductor device including a highly reliable transistor formed using an oxide semiconductor is manufactured. An oxide semiconductor film is deposited by a sputtering method, using a sputtering target including an oxide semiconductor having crystallinity, and in which the direction of the c-axis of a crystal is parallel to a normal vector of the top surface of the oxide semiconductor. The target is formed by mixing raw materials so that its composition ratio can obtain a crystal structure.

Abstract: A display substrate, a manufacturing method thereof, and a display device are provided. According to embodiments of the present disclosure, the manufacturing method of a display substrate comprises: fabricating a gate electrode, a gate electrode insulating layer, and a semiconductor active layer sequentially on a base substrate; fabricating a first etching stopping layer and a second etching stopping layer on the base substrate with the semiconductor active layer fabricated thereon, wherein the first etching stopping layer is disposed in a display area of the display substrate, the second etching stopping layer is disposed in a peripheral area of the display substrate, and the second etching stopping layer is a non-transparent layer; and fabricating source/drain electrodes by a patterning process, on the base substrate with the first and second etching stopping layers fabricated thereon, wherein the second etching stopping layer is used as an alignment marker in fabricating the source/drain electrodes.

Abstract: A first oxide semiconductor layer of a pixel TFT has a first structure in which a first source electrode and a first drain electrode have, at both end portions thereof, two types of reduction action regions formed by the first oxide semiconductor layer protruding outward in a channel width direction of a first channel portion from both the first source electrode and the first drain electrode. A second oxide semiconductor layer of a drive circuit TFT has a second structure formed without protruding outward in a channel width direction of a second channel portion from a second source electrode and a second drain electrode. A protective insulation film is provided to cover the first oxide semiconductor layer, the first source electrode, and the first drain electrode.

Abstract: The reliability of a transistor including an oxide semiconductor can be improved by suppressing a change in electrical characteristics. A transistor included in a semiconductor device includes a first oxide semiconductor film over a first insulating film, a gate insulating film over the first oxide semiconductor film, a second oxide semiconductor film over the gate insulating film, and a second insulating film over the first oxide semiconductor film and the second oxide semiconductor film. The first oxide semiconductor film includes a channel region in contact with the gate insulating film, a source region in contact with the second insulating film, and a drain region in contact with the second insulating film. The second oxide semiconductor film has a higher carrier density than the first oxide semiconductor film.

Abstract: The present disclosure provides a display panel, a manufacturing method thereof and a display device. The display panel includes an opposite substrate and a display substrate opposite each other, a sealant is disposed between the opposite substrate and the display substrate, and the display substrate may be divided into a display area and a peripheral area around the display area. The display substrate includes a first base substrate; a first resin pattern on the first base substrate in the display area; and a protection layer in the display area and the peripheral area and between the first resin pattern and the first base substrate. The sealant is in the peripheral area and in contact with a portion of the protection layer in the peripheral area.

Abstract: An opening insulation film covers a substrate and is in contact with a side surface of a gate electrode. The opening insulation film is provided with a first opening portion having a side surface on the gate electrode. A gate insulation film made of an oxide insulator is on the gate electrode and the opening insulation film. A semiconductor channel film made of an oxide semiconductor is on the gate insulation film and is encompassed by the first opening portion. Source and drain electrodes are on the semiconductor channel film. A source upper-layer electrode and a drain upper-layer electrode both made of an oxide are provided at least on upper surfaces of the source electrode and the drain electrode, respectively. An interlayer insulation film made of an oxide has a portion provided on the source upper-layer electrode and the drain upper-layer electrode and is in contact the semiconductor channel film.

Abstract: There are provided an oxide sintered material containing an In2O3 crystal phase, a Zn4In2O7 crystal phase and a ZnWO4 crystal phase, and a method of producing the oxide sintered material. The method includes forming the oxide sintered material by sintering a molded body containing In, W and Zn, and forming the oxide sintered material including placing the molded body at a first constant temperature selected from a temperature range of 500° C. or more and 1000° C. or less for 30 minutes or longer.

Abstract: In a transistor including an oxide semiconductor film, field-effect mobility and reliability are improved. A semiconductor device includes a gate electrode, an insulating film over the gate electrode, an oxide semiconductor film over the insulating film, and a pair of electrodes over the oxide semiconductor film. The oxide semiconductor film includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, and a third oxide semiconductor film over the second oxide semiconductor film. The first oxide semiconductor film, the second oxide semiconductor film, and the third oxide semiconductor film include the same elements. The second oxide semiconductor film includes a region having a higher carrier density than the first oxide semiconductor film and the third oxide semiconductor film.

Abstract: The purpose of the invention is to countermeasure a disconnection between the drain electrode or the source electrode and the wiring or the electrode formed on the insulating film via through hole. The concrete structure is that: A display device having a display area including a plurality of pixels comprising: the pixel includes a thin film transistor having a semiconductor layer as an active element, a first insulating film is formed to cover a drain electrode of the thin film transistor, the drain electrode is connected with an electrode or an wiring that are formed on the first insulating film via a through hole, an oxide semiconductor layer exists between the drain electrode and the first insulating film, the oxide semiconductor layer does not exist at the bottom of the through hole.

Abstract: A semiconductor device includes a first insulator, a transistor over the first insulator, a second insulator over the transistor, and a third insulator over the second insulator. The transistor includes an oxide semiconductor. The amount of oxygen released from the second insulator when converted into oxygen molecules is larger than or equal to 1×1014 molecules/cm2 and smaller than 1×1016 molecules/cm2 in thermal desorption spectroscopy at a surface temperature of a film of the second insulator of higher than or equal to 50° C. and lower than or equal to 500° C. The second insulator includes oxygen, nitrogen, and silicon.

Abstract: The present application discloses an array substrate having a display area and a peripheral area. The array substrate includes a plurality of first thin film transistors respectively in a plurality of subpixels in the display area; and a plurality of second thin film transistors in the peripheral area, an oxygen content in active layers of the plurality of first thin film transistors being higher than that in active layers of the plurality of second thin film transistors.