Having Metal Oxide Or Copper Sulfide Compound Semiconductor Component Patents (Class 438/104)
  • Patent number: 9203029
    Abstract: A method for producing an electronic component with at least one first electrode zone (21) and one second electrode zone (23), which are separated from one another by an insulator (9) and each comprise at least one sublayer of a first electrically conductive material. Also disclosed is an electronic component, which may be produced using the disclosed method.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: December 1, 2015
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Andrew Ingle, Tilman Schlenker, Karsten Heuser
  • Patent number: 9184245
    Abstract: To provide a highly reliable semiconductor device exhibiting stable electrical characteristics. To fabricate a highly reliable semiconductor device. Included are an oxide semiconductor stack in which a first to a third oxide semiconductor layers are stacked, a source and a drain electrode layers contacting the oxide semiconductor stack, a gate electrode layer overlapping with the oxide semiconductor layer with a gate insulating layer provided therebetween, and a first and a second oxide insulating layers between which the oxide semiconductor stack is sandwiched. The first to the third oxide semiconductor layers each contain indium, gallium, and zinc. The proportion of indium in the second oxide semiconductor layer is higher than that in each of the first and the third oxide semiconductor layers. The first and the third oxide semiconductor layers are each an amorphous semiconductor film. The second oxide semiconductor layer is a crystalline semiconductor film.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: November 10, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 9178145
    Abstract: Resistive switching memory elements are provided that may contain electroless metal electrodes and metal oxides formed from electroless metal. The resistive switching memory elements may exhibit bistability and may be used in high-density multi-layer memory integrated circuits. Electroless conductive materials such as nickel-based materials may be selectively deposited on a conductor on a silicon wafer or other suitable substrate. The electroless conductive materials can be oxidized to form a metal oxide for a resistive switching memory element. Multiple layers of conductive materials can be deposited each of which has a different oxidation rate. The differential oxidization rates of the conductive layers can be exploited to ensure that metal oxide layers of desired thicknesses are formed during fabrication.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: November 3, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Nitin Kumar, Tony P. Chiang, Chi-I Lang, Zhi-Wen Wen Sun, Jinhong Tong
  • Patent number: 9171959
    Abstract: Provided is a miniaturized transistor with stable and high electrical characteristics with high yield. In a semiconductor device including the transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer are stacked in this order, a first sidewall insulating layer is provided in contact with a side surface of the gate electrode layer, and a second sidewall insulating layer is provided to cover a side surface of the first sidewall insulating layer. The first sidewall insulating layer is an aluminum oxide film in which a crevice with an even shape is formed on its side surface. The second sidewall insulating layer is provided to cover the crevice. A source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film and the second sidewall insulating layer.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: October 27, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Motomu Kurata, Shinya Sasagawa, Taiga Muraoka, Tetsuhiro Tanaka, Junichi Koezuka
  • Patent number: 9159815
    Abstract: An object is, in a thin film transistor in which an oxide semiconductor is used as an active layer, to prevent change in composition, film quality, an interface, or the like of an oxide semiconductor region serving as an active layer, and to stabilize electrical characteristics of the thin film transistor. In a thin film transistor in which a first oxide semiconductor region is used as an active layer, a second oxide semiconductor region having lower electrical conductivity than the first oxide semiconductor region is formed between the first oxide semiconductor region and a protective insulating layer for the thin film transistor, whereby the second oxide semiconductor region serves as a protective layer for the first oxide semiconductor region; thus, change in composition or deterioration in film quality of the first oxide semiconductor region can be prevented, and electrical characteristics of the thin film transistor can be stabilized.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: October 13, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Toshinari Sasaki, Hideaki Kuwabara
  • Patent number: 9153651
    Abstract: Provided are a thin film transistor and a method for manufacturing the same. The thin film transistor manufacturing method includes forming a gate electrode on a substrate, forming an active layer that is adjacent to the gate electrode and includes an oxide semiconductor, forming an oxygen providing layer on the active layer, forming a gate dielectric between the gate electrode and the active layer, forming source and drain electrodes coupled to the active layer, forming a planarizing layer covering the gate electrode and the gate dielectric, forming a hole exposing the active layer, and performing a heat treatment process onto the planarizing layer in an atmosphere of oxygen.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: October 6, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sang Chul Lim, Ji-Young Oh, Seongdeok Ahn, Kyoung Ik Cho, Sang Seok Lee, Jae Bon Koo
  • Patent number: 9142683
    Abstract: A semiconductor device includes an oxide semiconductor layer including a channel formation region which includes an oxide semiconductor having a wide band gap and a carrier concentration which is as low as possible, and a source electrode and a drain electrode which include an oxide conductor containing hydrogen and oxygen vacancy, and a barrier layer which prevents diffusion of hydrogen and oxygen between an oxide conductive layer and the oxide semiconductor layer. The oxide conductive layer and the oxide semiconductor layer are electrically connected to each other through the barrier layer.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: September 22, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto
  • Patent number: 9136390
    Abstract: A semiconductor device which includes a thin film transistor having an oxide semiconductor layer and excellent electrical characteristics is provided. Further, a method for manufacturing a semiconductor device in which plural kinds of thin film transistors of different structures are formed over one substrate to form plural kinds of circuits and in which the number of steps is not greatly increased is provided. After a metal thin film is formed over an insulating surface, an oxide semiconductor layer is formed thereover. Then, oxidation treatment such as heat treatment is performed to oxidize the metal thin film partly or entirely. Further, structures of thin film transistors are different between a circuit in which emphasis is placed on the speed of operation, such as a logic circuit, and a matrix circuit.
    Type: Grant
    Filed: May 10, 2011
    Date of Patent: September 15, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Jun Koyama
  • Patent number: 9136115
    Abstract: An object is to manufacture a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (for dehydration or dehydrogenation) is performed to improve the purity of the oxide semiconductor film and reduce impurities including moisture or the like. After that, slow cooling is performed under an oxygen atmosphere. Besides impurities including moisture or the like exiting in the oxide semiconductor film, heat treatment causes reduction of impurities including moisture or the like exiting in a gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor and in contact therewith.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: September 15, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshinari Sasaki, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki
  • Patent number: 9130158
    Abstract: A method for etching a stack with at least one metal layer in one or more cycles is provided. An initiation step is preformed, transforming part of the at least one metal layer into metal oxide, metal halide, or lattice damaged metallic sites. A reactive step is performed providing one or more cycles, where each cycle comprises providing an organic solvent vapor to form a solvated metal, metal halide, or metal oxide state and providing an organic ligand solvent to form volatile organometallic compounds. A desorption of the volatile organometallic compounds is performed.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: September 8, 2015
    Assignee: Lam Research Corporation
    Inventors: Meihua Shen, Harmeet Singh, Samantha S. H. Tan, Jeffrey Marks, Thorsten Lill, Richard P. Janek, Wenbing Yang, Prithu Sharma
  • Patent number: 9123751
    Abstract: An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks. In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by dry etching in which an etching gas is used, and a second etching step is performed by wet etching in which an etchant is used.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: September 1, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunichi Ito, Miyuki Hosoba, Hideomi Suzawa, Shinya Sasagawa, Taiga Muraoka
  • Patent number: 9112040
    Abstract: Embodiments of the disclosed technology provide an amorphous oxide thin film transistor (TFT), a method for preparing an amorphous oxide TFT, and a display panel. The amorphous oxide thin film transistor includes: a gate electrode, a gate insulating layer, a semiconductor active layer, a source electrode and a drain electrode. The semiconductor active layer comprises a channel layer and an ohmic contact layer, and the channel layer has a greater content of oxygen than the ohmic contact layer; the channel layer contacts the gate insulating layer, and the ohmic contact layer comprises two separated ohmic contact regions, one of which contacts the source electrode and the other of which contacts the drain electrode.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: August 18, 2015
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaodi Liu, Li Sun, Haijing Chen
  • Patent number: 9105668
    Abstract: An object is to manufacture a semiconductor device including an oxide semiconductor film, which has stable electric characteristics and high reliability. A crystalline oxide semiconductor film is formed, without performing a plurality of steps, as follows: by utilizing a difference in atomic weight of plural kinds of atoms included in an oxide semiconductor target, zinc with low atomic weight is preferentially deposited on an oxide insulating film to form a seed crystal including zinc; and tin, indium, or the like with high atomic weight is deposited on the seed crystal while causing crystal growth. Further, a crystalline oxide semiconductor film is formed by causing crystal growth using a seed crystal with a hexagonal crystal structure including zinc as a nucleus, whereby a single crystal oxide semiconductor film or a substantially single crystal oxide semiconductor film is formed.
    Type: Grant
    Filed: October 7, 2014
    Date of Patent: August 11, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yusuke Nonaka, Takayuki Inoue, Masashi Tsubuku, Kengo Akimoto, Akiharu Miyanaga
  • Patent number: 9105659
    Abstract: An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: August 11, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Akiharu Miyanaga, Kengo Akimoto, Kojiro Shiraishi
  • Patent number: 9096441
    Abstract: Disclosed is a composition for forming a zinc oxide thin film, which contains an organic zinc compound as a starting material, is not ignitable, and can be easily handled. The composition for forming a zinc oxide thin film is capable of forming a transparent zinc oxide thin film which is not doped or doped with a group 3B element by being heated at 300° C. or less. Also disclosed is a method for obtaining a transparent zinc oxide thin film, which is not doped or doped with a group 3B element, using the composition. Specifically, the composition for forming a zinc oxide thin film contains a product which is obtained by partially hydrolyzing an organic zinc compound by adding water to the organic zinc compound or a solution of the organic zinc compound and a group 3B element compound. In cases when a group 3B element compound is contained, the molar ratio of the group 3B element compound to the organic zinc compound is within the range of 0.005-0.3.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: August 4, 2015
    Assignee: TOSOH FINECHEM CORPORATION
    Inventors: Koichiro Inaba, Kouji Toyota, Kenichi Haga, Kouichi Tokudome
  • Patent number: 9099178
    Abstract: This invention belongs to the technical field of memories and specifically relates to a resistive random access memory structure with an electric-field strengthened layer and a manufacturing method thereof. The resistive random access memory in the present invention can include a top electrode, a bottom electrode and a composite layer which is placed between the top electrode and the bottom electrode and have a first resistive switching layer and a second resistive switching and electric-field strengthened layer; the second resistive switching and electric-field strengthened layer cab be adjacent to the first resistive switching layer and have a dielectric constant lower than that of the first resistive switching layer. The electric-field distribution in the RRAM unit is adjustable.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: August 4, 2015
    Assignee: Fudan University
    Inventors: Wei Zhang, Lin Chen, Peng Zhou, Qingqing Sun, Pengfei Wang
  • Patent number: 9093427
    Abstract: A method for fabricating a semiconductor device is disclosed in the present invention. The abovementioned method comprises the following steps. Firstly, a gate is formed on a substrate. A gate insulating layer is then formed on the gate, and further an active layer is disposed on the gate insulating layer, wherein the active layer is composed of a microwave absorbing material. Source/drain is defined on the active layer to form the semiconductor device, and a microwave annealing process is finally performed thereon.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: July 28, 2015
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Po-Tsun Liu, Li-Feng Teng, Yuan-Jou Lo, Yao-Jen Lee
  • Patent number: 9093262
    Abstract: An object is to provide a semiconductor device having stable electric characteristics in which an oxide semiconductor is used. An oxide semiconductor layer is subjected to heat treatment for dehydration or dehydrogenation treatment in a nitrogen gas or an inert gas atmosphere such as a rare gas (e.g., argon or helium) or under reduced pressure and to a cooling step for treatment for supplying oxygen in an atmosphere of oxygen, an atmosphere of oxygen and nitrogen, or the air (having a dew point of preferably lower than or equal to ?40° C., still preferably lower than or equal to ?50° C.) atmosphere. The oxide semiconductor layer is thus highly purified, whereby an i-type oxide semiconductor layer is formed. A semiconductor device including a thin film transistor having the oxide semiconductor layer is manufactured.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: July 28, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Miyuki Hosoba, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki
  • Patent number: 9087907
    Abstract: According to example embodiments, a thin film transistor (TFT) includes a channel layer including zinc, nitrogen, and oxygen; an etch stop layer on the channel layer; source and drain electrodes respectively contacting both ends of the channel layer; a gate electrode corresponding to the channel layer; and a gate insulating layer between the channel layer and the gate electrode. The etch stop layer includes fluorine. The channel layer may be on the gate electrode.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: July 21, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-suk Kim, Sun-jae Kim, Tae-sang Kim, Myung-kwan Ryu, Joon-seok Park, Kyoung-seok Son
  • Patent number: 9087745
    Abstract: It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.
    Type: Grant
    Filed: January 9, 2012
    Date of Patent: July 21, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Kengo Akimoto, Kojiro Shiraishi
  • Patent number: 9082858
    Abstract: The band tail state and defects in the band gap are reduced as much as possible, whereby optical absorption of energy which is in the vicinity of the band gap or less than or equal to the band gap is reduced. In that case, not by merely optimizing conditions of manufacturing an oxide semiconductor film, but by making an oxide semiconductor to be a substantially intrinsic semiconductor or extremely close to an intrinsic semiconductor, defects on which irradiation light acts are reduced and the effect of light irradiation is reduced essentially. That is, even in the case where light with a wavelength of 350 nm is delivered at 1×1013 photons/cm2·sec, a channel region of a transistor is formed using an oxide semiconductor, in which the absolute value of the amount of the variation in the threshold voltage is less than or equal to 0.65 V.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: July 14, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Tsubuku, Kosei Noda
  • Patent number: 9082794
    Abstract: A method is provided for fabricating a thin film transistor. An insulating and a metal gate contact layer are deposited on a substrate with the insulating layer being positioned between the gate contact layer and the substrate. A portion of the gate contact layer is selectively removed utilizing reactive ion etching incorporating a gas that etches the gate contact layer but not the insulating layer. A plurality of layers is deposited over a remaining portion of the gate contact layer and insulating layer, which include a gate insulating layer, a channel layer, and a metal film. A portion of the metal film is selectively removed utilizing reactive ion etching incorporating the gas that etches the metal film but not the channel layer. The insulating layer includes a high resistivity insulator that can be deposited at temperatures less than 400° C. and the channel layer is comprised of a metal oxide semiconductor.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: July 14, 2015
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Burhan Bayraktaroglu, Kevin D Leedy
  • Patent number: 9076871
    Abstract: One embodiment of the present invention is a material which is suitable for a semiconductor included in a transistor, a diode, or the like. One embodiment of the present invention is an oxide material represented as InM1XM2(1-X)ZnYOZ (0<X<1, 0<Y<1, and Z<1), where M1 is an element belonging to Group 13 and preferably Ga, and M2 is an element belonging to Group 4 or 14. Typically, the content of M2 is arranged to be greater than or equal to 1 atomic % and less than 50 atomic % of that of M1. Generation of oxygen vacancies can be suppressed in an oxide semiconductor material having the above composition. It is also possible to further improve reliability of a transistor with the oxide semiconductor material with the above composition by compensating oxygen vacancies with excessive oxygen.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: July 7, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Daisuke Matsubayashi
  • Patent number: 9076647
    Abstract: A method of forming an oxide layer. The method includes: forming a layer of reaction-inhibiting functional groups on a surface of a substrate; forming a layer of precursors of a metal or a semiconductor on the layer of the reaction-inhibiting functional groups; and oxidizing the precursors of the metal or the semiconductor in order to obtain a layer of a metal oxide or a semiconductor oxide. According to the method, an oxide layer having a high thickness uniformity may be formed and a semiconductor device having excellent electrical characteristics may be manufactured.
    Type: Grant
    Filed: April 28, 2012
    Date of Patent: July 7, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Suk-jin Chung, Youn-soo Kim, Cha-young Yoo, Jong-cheol Lee, Sang-yeol Kang
  • Patent number: 9064791
    Abstract: A method for producing a p-type ZnO based compound semiconductor layer including the steps of (a) supplying (i) Zn, (ii) O, (iii) optional Mg, and (iv) a Group 11 element which is Cu and/or Ag to form a MgxZn1-xO (0?x?0.6) single crystal film doped with the Group 11 element; (b) supplying at least one Group 13 element selected from the group consisting of B, Ga, Al, and In on the MgxZn1-xO (0?x?0.6) single crystal film; (c) alternately carrying out the steps (a) and (b) to form a laminate structure; and (d) annealing the laminate structure to form a p-type MgxZn1-xO (0?x?0.6) layer co-doped with the Group 11 element and the Group 13 element.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: June 23, 2015
    Assignee: STANLEY ELECTRIC CO., LTD.
    Inventors: Chizu Saito, Hiroyuki Kato, Michihiro Sano
  • Patent number: 9064907
    Abstract: A highly reliable semiconductor device which includes a transistor including an oxide semiconductor is provided. In the semiconductor device including a bottom-gate transistor including an oxide semiconductor layer, a stacked layer of an insulating layer and an aluminum film is provided in contact with the oxide semiconductor layer. Oxygen doping treatment is performed in such a manner that oxygen is introduced to the insulating layer and the aluminum film from a position above the aluminum film, whereby a region containing oxygen in excess of the stoichiometric composition is formed in the insulating layer, and the aluminum film is oxidized to form an aluminum oxide film.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: June 23, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 9064790
    Abstract: A method for producing a p-type ZnO based compound semiconductor layer is provided. The method comprises the steps of (a) preparing an n-type single crystal ZnO based compound semiconductor structure containing a Group 11 element which is Cu and/or Ag and at least one Group 13 element selected from the group consisting of B, Ga, Al, and In, and (b) annealing the n-type single crystal ZnO based compound semiconductor structure to form the p-type ZnO based compound semiconductor layer co-doped with the Group 11 element and the Group 13 element.
    Type: Grant
    Filed: July 23, 2013
    Date of Patent: June 23, 2015
    Assignee: STANLEY ELECTRIC CO., LTD.
    Inventors: Chizu Saito, Hiroyuki Kato, Michihiro Sano
  • Patent number: 9054137
    Abstract: An object is to manufacture a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (for dehydration or dehydrogenation) is performed to improve the purity of the oxide semiconductor film and reduce impurities including moisture or the like. After that, slow cooling is performed under an oxygen atmosphere. Besides impurities including moisture or the like exiting in the oxide semiconductor film, heat treatment causes reduction of impurities including moisture or the like exiting in a gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor and in contact therewith.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: June 9, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshinari Sasaki, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki
  • Publication number: 20150144941
    Abstract: Disclosed is a display substrate including a driving unit on a substrate comprising a first thin film transistor and a display unit on the substrate being adjacent to the driving unit and comprising a second thin film transistor.
    Type: Application
    Filed: October 10, 2014
    Publication date: May 28, 2015
    Inventors: Masataka KANO, Sang-Ho PARK, So-Young KOO, Myoung-Hwa KIM, Yeon-Hong KIM, Jung-Hun NOH, Jun-Hyung LIM, Sang-Hee JANG
  • Publication number: 20150144939
    Abstract: A thin film transistor array panel includes: a gate line including a gate electrode; a first gate insulating layer on the gate line; a semiconductor layer on the first gate insulating layer and overlapping the gate electrode; a second gate insulating layer on the semiconductor layer and the first gate insulating layer, and an opening in the second gate insulating layer and through which the semiconductor layer is exposed; drain and source electrodes on the second gate insulating and semiconductor layers and facing each other; a first field generating electrode; and a second field generating electrode connected to the drain electrode. The semiconductor layer includes an oxide semiconductor layer, and first and second auxiliary layers on the oxide semiconductor layer and separated from each other. An edge of the drain and source electrodes is disposed inside an edge of the first and second auxiliary layers, respectively.
    Type: Application
    Filed: May 30, 2014
    Publication date: May 28, 2015
    Applicant: Samsung Display Co., Ltd.
    Inventors: Young Joo CHOI, Joon Geol KIM, Seung-Ho JUNG, Kang Moon JO
  • Publication number: 20150144857
    Abstract: In fabricating a memory device, a first electrode is provided. An alloy is formed thereon, and the alloy is oxidized to provide an oxide layer. A second electrode is provided on the oxide layer. In a further method of fabricating a memory device, a first electrode is provided. Oxide is provided on the first electrode, and an implantation step in undertaken to implant material in the oxide to form a layer including oxide and implanted material having an oxygen deficiency and/or defects therein. A second electrode is the formed on the layer.
    Type: Application
    Filed: February 2, 2015
    Publication date: May 28, 2015
    Inventors: Matthew BUYNOSKI, Seungmoo CHOI, Chakravarthy GOPALAN, Dongxiang LIAO, Christie MARRIAN
  • Patent number: 9040396
    Abstract: An object is to provide a technique by which a semiconductor device including a high-performance and high-reliable transistor is manufactured. A protective conductive film which protects an oxide semiconductor layer when a wiring layer is formed from a conductive layer is formed between the oxide semiconductor layer and the conductive layer, and an etching process having two steps is performed. In a first etching step, an etching is performed under conditions that the protective conductive film is less etched than the conductive layer and the etching selectivity of the conductive layer to the protective conductive film is high. In a second etching step, etching is performed under conditions that the protective conductive film is more easily etched than the oxide semiconductor layer and the etching selectivity of the protective conductive film to the oxide semiconductor layer is high.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: May 26, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masami Jintyou, Yamato Aihara, Katsuaki Tochibayashi, Toru Arakawa
  • Patent number: 9040982
    Abstract: An electrical device with light-responsive layers is disclosed. One or more electrically conducting stripes, each insulated from each other, are deposited on a smooth surface of a substrate. Then metal oxide layers, separated by a composite diffusion layer, are deposited. On top of the topmost metal oxide layer another set of elongated conductive strips are disposed in contact with the topmost metal oxide layer such that junctions are formed wherever the top and bottom conducting stripes cross. The resulting device is light responsive only when a certain sign of bias voltage is applied and may be used as a photodetector. An advantage that may be realized in the practice of some disclosed embodiments of the device is that this device may be formed without the use of conventional patterning, thereby significantly reducing manufacturing difficulty.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: May 26, 2015
    Assignee: Research Foundation of the City University of New York
    Inventor: Fred J. Cadieu
  • Patent number: 9041157
    Abstract: An electrically actuated device comprises an active region disposed between a first electrode and a second electrode, a substantially nonrandom distribution of dopant initiators at an interface between the active region and the first electrode, and a substantially nonrandom distribution of dopants in a portion of the active region adjacent to the interface.
    Type: Grant
    Filed: January 14, 2009
    Date of Patent: May 26, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Wei Wu, Sagi Varghese Mathai, Shih-Yuan (SY) Wang, Jianhua Yang
  • Patent number: 9040344
    Abstract: A method for fabricating array substrate, an array substrate and a display device. The method for fabricating the array substrate comprises forming a thin film transistor, a first transparent electrode (14) and a second transparent electrode (19), wherein a multi dimensional electric field is created by the first transparent electrode (17) and the second transparent electrode (19), wherein forming the first transparent electrode (17) comprises: forming a metal oxide film presenting semiconductor properties; forming the first transparent electrode (17) by subjecting a portion of the metal oxide film to metallization treatment, and forming a semiconductor active layer (141) from a portion which is not subjected to the metallization treatment.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: May 26, 2015
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Seungjin Choi, Heecheol Kim, Youngsuk Song, Seongyeol Yoo
  • Publication number: 20150140734
    Abstract: To provide a highly reliable semiconductor device which includes a transistor including an oxide semiconductor, in a semiconductor device including a staggered transistor having a bottom-gate structure provided over a glass substrate, a gate insulating film in which a first gate insulating film and a second gate insulating film, whose compositions are different from each other, are stacked in this order is provided over a gate electrode layer. Alternatively, in a staggered transistor having a bottom-gate structure, a protective insulating film is provided between a glass substrate and a gate electrode layer. A metal element contained in the glass substrate has a concentration lower than or equal to 5×1018 atoms/cm3 at the interface between the first gate insulating film and the second gate insulating film or the interface between the gate electrode layer and a gate insulating film.
    Type: Application
    Filed: December 30, 2014
    Publication date: May 21, 2015
    Inventors: Takayuki CHO, Shunsuke KOSHIOKA, Masatoshi YOKOYAMA, Shunpei YAMAZAKI
  • Publication number: 20150137113
    Abstract: A method of fabricating a high mobility semiconductor metal oxide thin film transistor including the steps of depositing a layer of semiconductor metal oxide material, depositing a blanket layer of etch-stop material on the layer of MO material, and patterning a layer of source/drain metal on the blanket layer of etch-stop material including etching the layer of source/drain metal into source/drain terminals positioned to define a channel area in the semiconductor metal oxide layer. The etch-stop material being electrically conductive in a direction perpendicular to the plane of the blanket layer at least under the source/drain terminals to provide electrical contact between each of the source/drain terminals and the layer of semiconductor metal oxide material. The etch-stop material is also chemical robust to protect the layer of semiconductor metal oxide channel material during the etching process.
    Type: Application
    Filed: November 15, 2013
    Publication date: May 21, 2015
    Inventors: Gang Yu, Chan-Long Shieh, Juergen Musolf, Fatt Foong, Tian Xiao
  • Publication number: 20150140699
    Abstract: A method of forming an oxide semiconductor device may be provided. In the method, a substrate comprising a first major surface and a second major surface that faces away from the first major surface may be provided. An oxide semiconductor device may be formed over the first major surface to provide an intermediate device, and the semiconductor device may comprise an oxide active layer. The intermediate device may be subjected to ultraviolet (UV) light (e.g., ultraviolet ray irradiation process) for a first period, and subjected to heat (e.g., thermal treatment process) for a second period. The first and second periods may at least partly overlap.
    Type: Application
    Filed: August 8, 2014
    Publication date: May 21, 2015
    Inventors: Yeon-Hong Kim, Byung-Du AHN, Hyeon-Sik KIM, Yeon-Gon MO, Ji-Hun LIM, Hyun-Jae KIM
  • Publication number: 20150140730
    Abstract: A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used. In a transistor using an oxide semiconductor film for an active layer, a microvoid is provided in a source region and a drain region adjacent to a channel region. By providing a microvoid in the source region and the drain region formed in an oxide semiconductor film, hydrogen contained in the channel region of an oxide semiconductor film can be captured in the microvoid.
    Type: Application
    Filed: December 15, 2014
    Publication date: May 21, 2015
    Inventors: Junichi KOEZUKA, Yuichi SATO, Shinji OHNO
  • Publication number: 20150140733
    Abstract: To provide a semiconductor device including an oxide semiconductor which is capable of having stable electric characteristics and achieving high reliability, by a dehydration or dehydrogenation treatment performed on a base insulating layer provided in contact with an oxide semiconductor layer, the water and hydrogen contents of the base insulating layer can be decreased, and by an oxygen doping treatment subsequently performed, oxygen which can be eliminated together with the water and hydrogen is supplied to the base insulating layer. By formation of the oxide semiconductor layer in contact with the base insulating layer whose water and hydrogen contents are decreased and whose oxygen content is increased, oxygen can be supplied to the oxide semiconductor layer while entry of the water and hydrogen into the oxide semiconductor layer is suppressed.
    Type: Application
    Filed: December 26, 2014
    Publication date: May 21, 2015
    Inventors: Naoto YAMADE, Junichi KOEZUKA, Miki SUZUKI, Yuichi SATO
  • Publication number: 20150140732
    Abstract: It is an object to drive a semiconductor device at high speed or to improve the reliability of the semiconductor device. In a method for manufacturing the semiconductor device, in which a gate electrode is formed over a substrate with an insulating property, a gate insulating film is formed over the gate electrode, and an oxide semiconductor film is formed over the gate insulating film, the gate insulating film is formed by deposition treatment using high-density plasma. Accordingly, dangling bonds in the gate insulating film are reduced and the quality of the interface between the gate insulating film and the oxide semiconductor is improved.
    Type: Application
    Filed: December 22, 2014
    Publication date: May 21, 2015
    Inventors: Mitsuhiro ICHIJO, Tetsuhiro TANAKA, Seiji YASUMOTO, Shun MASHIRO, Yoshiaki OIKAWA, Kenichi OKAZAKI
  • Publication number: 20150137123
    Abstract: In the transistor including an oxide semiconductor film, which includes a film for capturing hydrogen from the oxide semiconductor film (a hydrogen capture film) and a film for diffusing hydrogen (a hydrogen permeable film), hydrogen is transferred from the oxide semiconductor film to the hydrogen capture film through the hydrogen permeable film by heat treatment. Specifically, a base film or a protective film of the transistor including an oxide semiconductor film has a stacked-layer structure of the hydrogen capture film and the hydrogen permeable film. At this time, the hydrogen permeable film is formed on a side which is in contact with the oxide semiconductor film. After that, hydrogen released from the oxide semiconductor film is transferred to the hydrogen capture film through the hydrogen permeable film by the heat treatment.
    Type: Application
    Filed: January 22, 2015
    Publication date: May 21, 2015
    Inventors: Yuki IMOTO, Tetsunori MARUYAMA, Yuta ENDO
  • Publication number: 20150140731
    Abstract: To improve productivity of a transistor that includes an oxide semiconductor and has good electrical characteristics. In a top-gate transistor including a gate insulating film and a gate electrode over an oxide semiconductor film, a metal film is formed over the oxide semiconductor film, oxygen is added to the metal film to form a metal oxide film, and the metal oxide film is used as a gate insulating film. After an oxide insulating film is formed over the oxide semiconductor film, a metal film may be formed over the oxide insulating film. Oxygen is added to the metal film to form a metal oxide film and added also to the oxide semiconductor film or the oxide insulating film.
    Type: Application
    Filed: December 22, 2014
    Publication date: May 21, 2015
    Inventors: Atsuo ISOBE, Kunio HOSOYA
  • Publication number: 20150137114
    Abstract: According to one embodiment of the present invention, an electronic device includes: a carbon layer including graphene, a thin film layer formed on the carbon layer, a channel layer formed on the thin film layer, a current cutoff layer formed between the thin film layer and the channel layer so as to cut off the flow of current between the thin film layer and the channel layer, and a source electrode and a drain electrode formed on the channel layer.
    Type: Application
    Filed: August 31, 2012
    Publication date: May 21, 2015
    Applicant: SNU R&DB FOUNDATION
    Inventors: Gyuchul Yi, Chulho Lee
  • Publication number: 20150137112
    Abstract: The present invention provides a method for manufacturing a thin-film transistor and a thin-film transistor manufactured with same. The method includes (1) providing a substrate; (2) forming a first metal layer on the substrate and applying a masking operation to form a gate terminal; (3) forming a gate insulation layer on the gate terminal; (4) forming an oxide semiconductor layer on the gate insulation layer and forming a second metal layer on the oxide semiconductor layer, wherein the second metal layer includes a titanium layer formed on the oxide semiconductor layer and a copper layer formed on the titanium layer and is subjected to a masking operation to form a data line and source/drain terminal; and (5) forming a transparent conductive layer on the second metal layer and applying a masking operation to patternize the transparent conductive layer to form the thin-film transistor.
    Type: Application
    Filed: October 12, 2012
    Publication date: May 21, 2015
    Applicant: Shenzhen China Star Optoelectronics Technology Co., LTD.
    Inventors: Yangling Cheng, Hsiangchih Hsiao
  • Publication number: 20150137115
    Abstract: The present disclosure provides a solution for a metal oxide semiconductor thin film, including metal hydroxides dissolved in an aqueous or nonaqueous solvent and an acid/base titrant for controlling solubility of metal hydroxides. A solution is synthesized to improve stability and semiconductive performance of a device through addition of other metal hydroxides. The solution is applied on a substrate and annealed by using various annealing apparatuses to obtain a high-quality metal oxide thin film at low temperatures. The thin film is optically transparent, and thus can be applied to thin films for various electronic devices, solar cells, various sensors, memory devices, and the like.
    Type: Application
    Filed: March 4, 2011
    Publication date: May 21, 2015
    Applicant: Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Jooho Moon, Youngmin Jeong, Tae Hwan Jun, Keun Kyu Song, Areum Kim, Yangho Jung
  • Patent number: 9035296
    Abstract: A thin film transistor includes a semiconductor layer disposed on a base substrate and including an oxide semiconductor material, a source electrode and a drain electrode, which respectively extend from opposing ends of the semiconductor layer, a plurality of low carrier concentration areas respectively disposed between the source electrode and the semiconductor layer and between the drain electrode and the semiconductor layer, a gate insulating layer disposed on the semiconductor layer, and a gate electrode disposed on the gate insulating layer.
    Type: Grant
    Filed: May 14, 2013
    Date of Patent: May 19, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Seohong Jung, Sun Hee Lee, Seung-Hwan Cho, Myounggeun Cha, Yoonho Khang, Youngki Shin
  • Patent number: 9035305
    Abstract: Reducing hydrogen concentration in a channel formation region of an oxide semiconductor is important in stabilizing threshold voltage of a transistor including an oxide semiconductor and improving reliability. Hence, hydrogen is attracted from the oxide semiconductor and trapped in a region of an insulating film which overlaps with a source region and a drain region of the oxide semiconductor. Impurities such as argon, nitrogen, carbon, phosphorus, or boron are added to the region of the insulating film which overlaps with the source region and the drain region of the oxide semiconductor, thereby generating a defect. Hydrogen in the oxide semiconductor is attracted to the defect in the insulating film. The defect in the insulating film is stabilized by the presence of hydrogen.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: May 19, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Tsubuku, Yusuke Nonaka, Noritaka Ishihara, Masashi Oota, Hideyuki Kishida
  • Patent number: 9034691
    Abstract: A thin film transistor, a thin film transistor array panel including the same, and a method of manufacturing the same are provided, wherein the thin film transistor includes a channel region including an oxide semiconductor, a source region and a drain region connected to the channel region and facing each other at both sides with respect to the channel region, an insulating layer positioned on the channel region, and a gate electrode positioned on the insulating layer, wherein an edge boundary of the gate electrode and an edge boundary of the channel region are substantially aligned.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: May 19, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yong Su Lee, Yoon Ho Khang, Dong Jo Kim, Hyun Jae Na, Sang Ho Park, Se Hwan Yu, Chong Sup Chang
  • Patent number: 9035297
    Abstract: A thin-film transistor includes a metal electrode and a zinc oxide-based barrier film that blocks a material from diffusing out of the metal electrode. The zinc oxide-based barrier film is made of zinc oxide doped with indium oxide, the content of the indium oxide ranging, by weight, 1 to 50 percent of the zinc oxide-based barrier film. A zinc oxide-based sputtering target for deposition of a barrier film of a thin-film transistor is made of zinc oxide doped with indium oxide, the content of the indium oxide ranging, by weight, 1 to 50 percent of the zinc oxide-based sputtering target.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: May 19, 2015
    Assignees: SAMSUNG CORNING PRECISION MATERIALS CO., LTD., SAMSUNG DISPLAY CO., LTD., SAMSUNG CORNING ADVANCED GLASS, LLC
    Inventors: Jaewoo Park, Yoon Gyu Lee, Do-Hyun Kim, Dongjo Kim, Juok Park, Insung Sohn, Sangwon Yoon, Gunhyo Lee, Yongjin Lee, Woo-Seok Jeon