Having Metal Oxide Or Copper Sulfide Compound Semiconductor Component Patents (Class 438/104)
  • Patent number: 9768314
    Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve electrical characteristics of and reliability in the semiconductor device including an oxide semiconductor film. A method for manufacturing a semiconductor device includes the steps of forming a gate electrode and a gate insulating film over a substrate, forming an oxide semiconductor film over the gate insulating film, forming a pair of electrodes over the oxide semiconductor film, forming a first oxide insulating film over the oxide semiconductor film and the pair of electrodes by a plasma CVD method in which a film formation temperature is 280° C. or higher and 400° C. or lower, forming a second oxide insulating film over the first oxide insulating film, and performing heat treatment at a temperature of 150° C. to 400° C. inclusive, preferably 300° C. to 400° C. inclusive, further preferably 320° C. to 370° C. inclusive.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: September 19, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Yukinori Shima, Suzunosuke Hiraishi, Kenichi Okazaki
  • Patent number: 9768317
    Abstract: Provided is a semiconductor device which can suppress an increase in oxygen vacancies in an oxide semiconductor layer and a manufacturing method of the semiconductor device. The semiconductor device includes a first oxide semiconductor layer over the first insulating layer; a second oxide semiconductor layer over the first oxide semiconductor layer; a third oxide semiconductor layer over the second oxide semiconductor layer; a source electrode layer and a drain electrode layer each over the third oxide semiconductor layer; a fourth semiconductor layer over the source and drain electrode layers, and the third oxide semiconductor layer; a gate insulating layer over the fourth oxide semiconductor layer; a gate electrode layer over the gate electrode layer and overlapping with the source and drain electrode layers, and the fourth oxide semiconductor layer; and a second insulating layer over the first insulating layer, and the source, gate, and drain electrode layers.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: September 19, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daigo Ito, Takahisa Ishiyama, Kazuya Hanaoka
  • Patent number: 9741588
    Abstract: A method of manufacturing a thin-film transistor substrate which includes a thin-film transistor includes: forming a planarization layer comprising polyimide material above the thin-film transistor; and heating the thin-film transistor at a temperature of 240° C. or lower after the planarization layer is formed.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: August 22, 2017
    Assignee: JOLED INC.
    Inventors: Yuji Kishida, Toshiaki Yoshitani
  • Patent number: 9722088
    Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.
    Type: Grant
    Filed: May 14, 2014
    Date of Patent: August 1, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kazuya Hanaoka, Daisuke Matsubayashi, Yoshiyuki Kobayashi, Shunpei Yamazaki, Shinpei Matsuda
  • Patent number: 9722049
    Abstract: Embodiments described herein provide method for forming crystalline indium-gallium-zinc oxide (IGZO). A substrate is provided. A seed layer is formed above the substrate. The seed layer has a crystalline structure that is substantially dominant along the c-axis. An IGZO layer is formed above the seed layer. The seed layer may include zinc oxide. A stack of alternating seed layers and IGZO layers may be formed.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: August 1, 2017
    Assignees: Intermolecular, Inc., LG Display Co., Ltd.
    Inventors: Sang Lee, Khaled Ahmed, Youn-Gyoung Chang, Min-Cheol Kim, Minh Huu Le, Kwon-Sik Park, Woosup Shin
  • Patent number: 9716003
    Abstract: Provided are an oxide semiconductor layer in which the number of defects is reduced and a highly reliable semiconductor device including the oxide semiconductor. A first oxide semiconductor layer containing a single metal element as a constituent element is formed over a substrate by a thermal chemical vapor deposition method. A second oxide semiconductor layer containing two or more metal elements as constituent elements is formed successively after the first oxide semiconductor layer is formed. The second oxide semiconductor layer is formed by epitaxial growth using the first oxide semiconductor layer as a seed crystal. A channel is formed in the second oxide semiconductor layer.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: July 25, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 9716118
    Abstract: A thin film transistor (TFT) located on a thin film transistor substrate includes a first insulating film formed so as to cover a gate electrode, a channel layer that is formed at a position on the first insulating film overlapping the gate electrode and formed of an oxide semiconductor, a second insulating film formed on the channel layer, and a third insulating film formed so as to cover the second insulating film. A source electrode and a drain electrode are formed on the third insulating film. Each of the source electrode and the drain electrode is connected to the channel layer through the corresponding one of contact holes penetrating the second insulating film and the third insulating film.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: July 25, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Ken Imamura, Kazushi Yamayoshi, Kazunori Inoue
  • Patent number: 9708710
    Abstract: Methods for providing one or more coating layers on a surface of a substrate by successive surface reactions of at least a first and second precursor are provided. The methods generally include supplying the first precursor from a first precursor nozzle and the second precursor from a second precursor nozzle to the surface of the substrate, and moving the substrate relative to at least one of the first and second precursor nozzle. The methods can further include subjecting only one or more first limited sub-areas of the surface of the substrate to the first and second precursor by cooperation of supplying the first and second precursor and simultaneously moving the substrate relative to at least one of the first and second precursor nozzle.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: July 18, 2017
    Assignee: BENEQ OY
    Inventors: Tapani Alasaarela, Pekka Soininen
  • Patent number: 9691979
    Abstract: A resistive random access memory includes a first electrode layer, a second electrode layer, and a stacked structure disposed between the first electrode layer and the second electrode layer. The stacked structure includes a conductive layer and a resistance variable layer. The material of the conductive layer includes HfOx, the material of the resistance variable layer includes HfOy, and x<y. Additionally, the diffusion rate of oxygen ions in the conductive layer is lower than the diffusion rate of the oxygen ions in metal.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: June 27, 2017
    Assignee: Winbond Electronics Corp.
    Inventors: Shuo-Che Chang, Chia-Hua Ho
  • Patent number: 9685610
    Abstract: A method for producing a resistive random access memory includes preparing a first metal layer and sputtering a resistive switching layer on the first metal layer. Surface treatment is conducted on the resistive switching layer by using a plasma containing mobile ions to dope the mobile ions into the resistive switching layer. The polarity of the mobile ions is opposite to the polarity of oxygen ions. Then, a second metal layer is sputtered on the resistive switching layer.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: June 20, 2017
    Assignee: NATIONAL SUN YAT-SEN UNIVERSITY
    Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Tian-Jian Chu, Chih-Hung Pan
  • Patent number: 9685546
    Abstract: A semiconductor device of an embodiment includes a first layer, a second layer provided on the first layer, the second layer forming a two-dimensional electron gas in the first layer; a source electrode provided on the second layer, a drain electrode provided on the second layer, a gate electrode provided between the source electrode and the drain electrode on the second layer and a first insulating layer provided between the gate electrode and the drain electrode on the second layer. The first insulating layer includes a first film, a second film having a higher oxygen density than the first film and a first region provided between the first film and the second film. The first region contains at least one first element selected from the group consisting of F, H, and D, the first region having a first peak of concentration of the first element.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: June 20, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo Shimizu, Hisashi Saito
  • Patent number: 9660103
    Abstract: This thin film transistor comprises, on a substrate, at least a gate electrode, a gate insulating film, an oxide semiconductor layer, a source-drain electrode, and two or more protective films. The oxide semiconductor layer comprises Sn, O and one or more elements selected from the group consisting of In, Ga and Zn. In addition, the two or more protective films are composed of at least a first protective film that is in contact with the oxide semiconductor film, and one or more second protective films other than the first protective film. The first protective film is a SiOx film having a hydrogen concentration of 3.5 atomic % or lower.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: May 23, 2017
    Assignee: Kobe Steel, Ltd.
    Inventors: Mototaka Ochi, Shinya Morita, Yasuyuki Takanashi, Hiroshi Goto, Toshihiro Kugimiya
  • Patent number: 9653482
    Abstract: A display panel comprises a TFT substrate and a display medium layer. The display medium layer is disposed on the TFT substrate. The TFT substrate comprises a TFT and a substrate. The TFT is disposed on the substrate and comprises a gate, a metal oxide layer, a source, a drain and a protection layer. The gate is disposed corresponding to the metal oxide layer. The protection layer is disposed on the metal oxide layer. Each of the source and the drain contacts the metal oxide layer through an opening of the protection layer. One side of the gate or one side of the metal oxide layer partially overlaps at least one of the openings. In addition, a display device is also disclosed.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: May 16, 2017
    Assignee: Innolux Corporation
    Inventors: Hui-Min Huang, Hsin-Hung Lin, Li-Wei Sung
  • Patent number: 9627414
    Abstract: The present invention provides a metallic oxide thin film transistor and its manufacturing method, an array substrate and its manufacturing method, as well as a display device, which is belong to the field of thin film transistor manufacturing technology. The method for manufacturing the metallic oxide thin film transistor comprises a step of forming patterns of an oxide active layer and an etch stopping layer through a one-time patterning process.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: April 18, 2017
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lei Zhao, Wei Guo
  • Patent number: 9614104
    Abstract: The present invention provides a co-planar oxide semiconductor TFT substrate structure and a manufacture method thereof. In the co-planar oxide semiconductor TFT substrate structure, the active layer comprises a main body and a plurality of short channels connected to the main body, and the plurality of short channels are separated with the plurality of strip metal electrodes to make the active layer possess higher mobility and lower leak current. Thus, the performance of the TFT element can be improved. The present invention provides a manufacture method of a co-planar oxide semiconductor TFT substrate structure. With forming the plurality of strip metal electrodes between the source and the drain, which are separately positioned, as deposing the oxide semiconductor layer, the plurality of short channels can be formed between the source and the drain. The method is simple and does not require additional mask or process to obtain the active layer structure different from prior art.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: April 4, 2017
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Xiaowen Lv, Chihyuan Tseng
  • Patent number: 9608121
    Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve electrical characteristics of and reliability in the semiconductor device including an oxide semiconductor film. A method for manufacturing a semiconductor device includes the steps of forming a gate electrode and a gate insulating film over a substrate, forming an oxide semiconductor film over the gate insulating film, forming a pair of electrodes over the oxide semiconductor film, forming a first oxide insulating film over the oxide semiconductor film and the pair of electrodes by a plasma CVD method in which a film formation temperature is 280° C. or higher and 400° C. or lower, forming a second oxide insulating film over the first oxide insulating film, and performing heat treatment at a temperature of 150° C. to 400° C. inclusive, preferably 300° C. to 400° C. inclusive, further preferably 320° C. to 370° C. inclusive.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: March 28, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Yukinori Shima, Suzunosuke Hiraishi, Kenichi Okazaki
  • Patent number: 9570594
    Abstract: A semiconductor device which is miniaturized while favorable characteristics thereof are maintained is provided. In addition, the miniaturized semiconductor device is provided with a high yield. The semiconductor device has a structure including an oxide semiconductor film provided over a substrate having an insulating surface; a source electrode layer and a drain electrode layer which are provided in contact with side surfaces of the oxide semiconductor film and have a thickness larger than that of the oxide semiconductor film; a gate insulating film provided over the oxide semiconductor film, the source electrode layer, and the drain electrode layer; and a gate electrode layer provided in a depressed portion formed by a step between a top surface of the oxide semiconductor film and top surfaces of the source electrode layer and the drain electrode layer.
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: February 14, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takehisa Hatano, Sachiaki Tezuka, Atsuo Isobe
  • Patent number: 9548198
    Abstract: A method of manufacturing a semiconductor device including forming a thin film containing silicon, oxygen and carbon on a substrate by performing a cycle a predetermined number of times, the cycle including: supplying a precursor gas containing silicon, carbon and a halogen element and having an Si—C bonding, and a first catalytic gas to the substrate; and supplying an oxidizing gas and a second catalytic gas to the substrate.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: January 17, 2017
    Assignees: HITACHI KOKUSAI ELECTRIC INC., L'AIR LIQUIDE, SOCIETE ANONYME POUR L'ETUDE ET L'EXPLOITATION DES PROCEDES GEORGES CLAUDE
    Inventors: Yoshiro Hirose, Norikazu Mizuno, Kazutaka Yanagita, Shingo Okubo
  • Patent number: 9543143
    Abstract: A method for producing an amorphous oxide thin film includes: a pre-treatment process of selectively changing a binding state of an organic component, at a temperature lower than a pyrolysis temperature of the organic component, in a first oxide precursor film containing the organic component and In, to obtain a second oxide precursor film in which, when an infrared wave number range of from 1380 cm?1 to 1520 cm?1 in an infrared absorption spectrum obtained by performing a measurement by Fourier transform infrared spectroscopy is divided into an infrared wave number range of from 1380 cm?1 to 1450 cm?1 and an infrared wave number range of from more than 1450 cm?1 to 1520 cm?1, a peak positioned within the infrared wave number range of from 1380 cm?1 to 1450 cm?1 exhibits the maximum value in the infrared absorption spectrum within an infrared wave number range of from 1350 cm?1 to 1750 cm?1; and a post-treatment process of removing the organic component remaining in the second oxide precursor film, to transfo
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: January 10, 2017
    Assignee: FUJIFILM Corporation
    Inventors: Kenichi Umeda, Atsushi Tanaka, Masayuki Suzuki, Tatsuya Shimoda
  • Patent number: 9543330
    Abstract: A method manufacturing a thin film transistor is provided. A gate, a first insulation layer covering the gate, a semiconductor layer over the gate, and a first photoresist pattern are sequentially formed on a substrate. The semiconductor layer is patterned into a channel layer by using the first photoresist pattern as a mask and the first photoresist pattern is subsequently shrunken to remain a portion of the first photoresist pattern on the channel layer. A conductive material layer covering the remained portion of the first photoresist pattern, the channel layer and the first insulation layer is patterned by using a second photoresist pattern as a mask to form a source and a drain separated by a gap region exposing the remained portion. The second photoresist pattern and the remained portion are removed by performing a stripping process to expose the channel layer between the source and the drain.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: January 10, 2017
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Der-Chun Wu, Shin-Chuan Chiang, Yu-Hsien Chen, Po-Lung Chen, Yi-Hsien Lin, Cheng-Jung Yang, Kuo-Hsing Tseng
  • Patent number: 9543009
    Abstract: Methods for forming non-volatile storage elements in a non-volatile storage system are described. In some embodiments, during a forming operation, a cross-point memory array may be biased such that waste currents are minimized or eliminated. In one example, the memory array may be biased such that a first word line comb is set to a first voltage, a second word line comb interdigitated with the first word line comb is set to the first voltage, and selected vertical bit lines are set to a second voltage such that a forming voltage is applied across non-volatile storage elements to be formed. In some embodiments, a memory array may include a plurality of word line comb layers and a forming operation may be concurrently performed on non-volatile storage elements on all of the plurality of word line comb layers or a subset of the plurality of word line comb layers.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: January 10, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Chang Siau, Tianhong Yan
  • Patent number: 9536912
    Abstract: A method of transferring a thin film is a method of transferring a thin film formed on a first substrate to a second substrate, the method including: allowing the first substrate to come into contact with a liquid to swell the first substrate; allowing the second substrate and the thin film to come into contact with each other via the liquid; and drying the liquid to allow the thin film to adhere to the second substrate.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: January 3, 2017
    Assignee: NIKON CORPORATION
    Inventors: Makoto Nakazumi, Yasutaka Nishi
  • Patent number: 9530892
    Abstract: A semiconductor device includes a transistor including a gate electrode over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, and an oxide insulating film covering the transistor. The multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the oxide insulating film contains more oxygen than that in the stoichiometric composition, and in the transistor, by a bias-temperature stress test, threshold voltage does not change or the amount of the change in a positive direction or a negative direction is less than or equal to 1.0 V, preferably less than or equal to 0.5 V.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: December 27, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Yukinori Shima, Hajime Tokunaga, Toshinari Sasaki, Keisuke Murayama, Daisuke Matsubayashi
  • Patent number: 9525133
    Abstract: Disclosed is a resistive random access memory, comprising a substrate, an insulating layer, a bottom electrode, a resistive material film, and a top electrode in an order from bottom to top, wherein the resistive material film is a four-layer structure composed of a same metal oxide; and the four layers in the four-layer structure from bottom to top have resistance values which are increased one after another by more than 10 times, oxygen concentrations which are increased one after another and thickness which are decreased one after another. The present invention may achieve complete formation-rupture of oxygen vacancy conductive filaments (CF) in each layer by dividing the resistive material film of the same metal oxide into four layers according to the different oxygen concentrations, so as to control accurately the resistance values, so that 2-bit storage with high uniformity is achieved.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: December 20, 2016
    Assignee: PEKING UNIVERSITY
    Inventors: Ru Huang, Muxi Yu, Yimao Cai, Zhenxing Zhang, Qiang Li, Ming Li
  • Patent number: 9520476
    Abstract: A semiconductor device (100A) includes a substrate (2), an oxide semiconductor layer (5) formed on the substrate (2), source and drain electrodes (6s, 6d) electrically connected to the oxide semiconductor layer (5), a first transparent electrode (7) electrically connected to the drain electrode (6d), a dielectric layer (8) formed on the source and drain electrodes (6s, 6d), and a second transparent electrode (9) formed on the dielectric layer (8). The upper and/or lower surface(s) of the first transparent electrode (7) contacts with a reducing insulating layer (8a) with the property of reducing an oxide semiconductor included in the oxide semiconductor layer (5). The second transparent electrode (9) overlaps at least partially with the first transparent electrode (7) via the dielectric layer (8). The oxide semiconductor layer (5) and the first transparent electrode (7) are formed out of the same oxide film.
    Type: Grant
    Filed: January 24, 2013
    Date of Patent: December 13, 2016
    Assignee: Sharp kabushiki Kaisha
    Inventors: Tadayoshi Miyamoto, Kazuatsu Ito, Shigeyasu Mori, Mitsunobu Miyamoto, Yasuyuki Ogawa, Makoto Nakazawa, Seiichi Uchida, Takuya Matsuo
  • Patent number: 9520412
    Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: December 13, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Pil-Sang Yun, Ki-Won Kim, Hye-Young Ryu, Woo-Geun Lee, Seung-Ha Choi, Jae-Hyoung Youn, Kyoung-Jae Chung, Young-Wook Lee, Je-Hun Lee, Kap-Soo Yoon, Do-Hyun Kim, Dong-Ju Yang, Young-Joo Choi
  • Patent number: 9502246
    Abstract: A method of forming an oxide semiconductor device may be provided. In the method, a substrate comprising a first major surface and a second major surface that faces away from the first major surface may be provided. An oxide semiconductor device may be formed over the first major surface to provide an intermediate device, and the semiconductor device may comprise an oxide active layer. The intermediate device may be subjected to ultraviolet (UV) light (e.g., ultraviolet ray irradiation process) for a first period, and subjected to heat (e.g., thermal treatment process) for a second period. The first and second periods may at least partly overlap.
    Type: Grant
    Filed: August 8, 2014
    Date of Patent: November 22, 2016
    Assignees: Samsung Display Co., Ltd., University-Industry Foundation (UIF), Yonsei University
    Inventors: Yeon-Hong Kim, Byung-Du Ahn, Hyeon-Sik Kim, Yeon-Gon Mo, Ji-Hun Lim, Hyun-Jae Kim
  • Patent number: 9496376
    Abstract: To provide a semiconductor device with improved reliability. To provide a semiconductor device with stable characteristics. To provide a transistor having a low off-state current. To provide a transistor having a high on-state current. To provide a novel semiconductor device, a novel electronic device, or the like. A method for manufacturing the semiconductor device includes the steps of forming a first semiconductor over a substrate; forming a second semiconductor over and in contact with the first semiconductor; forming a first layer over the second semiconductor; performing oxygen plasma treatment and then removing the first layer to expose at least part of a surface of the second semiconductor; forming a third semiconductor over and in contact with the second semiconductor; forming a first insulator over and in contact with the third semiconductor; and forming a first conductor over the first insulator.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: November 15, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Tetsuhiro Tanaka, Sachiaki Tezuka, Mitsuhiro Ichijo, Noriyoshi Suzuki
  • Patent number: 9466508
    Abstract: The present invention provides a liquid composition used for etching a multilayer film containing copper and molybdenum, an etching method for etching a multilayer film containing copper and molybdenum, and a substrate. The present invention further provides a liquid composition for etching a multilayer-film wiring substrate which has an oxide layer (IGZO) including indium, gallium and zinc laminated on the substrate, and further a multilayer film including at least a layer containing molybdenum and a layer containing copper provided thereon, a method for etching a multilayer film containing copper and molybdenum from the substrate, and a substrate.
    Type: Grant
    Filed: April 9, 2014
    Date of Patent: October 11, 2016
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Satoshi Tamai, Kunio Yube
  • Patent number: 9464220
    Abstract: Technologies are generally described for forming a nanofluid coolant and structures including a nanofluid coolant. In an example, a method of forming a nanofluid coolant may comprise combining a compound with an acid and with purified water to form a solution. The compound may include manganese. The method may further include heating the solution and, after heating the solution, cooling the solution effective to form at least one precipitate that includes manganese and oxygen. The method may further include filtering the at least one precipitate to form a powder that includes manganese oxide nanotubes. The method may further include functionalizing the nanotubes by irradiating them with UV radiation. The method may further include combining the functionalized manganese oxide nanotubes with a polar solvent to form the nanofluid coolant.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: October 11, 2016
    Assignee: Indian Institute of Technology Madras
    Inventors: Sundara Ramaprabhu, Jyothirmayee Aravind Sasidharannair Sasikaladevi
  • Patent number: 9461176
    Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve electrical characteristics of and reliability in the semiconductor device including an oxide semiconductor film. A method for manufacturing a semiconductor device includes the steps of forming a gate electrode and a gate insulating film over a substrate, forming an oxide semiconductor film over the gate insulating film, forming a pair of electrodes over the oxide semiconductor film, forming a first oxide insulating film over the oxide semiconductor film and the pair of electrodes by a plasma CVD method in which a film formation temperature is 280° C. or higher and 400° C. or lower, forming a second oxide insulating film over the first oxide insulating film, and performing heat treatment at a temperature of 150° C. to 400° C. inclusive, preferably 300° C. to 400° C. inclusive, further preferably 320° C. to 370° C. inclusive.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: October 4, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Yukinori Shima, Suzunosuke Hiraishi, Kenichi Okazaki
  • Patent number: 9450080
    Abstract: The semiconductor device is manufactured by the following method. A first oxide semiconductor film is formed over a first gate electrode and a first insulating film, oxygen is added to the first oxide semiconductor film, and then a second oxide semiconductor film is formed over the first oxide semiconductor film. Then, heat treatment is performed. Next, part of the first insulating film, part of the first oxide semiconductor film, and part of the second oxide semiconductor film are etched to form a first gate insulating film having a projection. Next, a pair of electrodes is formed over the second oxide semiconductor film, and a third oxide semiconductor film is formed over the second oxide semiconductor film and the pair of electrodes. Then, a second gate insulating film is formed over the third oxide semiconductor film, and a second gate electrode is formed over the second gate insulating film.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: September 20, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Naoto Yamade, Yoshitaka Yamamoto, Hideomi Suzawa, Masayuki Sakakura, Yuhei Sato, Yasumasa Yamane
  • Patent number: 9443987
    Abstract: In a semiconductor device using a transistor including an oxide semiconductor, a change in electrical characteristics is suppressed and reliability is improved. The semiconductor device includes a gate electrode over an insulating surface; an oxide semiconductor film overlapping with the gate electrode; a gate insulating film that is between the gate electrode and the oxide semiconductor film and in contact with the oxide semiconductor film; a protective film in contact with a surface of the oxide semiconductor film that is an opposite side of a surface in contact with the gate insulating film; and a pair of electrodes in contact with the oxide semiconductor film. The spin density of the gate insulating film or the protective film measured by electron spin resonance spectroscopy is lower than 1×1018 spins/cm3, preferably higher than or equal to 1×1017 spins/cm3 and lower than 1×1018 spins/cm3.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: September 13, 2016
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Akiharu Miyanaga, Yasuharu Hosaka, Toshimitsu Obonai, Junichi Koezuka, Motoki Nakashima, Masahiro Takahashi, Shunsuke Adachi, Takuya Hirohashi
  • Patent number: 9437627
    Abstract: A manufacturing method of a thin film transistor includes the following steps. A substrate is provided first. A semiconductor layer is then formed on the substrate. Next, a photoresist pattern including a middle portion and two peripheral portions is formed on the semiconductor layer. The middle portion is disposed between two peripheral portions, and the thickness of the middle portion is greater than each of the peripheral portions. Next, an etching process is performed on the semiconductor layer for forming a patterned semiconductor layer. A photoresist ashing process is then performed to remove at least the peripheral portions of the photoresist pattern to form a channel defining photoresist pattern and expose two portions of the patterned semiconductor layer. Next, the patterned semiconductor layer is treated to form a semiconductor portion and two conductor portions. The channel defining photoresist pattern is then removed.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: September 6, 2016
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Chin-Tzu Kao, Wen-Cheng Lu, Ya-Ju Lu
  • Patent number: 9412519
    Abstract: A method is provided for concurrently forming terminals on a multilayer capacitor having a first plurality of interior plates with edges that are brought to and exposed upon a first surface and a second plurality of interior plates, interleaved with the first plurality of interior plates, and spaced from the first plates by a dielectric. The second plurality of interior plates has edges that are brought to and exposed upon a second surface, which is not adjacent to the first surface. A first terminal is formed by plating a layer of electrically-conductive first metal directly onto the first surface including where the edges of the first plates are exposed upon the first surface and concurrently forming a second terminal by plating a layer of electrically-conductive first metal directly onto the second surface including where the edges of the second plates are exposed upon the second surface.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: August 9, 2016
    Assignee: Presido Components, Inc.
    Inventor: Hung Van Trinh
  • Patent number: 9391267
    Abstract: A method for etching a stack with at least one metal layer in one or more cycles is provided. An initiation step is preformed, transforming part of the at least one metal layer into metal oxide, metal halide, or lattice damaged metallic sites. A reactive step is performed providing one or more cycles, where each cycle comprises providing an organic solvent vapor to form a solvated metal, metal halide, or metal oxide state and providing an organic ligand solvent to form volatile organometallic compounds.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: July 12, 2016
    Assignee: Lam Research Corporation
    Inventors: Meihua Shen, Harmeet Singh, Samantha S. H. Tan, Jeffrey Marks, Thorsten Lill, Richard P. Janek, Wenbing Yang, Prithu Sharma
  • Patent number: 9391096
    Abstract: To provide a highly reliable semiconductor device. The semiconductor device includes a first oxide layer over an insulating film; an oxide semiconductor layer over the first oxide layer; a gate insulating film over the oxide semiconductor layer; and a gate electrode over the gate insulating film. The first oxide layer contains indium. The oxide semiconductor layer contains indium and includes a channel formation region. The distance from the interface to the channel formation region is 20 nm or more, preferably 30 nm or more, further preferably 40 nm or more, still further preferably 60 nm or more.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: July 12, 2016
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Daisuke Matsubayashi, Hideomi Suzawa, Tetsuhiro Tanaka, Hirokazu Watanabe
  • Patent number: 9384976
    Abstract: It is an object to drive a semiconductor device at high speed or to improve the reliability of the semiconductor device. In a method for manufacturing the semiconductor device, in which a gate electrode is formed over a substrate with an insulating property, a gate insulating film is formed over the gate electrode, and an oxide semiconductor film is formed over the gate insulating film, the gate insulating film is formed by deposition treatment using high-density plasma. Accordingly, dangling bonds in the gate insulating film are reduced and the quality of the interface between the gate insulating film and the oxide semiconductor is improved.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: July 5, 2016
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Mitsuhiro Ichijo, Tetsuhiro Tanaka, Seiji Yasumoto, Shun Mashiro, Yoshiaki Oikawa, Kenichi Okazaki
  • Patent number: 9379250
    Abstract: This semiconductor device (100A) includes: a substrate (2); a gate electrode (3) formed on the substrate (2); a gate insulating layer (4) formed over the gate electrode (3); an oxide semiconductor layer (5) formed on the gate insulating layer (4); source and drain electrodes (6s, 6d) electrically connected to the oxide semiconductor layer (5); a first transparent electrode (7) electrically connected to the drain electrode (6d); an interlayer insulating layer (8a) including portions formed on the source and drain electrodes (6s, 6d); and a second transparent electrode (9) formed on the interlayer insulating layer (8a). At least a portion of the second transparent electrode (9) overlaps with the first transparent electrode (7) with the interlayer insulating layer (8a) interposed between them. And the oxide semiconductor layer (5) and the first transparent electrode (7) are formed out of a same oxide film.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: June 28, 2016
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Seiichi Uchida, Yasuyuki Ogawa, Tadayoshi Miyamoto, Kazuatsu Ito, Yutaka Takamaru, Makoto Nakazawa, Mitsunobu Miyamoto
  • Patent number: 9368633
    Abstract: An object is to provide a material suitably used for a semiconductor included in a transistor, a diode, or the like. Another object is to provide a semiconductor device including a transistor in which the condition of an electron state at an interface between an oxide semiconductor film and a gate insulating film in contact with the oxide semiconductor film is favorable. Further, another object is to manufacture a highly reliable semiconductor device by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used for a channel. A semiconductor device is formed using an oxide material which includes crystal with c-axis alignment, which has a triangular or hexagonal atomic arrangement when seen from the direction of a surface or an interface and rotates around the c-axis.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: June 14, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Motoki Nakashima, Tatsuya Honda
  • Patent number: 9353433
    Abstract: A method of fabricating a liquid for an oxide thin film is provided, which includes mixing at least two kinds of dispersoids selected from the group consisting of a Zinc compound, an Indium compound, a Gallium compound, a Tin compound and a Thallium compound, with dispersion media corresponding to the selected dispersoids to form a dispersion system, and stirring and aging the dispersion system at a predetermined temperature for a predetermined time, wherein a molar ratio of the Zinc compound to each of the Indium compound, Gallium compound, Tin compound and Thallium compound is 1:0.1 to 1:2. According to the present invention, the liquid for the oxide thin film may be fabricated by a sol-gel method making it capable of being implemented in mass production in a simple and low-cost manner as opposed to the conventional vacuum deposition method.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: May 31, 2016
    Assignee: Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Hyun Jae Kim, Kyung Ho Kim, Gun Hee Kim, Tae Hoon Jeong, Hyun Soo Shin, Won Jun Park, Yun Jung Choi, Ka Young Lee
  • Patent number: 9305989
    Abstract: An organic light-emitting display and a method of manufacturing an organic light-emitting display are described. According to an aspect, the organic light-emitting display includes a substrate, a photodiode on the substrate, a planarization layer covering the photodiode, a first electrode on the planarization layer, a pixel defining layer at least partially exposing the first electrode, an organic layer covering the first electrode which is exposed by the pixel defining layer and a second electrode covering the pixel defining layer and the organic layer.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: April 5, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hai Jung In, Yong Sung Park
  • Patent number: 9287390
    Abstract: A transistor with superior electric characteristics is manufactured. An oxide insulating film is formed over a substrate, an oxide semiconductor film is formed over the oxide insulating film, heat treatment is then conducted at a temperature at which hydrogen contained in the oxide semiconductor film is desorbed and part of oxygen contained in the oxide insulating film is desorbed, then the heated oxide semiconductor film is etched into a predetermined shape to form an island-shaped oxide semiconductor film, a pair of electrodes is formed over the island-shaped oxide semiconductor film, a gate insulating film is formed over the pair of electrodes and the island-shaped oxide semiconductor film, and a gate electrode is formed over the gate insulating film.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: March 15, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kosei Noda, Toshinari Sasaki
  • Patent number: 9276124
    Abstract: Provided is a method for manufacturing a semiconductor device so as not expose a semiconductor layer to moisture and the number of masks is reduced. For example, a first conductive film, a first insulating film, a semiconductor film, a second conductive film, and a mask film are formed. The first mask film is processed to form a first mask layer. Dry etching is performed on the first insulating film, the semiconductor film, and the second conductive film with the use of the first mask layer to form a thin film stack body, so that a surface of the first conductive film is at least exposed. Sidewall insulating layers covering side surfaces of the thin film stack body are formed. The first conductive film is side-etched to form a first electrode. A second electrode layer is formed with the second mask layer.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: March 1, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takafumi Mizoguchi, Kojiro Shiraishi
  • Patent number: 9246011
    Abstract: A semiconductor device including a transistor having a reduced number of oxygen vacancies in a channel formation region of an oxide semiconductor with stable electrical characteristics or high reliability is provided. A gate insulating film is formed over a gate electrode; an oxide semiconductor layer is formed over the gate insulating film; an oxide layer is formed over the oxide semiconductor layer by a sputtering method to form an stacked-layer oxide film including the oxide semiconductor layer and the oxide layer; the stacked-layer oxide film is processed into a predetermined shape; a conductive film containing Ti as a main component is formed over the stacked-layer oxide film; the conductive film is etched to form source and drain electrodes and a depression portion on a back channel side; and portions of the stacked-layer oxide film in contact with the source and drain electrodes are changed to an n-type by heat treatment.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: January 26, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasutaka Nakazawa, Masami Jintyou, Junichi Koezuka, Kenichi Okazaki, Takuya Hirohashi, Shunsuke Adachi
  • Patent number: 9240489
    Abstract: An object is to provide a material suitably used for a semiconductor included in a transistor, a diode, or the like. Another object is to provide a semiconductor device including a transistor in which the condition of an electron state at an interface between an oxide semiconductor film and a gate insulating film in contact with the oxide semiconductor film is favorable. Further, another object is to manufacture a highly reliable semiconductor device by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used for a channel. A semiconductor device is formed using an oxide material which includes crystal with c-axis alignment, which has a triangular or hexagonal atomic arrangement when seen from the direction of a surface or an interface and rotates around the c-axis.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: January 19, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Motoki Nakashima, Tatsuya Honda
  • Patent number: 9236454
    Abstract: A method of fabricating a thin-film transistor, the method including: film-forming an active layer, that contains as a main component thereof an oxide semiconductor structured by O and at least two elements among In, Ga and Zn, in a film formation chamber into which at least oxygen is introduced, and b) heat treating the active layer at less than 300° C. in a dry atmosphere, wherein the film-forming a) and the heat treating are carried out such that, given that an oxygen partial pressure with respect to an entire pressure of an atmosphere within the film formation chamber in the film-forming is PO2depo (%), and an oxygen partial pressure with respect to an entire pressure of an atmosphere during the heat treating is PO2anneal (%), the oxygen partial pressure PO2anneal (%) at the time of the heat treating b) satisfies a relationship: ?20/3PO2depo+40/3?PO2anneal??800/43PO2depo+5900/43.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: January 12, 2016
    Assignee: FUJIFILM Corporation
    Inventors: Masashi Ono, Masahiro Takata, Atsushi Tanaka, Masayuki Suzuki
  • Patent number: 9231110
    Abstract: It is an object to provide a highly reliable semiconductor device including a thin film transistor whose electric characteristics are stable. In addition, it is another object to manufacture a highly reliable semiconductor device at low cost with high productivity. In a semiconductor device including a thin film transistor, a semiconductor layer of the thin film transistor is formed with an oxide semiconductor layer to which a metal element is added. As the metal element, at least one of metal elements of iron, nickel, cobalt, copper, gold, manganese, molybdenum, tungsten, niobium, and tantalum is used. In addition, the oxide semiconductor layer contains indium, gallium, and zinc.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: January 5, 2016
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Junichiro Sakata
  • Patent number: 9224838
    Abstract: An object is to provide an oxide semiconductor having stable electric characteristics and a semiconductor device including the oxide semiconductor. A manufacturing method of a semiconductor film by a sputtering method includes the steps of holding a substrate in a treatment chamber which is kept in a reduced-pressure state; heating the substrate at lower than 400° C.; introducing a sputtering gas from which hydrogen and moisture are removed in the state where remaining moisture in the treatment chamber is removed; and forming an oxide semiconductor film over the substrate with use of a metal oxide which is provided in the treatment chamber as a target. When the oxide semiconductor film is formed, remaining moisture in a reaction atmosphere is removed; thus, the concentration of hydrogen and the concentration of hydride in the oxide semiconductor film can be reduced. Thus, the oxide semiconductor film can be stabilized.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: December 29, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Akiharu Miyanaga, Masayuki Sakakura, Junichi Koezuka, Tetsunori Maruyama, Yuki Imoto
  • Patent number: 9209358
    Abstract: Disclosed are a semiconductor device and a method of fabricating the same. A light emitting diode (LED) includes a conductive substrate, and a gallium nitride (GaN)-based semiconductor stack positioned on the conductive substrate. The semiconductor stack includes an active layer that is a semi-polar semiconductor layer. Accordingly, it is possible to provide an LED having improved light emitting efficiency.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: December 8, 2015
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Won Cheol Seo, Dae Sung Cho, Chung Hoon Lee, Ki Bum Nam