Having Light Transmissive Window Patents (Class 438/116)
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Publication number: 20090140406Abstract: A mount for a semiconductor device has a first surface with at least one contact region and a second surface. The mount has a substrate to receive the second surface of the semiconductor device and a planar element. The planar element has an aperture sized to surround the semiconductor. A first surface of the planar element is mounted to the substrate and is located to surround the semiconductor device such that the semiconductor device is aligned by the aperture. The mount further has means for mounting the semiconductor device to the substrate in an aligned position. Some embodiments include a method of making and/or using such a mount.Type: ApplicationFiled: February 3, 2009Publication date: June 4, 2009Applicant: SolFocus, Inc.Inventors: Stephen Horne, Gary D. Conley
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Publication number: 20090134504Abstract: A window-type semiconductor package to balance top and bottom moldflows and its method are revealed. The package primarily comprises a substrate having a slot, a chip, and an encapsulant. After die attaching, an input opening and an output opening are formed and exposed from both ends of the slot. The slot is off-center designed so that the dimension of the input opening is smaller than the one of the output opening. The encapsulant has a top molding portion formed on the top surface of the substrate and a smaller bottom molding portion formed on the bottom surface of the substrate. The mold-flowing speeds between the top molding portion and the bottom molding portion are balanced to eliminate trapped air bubbles in the top mold and to avoid the flooding of the molding compound in the bottom mold.Type: ApplicationFiled: November 28, 2007Publication date: May 28, 2009Inventors: Kuo-Yuan Lee, Yung-Hsiang Chen
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Patent number: 7534656Abstract: An image sensor device including a protective plate may be manufactured from an image sensor chip having an active surface and a back surface opposite to the active surface. The image sensor chip may include chip pads formed in a peripheral region of the active surface, a microlens formed in a central region of the active surface and an intermediate region between the peripheral and central regions. A protective plate may be attached to the intermediate region of the active surface of the image sensor chip using an adhesive pattern that is sized and configured to maintain a separation distance between the protective plate and the microlens formed on the image sensor chip. Conductive plugs, formed before, during or after the manufacture of the image sensor chip circuitry may provide electrical connection between the chip pads and external connectors.Type: GrantFiled: July 23, 2007Date of Patent: May 19, 2009Assignee: Samsung Electronics Co., LtdInventors: Yong-Chai Kwon, Kang-Wook Lee, Gu-Sung Kim, Seong-Il Han, Keum-Hee Ma, Suk-Chae Kang, Dong-Hyeon Jang
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Publication number: 20090117689Abstract: A packaged, optically active integrated circuit device is shown is manufactured by mounting the integrated circuit (201) onto a first part of a lead frame (206) using epoxy (209). Electrical connections (207) are made using conventional wire bonding techniques between the integrated circuit (201) and peripheral parts (205) of the lead frame (206). Optical adhesive (202) is dispensed onto the surface of the integrated circuit to surround the optically active element (208). A glass lid (203) is placed onto the surface of the integrated circuit (201) aligned with the optical adhesive (202). This provides a mounted and covered assembly. The mounted and covered assembly is placed in a mould tool having projection with a soft surface opposite to and in contact with the exposed surface of the glass lid (203).Type: ApplicationFiled: March 3, 2006Publication date: May 7, 2009Applicant: Melexis NV Microelectronic Intergrated SystemsInventor: Jian Chen
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Patent number: 7521790Abstract: In a module for an optical device as a semiconductor device module of the present invention, a bonding wire that electrically connects a substrate on which a conductor wiring is formed and an image pickup element as a semiconductor element is covered with a cover, and a holder as a lid is placed over the cover.Type: GrantFiled: March 23, 2006Date of Patent: April 21, 2009Assignee: Sharp Kabushiki KaishaInventors: Yoshinori Tanida, Kazuya Fujita
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Publication number: 20090098685Abstract: Disclosed herein is a device package that comprises a device having a top substrate that is disposed on a supporting surface of a package substrate. A package frame contacts the top surface of the top substrate and top surface of the package substrate, and hermetically seals the device between the top surfaces of the top substrate and package substrate. The device can be a semiconductor device, a microstructure such as a microelectromechanical device, or other devices.Type: ApplicationFiled: December 19, 2008Publication date: April 16, 2009Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Robert M. Duboc, Terry Tarn
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Publication number: 20090096048Abstract: An optical device includes a base and an optical element. The base has a through hole in a center and includes leads and a resin. Each lead has an L-shaped cross-section and is formed by an inner lead extending from the center toward a peripheral edge and an outer lead connected to the inner lead and extending downward. The optical element is provided under the base so as to correspond to the through hole. Electrode pads of the optical element are connected to the leads of the base through bumps, respectively. The resin is formed so as to cover respective inner ends of the leads and respective front surfaces of the inner leads and to fill a gap between adjacent leads, and respective outer ends of the leads and respective front surfaces of the outer leads are exposed.Type: ApplicationFiled: August 19, 2008Publication date: April 16, 2009Inventor: Katsuyoshi MATSUMOTO
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Publication number: 20090050996Abstract: Electronic device wafer level scale packages and fabrication methods thereof. A semiconductor wafer with a plurality of electronic devices formed thereon is provided. The semiconductor wafer is bonded with a supporting substrate. The back of the semiconductor substrate is thinned. A first trench is formed by etching the semiconductor exposing an inter-layered dielectric layer. An insulating layer is conformably deposited on the back of the semiconductor substrate. The insulating layer on the bottom of the first trench is removed to create a second trench. The insulating layer and the ILD layer are sequentially removed exposing part of a pair of contact pads. A conductive layer is conformably formed on the back of the semiconductor. After the conductive layer is patterned, the conductive layer and the contact pads construct an S-shaped connection. Next, an exterior connection and terminal contact pads are subsequently formed.Type: ApplicationFiled: November 28, 2007Publication date: February 26, 2009Inventors: Chien-Hung Liu, Sih-Dian Lee
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Publication number: 20090050995Abstract: Electronic device wafer level scale packages and fabrication methods thereof. A semiconductor wafer with a plurality of electronic devices formed thereon is provided. The semiconductor wafer is bonded with a supporting substrate. The back of the semiconductor substrate is thinned. A trench is formed by etching the semiconductor exposing an inter-layered dielectric (ILD) layer. An insulating layer is conformably deposited on the back of the semiconductor substrate. The insulating layer on the bottom of the trench is removed, and the ILD layer is subsequently removed exposing part of a pair of contact pads. A conductive layer is conformably formed on the back of the semiconductor. After the conductive layer is patterned, the conductive layer and the contact pads construct an L-shaped connection. Next, an exterior connection and terminal contact pads are subsequently formed.Type: ApplicationFiled: November 28, 2007Publication date: February 26, 2009Inventors: Chien-Hung Liu, Sih-Dian Lee
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Patent number: 7491570Abstract: A die package having an adhesive flow restriction area. In a first embodiment, the adhesive flow restriction area is formed as a trench in a transparent element. A second embodiment has a transparent element with an adhesive flow restriction area formed as a plurality of trenches that extend from one edge of the transparent element to the other edge. A third embodiment has a transparent element with an adhesive flow restriction area formed as a plurality of trenches. A fourth embodiment has a transparent element with an adhesive flow restriction area formed as a protuberance. A fifth embodiment comprises a trench in the die. A sixth embodiment has a die with a plurality of trenches in the die as an adhesive flow restriction area. A seventh embodiment has a die with a protuberance.Type: GrantFiled: September 1, 2004Date of Patent: February 17, 2009Assignee: Micron Technology, Inc.Inventors: Bret K. Street, James M. Derderian, Jeremy E. Minnich
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Publication number: 20090039489Abstract: A method and apparatus for constructing MEMS devices is provided which employs a low cost molded housing that simultaneously provides precise and accurate alignment, mechanical protection, electrical connections and structural integrity for mounting optical and MEMS components. The package includes a MEMS die mounting surface, an optical component mounting surface and an optical imaging window monolithically fabricated with the MEMS die mounting surface in a predetermined orientation for providing alignment between the MEMS die and optical components. A MEMS adaptor plate is provided to facilitate connections of a MEMS die to external components.Type: ApplicationFiled: March 28, 2008Publication date: February 12, 2009Inventors: Albert Ting, Daniel T. McCormick, Michael Rattner
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Patent number: 7488612Abstract: A method for fabricating a liquid crystal display (LCD) device comprises forming an active pattern and a data line on a substrate, the active pattern including a source, a drain, and a channel regions; a first insulation film on a portion of the substrate; forming a gate electrode in a portion of the active pattern where the first insulation film is formed; a second insulation film on the substrate; forming a plurality of first contact holes exposing a portion of the source and drain regions and a second contact hole exposing a portion of the data line; forming a source electrode from a transparent conductive material connected to a source region within the respective first contact hole and a data line within the second contact hole; and forming a pixel and a drain electrodes from the transparent conductive material connected to a drain region within the respective first contact hole.Type: GrantFiled: October 18, 2007Date of Patent: February 10, 2009Assignee: LG Dsiplay Co., Ltd.Inventors: Joon-Young Yang, Yong-In Park, Sang-Hyun Kim
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Publication number: 20090032924Abstract: A method for manufacturing a cover assembly including a transparent window portion and a frame of gas-impervious material that can be hermetically attached to a micro-device package base to form a hermetically sealed micro-device package. First a frame of gas-impervious material is provided the frame having a continuous sidewall defining a frame aperture there through. The sidewall includes a frame seal-ring area circumscribing the frame aperture. A sheet of a transparent material is also provided, the sheet having a window portion defined thereupon. The window portion has finished top and bottom surfaces. A sheet seal-ring area is prepared on the sheet, the sheet seal-ring area circumscribing the window portion. The frame is positioned against the sheet such that at least a portion of the frame seal-ring area and at least a portion of the sheet seal-ring area contact one another along a continuous junction region that circumscribes the window portion.Type: ApplicationFiled: July 3, 2007Publication date: February 5, 2009Inventor: DAVID H. STARK
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Publication number: 20090032925Abstract: In a package including an image sensor die with an interconnect extending therethrough, a cover allowing light to pass is coupled to the die using at least one solder ball and a corresponding number of pads on each of the cover and die. Such pads are added to the cover despite the die's interconnect allowing contact with external devices at a location distal from the cover. The solder balls help govern the parallel orientation (or an alternate orientation) between the die and the cover. In addition, connectors other than solder balls may be used; multi-layered covers with connectors between the layers may be used; and packages other than imagers may be assembled.Type: ApplicationFiled: July 31, 2007Publication date: February 5, 2009Inventor: Luke G. England
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Patent number: 7485480Abstract: A method of manufacturing high power light-emitting device packages and structure thereof, wherein the method thereof includes the steps of: (a) forming a plurality of lead frames, each of the lead frames includes a heat-dissipating element and a plurality of leads; (b) electroplating an outer surface of the lead frames each; (c) coating conductive gel on a surface of the heat-dissipatings each; (d) arranging at least one light-emitting chip on the conductive gel; (e) forming an encapsulant on each of the lead frames; (f) connecting at least one top electrode of the light-emitting chip with one of the leads; (g) coating silicon gel for covering the at one light-emitting chip, and forming integrally a focusing light convex surface on a top surface of the silicon gel; and (h) cutting off the tie-bars to separate the lead frames from one another, whereby forming a plurality of high power light-emitting device packages.Type: GrantFiled: September 21, 2006Date of Patent: February 3, 2009Assignee: Harvatek CorporationInventors: Bily Wang, Jonnie Chuang, Shih-Yu Wu
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Publication number: 20090014746Abstract: Lead-free solder compositions for bonding and sealing flat panel displays, CCD's, solar cells, light emitting diodes, and other optoelectronic devices are disclosed. The solders are based on alloys of Sn, Au, Ag, and Cu and one or more rare earth metals chosen from the following, Y, La, Ce, Pr, Sc, Sm, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu. Optionally, the compositions may comprise In, Bi, or Zn. The solder compositions exhibit superior bonding capability in joining dissimilar surfaces such as those present in both the flat panel display and light emitting devices. Additionally the solders provide a strong barrier to the diffusion of both water and oxygen into these devices thus promoting longer device life times.Type: ApplicationFiled: July 11, 2007Publication date: January 15, 2009Inventors: Ainissa Gweneth Ramirez, Roger Sinta
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Publication number: 20090008729Abstract: The present invention discloses a structure of image sensor package utilizing a removable protection film. The structure comprises a substrate with a die receiving cavity and inter-connecting through holes. Terminal pads are formed under the inter-connecting through holes and metal pads are formed on an upper surface of the substrate. A die is disposed within the die receiving cavity by an adhesion material. Bonding pads are formed on the upper edge of the die. Bonding wires are coupled to the metal pads and the bonding pads. A protection layer is formed on the micro lens area to protect the micro lens from particle contamination. A removable protection film is formed over the protection layer to protect the micro lens from water, oil, dust or temporary impact during the packaging and assembling process.Type: ApplicationFiled: July 3, 2007Publication date: January 8, 2009Inventors: Wen-Kun Yang, Jui-Hsien Chang, Chi-Chen Lee, Wen-Ping Yang
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Publication number: 20090011544Abstract: A method of forming molding standoff structures on integrated circuit devices is disclosed which includes forming a plurality of standoff structures on a substantially rectangular sheet of transparent material and, after forming the standoff structures, singulating the substantially rectangular sheet of transparent material into a plurality of individual transparent members, each of which comprise at least one of the plurality of standoff structures.Type: ApplicationFiled: July 2, 2007Publication date: January 8, 2009Inventors: Frank Hall, James Voelz
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Patent number: 7468293Abstract: In a method for the production of window elements which can be soldered into a housing in a hermetically tight manner and of a window element sealing a housing, the object of the invention is to achieve an improved hermetic sealing between window and housing through increased adherence and homogeneity in the metal coating and to prevent penetration of scattered light and unwanted radiation. Optically transparent, flat substrate material whose size is sufficient for a plurality of window elements is provided on at least one surface with an optical coating from which frame-like portions on a coated surface which enclose optically active surfaces of the window elements are subsequently removed, whereupon a metal coating that is used for producing a solder connection to the housing is applied to the generated portions having no coating, and the window elements are separated from the substrate material.Type: GrantFiled: May 25, 2006Date of Patent: December 23, 2008Assignee: Jenoptik Laser, Optik, Systeme GmbHInventors: Thomas Weyh, Elvira Gittler, Wolfgang Brode
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Patent number: 7465606Abstract: A method of connecting stranded wire to a lead-frame body 10 includes the provision of a stranded wire 12. It is ensured that insulation is stripped from an end 14 of the stranded wire. An electrically conductive lead-frame connection structure 16 is associated with the lead-frame body. The end 14 of the stranded wire is inserted into the lead-frame connection structure 16 so that the lead-frame connection structure substantially surrounds the wire end. Solder flux is injected so as to be substantially about a portion of the end of the stranded wire. The lead-frame connection structure is placed in contact with a bottom resistance welding electrode 18 or a top resistance welding electrode 20.Type: GrantFiled: October 3, 2006Date of Patent: December 16, 2008Assignee: Brose Fahrzeugteile GmbH & Co. Kommanditgesellschaft, WurzburgInventors: John William DeWys, Sergey Tyshchuk, Johannes Brouwers, Murray Van Duynhoven, John Edward Makaran
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Publication number: 20080303129Abstract: The invention is directed a patterned contact sheet and to a method of bonding a cover wafer to an interposer wafer using the patterned contact sheet having a waffle-like pattern of a plurality of ridges and plurality of wells to form a cover/interposer combination or unit that can be bonded to a substrate having a MEMs device thereon, the cover wafer, interposer wafer and substrate together forming a protective packaging for the MEMS. Use of the patterned contact sheet results fewer defects on the window area (the critical area) through which light is transmitted. Surprisingly, use of the patterned contact sheet also results in windows having improved flatness relative to windows made using an unpatterned contact sheet.Type: ApplicationFiled: July 25, 2007Publication date: December 11, 2008Inventors: Qing Ya ( Michael) Wang, Junhong Zhang
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Publication number: 20080272473Abstract: The present invention provides an optical device (2) including: a substrate (1) having a resin base (11) provided with an opening, a plurality of conductors (13) embedded in the resin base (11) such that at least parts of the plurality of conductors (13) are exposed on a lower face of the resin base (11) as electrode terminals, and a transparent member (12) fitted into the opening of the resin base (11); and an optical element (31) having an optical region (32) on an upper face thereof and which is mounted to a lower face of the substrate (11) so that the optical region (32) opposes the opening of the resin base (11), wherein the substrate (11) has a rectangular tabular shape whose thickness is substantially even.Type: ApplicationFiled: April 18, 2008Publication date: November 6, 2008Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Katsuyoshi Matsumoto, Tetsushi NISHIO
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Patent number: 7443017Abstract: A package for containing microelectromechanical devices includes a first substrate wafer, and a second substrate wafer made of an optical quality material. An underbump is interposed between the first and second substrate wafers. The underbump is composed of a standoff region and a localized bond region. The first and second substrate wafers and the underbump define a chamber that contains at least one microelectronic device.Type: GrantFiled: June 6, 2006Date of Patent: October 28, 2008Assignee: Hewlett-Packard Development Company, L.P.Inventors: Charles C. Haluzak, Martha A. Truninger, Donald L. Michael
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Publication number: 20080251872Abstract: An image sensor package, a method of manufacturing the same, and an image sensor module including the image sensor package are provided. In the image sensor package, an image sensor chip is installed onto a depression of a transmissive substrate. An adhesive bonds the image sensor chip to the transmissive substrate and seals an Active Pixel Sensor (APS) on the image sensor chip, protecting it from fine particle contamination. An IR cutting film is disposed on the transmissive substrate to minimize the height of the image sensor package. The image sensor package is electrically connected to external connection pads in the depression. Consequently, the image sensor package has a minimum height, is not susceptible to particle contamination, and does not require expensive alignment processes during manufacturing.Type: ApplicationFiled: July 31, 2007Publication date: October 16, 2008Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Woon-Seong KWON, Yong-Hwan KWON, Un-Byoung KANG, Chung-Sun LEE, Hyung-Sun JANG
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Publication number: 20080251894Abstract: A mounted body (100) of the present invention includes: a semiconductor element (10) having a surface (10a) on which element electrodes (12) are formed and a rear surface (10b) opposing the surface (10a); and a mounting board (30) on which wiring patterns (35) each having an electrode terminal (32) are formed. The rear surface (10b) of the semiconductor element (10) is in contact with the mounting board (30), and the element electrodes (12) of the semiconductor element (10) are connected electrically to the electrode terminals (32) of the wiring pattern (35) formed on the mounting board (30) via solder connectors (20) formed of solder particles assembled into a bridge shape. With this configuration, fine pitch connection between the element electrodes of the semiconductor element and the electrode terminals of the mounting board becomes possible.Type: ApplicationFiled: February 21, 2006Publication date: October 16, 2008Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Toshiyuki Kojima, Seiichi Nakatani, Yoshihisa Yamashita, Takashi Kitae, Shingo Komatsu
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Patent number: 7427527Abstract: A method is provided for aligning parts such as MEMS devices and photonics devices. One approach involves: providing between first and second parts a bonding material having fluid and solid states; applying a control field in the region of the bonding material, the bonding material changing its shape in direct response to changes in the control field while in the fluid state; adjusting the control field while the bonding material is in the fluid state so that the bonding material changes shape and causes relative movement of the first and second parts; and thereafter causing the bonding material to transition from the fluid state to the solid state while the first and second parts are in a selected position with respect to each other.Type: GrantFiled: February 14, 2005Date of Patent: September 23, 2008Assignee: Surfect Technologies, Inc.Inventors: Gerard Minogue, Thomas P. Griego
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Publication number: 20080211075Abstract: A structure of semiconductor device package having inter-adhesion with gap comprising: a chip with bonding pads and a sensor area embedded into a substrate with die window and inter-connecting through holes, wherein a RDL is formed over the substrate for coupling between the bonding pads and the inter-connecting through holes; a multiple rings (dam bar) formed over the substrate, the RDL, and the bonding pads area except the sensor area; an adhesive glues fill into the space of the multiple ring except the sensor area; and a transparency material bonded on the top of the multiple ring and the adhesive glues, wherein the adhesive glues adhesion between the transparency material and the multiple rings.Type: ApplicationFiled: December 5, 2007Publication date: September 4, 2008Inventors: Wen-Kun Yang, Jui-Hsien Chang, Hsien-Wen Hsu, Diann-Fang Lin
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Patent number: 7419854Abstract: The invention provides methods for packaging for electronic devices that are light or other radiation-sensitive, such as image sensors including CCD or CMOS chips. In one embodiment of the invention, an image sensor package is assembled by surrounding a chip with a barrier of transfer mold compound and covering the chip with a transparent lid. In another embodiment of the invention, the perimeter area of a chip, including interconnections such as wire bonds and bond pads, is encapsulated with a liquid dispensed epoxy, and a transparent lid is attached. In yet another embodiment of the invention, chip encapsulation is accomplished with a unitary shell of entirely transparent material. In yet another embodiment of the invention, a substrate-mounted chip and a transparent lid are loaded into a transfer mold that holds them in optimal alignment.Type: GrantFiled: October 15, 2005Date of Patent: September 2, 2008Assignee: Micron Technology, Inc.Inventors: Todd O. Bolken, Chad A. Cobbley
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Publication number: 20080191333Abstract: The present invention provides a structure of package comprising a substrate with a die through hole and a contact through holes structure formed there through, wherein a terminal pad is formed under the contact through hole structure and a contact pad is formed on a upper surface of the substrate. A die having a micro lens area is disposed within the die through hole by adhesion. A wire bonding is formed on the die and the substrate, wherein the wire bonding is coupled to the die and the contact pad. A protective layer is formed to cover the wire bonding. A transparent cover is disposed on the die within the die through hole by adhesion to expose the micro lens area. Conductive bumps are coupled to the terminal pads.Type: ApplicationFiled: February 8, 2007Publication date: August 14, 2008Applicant: Advanced Chip Engineering Technology Inc.Inventors: Wen-Kun Yang, Diann-Fang Lin, Jui-Hsien Chang, Tung-chuan Wang, Hsien-Wen Hsu
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Patent number: 7410816Abstract: A method is disclosed for forming a chamber in an electronic device, including the steps of preparing an outer surface on a solidified core material, the solidified core material in a depression formed in a substrate. The method further includes establishing a layer on the prepared outer surface of the solidified core material and a portion of the substrate surrounding the depression. The established layer and the substrate define a chamber.Type: GrantFiled: March 24, 2004Date of Patent: August 12, 2008Inventors: Makarand Gore, James Guo
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Patent number: 7405100Abstract: Packages of semiconductor devices with non-opaque covers and methods for making the packages. The invention allows an encapsulant to be used with a non-opaque cover. By ensuring the cover is attached to a die in such a way as to expose bonding pads while sealing in the imaging portion of the die, the die can be electrically connected to a substrate and then encapsulated. Since the imaging portion is sealed, the encapsulant cannot get underneath the glass. By ensuring the encapsulant is not filled beyond the glass, encapsulant cannot get over the glass either.Type: GrantFiled: December 8, 2005Date of Patent: July 29, 2008Assignee: National Semiconductor CorporationInventors: Shahram Mostafazadeh, Joseph O. Smith
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Publication number: 20080176354Abstract: An electric device has a p-n diode, where the p-n diode is covered with a current modified layer (CML). With a resistance distribution of the CML, a current is decreased toward all directions from a point on a bonding pad between the CML and the p-n diode. Hence, a current is uniformly distributed on the CML by fine tuning the resistance distribution. Thus, an effectiveness of the electric device is improved.Type: ApplicationFiled: April 23, 2007Publication date: July 24, 2008Applicant: National Central UniversityInventors: Cheng-yi Liu, Te-Yuan Chung, Pen-ko Chou, Ching-Liang Lin
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Patent number: 7402453Abstract: Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one embodiment, a method includes coupling a plurality of singulated imaging dies to a support member. The individual imaging dies include an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes forming a plurality of stand-offs on corresponding imaging dies before and/or after the imaging dies are singulated and electrically connecting the external contacts of the imaging dies to corresponding terminals on the support member. The individual stand-offs include a portion between adjacent external contacts.Type: GrantFiled: July 28, 2004Date of Patent: July 22, 2008Assignee: Micron Technology, Inc.Inventors: James M. Derderian, Bret K. Street, Eric T. Mueller
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Publication number: 20080164592Abstract: An apparatus for housing a micromechanical system includes a substrate with a surface on which the micromechanical system is formed, a transparent cover and a dry film layer arrangement between the surface of the substrate and the transparent cover. The dry film layer arrangement has an opening, so that the micromechanical system adjoins the opening.Type: ApplicationFiled: January 9, 2008Publication date: July 10, 2008Applicant: Fraunhofer-Gesellschaft zur Forderung der angewandten Forschung e.V.Inventors: Thor BAKKE, Thilo SANDNER
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Patent number: 7390687Abstract: Microelectronic imagers with shaped image sensors and methods for manufacturing curved image sensors. In one embodiment, a microelectronic imager device comprises an imaging die having a substrate, a curved microelectronic image sensor having a face with a convex and/or concave portion at one side of the substrate, and integrated circuitry in the substrate operatively coupled to the image sensor. The imaging die can further include external contacts electrically coupled to the integrated circuitry and a cover over the curved image sensor.Type: GrantFiled: October 31, 2006Date of Patent: June 24, 2008Assignee: Micron Technology, Inc.Inventors: Ulrich C. Boettiger, Jin Li, Steven D. Oliver
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Patent number: 7387902Abstract: The invention provides methods for packaging for electronic devices that are light or other radiation-sensitive, such as image sensors including CCD or CMOS chips. In one embodiment of the invention, an image sensor package is assembled by surrounding a chip with a barrier of transfer mold compound and covering the chip with a transparent lid. In another embodiment of the invention, the perimeter area of a chip, including interconnections such as wire bonds and bond pads, is encapsulated with a liquid dispensed epoxy, and a transparent lid is attached. In yet another embodiment of the invention, chip encapsulation is accomplished with a unitary shell of entirely transparent material. In yet another embodiment of the invention, a substrate-mounted chip and a transparent lid are loaded into a transfer mold that holds them in optimal alignment. The transfer mold is then filled with molding compound.Type: GrantFiled: October 15, 2005Date of Patent: June 17, 2008Assignee: Micron Technology, Inc.Inventors: Todd O. Bolken, Chad A. Cobbley
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Publication number: 20080132002Abstract: A method of producing semiconductor packages includes the step of punching out a dam-bar and part of the region lateral to a lead of a scaling body formed by molding, the punching-out being effected by using a support block and a punch. The support block has an outer lateral surface in a region receding as much as possible from the lateral surface of the upper portion of the seal body and also has an inner lateral surface almost flush with the lateral surface of the lower portion of the seal body. The width (Wa) of the upper surface of the support block is smaller than the overhang quantity of the upper portion of the seal body. In the region lateral to the lead, the front end region (Ra) positioned immediately below the overhang section of the upper portion of the seal body has an inclined surface (Fa1) sloping inwardly downward.Type: ApplicationFiled: May 12, 2005Publication date: June 5, 2008Inventors: Hisaho Inao, Tatsuya Hirano, Katsutoshi Shimizu
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Patent number: 7371652Abstract: The present invention relates to positioning components of an assembly using fiducial features. A first fiducial feature on a first piece of the assembly can be located. A first component can be positioned on the first piece of the assembly based on the location of the first fiducial feature. A second fiducial feature on a second piece of the assembly can be located. The second component can be positioned relative to the second piece of the assembly based on the location of the second fiducial feature. The first piece can be positioned relative to the second piece based on the locations of the first and second fiducial features. The assembly can be an optical device. The first component can be an active optical device, the second component can be a lens, the first piece can be a package, and the second piece can be a lid.Type: GrantFiled: June 22, 2005Date of Patent: May 13, 2008Assignee: Finisar CorporationInventors: Jose Joaquin Aizpuru, Danny Robert Schoening
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Patent number: 7358119Abstract: A process for fabricating an integrated circuit package. Metal is plated up on a substrate to provide a plurality of contact pads and a plurality of fiducial markings on a periphery of the contacts. A transparent mask is selectively deposited on the substrate, over the fiducial markings. A semiconductor die is mounted on the substrate such that the contact pads circumscribe the semiconductor die and the semiconductor die is wire bonded to ones of the contact pads. The wire bonds are encapsulated and the semiconductor die and contact pads are covered in a molding material. The substrate is selectively etched to thereby etch away the substrate underneath the contact pads and the semiconductor die. The integrated circuit package is singulated from other integrated circuit packages by sawing using the fiducial markings.Type: GrantFiled: January 12, 2005Date of Patent: April 15, 2008Assignee: Asat Ltd.Inventors: Neil McLellan, Serafin Pedron, Leo M. Higgins, III, Kwok Cheung Tsang, Kin Pui Kwan
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Publication number: 20080083980Abstract: The present invention discloses a structure of package comprising: a substrate with a die receiving through hole, a connecting through hole structure and a first contact pad; a die having micro lens area disposed within the die receiving through hole; a transparent cover covers the micro lens area; a surrounding material formed under the die and filled in the gap between the die and sidewall of the die receiving though hole; a dielectric layer formed on the die and the substrate; a re-distribution layer (RDL) formed on the dielectric layer and coupled to the first contact pad; a protection layer formed over the RDL; a second contact pad formed at the lower surface of the substrate and under the connecting through hole structure; and a transparent base formed on the protection layer.Type: ApplicationFiled: May 24, 2007Publication date: April 10, 2008Inventors: Wen-Kun Yang, Jui-Hsien Chang, Hsien-Wen Hsu, Diann-Fang Lin
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Publication number: 20080079105Abstract: A sensor-type package and a fabrication method thereof are provided. A sensor-type chip is mounted on a substrate and is electrically connected to the substrate via bonding wires. A light-pervious body is attached to the sensor-type chip, and has one surface covered with a covering layer and another surface formed with an adhesive layer. An encapsulant encapsulates the light-pervious body. As an adhesive force between the covering layer and the encapsulant is greater than that between the covering layer and the light-pervious body, the covering layer and a portion of the encapsulant located on the covering layer can be concurrently removed, such that the light-pervious body is exposed and light can pass through the light-pervious body to be captured by the sensor-type chip. The above arrangement eliminates the need of using a dam structure as in the prior art and provides a compact sensor-type package with improved fabrication reliability.Type: ApplicationFiled: September 27, 2007Publication date: April 3, 2008Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Tse-Wen Chang, Chang-Yueh Chan, Chien-Ping Huang, Chih-Ming Huang, Cheng-Hsu Hsiao
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Patent number: 7338823Abstract: The invention relates to a side-emitting LED package and a manufacturing method of the same. The invention provides a side-emitting LED package for emitting light from a light source sideward including a substrate with an electrode formed thereon. The package also includes a light source disposed on the substrate, a molded part that covers and protects the substrate with the light source thereon, and a reflective layer that covers an outer surface of the molded part. The molded part with the reflective layer forms a light transmitting surface in one side thereof. The invention allows easy manufacture of a reflecting surface in a desired shape, miniaturization regardless of the LED chip size, mass-production in an LED array, significantly improving productivity.Type: GrantFiled: June 1, 2006Date of Patent: March 4, 2008Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Kyung Taeg Han, Hun Joo Hahm, Dae Yeon Kim, Ho Sik Ahn, Seong Yeon Han, Young Sam Park, Seon Goo Lee
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Publication number: 20080038873Abstract: An apparatus for manufacturing a semiconductor device is provided. The semiconductor device includes a chip packaged with a resin mold. The apparatus includes a first mold, a second mold, and a buffer sheet. The first mold has a first cavity for forming the resin mold on a first side of the semiconductor device, and a convex part for forming an exposed area of the chip. The second mold has a second cavity for forming the resin mold on a second side of the semiconductor device. The buffer sheet is disposed between the convex part and the chip for covering the exposed area.Type: ApplicationFiled: July 12, 2007Publication date: February 14, 2008Applicant: DENSO CORPORATIONInventor: Katsunori Tanida
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Patent number: 7312106Abstract: Method for encapsulating a chip having a sensitive surface exposed in a sealed highly clean cavity package, includes bonding a chip's contact pads to lead frame contact pads, positioning the chip and lead frame into one part of a two part mould, taking measures to keep the space above the sensitive surface of the chip free during the encapsulation process, closing the mould with a second mould part, introducing the package material into the closed mould and providing the circumstances to let the package cure. The method also including applying a closed dam of heat resistant material around the sensitive chip area and placing a lid on the dam such that space above the sensitive area enclosed by the dam and the lid is sealed.Type: GrantFiled: March 26, 2002Date of Patent: December 25, 2007Assignee: Elmos Advanced Packaging B.V.Inventor: Jurgen Raben
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Publication number: 20070292982Abstract: Methods for packaging light-sensitive semiconductor devices in packages are described in which a transparent window aligned with light-sensitive surfaces of the devices are provided. The methods of the invention include steps for affixing a transparent body to a light-sensitive surface of the semiconductor device, affixing the device to a leadframe, and placing the assembled leadframe, device, and transparent body into a mold configured for contacting the transparent body. The assembled leadframe and device are encapsulated and removed from the mold, forming a package encased in encapsulant and having a transparent window aligned with the light-sensitive surface of the device.Type: ApplicationFiled: June 16, 2006Publication date: December 20, 2007Inventors: Jeffery Gail Holloway, Steven Alfred Kummerl, Bernard Peter Lange
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Patent number: 7291518Abstract: A photo-sensing device package and the method of packaging such device is provided. The package includes an assembly portion having a substrate formed of a material substantially transparent to light within a predetermined range of wavelengths and a sensing portion having at least one photo-sensing die photo-electronically transducing light within the predetermined range of wavelengths. The assembly portion is formed with at least one metal layer disposed on the substrate about a front surface region thereof, and at least one passivation layer formed to extend over the metal layer. The passivation layer is patterned to define a plurality of first and second access openings respectively about a plurality of first solder wettable pads and at least one second solder wettable pad on the metal layer.Type: GrantFiled: May 18, 2005Date of Patent: November 6, 2007Assignee: Optopac, Inc.Inventor: Deok-Hoon Kim
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Patent number: 7285445Abstract: A thermal management system is provided for semiconductor devices such as an LED array, wherein coolant directly cools the LED array. Preferably, the coolant may be selected, among other bases, based on its index of refraction relative to the index associated with the semiconductor device.Type: GrantFiled: June 13, 2006Date of Patent: October 23, 2007Assignee: Phoseon Technology, Inc.Inventors: Mark D. Owen, Francois Vlach, Duwayne R. Anderson
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Patent number: 7282393Abstract: A microelectromechanical device package with integral a heater and a method for packaging the microelectromechanical device are disclosed in this invention. The microelectromechanical device package comprises a first package substrate and second substrate, between which a microelectromechanical device, such as a micromirror array device is located. In order to bonding the first and second package substrates so as to package the microelectromechanical device inside, a sealing medium layer is deposited, and heated by the heater so as to bond the first and second package substrates together.Type: GrantFiled: January 25, 2005Date of Patent: October 16, 2007Assignee: Texas Instruments IncorporatedInventor: Terry Tarn
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Patent number: 7264980Abstract: The present invention provides a method of mounting a light emitting element, in which a light emission point can be positioned at high accuracy with respect to the mounting member. A semiconductor laser element is placed on a matching stage. Next, a position and an azimuth of a laser stripe of the semiconductor laser element is observed, and linear displacement in X and Y directions of the semiconductor laser element from a reference line and a reference point on the matching stage, and angular displacement in an azimuth (?) within an X-Y plane are measured. In accordance with a measured result, a control signal is sent to a driving mechanism of the feeding collet to drive the feeding collet, and the position of the semiconductor laser element is adjusted on the matching stage. After the adjustment, the semiconductor laser element is fed to and placed on a mounting surface of a heat sink H.Type: GrantFiled: February 6, 2006Date of Patent: September 4, 2007Assignee: Sony CorporationInventors: Masafumi Ozawa, Hiroshi Yoshida, Takashi Kobayashi
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Patent number: 7262405Abstract: Microelectronic imagers with prefabricated housings and methods of packaging microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imager can include a microelectronic die, an image sensor, and an integrated circuit operatively coupled to the integrated circuit. The microelectronic imager also includes an optic unit having an optic member. The microelectronic imager further includes a prefabricated housing having a first mounting site and a second mounting site. The die is seated within the housing at the first mounting site and the optics unit is seated within the housing at the second mounting site in a fixed, preset position in which the optic member is situated at a desired location relative to the image sensor.Type: GrantFiled: June 14, 2004Date of Patent: August 28, 2007Assignee: Micron Technology, Inc.Inventors: Warren M. Farnworth, Sidney B. Rigg, David R. Hembree, William M. Hiatt