Abstract: A method of monitoring a density profile of impurities, the method including presetting a monitoring position of a thin layer coated on a substrate, the density profile of impurities being monitored from the monitoring position in a direction of thickness of the thin layer, moving an exposer for exposing a local area of the thin layer to the monitoring position, exposing the local area of the thin layer along the direction of thickness of the thin layer, forming a shape profile of the exposed local area of the thin layer, and monitoring the density profile of impurities by determining a density of impurities in accordance with the shape profile, and an apparatus therefor. The impurity density profile may be monitored without destroying a substrate on which a thin layer is coated, and an amount of impurities used for forming the thin layer may be monitored and controlled in real-time.

Abstract: A modulated reflectance measurement system includes two lasers for generating a probe beam and an intensity modulated pump beam. The probe beam is in the visible spectrum and the pump beam is in the ultra-violet spectrum. The pump and probe beams are joined into a collinear beam and focused by an objective lens onto a sample. Reflected energy returns through the objective and is redirected by a beam splitter to a detector. A lock-in amplifier converts the output of the detector to produce quadrature (Q) and in-phase (I) signals for analysis. A processor uses the Q and/or I signals to analyze the sample.

Abstract: A method is disclosed for processing a silicon workpiece including a hybrid thermometer system for measuring and controlling the processing temperature where fabrication materials have been or are being applied to the workpiece. The hybrid thermometer system uses optical reflectance and another thermometer technique, such as a thermocouple and/or a pyrometer. Real-time spectral data are compared to values in a spectrum library to determine the “surface conditions”. A decision is then made based on the surface conditions as to how the temperature is measured, e.g., with optical reflectance, a pyrometer, or a thermocouple, and the temperature is measured using the appropriately selected technique. Utilizing the hybrid thermometer system, the temperature of a silicon workpiece may be accurately measured at low temperatures while accounting for the presence of fabrication materials.

Abstract: According to the present invention, a chemical and mechanical polishing apparatus (100) for a sample such as a wafer includes a built-in inspection apparatus (25) incorporated therein. The polishing apparatus (100) further comprises a load unit (21), a chemical and mechanical polishing unit (22), a cleaning unit (23), a drying unit (24) and an unload unit (26). The chemical and mechanical polishing apparatus (100) receives a sample from a preceding step (107), carries out respective processes for the sample by said respective units disposed within the polishing apparatus (100) and then transfers the processed sample to a subsequent step (109). Sample loading and unloading means and a sample transfer means are no more necessary for transferring the sample between respective units.

Abstract: A method, system and computer program product to isolate information related to performing a manufacturing process, called a configuration document, from the context in which the information is used. A context/configuration association can be independently established between a process context and a context-free configuration document including instructions for performing a manufacturing process. Because the context/configuration association is independent of both the process context and the context-free configuration document, the context/configuration association can be independently reviewed and approved without affecting other process contexts or configuration documents.

Abstract: Bright and dark field imaging operations in an optical inspection system occur along substantially the same optical path using the same light source by producing either a circular or an annular laser beam. Multiple beam splitting is achieved through the use of a diffractive optical element having uniform diffraction efficiency. A confocal arrangement for bright field and dark field imaging can be applied with multiple beam scanning for suppressing the signal from under-layers. A scan direction not perpendicular to the direction of movement of a target provides for improved die-to-die comparisons.

Abstract: Methods and systems for monitoring semiconductor fabrication processes are provided. A system may include a stage configured to support a specimen and coupled to a measurement device. The measurement device may include an illumination system and a detection system. The illumination system and the detection system may be configured such that the system may be configured to determine multiple properties of the specimen. For example, the system may be configured to determine multiple properties of a specimen including, but not limited to, critical dimension and overlay misregistration. In this manner, a measurement device may perform multiple optical and/or non-optical metrology and/or inspection techniques.

Abstract: A system and method for determining endpoint detection in semiconductor wafer planarization is provided. The system and method provide a flexible solution that can compensate for baseline variability induced errors that may otherwise occur in endpoint detection. The system uses an endpoint detection signal that monitors the optical characteristics of the wafer being planarized. The system and method continue to monitor the detection signal during planarization until it meets endpoint criterion that indicates endpoint completion. When the endpoint criterion is reached, a new snapshot is taken from a previous time period and a new baseline is calculated. The endpoint detection signal is then recalculated based upon the new baseline and the recalculated detection signal is again compared to the endpoint criterion. If the recalculated endpoint detection signal again substantially meets the endpoint criterion then the detection of endpoint is confirmed.

Abstract: Methods and systems for monitoring semiconductor fabrication processes are provided. A system may include a stage configured to support a specimen and coupled to a measurement device. The measurement device may include an illumination system and a detection system. The illumination system and the detection system may be configured such that the system may be configured to determine multiple properties of the specimen. For example, the system may be configured to determine multiple properties of a specimen including, but not limited to, a presence of macro defects and overlay of a specimen. In this manner, a measurement device may perform multiple optical and/or non-optical metrology and/or inspection techniques.

Abstract: A detection method for metal contamination and micro particles of a fabrication device is disclosed. The method comprises providing a control chip; transferring the control chip to a fabrication device so that the control chip is treated by the fabrication device; removing the control chip from the fabrication device; forming a silicon material layer on the control chip; and measuring the number of particles and defects formed on the silicon material layer of the control chip. Therefore, the extent of metallic contamination and micro particle of the fabrication device can be determined.

Abstract: A standard pattern of a differential value of an interference light is set with respect to a predetermined film thickness of a first member to be processed. The standard pattern uses a wavelength as a parameter. Then, an intensity of an interference light of a second member to be processed, composed just like the first member, is measured with respect to each of a plurality of wavelengths so as to obtain a real pattern of an differential value of the measured interference light intensity. The real pattern also uses a wavelength as a parameter. Then, the film thickness of the second member is obtained according to the standard pattern and the real pattern of the differential value.

Abstract: The present invention is generally directed to various methods of controlling the formation of metal silicide regions, and a system for performing same. In one illustrative embodiment, the method comprises forming a layer of refractory metal above a feature, performing at least one anneal process to convert a portion of the layer of refractory metal to at least one metal silicide region on the feature, and measuring at least one characteristic of at least one metal silicide region while the anneal process is being performed. In another illustrative embodiment, the method comprises forming a layer of refractory metal above a feature, performing at least one anneal process to convert a portion of the layer of refractory metal to at least one metal silicide region on the feature, and performing at least one scatterometric measurement of the metal silicide region after at least a portion of the anneal process is performed to determine at least one characteristic of the metal silicide region.

Abstract: A system and method for analyzing sheet resistivity of a layer on a wafer employing electrical methods and for controlling rapid thermal annealing (RTA) of the layer is provided. The system includes components for performing RTA on the layer and components for analyzing the sheet resistivity of one or more portions of the layer upon which RTA was performed. The system further includes a feedback generator adapted to accept sheet resistivity data and to produce feedback information that can be used to control the RTA components. The system further includes a data store that can be employed in machine learning and/or to facilitate generating feedback information that can be employed to control RTA and a monitoring application that can be employed to schedule maintenance on the various components in the system.

Abstract: A method of measuring a concentration of a material includes irradiating an infrared light onto a substrate having a layer including a first material and dopants, wherein the infrared light is partially absorbed by and partially transmitted through the substrate including the layer. Intensities of the infrared light absorbed in the first material and the dopants are computed according to light wave numbers by utilizing a difference between intensities of the infrared light before and after transmitting the substrate and layer and by utilizing a difference between intensities of the infrared light absorbed in the substrate and layer and absorbed in only the substrate. Concentrations of the dopants are obtained by utilizing a ratio of light wave number regions corresponding to predetermined intensities of infrared light absorbed in the dopants relative to light wave number regions corresponding to the predetermined intensity of infrared light absorbed in the first material.

Abstract: The present invention generally provides an apparatus and a method for inspecting a substrate in a processing system. In one aspect, a par of light sources is used in conjunction with an optical receiving device, such as a camera having a CCD, to illuminate and inspect a substrate for various optical signatures. The substrate signatures are then used to generate images of obstructions in three dimensions (3-D) for further analysis. In one embodiment, the substrate is scanned in two or more directions with a first light source and then scanned in two or more directions with a second light source. A receiver captures the reflected and/or scatted signals from sources comprising two or more different images. The light illumination from the first and second light sources impinges on substrate surface obstructions from two differing angles (i.e. perspectives).

Abstract: One embodiment of the present invention provides a system that electronically aligns pads on different semiconductor chips to facilitate communication between the semiconductor chips through capacitive coupling. The system operates by measuring an alignment between a first chip and a second chip, wherein the first chip is situated face-to-face with the second chip so that transmitter pads on the first chip are capacitively coupled with receiver pads on the second chip. Next, the system uses the measured alignment to associate transmitter pads on the first chip with proximate receiver pads on the second chip. The system then selectively routes data signals to transmitter pads on the first chip so that the data signals are communicated through capacitive coupling to intended receiver pads in the second chip that are proximate to the transmitter pads.

Abstract: A structure having a number of traces passing through a region is evaluated by using a beam of electromagnetic radiation to illuminate the region, and generating an electrical signal that indicates an attribute of a portion (also called “reflected portion”) of the beam reflected from the region. The just-described acts of “illuminating” and “generating” are repeated in another region, followed by a comparison of the generated signals to identify variation of a property between the two regions. Such measurements can identify variations in material properties (or dimensions) between different regions in a single semiconductor wafer of the type used in fabrication of integrated circuit dice, or even between multiple such wafers. In one embodiment, the traces are each substantially parallel to and adjacent to the other, and the beam has wavelength greater than or equal to a pitch between at least two of the traces.

Abstract: A method of collating and using captured semiconductor-wafer image data in an automated defect analysis. The method includes the steps of receiving image data and, if necessary, converting it to a digital format. Once the data is in pixel-by-pixel form, each pixel is assigned a slope value derived from the direction of the structure edge, if any, on which it lies. The pixel-slope data is then evaluated to determine whether a photo-resist anomaly is present. The method may also include evaluated an average pixel slope value for each inspected wafer. Dependant claims further define the invention to claim an inspection system for employing the method.

Abstract: A semiconductor laser includes an active layer stripe including a first semiconductor layer, an active layer, and a second semiconductor layer that are laminated in that order on a substrate and formed into a stripe-shape; a burying layer in which the active layer stripe is buried; and a contact layer formed on the burying layer. The semiconductor laser further includes a monitor stripe that is formed in parallel to the active layer stripe and is composed of the first semiconductor layer only at an output end of the laser, the monitor stripe is buried in the burying layer on which the contact layer is formed, and the active layer stripe and the monitor stripe are isolated electrically by an isolation groove. The width of the active layer stripe can be controlled easily based on the width of the active layer in the monitor stripe as a criterion.

Abstract: A method of using critical dimension measurements to control stepper process parameters is disclosed. In one illustrative embodiment, the method comprises forming a masking layer above a process layer, the masking layer having a plurality of features formed therein, measuring at least one critical dimension of a plurality of features positioned within at least one exposure field of a stepper exposure process used in forming the features, and determining a tilt of the masking layer within at least one exposure field based upon the measured critical dimensions of the plurality of features. In one illustrative embodiment, the system comprises a metrology tool adapted to measure at least one critical dimension of a plurality of features in a masking layer and a controller for determining a tilt of the masking layer based upon the measured critical dimensions of said plurality of features.

Abstract: A method for fabricating semiconductor die packages including a mounting substrate and dice attached thereto. The mounting substrate includes multiple die attach sites and a designator having substrate identification information. The die attach sites are evaluated and categorized as either good or defective die attach sites, wherein the evaluated information is saved in an electronic file as mapped information. A die is attached to the die attach sites in accord with the information, wherein known good dice are attached to the good die attach sites and known defective dice are attached to the defective die attach sites. The assembly is then encapsulated in a transfer molding operation.

Abstract: The invention generally relates to various aspects of a plasma process and, more specifically, to the monitoring of such plasma processes. One aspect relates to a plasma monitoring module that may be adjusted in at least some manner so as to re-evaluate a previously monitored plasma process. For instance, optical emissions data on a plasma process that was previously monitored by the plasma monitoring module may be replayed through the plasma monitoring module after making at least one adjustment in relation to the plasma monitoring module.

Abstract: The present invention provides a process for producing a polycrystal silicon film which comprises a step of forming a polycrystal silicon film by light irraditation of a silicon film set on a substrate, and a step of selecting substrate samples having an average grain size in a plane of the sample of 500 nm or more. According to the present invention, stable production of a high-performance poly-silicon TFT liquid crystal display becomes possible.

Abstract: A method of measuring at least one parameter associated with a portion of a sample having formed thereon one or more structures with at least two zones each having an associated zone reflectance property. The method includes the steps of illuminating the zones with broadband light, and measuring at least one reflectance property of light reflected from the at least two zones. The measurement includes a substantial portion of non-specularly scattered light, thereby increasing the quality of the measurement. The method further includes the step of fitting a parameterized model to the measured reflectance property. The parameterized model mixes the zone reflectance properties of the zones to account for partially coherent light interactions between the two zones.

Abstract: According to an example embodiment of the present invention, a portion of substrate in the back side of a semiconductor chip is removed as a function of photons emitted through substrate remaining at the back side. The use of emitted photons is used to control the substrate removal process.

Abstract: A method for detecting defects of a semiconductor device is provided. The semiconductor device comprises at least a substrate, a gate, a source region, a drain region, a plug, an insulating layer, and a conducting line. The plug electrically connects the source region or the drain region and is above a portion of the gate. At least a defect exists between the plug and the gate. The method comprises: polishing the semiconductor device until the plug above the gate is removed; cleaning the semiconductor device; removing the insulating layer between the gate and the plug; and detecting the defect between the plug and the gate.

Abstract: In a conventional evaluation method of IG effectivity on Cu in semiconductor silicon substrates, it is required to actually conduct the device process, or a great deal of time, manpower and expenses for manufacturing a MOS device for dielectric breakdown estimation and the like are needed, but in the present invention, the problem was solved by experimentally finding in advance the optimum ranges of the diagonal length and density of oxygen precipitates which make the IG effectivity on Cu favorable, and conducting a heat treatment for the addition of IG effectivity based on a simulation by calculations using Fokker-Planck equations so that the diagonal length and density of plate-like precipitates fall within the optimum ranges.

Abstract: A method of fabricating a silicon-on-insulator (SOI) having a superficial Si-containing layer that has a reduced number of tile and divot defects is provided. The method includes the steps of: implanting oxygen ions into a surface of a Si-containing substrate, the implanted oxygen ions having a concentration sufficient to form a buried oxide region during a subsequent annealing step; and annealing the substrate containing implanted oxygen ions under conditions wherein the implanted oxygen ions form a buried oxide region which electrically isolates a superficial Si-containing layer from a bottom Si-containing layer. Moreover, the annealing conditions employed are capable of reducing the number of tile or divot defects present in the superficial Si-containing layer so as to allow optical detection of any other defect that has a lower density than the tile or divot defect. The present invention also relates to the SOI substrate that is produced using the inventive method.

Abstract: The present invention is generally directed to various methods of controlling copper barrier/seed deposition processes, and a system for accomplishing same. In one illustrative embodiment, the method comprises performing at least one process operation to form a barrier metal layer and a copper seed layer above a wafer, sensing at least one parameter of at least one process operation and determining an acceptability metric for the barrier metal layer and the copper seed layer based upon the sensed at least one parameter. In some embodiments, the method further comprises modifying at least one parameter of said at least one process operation to be performed to form a barrier metal layer and a copper seed layer on a subsequently processed wafer based upon said determined acceptability metric. In some embodiments, the method further comprises identifying a wafer as unacceptable if said acceptability metric falls below a preselected level.

Abstract: A test wafer for use in wafer temperature prediction is prepared. The test wafer includes: first semiconductor layer formed in a crystalline state; second semiconductor layer formed in an amorphous state on the first semiconductor layer; and light absorption film formed over the second semiconductor layer. Next, the test wafer is loaded into a lamp heating system and then irradiating the test wafer with a light emitted from the lamp, thereby heating the second semiconductor layer through the light absorption film. Thereafter, a recovery rate, at which a part of the second semiconductor layer recovers from the amorphous state to the crystalline state at the interface with the first semiconductor layer, is calculated. Then, a temperature of the test wafer that has been irradiated with the light is measured according to a relationship between the recovery rate and a temperature corresponding to the recovery rate.

Abstract: A P-type diffusion diode is used as a probe point for an infrared laser probing system. The P-type diffusion diode probe point may be formed on a semiconductor substrate and connected to an integrated circuit thereon. The P-type diffusion diode probe point may result in higher signal-to-noise ratios in testing of integrated circuits at lower voltages.

Abstract: Methods for adjusting the bulk material properties of manufactured components, such as resistors, capacitors, resonators, oscillators, and optical components. Adjustment of the resistance of a resistor can be achieved by directing a high energy beam, such as an ultraviolet beam, onto a resistor formed from a matrix component and an embedded conductive component. The matrix component can be, for example, a cross-linkable polymer or a sol-gel material. In this case, the embedded conductive component can be carbon particles or a suboxide material, respectively. The high energy beam adjusts the resistivity of the resistor material substantially without ablating the matrix component. Because of the lack of ablation, the material having a property to be adjusted can be a sub-layer in a laminated structure, with the high energy beam being directed through other layers formed thereon.

Abstract: A polysilicon film evaluation apparatus is provided which enables objective automatic evaluation of the status of a polysilicon film, as formed to a high accuracy in a contact-free fashion.

Abstract: The present invention relates to a measuring system adapted for providing a measurement of an optical parameter of an optical device under test —DUT—, comprising a measuring instrument adapted to perform the measurement and to provide a measurement signal comprising a plurality of values of the measured optical parameter of the DUT over the time. To improve the measurement the measuring system is adapted to receive a temperature signal comprising a plurality of values of the measured temperature of the DUT over the time, and to provide an output signal wherein values of the measured temperature are associated to such values of the measured optical parameter of the DUT that correspond in time.

Abstract: A method for marking a wafer that is cut from a boule. A surface of the boule is marked with an encoded marking that extends completely along a distance of the boule that is used for cutting wafers. The encoded marking is disposed substantially parallel to a length axis of the boule. The wafer is cut from the boule from within the distance, such that the encoded marking along the surface of the boule is disposed at a peripheral edge of the wafer. The encoded marking contains information in regard to the wafer.

Abstract: The present invention is directed to a system, method and software program product for calculating metrological data (e.g. layer thicknesses and depths of recesses and trenches) on a surface or structure, such as a semiconductor wafer. The present method does not require knowledge of the reflectivity or transmissivity of the surface or structure, but only a quantity related to the reflectivity or transmissivity linear transformation needs to be known. Initially, a simplified optical model for the process is constructed using as many parameters as necessary for calculating the surface reflectivity of the discrete regions on the wafer. Reflectivity data are collected from the surface of a wafer using, for instance, in-situ monitoring, and nominal reflectivity is determined from the ratio of the current spectrum to a reference spectrum. The reference spectrum is taken from a reference wafer consisting entirely of a material in which the reflection properties are well characterized.

Abstract: A method of polishing a film formed on a wafer includes steps of polishing a film formed on a surface of a wafer which is chucked by a wafer chuck and set on a polishing disk so that the film faces the polishing disk, irradiating a plurality of portions of the film under polishing process with lights having different wavelengths from one another through a plurality of holes formed in the polishing disk, detecting lights reflected from the plurality of portions of the film caused by the irradiation, evaluating a thickness distribution of the film from information of an intensity ratio of the detected reflected lights, and controlling a pushing pressure of the wafer chuck according to the evaluated thickness distribution under polishing process.

Abstract: Determining the maximum number of dies that fit on a semiconductor wafer is disclosed. The x- and y-coordinates of an initial starting position on a semiconductor wafer are determined. The delta-x and delta-y offsets for subsequent starting positions are also determined. Starting at a current position equal to the initial starting position, the following is repeated for each of a predetermined number of times. First, the semiconductor wafer is covered with fields. Second, the number of dies that are completely covered by the semiconductor wafer is counted. Third, the current starting position is increased by the delta-x and the delta-y offsets. Once this has been repeated, the actual starting position is set as the current starting position at which the number of dies completely covered by the semiconductor wafer is maximized.

Abstract: A semiconductor device wafer-on-support wafer package comprising a plurality of segmentable chip-scale packages and method of constructing, burning-in, and testing same are disclosed. The wafer-on-wafer package can be burned-in and tested at the wafer level prior to segmenting, or singulating, the wafer-on-wafer package into a plurality of individual chip-scale packages. The device wafer includes a plurality of unsingulated semiconductor dice having a plurality of die bond pads being respectively bonded to a plurality of electrically conductive die bond pad connect elements provided on a first surface of the support wafer.

Abstract: The present invention is generally directed to various methods of controlling wet chemical processes in forming metal silicide regions, and a system for performing same. In one illustrative embodiment, the method comprises providing a substrate having a layer of unreacted refractory metal and at least one metal silicide region formed thereabove, performing a wet chemical process to remove at least a portion of the layer of unreacted refractory metal, measuring at least one characteristic of the portion of the layer of unreacted refractory metal while the wet chemical process is being performed, and controlling at least one parameter of the wet chemical process based upon the measured at least one characteristic of the portion of the layer of unreacted refractory metal.

Abstract: An improved method of high pass filtering a data set includes flattening the data set and then filtering the flattened data set with an adaptive filter. The data set is flattened by fitting it to a predetermined function, and then obtaining the difference between the original data set and the fitted data set. Beneficially, the predetermined function is a polynomial. The adaptive filter includes a masking function that has a constant, non-zero value (e.g., 1) within the bounds of the original data set and value of zero outside the bounds of the original data set.

Abstract: A method and apparatus is provided for creating a process recipe based on a desired result. The method comprises providing at least one workpiece to a processing tool for processing, providing the desired result for the workpiece to the processing tool, and generating a recipe for processing the workpiece based on the desired result.

Abstract: A method is provided that allows a simple and inexpensive apparatus to measure the uniformity of the height-directional positions of spheres or hemispheres such as bump electrodes of a semiconductor device. The degree of focus is calculated from an image of bump electrodes 11a and 11b acquired at a first focusing position F1 using an imaging system. After that, the bump electrodes 11a and 11b and the imaging system is relatively moved closer or farther, and then the degree of focus is calculated from an image acquired at a second focusing position F2. The degrees of focus at these two focusing positions F1 and F2 are compared with each other. As a result, detected are the contour lines of the horizontal cross sections of the bump electrodes 11a and 11b at the height (F1+F2)/2 of the position of equal degree of focus indicated by PQ. On the basis of the shapes and/or sizes thereof, the height-directional positions of the bump electrodes 11a and 11b are measured.

Abstract: A method of using high yielding spectra scatterometry measurements to control semiconductor manufacturing processes and systems for accomplishing same is disclosed. In one embodiment, the method comprises providing a library comprised of at least one target optical characteristic trace of a grating structure comprised of a plurality of gate stacks, the target trace corresponding to a semiconductor device having at least one desired electrical performance characteristic, providing a substrate having at least one grating structure formed thereabove, the formed grating structure comprised of a plurality of gate stacks, illuminating at least one grating structure formed above said substrate, measuring light reflected off of the grating structure formed above the substrate to generate an optical characteristic trace for the formed grating structure, and comparing the generated optical characteristic trace to the target trace.

Abstract: A novel method and system for fabricating integrated circuit devices is disclosed herein. In one embodiment, the method comprises determining at least one electrical performance characteristic of a plurality of semiconductor devices formed above at least one semiconducting substrate, providing the determined electrical performance characteristics to a controller that determines, based upon the determined electrical characteristics, across-substrate variations in an exposure dose of a stepper exposure process to be performed on at least one subsequently processed substrate, and performing the stepper exposure process comprised of the across-substrate variations in exposure dose on the subsequently processed substrates.

Abstract: Photoresist reflow for an enhanced process window for non-dense contacts is disclosed. A corrective bias is determined for application to each of a number of contacts at different pitches, to achieve a substantially identical critical dimension for each contact. The corrective bias is determined based on a first and a second critical dimension for each contact, where the first critical dimension is before photoresist reflow, and potentially inclusive of optical proximity effects, and the second critical dimension is after photoresist reflow. A photomask is then constructed for a semiconductor design that incorporates the corrective bias that has been determined for the contacts of the design. Lithographical processing of the semiconductor design on a semiconductor wafer using thus photomask, and subsequent photoresist reflow, thus achieves a substantially identical critical dimension for each of the contacts of the semiconductor design.

Abstract: A technique is disclosed that allows alignment of substrates on a run-to-run basis by using the position data of one or more previously aligned substrates to determine a setpoint of a pre-alignment process for one or more subsequent substrates. The setpoint may also be determined on the basis of a predefined characteristic of the substrates to be aligned.

Abstract: A temperature measuring apparatus, comprises a light splitting section for splitting the light radiated from a substrate into plural light components having wavelengths over a predetermined wavelength region, a detection section for detecting the intensities of the light components obtained by the light splitting section, an integrated value calculating section for calculating an integrated value of radiation intensity by cumulatively adding the intensities of the light components detected by the detecting section, and a surface temperature calculating section for calculating the surface temperature of the substrate from the integrated value, on the basis of reference data representing the relation between the temperature and the integrated value.

Abstract: A stencil mask is disclosed which can be produced by performing pattern correction in a practically applicable comparatively short period of time. When stencil mask pattern data are corrected by a stress analysis, displacement amounts are calculated for those of stencil hole patterns which have a size equal to or greater than a predetermined size. As a result, stencil mask pattern data having corrected patterns are obtained in a comparatively short period of time which can be applied industrially. By producing a stencil mask based on the patterns, a stencil mask in which a desired pattern is formed is obtained.

Abstract: Disclosed are a method and apparatus for inspecting a wafer for electrical defects. A first electron beam is irradiated onto an area of the wafer including an inspection region to charge the area. A second electron beam is irradiated onto the inspection region to inspect the inspection region after focusing the second electron beam on the inspection region. A third electron beam is irradiated onto the area to discharge charges accumulated on the area. Therefore, the electrical defect of the wafer can be precisely detected with increased voltage contrasts for distinguishing the electrical defect. This method and apparatus have improved detection sensitivity and detection reliability over conventional methods.