Abstract: A method of detecting and classifying anomalies during semiconductor processing includes executing a wafer recipe a semiconductor processing system to process a semiconductor wafer; monitoring sensor outputs from a sensors that monitor conditions associated with the semiconductor processing system; providing the sensor outputs to models trained to identify when the conditions associated with the semiconductor processing system indicate a fault in the semiconductor wafer; receiving an indication of a fault from at least one of the models; and generating a fault output in response to receiving the indication of the fault.

Abstract: A polishing method is used for polishing a substrate such as a semiconductor wafer to a flat mirror finish. A method of polishing a substrate by a polishing apparatus includes a polishing table (100) having a polishing surface, a top ring (1) for holding a substrate and pressing the substrate against the polishing surface, and a vertically movable mechanism (24) for moving the top ring (1) in a vertical direction. The top ring (1) is moved to a first height before the substrate is pressed against the polishing surface, and then the top ring (1) is moved to a second height after the substrate is pressed against the polishing surface.

Abstract: Disclosed are a method and apparatus for determining electrical characteristics of a transistor, and a computer-readable storage medium. The method for determining electrical characteristics of a transistor includes: determining mobility characteristics of carriers in channels of the transistor at a transistor operating temperature condition; and determining electrical characteristics of the transistor based on the mobility characteristics of the carriers, semiconductor material properties of the transistor, and structural features of the transistor.

Abstract: Aspects of the disclosure provide methods for polysilicon characterization. The method includes receiving image data of a polysilicon structure formed on a sample substrate. The image data is in a spatial domain and is generated by transmission electron microscopy (TEM). Further, the method includes extracting frequency spectrum of the image data in a frequency domain. Then, the method includes selecting a subset of the frequency spectrum that corresponds to characteristic of first crystal grains that are of a first orientation, and transforming the selected subset of the frequency spectrum to the spatial domain to construct a first spatial image for the first crystal grains of the first orientation.

Abstract: Systems and methods of enhancing imaging resolution by reducing crosstalk between detection elements of a secondary charged-particle detector in a multi-beam apparatus are disclosed. The multi-beam apparatus may comprise an electro-optical system for projecting a plurality of secondary charged-particle beams from a sample onto a charged-particle detector. The electro-optical system may include a first pre-limit aperture plate comprising a first aperture configured to block peripheral charged-particles of the plurality of secondary charged-particle beams, and a beam-limit aperture array comprising a second aperture configured to trim the plurality of secondary charged-particle beams. The charged-particle detector may include a plurality of detection elements, wherein a detection element of the plurality of detection elements is associated with a corresponding trimmed beam of the plurality of secondary charged-particle beams.

Abstract: A substrate work system including a work device configured to perform predetermined work on a substrate by use of an exchangeable work unit includes a storage section configured to store the work unit, a maintenance device configured to perform maintenance of the work unit, a conveyance device capable of conveying the work unit, a determination section configured to determine a maintenance time for the work unit used in the work device based on quality information on work quality of the predetermined work, and a control section configured to, when the determination section determines that a maintenance time arrives, cause the conveyance device, the work device, and the maintenance device to unload the work unit, convey the work unit to the work device to exchange with the work unit that has been used, and convey the used-up work unit to the maintenance device.

Abstract: An array of light emitting devices is mounted on a support surface with the transparent growth substrate (e.g., sapphire) facing up. A photoresist layer is then deposited over the top surface of the growth substrate, followed by depositing a reflective material over the top and side surfaces of the light emitting devices to encapsulate the light emitting devices. The top surfaces of the light emitting devices are then ground down to remove the reflective material over the top surface of the photoresist. The photoresist is then dissolved to leave a cavity over the growth substrate having reflective walls. The cavity is then filled with a phosphor. The phosphor-converted light emitting devices are then singulated to form packaged light emitting devices. All side light is reflected back into the light emitting device by the reflective material and eventually exits the light emitting device toward the phosphor. The packaged light emitting devices, when energized, appear as a white dot with no side emission (e.g.

Abstract: High bandwidth time-and-space resolved phase transition microscopy systems configured to detect melt onset in a wafer being processed by laser annealing systems with ultra-short dwell times and spot size.

Abstract: A method for etching a ruthenium film includes a first step of etching the ruthenium film by plasma processing using oxygen-containing gas, and a second step of etching the ruthenium film by plasma processing using chlorine-containing gas. The first step and the second step are alternately performed. In the first step and the second step, the ruthenium film is etched at a target control temperature for a target processing time that are determined based on a pre-obtained relation between an etching amount per one cycle including the first step and the second step as a set, a control temperature of the ruthenium film, and processing times of each of the first step and the second step.

Abstract: An acoustic testing method includes providing an electrical signal to a wafer, receiving a sound wave generated by the acoustic transducer according to the electrical signal, and generating a sensing result for determining an acoustic functionality of the acoustic transducer. The wafer includes a plurality of acoustic transducers, and the electrical signal is provided to an acoustic transducer within the wafer.

Abstract: A test device for a high-speed/high-frequency test. The test device includes: a conductive block which includes a probe hole; at least one signal probe which is supported in an inner wall of the probe hole without contact, includes a first end to be in contact with a testing contact point of the object to be tested, and is retractable in a lengthwise direction; and a coaxial cable which includes a core wire to be in electric contact with a second end of the signal probe. With this test device, the coaxial cable is in direct contact with the signal probe, thereby fully blocking out noise in a test circuit board.

Abstract: A method for determining an overlapping process window (OPW) of an area of interest on a portion of a design layout for a device manufacturing process for imaging the portion onto a substrate, the method including: obtaining a plurality of features in the area of interest; obtaining a plurality of values of one or more processing parameters of the device manufacturing process; determining existence of defects, probability of the existence of defects, or both in imaging the plurality of features by the device manufacturing process under each of the plurality of values; and determining the OPW of the area of interest from the existence of defects, the probability of the existence of defects, or both.

Abstract: High intensity multi-directional FDM 3D printing method for stereo vision monitoring involves intelligent control and computer vision technology. Specifically, it involves multi-directional 3D printing hardware platform construction, stereo vision detection, laser heating to enhance the connection strength between various parts of the model, so as to reduce the use of external support structure as much as possible on the premise of ensuring the printing accuracy, and make the various parts of the model can be well connected to enhance the integrity of the model.

Abstract: The present invention provides an identification key generating device and an identification key generating method. The identification key generating device comprises: a plurality of unit cells provided on a circuit in a semiconductor manufacturing procedure; a reading unit for reading for shorting of each of the unit cells; a digital value generation unit for determining the probability for the shorting of each of the unit cells, and generating a digital value of each of the unit cells on the basis of the reading for shorting from the reading unit; and a selection unit for selecting at least one of the plurality of unit cells, wherein an identification key is generated from a combination of respective digital values generated from the unit cells selected by means of the selection unit.

Abstract: The present disclosure provides a method for measuring an underfill profile of an underfill material in an underfill cavity having a plurality of solder bumps. The method includes the operations of: determining a mesh having a plurality of elements according to the underfill cavity; calculating a reference force according to the underfill cavity; obtaining a driving force and a flow speed of the underfill material according to a plurality of weighting factors and the reference force, wherein the plurality of weighting factors respectively correspond to the plurality of elements; obtaining a plurality of volume fractions respectively corresponding to the plurality of elements according to the flow speed; and obtaining the underfill profile according to the plurality of volume fractions.

Abstract: There is provided a substrate processing method including: reducing an oxide of a ruthenium film by supplying a hydrogen-containing gas to a substrate including the ruthenium film; etching the ruthenium film by supplying an oxygen-containing gas to the substrate so as to oxidize the ruthenium film; and repeating, multiple times, a cycle including reducing the oxide of the ruthenium film and etching the ruthenium film.

Abstract: A method for verifying semiconductor wafers includes receiving a semiconductor wafer including a plurality of layers. A first set of measurement data is obtained for at least one layer of the plurality of layers, where the first set of measurement data includes at least one previously recorded thickness measurement for one or more portions of the at least one layer. The first set of measurement data is compared to a second set of measurement data for the at least one layer. The second set of measurement data includes at least one new thickness measurement for the one or more portions of the at least one layer. The semiconductor wafer is determined to be an authentic wafer based on the second set of measurement data corresponding to the first set of measurement data, otherwise the semiconductor is determined to not be an authentic wafer.

Abstract: An example of a method of micro-transfer printing comprises providing a micro-transfer printable component source wafer, providing a stamp comprising a body and spaced-apart posts, and providing a light source for controllably irradiating each of the posts with light through the body. Each of the posts is contacted to a component to adhere the component thereto. The stamp with the adhered components is removed from the component source wafer. The selected posts are irradiated through the body with the light to detach selected components adhered to selected posts from the selected posts, leaving non-selected components adhered to non-selected posts. In some embodiments, using the stamp, the selected components are adhered to a provided destination substrate. In some embodiments, the selected components are discarded. An example micro-transfer printing system comprises a stamp comprising a body and spaced-apart posts and a light source for selectively irradiating each of the posts with light.

Abstract: The present disclosure relates to a power interface, and more particularly, to a power interface for electrically connecting an object to be tested and a test driving unit. The electric power interface in accordance with an exemplary embodiment includes: a support member; an elastic member fixed to the support member and configured to provide an elastic force in a vertical direction; a first connection terminal disposed on the elastic member; a second connection terminal electrically connected to the first connection terminal; and a flexible sheet has one side fixed to the elastic member and the other side fixed to the support member to restrict a deformation range of the elastic member.

Abstract: Embodiments related to systems and methods for thickness measurement in semiconductor structures are disclosed. For example, a method for thickness detection in a semiconductor structure may include detecting, by at least one processor, a tilt of an image of a stack of layers in the semiconductor structure. The method may also include performing, by the at least one processor, rough boundary line detection on the layers of the stack in the image. The method may further include performing, by the at least one processor, fine thickness detection on the layers of the stack in the image. The rough boundary line detection may detect boundaries of the layers of the stack with a first precision and the fine thickness detection may detect thickness of the layers of the stack with a second precision greater than the first precision. The method may additionally include providing, by the at least one processor, output results of the fine thickness detection.

Abstract: In some embodiments, a field effect transistor structure includes a first semiconductor structure and a gate structure. The first semiconductor structure includes a channel region, and a source region and a drain region. The source region and the drain region are formed on opposite ends of the channel region, respectively. The gate structure includes a central region and footing regions. The central region is formed over the first semiconductor structure. The footing regions are formed on opposite sides of the central region and along where the central region is adjacent to the first semiconductor structure.

Abstract: Systems, metrology modules and methods are provided, which identify, per wafer site, components of residuals from measurement of metrology metric(s), and optimize measurement parameters for each site, according to the identified residuals' components. Certain embodiments utilize metric landscapes to identify sensitive sites and/or to identify sites exhibiting highest accuracy, and corresponding metrics may be combined over the wafer to further enhance the metrology performance. Zonal analysis may be used to reduce the systematic errors, and disclosed per-site analysis may be used to further reduce the non-systematic error components, and relate the remaining residuals components to process variation over the wafer.

Abstract: A method of producing microelectronic components includes forming a functional layer system; applying a laminar carrier to the functional layer system; attaching a workpiece to a workpiece carrier; utilizing incident radiation of a laser beam is focused in a boundary region between a growth substrate and the functional layer system, and a bond between the growth substrate and the functional layer system in the boundary region is weakened or destroyed; separating a functional layer stack from the growth substrate, wherein a vacuum gripper having a sealing zone that circumferentially encloses an inner region is applied to the reverse side of the growth substrate, a negative pressure is generated in the inner region such that separation of the functional layer stack from the growth substrate is initiated in the inner region; and the growth substrate held on the vacuum gripper is removed from the functional layer stack.

Abstract: Methods for enhancing a surface topography of a structure formed on a substrate are provided. In one example, the method includes performing a polishing process on a substrate having a shallow trench isolation structure and a diffusion region, performing a surface topography enhancing process to enlarge a defect in at least one of the shallow trench isolation structure and the diffusion region, inspecting at least one of the shallow trench isolation structure and the diffusion region to detect the enlarged defect, and adjusting a parameter of the polishing process in response to detecting the enlarged defect.

Abstract: Devices, systems, and methods obtain a reference image; obtain a test image; globally align the test image to the reference image; select subfields in the test image; align the subfields in the test image with respective areas in the reference image; warp the test image based on the aligning of the subfields; select anchor points in the reference image; select anchor-edge points in the reference image; realign the subfields in the warped test image with respective areas in the reference image based on the anchor points in the reference image and on the anchor-edge points in the reference image; and warp the warped test image based on the realigning of the subfields.

Abstract: A method and system is provided for detecting at risk structures due to mask overlay that occur during lithography processes. The method can be implemented in a computer infrastructure having computer executable code tangibly embodied on a computer readable storage medium having programming instructions. The programming instructions are operable to obtain a simulation of a metal layer and a via, and determine a probability that an arbitrary point (x, y) on the metal layer is covered by the via by calculating a statistical coverage area metric followed by mathematical approximations of a summing function.

Abstract: Example systems for determining a configuration of a test system execute operations that include receiving first parameters specifying at least part of an operation of a test system; receiving second parameters specifying at least part of a first configuration of the test system; determining a second configuration of the test system based, at least in part, on the first parameters and the second parameters, with the second configuration being determined to impact a cost of test of the test system; generating, by one or more processing devices, data for a graphical user interface representing information about the second configuration and the cost of test; and outputting the data for the graphical user interface for rendering on a display device.

Abstract: Devices, systems, and methods obtain a reference image; obtain a test image; globally align the test image to the reference image; select subfields in the test image; align the subfields in the test image with respective areas in the reference image; warp the test image based on the aligning of the subfields; select anchor points in the reference image; select anchor-edge points in the reference image; realign the subfields in the warped test image with respective areas in the reference image based on the anchor points in the reference image and on the anchor-edge points in the reference image; and warp the warped test image based on the realigning of the subfields.

Abstract: There is provided a method for correcting a relative position between a probe card having a plurality of cantilever-type probes and an object to be inspected having a plurality of electrode pads, including: arranging a first group of cantilever-type probes among the plurality of cantilever-type probes in a first region and a second region; arranging a second group of cantilever-type probes among the plurality of cantilever-type probes in a third region and a fourth region; obtaining needle traces formed on the plurality of electrode pads, which are generated when the first group of cantilever-type probes and the second group of cantilever-type probes that are arranged in the first region, the second region, the third region, and the fourth region, are brought into contact with the plurality of electrode pads; and correcting the relative position between the probe card and the object to be inspected based on the obtained needle traces.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a trench in a substrate; forming a pad layer adjacent to two sides of trench; forming a dielectric layer to fill the trench; and performing a dry etching process to remove the pad layer and part of the dielectric layer to form a shallow trench isolation (STI). Preferably, the dry etching process comprises a non-plasma etching process.

Abstract: This disclosure relates to a method for using a high volume manufacturing system for processing and measuring workpieces in a semiconductor processing sequence without leaving the system's controlled environment (e.g., sub-atmospheric pressure). The system includes an active interdiction control system to implement corrective processing within the system when a non-conformity is detected. The corrective processing method can include a remedial process sequence to correct the non-conformity or compensate for the non-conformity during subsequent process. The non-conformity may be associated with fabrication measurement data, process parameter data, and/or platform performance data.

Abstract: In a method of manufacturing a semiconductor device, an underlying structure is formed over a substrate. A film is formed over the underlying structure. Surface topography of the film is measured and the surface topography is stored as topography data. A local etching is performed by using directional etching and scanning the substrate so that an entire surface of the film is subjected to the directional etching. A plasma beam intensity of the directional etching is adjusted according to the topography data.

Abstract: A semiconductor device includes a substrate including a circuit region and an outer border, a plurality of detecting devices disposed over the substrate and located between the circuit region and the outer border, first and second probe pads electrically connected to two ends of each detecting device, and a seal ring located between the outer border of the substrate and the detecting devices. A method for detecting defects in a semiconductor device includes singulating a die having a substrate, a plurality of detecting devices, a first probe pad and a second probe pad electrically connected to two ends of each detecting device, and a seal ring; probing the first and the second probe pads to determine a connection status of the detecting devices; and recognizing a defect when the connection status of the detecting devices indicates an open circuit.

Abstract: A wafer inspection system includes a controller in communication with an electron-beam inspection tool. The controller includes circuitry to: acquire, via an optical imaging tool, coordinates of defects on a sample; set a Field of View (FoV) of the electron-beam inspection tool to a first size to locate a subset of the defects; determine a position of each defect of the subset of the defects based on inspection data generated by the electron-beam inspection tool during a scanning of the sample; adjust the coordinates of the defects based on the determined positions of the subset of the defects; and set the FoV of the electron-beam inspection tool to a second size to locate additional defects based on the adjusted coordinates.

Abstract: A netlist may include a set of resistance components of an integrated circuit (IC) design, and may specify a length, a width, and a metal layer of each resistance component in the set of resistance components, and physical locations of circuit nodes connected to each resistance component in the set of resistance components. A process description may specify the resistivity and thickness of each metal layer in the IC design. For a resistance component in the set of resistance components, resistivity and thickness of the metal layer of the resistance component may be determined based on the process description, and an inductance component corresponding to the resistance component may be determined based on the length and the width of the resistance component, the resistivity and the thickness of the metal layer of the resistance component, and the physical locations of the circuit nodes connected to the resistance component.

Abstract: A display device including: a substrate including a display area for displaying an image and a non-display area positioned at a periphery of the display area; a plurality of pixels positioned at the display area; a plurality of data lines connected with the plurality of pixels; and a crack detecting line positioned at the non-display area, wherein the crack detecting line includes: a plurality of unit connectors extending in a first direction, wherein the first direction is parallel to an extending direction of a side of the substrate nearest to the unit connectors; and a plurality of wiring portion units connected to each other through the plurality of unit connectors, wherein the number of wiring portion units is an even number.

Abstract: A semiconductor device includes “n” pairs of pn-junction structures, wherein the i-th pair includes two pn-junction structures of the i-th type, wherein the two pn-junction structures of the i-th type are anti-serially connected, wherein the pn-junction structure of the i-th type has an i-th junction grading coefficient mi. A first pair of the n pairs of pn-junction structures has a first junction grading coefficient m1 and a second pair of the n pairs of pn-junction structures has a second junction grading coefficient m2. The junction grading coefficients m1, m2 are adjusted to result in generation of a spurious third harmonic signal of the semiconductor device with a signal power level, which is at least 10 dB lower than a reference signal power level of the spurious third harmonic signal obtained for a reference case in which the first and second junction grading coefficients m1, m2 are 0.25.

Abstract: A gas meter includes a meter body having a meter inlet into which a fluid-to-be-measured is to flow and a meter outlet from which the fluid-to-be-measured is to flow out, and an extended section extending from the meter inlet to an interior of the meter body. The gas meter further includes a flow rate measurement unit inside the meter body, the flow rate measurement unit having a measurement flow passage having a straight tubular shape, a lead-in port and a lead-out port for the fluid-to-be-measured, and a shutoff valve in an internal passage of the extended section. The lead-in port is airtightly connected to the extended section so as to communicate with the internal passage.

Abstract: An overlay metrology system includes one or more processors coupled to an illumination source to direct illumination to a sample and a detector to capture diffracted orders of radiation from the sample. The system may generate overlay sensitivity calibration parameters based on differential measurements of a calibration target including two overlay target cells on the sample, where first-layer target elements and second-layer target elements of the overlay target cells are distributed with a common pitch along a measurement direction and are misregistered with a selected offset value in opposite directions. The system may further determine overlay measurements based on differential measurements of additional overlay target cells with two wavelengths, where first-layer target elements and second-layer target elements of the additional overlay target cells are distributed with the common pitch and are formed to overlap symmetrically.

Abstract: Based on at least one manufacturing process characteristics associated with a manufacturing process, a prediction time at which to execute a selected machine learning model selected from multiple trained machine learning models is determined, and at the prediction time, the selected machine learning model is executed. Executing the selected machine learning model predicts a control set point for future values of state variables of the manufacturing process, for controlling the manufacturing process. Based on at least one of the manufacturing process characteristics, a learning time at which to train a machine learning model is determined, and at the learning time, the machine learning model is trained based on historical process data associated with the manufacturing process.

Abstract: A fabrication system for fabricating a three-dimensional object includes processing circuitry. The processing circuitry estimates, according to a fabrication condition and fabrication data, a three-dimensional object to be fabricated according to the fabrication data and corrects the fabrication data according to an estimation result of the three-dimensional object estimated by the processing circuitry.

Abstract: Embodiments of the present invention provide a novel method and discretization for animating water waves. The approaches disclosed combine the flexibility of a numerical approach to wave simulation with the stability and visual detail provided by a spectrum-based approach to provide Eulerian methods for simulating large-scale oceans with highly detailed wave features. A graphics processing unit stores a one-dimensional texture referred to as a wave profile buffer that stores pre-computed results at a number of discrete sample points for performing wave height evaluation. The water surface is rendered according to water height values computed using the wave profile, accounting for advection, spatial diffusion, angular diffusion, boundary reflections, and dissipation.

Abstract: Devices, systems, and methods obtain a reference image; obtain a test image; globally align the test image to the reference image; select subfields in the test image; align the subfields in the test image with respective areas in the reference image; warp the test image based on the aligning of the subfields; select anchor points in the reference image; select anchor-edge points in the reference image; realign the subfields in the warped test image with respective areas in the reference image based on the anchor points in the reference image and on the anchor-edge points in the reference image; and warp the warped test image based on the realigning of the subfields.

Abstract: A device for measuring electrical properties of electrical contacts within an electroplating apparatus has a disc-shaped structure like that of a wafer. Multiple conductive pads are formed to collectively circumscribe an outer periphery of the disc-shaped structure. Adjacently positioned ones of the conductive pads are electrically isolated from each other. The device includes a current source that supplies electric current at a first terminal and sinks electric current at a second terminal. The device includes measurement circuitry, having first and second input terminals, that determines a value of an electrical parameter based on signals present at the first and second input terminals. The device includes switching circuitry for connecting selected ones of the conductive pads to the first and second terminals of the current source and to the first and second input terminals of the measurement circuitry at a given time. The device also includes an onboard power supply.

Abstract: A method of overlay error measurement includes disposing a reference pattern module over a substrate. The substrate includes first and second overlay measurement patterns in first and second locations. The reference pattern module includes first and second reference patterns. The method includes creating a first overlap of the first reference pattern with the first overlay measurement pattern and a second overlap of the second reference pattern with the second overlay measurement pattern. The method further includes determining a first overlay error between the first reference pattern of the reference pattern module and the first overlay measurement pattern of the substrate and determining a second overlay error between the second reference pattern and the second overlay measurement pattern. The method also includes determining a total overlay error between the first and second overlay measurement patterns of the substrate based on the first and second overlay errors.

Abstract: The present invention provides a method of laminating a film for a dye-sensitized cell. First, a composite film is taken by a robotic arm, in which the composite film includes a release layer, a protective layer and a hot glue layer between the release layer and the protective layer, and the release layer is removed by the robotic arm. Then, the hot glue layer is precisely attached to a substrate by a target positioning step. Next, the protective layer is removed by the robotic arm.

Abstract: A method and a system are provided for predicting a non-linear relationship between a plurality of parameters in a deep neural network framework. The method comprises receiving, by an application server, a plurality of parameter values associated with the plurality of parameters. The method further comprises selecting, by the application server, an activation function based on a desired output. In an embodiment, the desired output is based on an industry type and an application area of the plurality of parameters. The method further comprises predicting, by the application server, the non-linear relationship between the plurality of parameters by modelling the deep neural network framework based on the selected activation function.

Abstract: In order to provide a charged particle beam apparatus capable of stably detecting secondary particles and electromagnetic waves even for a non-conductive sample under high vacuum environment and enabling excellent observation and analysis, the charged particle beam apparatus includes a charged particle gun (12), scanning deflectors (17 and 18) configured to scan a charged particle beam (20) emitted from the charged particle gun (12) onto a sample (21), detectors (40 and 41) configured to detect a scanning control voltage input from an outside into the scanning deflectors, an arithmetic unit (42) configured to calculate, based on the detected scanning control voltage, irradiation pixel coordinates for the charged particle beam; and an irradiation controller (45) configured to control irradiation of the sample with the charged particle beam according to the irradiation pixel coordinates.

Abstract: A method for characterizing a sample, by estimating a plurality of characteristic thicknesses, each being associated with a calibration material, including acquiring an energy spectrum (Sech) transmitted through this sample, located in an X and/or gamma spectral band; for each spectrum of a plurality of calibration spectra (sbase(Lk; Lt)) calculating a likelihood from said calibration spectrum (Sbase(Lk; Lt)), and from the spectrum transmitted through the sample (Sech), each calibration spectrum (Sbase(Lk; Lt)) corresponding to the energy spectrum transmitted through a stack of gauge blocks, each formed of a known thickness of a calibration material; estimating the characteristic thicknesses (L1, L2) associated with the sample according to the criterion of maximum likelihood.

Abstract: A deep learning algorithm is used for defect discovery, such as for semiconductor wafers. A care area is inspected with the wafer inspection tool. The deep learning algorithm is used to identify and classify defects in the care area. This can be repeated for remaining care areas, but similar care areas may be skipped to increase throughput.