Substrate Dicing Patents (Class 438/33)
  • Patent number: 12249553
    Abstract: Present disclosure relates to IC packages with integrated thermal contacts. In some embodiments, an IC package includes a package substrate, an IC die that is coupled to the package substrate, and at least one thermal contact for coupling to at least a portion of a heat exchanger, where the thermal contact is limited to being in a region located at a periphery of the IC package. In some embodiments, thermal contacts are such that at least a portion of a heat exchanger is to be attached on the side of the IC package. In some embodiments, thermal contacts may be provided within a recessed portion at the periphery of the IC package. Providing a thermal contact at a periphery of an IC package may enable improved cooling options, especially for systems where there is no or limited space for providing conventional heat exchangers on the top of the package.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: March 11, 2025
    Assignee: Intel Corporation
    Inventors: Sonja Koller, Vishnu Prasad, Georg Seidemann
  • Patent number: 12243746
    Abstract: Disclosed is a method for stripping a gallium nitride substrate, including: a gallium nitride substrate with a gallium nitride epitaxial structure directly grown on an upper surface thereof is acquired; an interior of the gallium nitride substrate is scanned and irradiated via the epitaxial structure by a laser beam, so as to generate a decomposition layer in the gallium nitride substrate, the laser beam being a laser having a pulse width on the order of less than 10?15 s, and a distance between the decomposition layer and the upper surface of the gallium nitride substrate being less than a thickness of the gallium nitride substrate; and the gallium nitride substrate is separated at the decomposition layer, so as to obtain a stripped gallium nitride substrate and a semiconductor device.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: March 4, 2025
    Assignee: SUZHOU METABRAIN INTELLIGENT TECHNOLOGY CO., LTD.
    Inventors: Fen Guo, Kang Su, Hongtao Man, Tuo Li
  • Patent number: 12245459
    Abstract: This light-emitting device includes: a light-emitting diode including a light-emitting layer of quantum dots or an organic light-emitting material; and a protection diode located adjacent to, and connected in parallel with, the light-emitting diode, wherein the protection diode is operated in reverse bias to protect the light-emitting diode.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: March 4, 2025
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Yoshihiro Ueta
  • Patent number: 12230542
    Abstract: The present disclosure relates to a method for forming an integrated chip. The method includes performing a first dicing cut along a first direction and extending into a semiconductor substrate from a first side of the semiconductor substrate. The method includes performing a second dicing cut along the first direction and extending into the semiconductor substrate from a second side of the semiconductor substrate, opposite the first side. The method includes performing a third dicing cut, separate from the second dicing cut, along the first direction and extending into the semiconductor substrate from the second side of the semiconductor substrate.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: February 18, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Shu-Hui Su
  • Patent number: 12211959
    Abstract: A light emitting device includes: a resin package including: a resin part, and a plurality of leads including a first lead and a second lead, wherein the resin package has a concave portion having a bottom face at which a part of an upper surface of the first lead and a part of an upper surface of the second lead are exposed from the resin part; a light emitting element mounted on the bottom face of the concave portion; and a sealing member covering the light emitting element in the concave portion. The plurality of leads comprise a plurality of notch parts including a first notch part on a first side corresponding to a first outer side surface of the resin package and a second notch part on a second side corresponding to a second outer side surface of the resin package.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: January 28, 2025
    Assignee: NICHIA CORPORATION
    Inventors: Hirofumi Ichikawa, Masaki Hayashi, Shimpei Sasaoka, Tomohide Miki
  • Patent number: 12172398
    Abstract: A method for optical production includes fabricating an array of optical elements on a transparent planar substrate, the array having opposing first and second surfaces parallel to the planar substrate. For each of the optical elements, a respective housing contains a notch of a predefined width. The first surface of the array is etched so as to form, on each of the optical elements in the array, a respective protrusion having a transverse dimension selected so as to fit into the width of the notch, the second surface of the array is diced through so as to singulate the optical elements. Each of the singulated optical elements is inserted into the respective housing such that the respective protrusion is contained in the notch.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: December 24, 2024
    Assignee: APPLE INC.
    Inventor: Avi Feshali
  • Patent number: 12176675
    Abstract: A semiconductor laser device is configured so that, on at least one of the respective opposing surfaces of a semiconductor laser chip and a sub-mount and the respective opposing surfaces of the sub-mount and a heatsink, one or more treatment regions are provided where adhesion of a bonding material or bonding material used for their bonding is reduced, wherein the one or more treatment regions are placed to define, in a traveling direction of light, different coverages depending on a position in an array direction of multiple light emitting regions.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: December 24, 2024
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yuji Iwai, Motoharu Miyashita, Kyosuke Kuramoto
  • Patent number: 12170226
    Abstract: A method for separating dies from a semiconductor substrate having dies adjoining a first surface of the substrate includes: attaching the substrate to a carrier via the first surface; generating first modifications by introducing laser irradiation into an interior of the substrate via a second surface of the substrate, the first modifications extending between the first surface and a vertical level in the interior that is being spaced from the second surface, the first modifications laterally surrounding the dies; generating second modifications by introducing laser irradiation into the interior via the second surface, the second modifications sub-dividing the substrate into a first part between the first surface and the second modifications, and a second part between the second surface and the second modifications; separating the parts along a first separation area defined by the second modifications; and separating the dies along a second separation area defined by the first modifications.
    Type: Grant
    Filed: March 28, 2024
    Date of Patent: December 17, 2024
    Assignee: Infineon Technologies AG
    Inventors: Franz-Josef Pichler, Benjamin Bernard, Mario Stefenelli
  • Patent number: 12170224
    Abstract: A method of processing a wafer includes a groove forming step of forming grooves in the wafer to a depth equal to or larger than a thickness of chips to be produced from the wafer from a face side of the wafer along projected dicing lines, a separation initiating point forming step of positioning a focused spot of a laser at a depth in the wafer corresponding to a thickness of the chips from a reverse side of the wafer, applying the laser beam to the wafer while moving the focused spot and the wafer relatively to each other, thereby forming separation initiating points in the wafer that are parallel to the face side of the wafer and made up of modified layers and cracks, and a chip peeling step of peeling off the chips from the wafer at the separation initiating points.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: December 17, 2024
    Assignee: DISCO CORPORATION
    Inventor: Shunsuke Teranishi
  • Patent number: 12142895
    Abstract: A semiconductor laser device includes: a semiconductor laminate body; an insulating layer disposed above the semiconductor laminate body and including a first opening extending in a first direction that is a direction from a front end surface toward a rear end surface; a first electrode disposed above the semiconductor laminate body; a second electrode disposed above the first electrode and the insulating layer; and an adhesion layer disposed between the second electrode and the insulating layer. The adhesion layer includes a second opening that at least partially overlaps with the first opening in plan view, the first electrode is at least partially disposed inside the first opening and the second opening, and the second electrode and the adhesion layer are disposed above the insulating layer between the first opening and at least one of the front end surface or the rear end surface.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: November 12, 2024
    Assignee: NUVOTON TECHNOLOGY CORPORATION JAPAN
    Inventors: Keishi Kouno, Ryoji Hiroyama, Shinji Yoshida, Katsuya Samonji, Masanori Hiroki
  • Patent number: 12134836
    Abstract: A method for producing at least one nitride layer includes providing a stack having a plurality of pillars extending from a substrate of the stack. Each pillar includes at least a crystalline section and a summit having a summit surface area The method also includes growing by epitaxy a crystallite from the summit of some the plurality of pillars and continuing the epitaxial growth of the crystallites until the crystallites supported by the pillars coalesce. The plurality of pillars includes at least one retention pillar and separation pillars. The pillars are configured so that once the nitride layer is formed, the at least one retention pillar retains the nitride layer and some of the separation pillars can fracture.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: November 5, 2024
    Assignees: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE, UNIVERSITE GRENOBLE ALPES
    Inventors: Matthew Charles, Guy Feuillet, Roy Dagher
  • Patent number: 12107383
    Abstract: A semiconductor laser and a fabrication method therefor. The method comprises: providing a heat sink motherboard, and cutting the heat sink motherboard to form a plurality of heat sink substrates (300) (S11); providing an epitaxial wafer (200) (S12); bonding the plurality of heat sink substrates (300) to the epitaxial wafer (200) in an array to form a plurality of gaps parallel to the direction of resonant cavities (210) and perpendicular to the direction of the resonant cavities (210) (S13); dividing the epitaxial wafer (200) along the gaps to obtain a plurality of laser chips (S14); and stacking the plurality of laser chips, and coating the plurality of stacked laser chips to form a plurality of semiconductor lasers (S15).
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: October 1, 2024
    Assignee: SHENZHEN LIGHTING INSTITUTE
    Inventors: Chao-Chen Cheng, Anh Chuong Tran
  • Patent number: 12087612
    Abstract: A micro device structure including a device and a fixed structure is provided. The device has an upper surface, a lower surface, and a first side surface. The lower surface is opposite to the upper surface. The first side surface connects the upper surface and the lower surface. The fixing structure includes a connecting portion and a first turning portion. The connecting portion extends at least from the upper surface of the device to the first side surface. The first turning portion is in contact to be connected with a first end of the connecting portion and extends outward from the first side surface to be away from the first side surface. The first end of the connecting portion is located on the first side surface between the upper surface and the lower surface. A display apparatus is also provided.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: September 10, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Hsien Wu, Wei-Hung Kuo, Chu-Li Chao, Chu-Yin Hung, Yu-Hsiang Chang
  • Patent number: 12075645
    Abstract: A display device includes: a substrate defining an opening and including a display area and a non-display area between the opening and display area, a pixel array including a plurality of pixels in the display area, each of the pixels having a pixel electrode, an opposite electrode facing the pixel electrode, and an intermediate layer between the pixel electrode and opposite electrode, a plurality of data lines bypassing the opening in the non-display area, first and second insulating layers, which cover the plurality of data lines, a conductive layer between the first and second insulating layers, and a thin film encapsulation layer covering the pixel array, the thin film encapsulation layer including at least one organic encapsulation layer and at least one inorganic encapsulation layer, and wherein, in the non-display area, a first groove is defined by the first insulating layer, the conductive layer, and the second insulating layer.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: August 27, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Wooyong Sung, Sooyoun Kim, Seunghun Kim, Junghan Seo, Hyoungsub Lee, Moonwon Chang, Seunggun Chae, Wonwoo Choi
  • Patent number: 12068433
    Abstract: A light-emitting device includes: a substrate having a top surface, wherein the top surface comprises a first portion and a second portion; a first semiconductor stack on the first portion, comprising a first upper surface and a first side wall; and a second semiconductor stack on the first upper surface, comprising a second upper surface and a second side wall, and wherein the second side wall connects the first upper surface; wherein the first semiconductor stack comprises a dislocation stop layer; wherein the dislocation stop layer comprises AlGaN; and wherein the first side wall and the second portion of the top surface form an acute angle ? between thereof.
    Type: Grant
    Filed: October 7, 2021
    Date of Patent: August 20, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Yen-Tai Chao, Sen-Jung Hsu, Tao-Chi Chang, Wei-Chih Wen, Ou Chen, Yu-Shou Wang, Chun-Hsiang Tu, Jing-Feng Huang
  • Patent number: 12062680
    Abstract: A package structure that includes a cavity between a solid-state imaging element and a cover member prevents damage caused due to an increase in the internal pressure in the cavity, for example, upon reflow. A solid-state imaging device includes a solid-state imaging element that includes a semiconductor substrate and of which a light-receiving side is a side of one of plate surfaces of the semiconductor substrate; a translucent cover member that is provided on the light-receiving side of the solid-state imaging element, and a support that is provided on the light-receiving side of the solid-state imaging element, and supports the cover member. The semiconductor substrate further includes a concave portion that is formed on another of the plate surfaces of the semiconductor substrate.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: August 13, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Koichi Igarashi
  • Patent number: 12057311
    Abstract: A method for manufacturing a semiconductor apparatus may include forming a patterned mask over a substrate, so that a first region of a first main surface of the substrate is covered by a plurality of spaced-apart sub-structural elements of a dielectric material, and second regions of the first main surface are not covered. Each of the plurality of sub-structural elements is arranged between adjacent second regions. The method also comprises carrying out a selective growth process of semiconductor material, so that the semiconductor material is grown over the second regions of the first main surface.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: August 6, 2024
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Jens Mueller, Adrian Stefan Avramescu
  • Patent number: 12029078
    Abstract: A display device according to an embodiment of the present invention may include a substrate including a display area and a pad area located on one side of the display area, a pad electrode disposed in the pad area on the substrate, a protective insulating layer disposed on the substrate and the pad electrode to expose at least a part of a top surface of the pad electrode, an inorganic encapsulation layer disposed on the protective insulating layer, and a conductive layer disposed in the pad area between an end of the inorganic encapsulation layer adjacent to the pad electrode and the protective insulating layer.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: July 2, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sooyoun Kim, Woo Yong Sung
  • Patent number: 12002898
    Abstract: The present disclosure is directed to a sensor die with an embedded light sensor and an embedded light emitter as well as methods of manufacturing the same. The light emitter in the senor die is surrounded by a resin. The sensor die is incorporated into semiconductor device packages as well as methods of manufacturing the same. The semiconductor device packages include a first optically transmissive structure on the light sensor of the sensor die and a second optically transmissive structure on the light emitter of the sensor die. The first optically transmissive structure and the second optically transmissive structure cover and protect the light sensor and the light emitter, respectively. A molding compound is on a surface of a sensor die and covers sidewalls of the first and second optically transmissive structures on the sensor die.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: June 4, 2024
    Assignee: STMICROELECTRONICS PTE LTD
    Inventor: Jing-En Luan
  • Patent number: 11973309
    Abstract: In a semiconductor chip manufacturing device which produces a plurality of LD chips by dividing a semiconductor wafer, being placed in a casing in which a fluid medium is filled, on which a block line is formed in advance and also on which a scribed line is inscribed so that a microcrack is formed along the scribed line, the semiconductor chip manufacturing device comprises a reception stage for supporting the semiconductor wafer, and a blade cutting-edge for pressurizing the semiconductor wafer along its crack portion made of the block line or the scribed line, so that the semiconductor wafer is divided into a plurality of LD chips by pressurizing it by means of the blade cutting-edge along the crack portion in the fluid medium.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: April 30, 2024
    Assignee: Mitsubishi Electric Corporation
    Inventors: Tetsuya Uetsuji, Ayumi Fuchida, Masato Suzuki
  • Patent number: 11969916
    Abstract: A wafer forming method includes a modified layer forming step of applying a laser beam of such a wavelength as to be transmitted through an ingot to the ingot with a focal point of the laser beam positioned inside from a side surface at a position corresponding to the thickness of a wafer to be formed, to form a modified layer over the whole circumference of the side surface, a peeling-off layer forming step of exerting an external force from an upper surface of the ingot and concentrating a stress on a crack extending from the modified layer to the inside, to cause the crack to develop from the side surface side toward the inside and form a peeling-off layer, and a wafer forming step of peeling off a wafer to be formed, from the ingot, with the peeling-off layer as a start point, to form the wafer.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: April 30, 2024
    Assignee: DISCO CORPORATION
    Inventor: Keiji Nomaru
  • Patent number: 11962122
    Abstract: A semiconductor light emitting device includes: a semiconductor light emitting element including a substrate and a plurality of light emitters arranged along an upper surface of the substrate; a first base disposed below a lower surface of the substrate; and a first bonding layer which bonds the semiconductor light emitting element to the first base. In the semiconductor light emitting device, a thermal conductivity of the substrate is higher than a thermal conductivity of the first bonding layer, and a thickness of the first bonding layer is less on one end side than on an other end side in an arrangement direction in which the plurality of light emitters are arranged.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: April 16, 2024
    Assignee: PANASONIC HOLDINGS CORPORATION
    Inventors: Hiroyuki Hagino, Shinichiro Nozaki
  • Patent number: 11948884
    Abstract: A semiconductor device includes: a substrate, including an upper surface and a first to a fourth side surfaces; wherein the upper surface includes a first edge connecting the first side surface and a second edge opposite to the first edge and connecting the second side surface; a first modified trace formed on the first side surface; and a semiconductor stack formed on the upper surface, including a lower surface connecting the upper surface of the substrate, and the lower surface comprises a fifth edge adjacent to the first edge and a sixth edge opposite to the fifth edge and adjacent to the second edge; wherein a shortest distance between the first edge and the fifth edge is S1 ?m, and a shortest distance between the second edge and the sixth edge is S2 ?m; wherein in a lateral view viewing from the third side surface, the first side surface forms a first acute angle with a degree of ?1 with the vertical direction, the second side surface forms a second acute angle with a degree of ?2 with the vertical dire
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: April 2, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Lin Tzu Hsiang, Chen Chih Hao, Wu Wei Che, Chen Ying Chieh
  • Patent number: 11915949
    Abstract: A hybrid panel method of (and apparatus for) manufacturing electronic devices, and electronic devices manufactured thereby. As non-limiting examples, various aspects of this disclosure provide an apparatus for manufacturing an electronic device, where the apparatus is operable to, at least, receive a panel to which a subpanel is coupled, cut around a subpanel through a layer of material, and remove such subpanel from the panel. The apparatus may also, for example, be operable to couple to an upper side of the subpanel, and remove the subpanel from the panel by, at least in part, operating to rotate the subpanel relative to the panel.
    Type: Grant
    Filed: February 15, 2021
    Date of Patent: February 27, 2024
    Assignees: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD., AMKOR TECHNOLOGY PORTUGAL, S.A.
    Inventors: Bora Baloglu, Suresh Jayaraman, Ronald Huemoeller, Andre Cardoso, Eoin O'Toole, Marta Sa Santos, Luis Alves, Jose Moreira da Silva, Fernando Teixeira, Jose Luis Silva
  • Patent number: 11894413
    Abstract: A method for manufacturing an optoelectronic device including the steps of forming a substrate having a support face; forming a first series of first areas adapted to the formation of all or part of light-emitting diodes, forming a second series of second areas on the support face, adapted to the formation of light confinement wall elements capable of forming a light confinement wall, the second areas defining therebetween sub-pixel areas; forming, from the first areas, light-emitting diodes; forming, by the same technique as in the previous step, from the second areas, light confinement wall elements, concomitantly with all or part of the light-emitting diodes which are formed in the previous step.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: February 6, 2024
    Assignee: ALEDIA
    Inventors: Pierre Tchoulfian, Benoît Amstatt
  • Patent number: 11888094
    Abstract: A flip-chip light emitting diode (LED) includes: a sapphire substrate having an edge; an epitaxial layer over the substrate, wherein the epitaxial layer comprises: a first semiconductor layer, a second semiconductor layer, and a light emitting layer between the first semiconductor layer and the second semiconductor layer, wherein the epitaxial layer is divided into an epitaxial bulk layer and a barrier structure; and an insulating layer over the epitaxial bulk layer, wherein a portion of the insulating layer that covers a sidewall of the epitaxial bulk layer is separated from the edge of the substrate by the barrier structure.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: January 30, 2024
    Assignee: QUANZHOU SANAN SEMICONDUCTOR TECHNOLOGY CO., LTD.
    Inventors: Anhe He, Su-hui Lin, Jiansen Zheng, Kangwei Peng, Xiaoxiong Lin, Chen-ke Hsu
  • Patent number: 11870003
    Abstract: A patterned epitaxial structure laser lift-off device, including a substrate, reshaping structures, a transmittance adjustment structure, a patterned epitaxial structure, gas transmission systems, an ultraviolet source, a lift-off chamber and a light entry window. The gas transmission systems are at two sides of the lift-off chamber; the light entry window is on the lift-off chamber; the ultraviolet source is above the outside of the light entry window; the patterned epitaxial structure is inside the lift-off chamber; the substrate is on the patterned epitaxial structure. The patterned epitaxial structure includes an epitaxial structure, a sapphire substrate, patterned structures, oblique interfaces and planar interfaces, several patterned structures being uniformly designed on the epitaxial structure, each of the patterned structures being a V-shaped groove structure formed by two oblique interfaces, two adjacent patterned structures being connected by means of a planar interface.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: January 9, 2024
    Inventors: Xiaofeng He, Chengming Li, Xiuping He, Jianfeng Chen
  • Patent number: 11870007
    Abstract: A method of manufacturing a light-emitting element, includes: providing a base having an upper surface and a lower surface; forming a semiconductor stack on the upper surface; removing part of the semiconductor stack to form an isolation region surrounding the semiconductor stack; forming a dielectric stack covering the semiconductor stack and the isolation region; and applying a first laser having a first wavelength to irradiate the base along the isolation region; wherein the dielectric stack has a reflectance of 10%-50% and/or a transmittance of 50%-90% for the first wavelength.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: January 9, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Che-Hung Lin, De Shan Kuo
  • Patent number: 11862939
    Abstract: An intermediate ultraviolet laser diode device includes a gallium and nitrogen containing substrate member comprising a surface region, a release material overlying the surface region, an n-type gallium and nitrogen containing material; an active region overlying the n-type gallium and nitrogen containing material; a p-type gallium and nitrogen containing material; a first transparent conductive oxide material overlying the p-type gallium and nitrogen containing material; and an interface region overlying the first transparent conductive oxide material.
    Type: Grant
    Filed: June 17, 2022
    Date of Patent: January 2, 2024
    Assignee: KYOCERA SLD Laser, Inc.
    Inventors: James W. Raring, Melvin McLaurin, Paul Rudy, Po Shan Hsu, Alexander Sztein
  • Patent number: 11843080
    Abstract: A semiconductor light-emitting device includes a semiconductor light-emitting element that emits ultraviolet light, a package substrate mounting the semiconductor light-emitting element, a sealing resin that seals the semiconductor light-emitting element, and a coat film further provided between a light output surface of the semiconductor light-emitting element and the sealing resin. The refractive index of the coat film and the refractive index of the sealing resin are smaller than the refractive index of a member constituting the light output surface of the semiconductor light-emitting element, and the refractive index difference between the coat film and the sealing resin is not more than 0.15.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: December 12, 2023
    Assignee: Nikkiso Co., Ltd.
    Inventors: Shuichiro Yamamoto, Tadaaki Maeda, Naoki Shibata
  • Patent number: 11837844
    Abstract: A method for singulating semiconductor components (20) is specified, said method comprising the steps of providing a carrier (21), applying at least two semiconductor chips (22) on the carrier (21), etching at least one break nucleus (23) at a side of the carrier (21) facing the semiconductor chips (22), and singulating at least two semiconductor components (20) by breaking the carrier (21) along the at least one break nucleus (23). The at least one break nucleus (23) extends at least in places in a vertical direction (z), the vertical direction (z) being perpendicular to a main extension plane of the carrier (21), and the at least one break nucleus (23) is arranged between the two semiconductor chips (22) in a lateral direction (x), the lateral direction (x) being parallel to the main extension plane of the carrier (21).
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: December 5, 2023
    Assignee: OSRAM OLED GMBH
    Inventors: John Brückner, Urs Heine, Sven Gerhard, Lars Nähle, Andreas Löffler, André Somers
  • Patent number: 11833617
    Abstract: The invention relates to a method for creating a detachment zone in a solid in order to detach a solid portion, especially a solid layer, from the solid, said solid portion that is to be detached being thinner than the solid from which the solid portion has been removed.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: December 5, 2023
    Assignee: Siltectra GmbH
    Inventors: Jan Richter, Christian Beyer, Ralf Rieske
  • Patent number: 11804696
    Abstract: A semiconductor laser (1) is provided that includes a semiconductor layer sequence in which an active zone for generating laser radiation is located. A ridge waveguide is formed as an elevation from the semiconductor layer sequence. An electrical contact layer is located directly on the ridge waveguide. A metallic electrical connection region is located directly on the contact layer and is configured for external electrical connection of the semiconductor laser. A metallic breakage coating extends directly to facets of the semiconductor layer sequence and is arranged on the ridge waveguide. The breakage coating is electrically functionless and includes comprises a lower speed of sound for a breaking wave than the semiconductor layer sequence in the region of the ridge waveguide.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: October 31, 2023
    Assignee: OSRAM OLED GMBH
    Inventors: Sven Gerhard, Christoph Eichler, Alfred Lell, Muhammad Ali
  • Patent number: 11772202
    Abstract: In a method for manufacturing a light-emitting element, a second irradiation process includes forming a first modified region at a first distance from a second surface in a thickness direction of a sapphire substrate, forming a second modified region at a second distance from the second surface in the thickness direction, the second distance being less than the first distance, the second modified region being shifted in a first direction from the first modified region, and forming a third modified region at a third distance from the second surface in the thickness direction, the third distance being less than the second distance, the third modified region overlapping the first modified region in a top-view. In the thickness direction of the sapphire substrate, a greater number of modified regions that include second modified portions are formed than modified regions that include first modified portions.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: October 3, 2023
    Assignee: NICHIA CORPORATION
    Inventors: Takashi Abe, Eiji Shirakawa
  • Patent number: 11764311
    Abstract: An optical device includes a first circuit layer, a light detector, a first conductive pillar and an encapsulant. The first circuit layer has an interconnection layer and a dielectric layer. The light detector is disposed on the first circuit layer. The light detector has a light detecting area facing away from the first circuit layer and a backside surface facing the first circuit layer. The first conductive pillar is disposed on the first circuit layer and spaced apart from the light detector. The first conductive pillar is electrically connected to the interconnection layer of the first circuit layer. The encapsulant is disposed on the first circuit layer and covers the light detector and the first conductive pillar. The light detector is electrically connected to the interconnection layer of the first circuit layer through the first conductive pillar. The backside surface of the light detector is exposed from the encapsulant.
    Type: Grant
    Filed: September 28, 2021
    Date of Patent: September 19, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yu-Pin Tsai, Tsung-Yueh Tsai, Teck-Chong Lee
  • Patent number: 11688993
    Abstract: A method of producing a plurality of laser diodes includes providing a plurality of laser bars in a composite, wherein the laser bars each include a plurality of laser diode elements arranged side by side, and the laser diode elements include a common substrate and a semiconductor layer sequence arranged on the substrate, and a division of the composite at a longitudinal separation plane extending between two adjacent laser bars leads to formation of laser facets of the laser diodes to be produced, and structuring the composite at at least one longitudinal separation plane, wherein a structured region is produced in the substrate.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: June 27, 2023
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: John Brückner, Sven Gerhard
  • Patent number: 11658269
    Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer; one or multiple vias penetrating the active layer and the second semiconductor layer to expose the first semiconductor layer; a first contact layer covering the one or multiple vias; a third insulating layer including a first group of one or multiple third insulating openings on the second semiconductor layer to expose the first contact layer; a first pad on the semiconductor stack and covering the first group of one or multiple third insulating openings; and a second pad on the semiconductor stack and separated from the first pad with a distance, wherein the second pad is formed at a position other than positions of the one or multiple vias in a top view of the light-emitting device.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: May 23, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Bo-Jiun Hu, Tsung-Hsun Chiang, Wen-Hung Chuang, Kuan-Yi Lee, Yu-Ling Lin, Chien-Fu Shen, Tsun-Kai Ko
  • Patent number: 11658456
    Abstract: A multi-emitter laser diode device includes a carrier chip singulated from a carrier wafer. The carrier chip has a length and a width, and the width defines a first pitch. The device also includes a plurality of epitaxial mesa dice regions transferred to the carrier chip from a substrate and attached to the carrier chip at a bond region. Each of the epitaxial mesa dice regions is arranged on the carrier chip in a substantially parallel configuration and positioned at a second pitch defining the distance between adjacent epitaxial mesa dice regions. Each of the plurality of epitaxial mesa dice regions includes epitaxial material, which includes an n-type cladding region, an active region having at least one active layer region, and a p-type cladding region. The device also includes one or more laser diode stripe regions, each of which has a pair of facets forming a cavity region.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: May 23, 2023
    Assignee: KYOCERA SLD Laser, Inc.
    Inventors: Dan Steigerwald, Melvin McLaurin, Eric Goutain, Alexander Sztein, Po Shan Hsu, Paul Rudy, James W. Raring
  • Patent number: 11633810
    Abstract: A workpiece-separating device includes: a holding member which detachably holds one of the workpiece and the supporting body; a laser irradiation part which irradiates the separating layer with the laser beam through the other of the supporting body and the workpiece of the laminated body being held by the holding member; and a controlling part which controls an operation of the laser irradiation part, wherein the laser irradiation part has a laser scanner which moves the spot like laser beam along the laminated body, an entire irradiated face of the separating layer in an area of the laser beam irradiated from the laser scanner toward the laminated body is divided into a plurality of irradiation areas each having a band shape that is elongated in one of two directions intersecting a light irradiation direction from the laser irradiation part.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: April 25, 2023
    Assignee: SHIN-ETSU ENGINEERING CO., LTD.
    Inventors: Yoshikazu Ohtani, Kyouhei Tomioka
  • Patent number: 11608265
    Abstract: A method for providing a semiconductor layer arrangement on a substrate which comprises providing a semiconductor layer arrangement having a functional layer and a semiconductor substrate layer, attaching the semiconductor layer arrangement to a glass substrate layer such that the functional layer is arranged between the glass substrate layer and the semiconductor substrate layer, and removing the semiconductor substrate layer at least partially such that the glass substrate layer substitutes the semiconductor substrate layer as the substrate of the semiconductor layer arrangement.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: March 21, 2023
    Assignee: Infineon Technologies AG
    Inventors: Stephan Pindl, Carsten Ahrens, Stefan Jost, Ulrich Krumbein
  • Patent number: 11609618
    Abstract: A display motherboard and a manufacturing method thereof are provided. The display motherboard includes a first substrate and a second substrate that are assembled, a plurality of mutually independent display devices located between the first substrate and the second substrate, a first seal, and a second seal. The first seal is provided in a peripheral area of the display motherboard, the second seal is provided in a cutting area of the display motherboard, the cutting area is located around each of the display devices, and the second seal surrounds at least one of the display devices.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: March 21, 2023
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xueyong Zhang, Shixin Ruan, Wu Wang, Xiaocui Yang
  • Patent number: 11597035
    Abstract: Laser ablation processing method for debris-free and efficient removal of materials comprises the step of using a refrigeration device to condense the water vapor and form a thin frost layer on the materials at temperatures below the freezing point. The residual debris produced during the ablation process deposits on the frost layer that covers the material, which is easily removed when the frost layer melts. At the same time, the frost layer in the laser irradiation area melts to a liquid layer, which can effectively reduce the deposition of debris on the inner wall of the groove and thus improve the efficiency and quality of laser ablation. The method is applicable to debris-free laser processing on an arbitrary curved surface.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: March 7, 2023
    Assignee: Shanghai Institute of Optics And Fine Mechanics, Chinese Academy of Sciences
    Inventors: Yang Liao, Yan Yue, Xuan Wang, Junchi Chen, Yujie Peng, Yuxin Leng
  • Patent number: 11587970
    Abstract: There is provided semiconductor devices and methods of forming the same, including: a first substrate; and a second substrate adjacent to the first substrate, where a side wall of the second substrate includes one or more diced portions that can include a blade diced portion and a stealth diced portion; and also imaging devices and methods of forming the same, including: a first substrate; a transparent layer; an adhesive layer between the first substrate and the transparent layer; a second substrate, where the first substrate is disposed between the adhesive layer and the second substrate; and a groove extending from the adhesive layer to the second substrate, where the groove is filled with the adhesive layer.
    Type: Grant
    Filed: March 11, 2020
    Date of Patent: February 21, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Masanari Yamaguchi, Taizo Takachi, Shunsuke Furuse, Takashi Oinoue, Yuki Ikebe
  • Patent number: 11581202
    Abstract: A substrate debonding apparatus configured to separate a support substrate attached to a first surface of a device substrate by an adhesive layer, the substrate debonding apparatus including a substrate chuck configured to support a second surface of the device substrate, the second surface being opposite to the first surface of the device substrate; a light irradiator configured to irradiate light to an inside of the adhesive layer; and a mask between the substrate chuck and the light irradiator, the mask including an opening through which an upper portion of the support substrate is exposed, and a first cooling passage or a second cooling passage, the first cooling passage being configured to provide a path in which a coolant is flowable, the second cooling passage being configured to provide a path in which air is flowable and to provide part of the air to a central portion of the opening.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: February 14, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ilyoung Han, Kyoungran Kim, Chulhyun Park, Minjae Shin, Geunsik Oh, Hyunjin Lee, Soonwon Lee, Nungpyo Hong
  • Patent number: 11552231
    Abstract: A display device includes a display substrate including: a pixel area provided in plurality separated from each other, and a plurality of through holes separated from each other; a light-emitting diode provided in plurality on the display substrate arranged in the pixel areas thereof; and a wiring line provided in plurality on the display substrate, the wiring line including a first wiring line and a second wiring line which are each electrically connected to the light-emitting diode.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: January 10, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Mugyeom Kim
  • Patent number: 11538983
    Abstract: Provided is a chip component manufacturing method which enables a plurality of chip pieces to be handled while being pasted to a sheet, and in which it is possible to apply at least a surface treatment to a plurality of chip pieces while being pasted to a sheet. This chip component manufacturing method comprises: a step for retaining a green sheet or the like on a carrier sheet; a step for cutting, together with a portion of the carrier sheet, the green sheet or the like retained on the carrier sheet; a step for removing, together with a portion of the carrier sheet, at least a dummy portion of the green sheet or the like that has been cut, so as to leave a plurality of chip pieces on the carrier sheet; and a step for applying at least a surface treatment to lateral surface portions of the plurality of chip pieces that have become exposed due to the removing while the plurality of chip pieces are being retained on the carrier sheet.
    Type: Grant
    Filed: March 9, 2020
    Date of Patent: December 27, 2022
    Assignees: NGK Insulators, Ltd., NGK Ceramic Device Co., Ltd.
    Inventors: Isamu Oguma, Takatomo Ogata, Shigeru Funabashi, Hidetake Ota
  • Patent number: 11509113
    Abstract: A method for producing a composite component (100) and a composite component (100) comprising a plurality of components (10), a removable sacrificial layer (4), an anchoring structure (3) and a common intermediate carrier (90) are specified. The components each have a semiconductor body (2) comprising an active zone (23), are configured to generate coherent electromagnetic radiation and are arranged on the common intermediate carrier. The sacrificial layer is arranged in a vertical direction between the intermediate carrier and the components. The anchoring structure comprises a plurality of anchoring elements (3A, 3B), wherein the anchoring structure and the sacrificial layer provide a mechanical connection between the intermediate carrier and the components.
    Type: Grant
    Filed: February 5, 2019
    Date of Patent: November 22, 2022
    Assignee: OSRAM OLED GMBH
    Inventors: Hubert Halbritter, Martin Rudolf Behringer
  • Patent number: 11508708
    Abstract: A semiconductor module includes a ground substrate that is provided with a drive circuit, and a plurality of light emitting elements that are electrically coupled to the drive circuit, in which a distance between the light emitting elements adjacent to each other is equal to or less than 20 ?m in a top view.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: November 22, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Hiroaki Onuma, Takashi Ono, Hiroyoshi Higashisaka, Tsuyoshi Ono, Takashi Kurisu, Toshio Hata
  • Patent number: 11482643
    Abstract: A light-emitting device includes a light-emitting element that includes a semiconductor structure including a first semiconductor layer, a second semiconductor layer, and a light-emitting layer therebetween and is configured to emit first light from an upper surface of the first semiconductor layer; a protective film over the upper surface of the first semiconductor layer; a light-transmissive resin layer disposed in contact with the protective film; and a wavelength conversion layer facing the upper surface of the first semiconductor layer over the protective film and the light-transmissive resin layer, the upper surface of the first semiconductor layer having first projections and a flat portion, an upper surface of the protective film having second projections above the first projections. In a cross-sectional view a void is located above the flat portion and between the protective film and the light-transmissive resin layer.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: October 25, 2022
    Assignee: NICHIA CORPORATION
    Inventor: Yuya Yamakami
  • Patent number: 11469348
    Abstract: The invention described herein provides a method and apparatus to realize incorporation of Beryllium followed by activation to realize p-type materials of lower resistivity than is possible with Magnesium. Lower contact resistances and more effective electron confinement results from the higher hole concentrations made possible with this invention. The result is a higher efficiency GaN-based LED with higher current handling capability resulting in a brighter device of the same area.
    Type: Grant
    Filed: March 9, 2020
    Date of Patent: October 11, 2022
    Assignee: Odyssey Semiconductor, Inc.
    Inventors: James R. Shealy, Richard J. Brown