Substrate Dicing Patents (Class 438/33)
  • Publication number: 20140353639
    Abstract: A display device which can be produced at reduced material cost and has a smaller peripheral frame area, and a method for producing the same, are provided. A display device includes a first substrate including a display area, which includes an organic EL light emitting layer; a second substrate located so as to face the first substrate; a dam member located along, and outside with respect to, a part of an outer edge of the display area, the dam member joining the first substrate and the second substrate to each other; and a filler filling a space between the first substrate and the second substrate while being in contact with the dam member.
    Type: Application
    Filed: May 29, 2014
    Publication date: December 4, 2014
    Applicant: Japan Display Inc.
    Inventors: Hirotsugu SAKAMOTO, Hiroshi OOOKA, Takeshi OOKAWARA, Kouhei TAKAHASHI, Yuko MATSUMOTO
  • Patent number: 8901598
    Abstract: A light emitting device (LED) includes a stress control layer having a compressive stress on a substrate, a bonding layer on the stress control layer, a semiconductor layer on the bonding layer and including an active region for emitting light on the bonding layer, a first electrode on a lower surface of the substrate, and a second electrode on the semiconductor layer. The compressive stress of the stress control layer is between about 1 and about 20 GPa.
    Type: Grant
    Filed: April 4, 2013
    Date of Patent: December 2, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-sik Hwang, Jun-youn Kim, Su-hee Chae
  • Patent number: 8889437
    Abstract: A light-emitting device including a phosphor layer, a light-emitting device package employing the light-emitting device, a method of manufacturing the light-emitting device, and a method of packaging the light-emitting device. The light-emitting device includes: a light-transmissive substrate having a top surface, a bottom surface, and side surfaces; a light-emitting unit formed on the top surface of the light-transmissive substrate; and a phosphor layer covering all the side surfaces of the light-transmissive substrate. According to the present invention, chromaticity inferiorities of light emitted from side surfaces of a substrate may be reduced.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: November 18, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Tsuyoshi Tsutsui
  • Patent number: 8883565
    Abstract: In accordance with an embodiment of the present invention, a semiconductor device is manufactured by arranging a plurality of semiconductor devices on a frame with an adhesive foil. The plurality of semiconductor devices is attached to the adhesive foil. The plurality of semiconductor devices is removed from the frame with the adhesive foil using a carbon dioxide snow jet and/or a laser process.
    Type: Grant
    Filed: October 4, 2011
    Date of Patent: November 11, 2014
    Assignee: Infineon Technologies AG
    Inventors: Mathias Vaupel, Sebastian Bernrieder, Adolf Koller, Stefan Martens
  • Publication number: 20140327006
    Abstract: An active device substrate includes a flexible substrate, an inorganic de-bonding layer, and at least one active device. The flexible substrate has a first surface and a second surface opposite to the first surface, wherein the first surface is a flat surface. The inorganic de-bonding layer covers the first surface of the flexible substrate, and the material of the inorganic de-bonding layer is metal, metal oxide or combination thereof. The active device is disposed on or above the second surface of the flexible substrate.
    Type: Application
    Filed: October 1, 2013
    Publication date: November 6, 2014
    Applicant: AU Optronics Corporation
    Inventor: Tsung-Ying KE
  • Publication number: 20140329348
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer including a first surface, a second surface opposite to the first surface, and a light emitting layer; a p-side electrode provided on the second surface of the semiconductor layer in a region including the light emitting layer; an n-side electrode provided on the second surface of the semiconductor layer in a region not including the light emitting layer; an insulating film being more flexible than the semiconductor layer, the insulating film provided on the second surface and a side surface of the semiconductor layer, and the insulating film having a first opening reaching the p-side electrode and a second opening reaching the n-side electrode; a p-side interconnection layer provided on the insulating film and connected to the p-side electrode; and an n-side interconnection layer provided on the insulating film and connected to the n-side electrode.
    Type: Application
    Filed: July 17, 2014
    Publication date: November 6, 2014
    Inventors: Hiroshi Hamasaki, Akihiro Kojima, Yoshiaki Sugizaki
  • Patent number: 8878227
    Abstract: An optoelectronic semiconductor chip includes a carrier and a semiconductor body having a semiconductor layer sequence, the semiconductor body arranged on the carrier wherein an emission region and a detection region are formed in the semiconductor body having the semiconductor layer sequence; the semiconductor layer sequence includes an active region arranged between a first semiconductor layer and a second semiconductor layer and provided in the emission region to generate radiation; the first semiconductor layer is arranged on the side of the active region facing away from the carrier; and the emission region has a recess extending through the active region.
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: November 4, 2014
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Jürgen Moosburger, Christoph Neureuther, Norwin von Malm
  • Patent number: 8877530
    Abstract: A method may be provided for preparing a semiconductor light-emitting device. The method may include: preparing a first wafer in which a semiconductor multi-layered light-emitting structure is disposed on an upper part of an initial substrate; preparing a second wafer which is a supporting substrate; bonding the second wafer on an upper part of the first wafer; separating the initial substrate of the first wafer from a result of the bonding; and fabricating a single-chip by severing a result of the passivation. Other embodiments may be provided.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: November 4, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Tae Yeon Seong
  • Patent number: 8878214
    Abstract: A semiconductor light emitting device comprises a semiconductor light emitting element comprising a semiconductor laminate including a p-type semiconductor layer, an active layer and an n-type semiconductor layer which are sequentially laminated, and a conductive support substrate joined to the p-type semiconductor layer side of the semiconductor laminate. The semiconductor laminate is divided into at least two semiconductor regions by a trench. The semiconductor light emitting device further comprises a first transparent sealing resin covering at least a portion of the semiconductor light emitting element, the first transparent sealing resin comprising a plurality of first fluorescent particles, each of the first fluorescent particles having an individual average particle diameter. A width of the trench is smaller than an overall average of the individual average particle diameters of the first fluorescent particles.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: November 4, 2014
    Assignee: Nichia Corporation
    Inventors: Nobuhiro Ubahara, Kouichiroh Deguchi, Takao Yamada
  • Publication number: 20140322847
    Abstract: A wafer processing method including a modified layer forming step of applying a laser beam having a transmission wavelength to a substrate from the back side of the substrate along division lines. The modified layer forming step includes the steps of making the polarization plane of linearly polarized light of the laser beam parallel to the direction perpendicular to each division line, shifting the beam center of the laser beam from the optical axis of a focusing lens of a focusing unit for focusing the laser beam, in the direction perpendicular to each division line, and shifting the focal point of the laser beam by the focusing lens in the same direction as the direction where the beam center of the laser beam has been shifted.
    Type: Application
    Filed: April 24, 2014
    Publication date: October 30, 2014
    Applicant: DISCO CORPORATION
    Inventor: Tomohiro Endo
  • Publication number: 20140319557
    Abstract: A method for manufacturing a vertically structured Group III nitride semiconductor LED chip includes a first step of forming a light emitting structure laminate; a second step of forming a plurality of separate light emitting structures by partially removing the light emitting structure laminate to partially expose the growth substrate; a third step of forming a conductive support, which conductive support integrally supporting the light emitting structures; a fourth step of separating the growth substrate by removing the lift-off layer; and a fifth step of dividing the conductive support between the light emitting structures thereby singulating a plurality of LED chips each having the light emitting structure. A first through-hole is formed to open in a central region of each of the light emitting structures such that at least the lift-off layer is exposed, and an etchant is supplied from the first through-hole in the fourth step.
    Type: Application
    Filed: May 12, 2011
    Publication date: October 30, 2014
    Applicants: DOWA ELECTRONICS MATERIALS CO., LTD., WAVESQUARE INC.
    Inventors: Meoung Whan Cho, Seog Woo Lee, Pil Guk Jang, Ryuichi Toba, Yoshitaka Kadowaki
  • Patent number: 8871540
    Abstract: A laser dicing method includes: placing a workpiece substrate on a stage; generating a clock signal; emitting a pulse laser beam synchronous with the clock signal; switching irradiation and non-irradiation of the workpiece substrate with the pulse laser beam in a unit of light pulse in synchronization with the clock signal to perform first irradiation of the pulse laser beam on a first straight line by controlling the pulse laser beam using a pulse picker; performing second irradiation of the pulse laser beam on a second straight line, which is adjacent to the first straight line in a substantially parallel fashion, after the first irradiation; and forming a crack reaching a workpiece substrate surface on the workpiece substrate by the first irradiation and the second irradiation.
    Type: Grant
    Filed: July 24, 2012
    Date of Patent: October 28, 2014
    Assignee: Toshiba Kikai Kabushiki Kaisha
    Inventor: Shoichi Sato
  • Patent number: 8866153
    Abstract: Provided is a functional element which is obtained by forming a lamination film on a substrate and then dividing the substrate and the lamination film into a desired shape. The functional element has a hexagonal substrate, a lamination film formed on a C surface of the substrate, and a plurality of divided surfaces which are exposed by dividing the substrate into quadrilaterals. At least one line of division lines in the case of dividing the substrate into quadrilaterals is perpendicular to any one of equivalent directions of [1-100], [?1010], and [01-01] of the substrate from a [0001] direction of the substrate, and the divided surfaces formed by the division lines are inclined in a direction of other divided surfaces to which at least a part thereof is opposed.
    Type: Grant
    Filed: January 18, 2011
    Date of Patent: October 21, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akihiro Urata, Masahiro Araki, Takaaki Utsumi, Masahiro Shiota
  • Patent number: 8866186
    Abstract: The present invention aims to enhance the light extraction efficiency of the Group III nitride semiconductor light-emitting device. The inventive Group III nitride semiconductor light-emitting device comprises a substrate; and a Group III nitride semiconductor layer including a light-emitting layer, stacked on the substrate, wherein the side face of the Group III nitride semiconductor layer is tilted with respect to the normal line of the major surface of the substrate.
    Type: Grant
    Filed: September 20, 2006
    Date of Patent: October 21, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Gaku Oriji, Koji Kamei, Hisayuki Miki, Akihiro Matsuse
  • Patent number: 8859436
    Abstract: Methods for processing an amorphous silicon thin film sample into a polycrystalline silicon thin film are disclosed. In one preferred arrangement, a method includes the steps of generating a sequence of excimer laser pulses, controllably modulating each excimer laser pulse in the sequence to a predetermined fluence, masking portions of each fluence controlled laser pulse in the sequence with a two dimensional pattern of slits to generate a sequence of fluence controlled pulses of line patterned beamlets, irradiating an amorphous silicon thin film sample with the sequence of fluence controlled slit patterned beamlets to effect melting of portions thereof, and controllably sequentially translating a relative position of the sample with respect to each of the fluence controlled pulse of slit patterned beamlets to thereby process the amorphous silicon thin film sample into a single or polycrystalline silicon thin film.
    Type: Grant
    Filed: March 11, 2009
    Date of Patent: October 14, 2014
    Assignee: The Trustees of Columbia University in the City of New York
    Inventors: James S. Im, Robert S. Sposili, Mark A. Crowder
  • Publication number: 20140302626
    Abstract: Provided are a method of manufacturing a display that may reduce deposition nonuniformity while concurrently manufacturing a plurality of displays, and a deposition apparatus that may be used in the method, wherein the method includes: preparing a mother substrate having a plurality of regions in a matrix pattern, the mother substrate being for forming a plurality of display units corresponding to the plurality of regions; inserting the mother substrate into a deposition chamber, wherein a deposition source is in the deposition chamber; depositing a material on the mother substrate by using a mask including a plurality of parallel stripe-shaped masking sheets extending in a first direction; and cutting the mother substrate along a periphery of each of the plurality of display units to obtain the plurality of displays.
    Type: Application
    Filed: August 9, 2013
    Publication date: October 9, 2014
    Applicant: Samsung Display Co., Ltd.
    Inventors: Cheol-Rae Jo, Myung-Soo Huh, Suk-Won Jung, Choel-Min Jang, Jeong-Ho Yi
  • Patent number: 8852971
    Abstract: A method of cutting light emitting element packages includes preparing a ceramic substrate having a surface on which a plurality of light emitting element chips are mounted and a light-transmitting material layer is formed to cover the plurality of light emitting element chips; partially removing the light-transmitting material layer between the plurality of light emitting element chips along a cutting line by using a mechanical cutting method; and separating individual light emitting element packages by cutting the ceramic substrate along the cutting line by using a laser cutting method.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: October 7, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eui-seok Kim, Won-soo Ji, Choo-ho Kim, Shin-min Rhee, Dong-hun Lee, Hee-young Jun
  • Patent number: 8852976
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer including a first surface, a second surface opposite to the first surface, and a light emitting layer; a p-side electrode provided on the second surface of the semiconductor layer in a region including the light emitting layer; an n-side electrode provided on the second surface of the semiconductor layer in a region not including the light emitting layer; an insulating film being more flexible than the semiconductor layer, the insulating film provided on the second surface and a side surface of the semiconductor layer, and the insulating film having a first opening reaching the p-side electrode and a second opening reaching the n-side electrode; a p-side interconnection layer provided on the insulating film and connected to the p-side electrode; and an n-side interconnection layer provided on the insulating film and connected to the n-side electrode.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: October 7, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Hamasaki, Akihiro Kojima, Yoshiaki Sugizaki
  • Publication number: 20140287545
    Abstract: Semiconductor photonic device surfaces are covered with a dielectric or a metal protective layer. The protective layer covers the entire device, including regions near facets at active regions, to prevent bare or unprotected semiconductor regions, thereby to form a very high reliability etched facet photonic device.
    Type: Application
    Filed: June 4, 2014
    Publication date: September 25, 2014
    Applicant: BINOPTICS CORPORATION
    Inventor: Alex A. BEHFAR
  • Publication number: 20140287544
    Abstract: Semiconductor photonic device surfaces are covered with a dielectric or a metal protective layer. The protective layer covers the entire device, including regions near facets at active regions, to prevent bare or unprotected semiconductor regions, thereby to form a very high reliability etched facet photonic device.
    Type: Application
    Filed: June 4, 2014
    Publication date: September 25, 2014
    Applicant: BinOptics Corporation
    Inventor: Alex A. BEHFAR
  • Patent number: 8841150
    Abstract: In an aspect, an array substrate for a flexible display device and a method of manufacturing the array substrate, the method including operations of arranging at least one lower protective film on which a plurality of display units that are covered by thin-film encapsulation (TFE) units are arrayed; performing half cutting and full cutting on the at least one lower protective film; and completing the manufacture of each of the plurality of display units by removing remaining parts on the at least one lower protective film from the half cutting and full cutting is provided.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: September 23, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dong-Ho Kim, Sung-Un Park
  • Patent number: 8841145
    Abstract: System for wafer-level phosphor deposition. A method for phosphor deposition on a semiconductor wafer that has a plurality of LED dies includes the operations of covering the semiconductor wafer with a selected thickness of photo resist material, removing portions of the photo resist material to expose portions of the semiconductor wafer so that electrical contacts associated with the plurality of LED dies remain unexposed, and depositing phosphor on the exposed portions of the semiconductor wafer.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: September 23, 2014
    Assignee: Bridgelux, Inc.
    Inventor: Tao Xu
  • Patent number: 8841170
    Abstract: A method of singulating semiconductor devices in the close proximity to active structures by controlling interface charge of semiconductor device sidewalls is provided that includes forming a scribe on a surface of a semiconductor devices, where the scribe is within 5 degrees of a crystal lattice direction of the semiconductor device, cleaving the semiconductor device along the scribe, where the devices are separated, using a coating process to coat the sidewalls of the cleaved semiconductor device with a passivation material, where the passivation material is disposed to provide a fixed charge density at a semiconductor interface of the sidewalls, and where the fixed charge density interacts with charge carriers in the bulk of the material.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: September 23, 2014
    Assignees: The Regents of the University of California, Naval Research Laboratory
    Inventors: Vitaliy Fadeyev, Hartmut F. W. Sadrozinski, Marc Christophersen, Bernard F. Phlips
  • Patent number: 8841204
    Abstract: High yield substrate assembly. In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: September 23, 2014
    Assignee: Invensas Corporation
    Inventors: Liang Wang, Ilyas Mohammed, Masud Beroz
  • Publication number: 20140264403
    Abstract: The instant disclosure provides a light-emitting module and a method of manufacturing a single light-emitting structure. The light-emitting module includes two identical light-emitting structures disposed on the same plane. One of the two light-emitting structures disposed on the plane is rotated by 180 degrees relative to the other light-emitting structure, and the two light-emitting structures are connected to each other. Each light-emitting structure includes a base, a conducting element, a light-emitting element and an encapsulation element. The conducting element includes a plurality of conductors separated from each other and passing through the base body, where the number of the conductors is N and N>1. The light-emitting element includes at least one light-emitting chip electrically connected between at least two of the conductors. The encapsulation element includes a transparent encapsulation body disposed on the base to cover the conducting element and the light-emitting element.
    Type: Application
    Filed: February 17, 2014
    Publication date: September 18, 2014
    Applicants: LITE-ON TECHNOLOGY CORPORATION, LITE-ON ELECTRONICS (GUANGZHOU) LIMITED
    Inventors: CHIA-HUNG CHU, TSUNG-KANG YING, HOU-TE LEE, CHIA-MING TU
  • Patent number: 8835283
    Abstract: A fabrication method for producing semiconductor chips with enhanced die strength comprises following steps: forming a semiconductor wafer with enhanced die strength by comprising the substrate, the active layer on the front side of the substrate and the backside metal layer on the backside of the substrate, wherein at least one integrated circuit forms in the active layer; forming a protection layer on a front side of the semiconductor wafer; dicing the semiconductor wafer by at least one laser dicing process and removing the laser dicing residues and removing said protection layer by at least one etching process, whereby plural semiconductor chips with enhanced die strength are produced, and wherein the backside metal layer of said semiconductor chip fully covers the backside of said semiconductor chip after dicing.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: September 16, 2014
    Assignee: WIN Semiconductors Corp.
    Inventor: Chang-Hwang Hua
  • Patent number: 8828891
    Abstract: For modulating laser light for forming a modified region SD3 at an intermediate position between a position closer to a rear face 21 and a position closer to a front face 3 with respect to an object 1, a quality pattern J having a first brightness region extending in a direction substantially orthogonal to a line 5 and second brightness regions located on both sides of the first brightness region in the extending direction of the line 5 is used. After forming modified regions SD1, SD2 at positions closer to the rear face 21 but before forming modified regions SD4, SD5 at positions closer to the rear face 21 while using the front face 3 as a laser light entrance surface, the modified region SD3 is formed at the intermediate position by irradiation with laser light modulated according to a modulation pattern including the quality pattern J.
    Type: Grant
    Filed: January 5, 2011
    Date of Patent: September 9, 2014
    Assignee: Hamamatsu Photonics K.K.
    Inventor: Takeshi Sakamoto
  • Patent number: 8828761
    Abstract: A method for manufacturing a semiconductor light emitting device, includes: forming a light emitting structure having a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer on a growth substrate. A trench is formed in a portion to divide the light emitting structure into individual light emitting structures. The trench has a depth such that the growth substrate is not exposed. A support substrate is provided on the light emitting structure. The growth substrate is separated from the light emitting structure. The light emitting structure is cut into individual semiconductor light emitting devices.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: September 9, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung Joon Kim, Tae Sung Jang, Jong Gun Woo, Yung Ho Ryu, Tae Hun Kim, Sang Yeob Song
  • Patent number: 8822277
    Abstract: A method for manufacturing LED packages includes following steps: providing an engaging frame including a lead frame, electrode structures having first and second electrodes, and defining slots between the electrode structure, each first electrode including a first inserting part and each second electrode including a second inserting part; providing a substrate and combining the substrate and the engaging frame together to make through holes of the substrate located at lateral sides of the first and second inserting parts respectively, insulating parts of the substrate received in the slots of the engaging frame, and cavities of the substrate receiving the first and second inserting parts; providing LED diodes, and connecting each LED diode electrically to the first and second electrodes; and cutting along the first and second inserting parts to make sides of the first and second inserting parts exposed to ambient air.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: September 2, 2014
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Hou-Te Lin, Lung-Hsin Chen
  • Patent number: 8822249
    Abstract: A light-emitting device and a method of manufacturing the same are provided. The light-emitting device includes a compound semiconductor structure having a first N-type compound semiconductor layer, an active layer, and a P-type compound semiconductor layer, a P-type electrode layer that is disposed on the P-type compound semiconductor layer and electrically connects with the P-type compound semiconductor layer, a plurality of insulation walls disposed at two sides of the compound semiconductor structure and the P-type electrode layer, a plurality of N-type electrode layers penetrating the plurality of insulation walls, and a conductive substrate on which a plurality of N-type electrode connecting layers respectively corresponding to a plurality of N-type electrode layers are separated from a P-type electrode connecting layer corresponding to the P-type electrode layer.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: September 2, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ho-sun Paek, Hak-hwan Kim, Sung-kyong Oh
  • Patent number: 8818144
    Abstract: A process for preparing a subassembly, the process comprising: (a) defining the location of one or more grooves for receiving optical conduits on the top planar surface of a wafer or panel, the grooves corresponding to multiple interposers on the wafer or panel; and (b) etching the grooves into the wafer or panel, each groove having sidewalls and first and second terminal ends and a first facet at each terminal end perpendicular to the side walls, each first facet having a first angle relative to the top planar surface, each groove being shared by a pair of transmitting and receiving interposers on the wafer or panel prior to being diced such that the first and second terminal ends of each groove correspond to transmitting and receiving interposers, respectively.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: August 26, 2014
    Assignees: Tyco Electronics Corporation, Tyco Electronics Nederland B.V.
    Inventors: Terry Patrick Bowen, Jan Willem Rietveld
  • Patent number: 8815618
    Abstract: A light-emitting diode (LED) device is provided. The LED device is formed by forming an LED structure on a first substrate. A portion of the first substrate is converted to a porous layer, and a conductive substrate is formed over the LED structure on an opposing surface from the first substrate. The first substrate is detached from the LED structure along the porous layer and any remaining materials are removed from the LED structure.
    Type: Grant
    Filed: August 14, 2009
    Date of Patent: August 26, 2014
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Ding-Yuan Chen, Chen-Hua Yu, Wen-Chih Chiou
  • Patent number: 8815629
    Abstract: A method of manufacturing an optical reflector including an alternating stack of at least one first layer of complex refraction index n1 and at least one second layer of complex refraction index n2, in which the first layer includes semiconductor nanocrystals, including the following steps: calculation of the total number of layers of the stack, of the thicknesses of each of the layers and of the values of complex refraction indices n1 and n2 on the basis of the characteristics of a desired spectral reflectivity window of the optical reflector, including the use of an optical transfer matrices calculation method; calculation of deposition and annealing parameters of the layers on the basis of the total number of layers and of the values of previously calculated complex refraction indices n1 and n2; deposition and annealing of the layers in accordance with the previously calculated parameters.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: August 26, 2014
    Assignee: Commissariat a l'energie atomique et aux energies alternatives
    Inventors: Kavita Surana, Mathieu Baudrit, Pierre Mur, Philippe Thony
  • Publication number: 20140235000
    Abstract: A method of grinding a substrate is provided. A substrate including a first main surface having a semiconductor layer formed thereon and a second main surface opposed to the first main surface is prepared. A support film is attached to the first main surface using a glue. The second main surface of the substrate is ground so as to reduce a thickness of the substrate. The support film is removed from the first main surface by applying force to the support film in a non-traverse direction.
    Type: Application
    Filed: December 5, 2013
    Publication date: August 21, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae Yoon KIM, Seung Jae Lee, Ha Yeong Son, Jin Gi Hong, Seong Deok Hwang
  • Publication number: 20140231831
    Abstract: The invention provides a substrate structure used for manufacturing a light-emitting diode and a method for manufacturing the light-emitting diode. The substrate structure includes a substrate having a first surface and a second surface opposite to the first surface and a plurality of grooving structure formed on the first surface of the substrate. The light-emitting diode is formed on the first surface of the substrate.
    Type: Application
    Filed: September 17, 2013
    Publication date: August 21, 2014
    Applicant: Lextar Electronics Corporation
    Inventors: PEI-SHIU TSAI, Wan-Chun HUANG
  • Patent number: 8809091
    Abstract: A method of manufacturing an organic electroluminescence element having on a belt-formed flexible base material, a first electrode, at least one organic functional layer, and a second electrode, includes continuously forming at least one organic functional layer by coating the same on a first electrode which is formed continuously on the flexible base material in the conveying direction thereof, further forming a second electrode on the organic functional layer, so as to make a plurality of organic electroluminescence element structures in the conveying direction, and then cutting the electroluminescence element structures into individual organic electroluminescence elements so as to manufacture organic electroluminescence elements.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: August 19, 2014
    Assignee: Konica Minolta Holdings, Inc.
    Inventors: Nobuaki Takahashi, Shigetoshi Kawabe, Natsuki Yamamoto
  • Patent number: 8809180
    Abstract: A method for producing at least one semiconductor component group, in particular a SiC semiconductor component group, includes the step of producing a number of semiconductor components on a substrate, particularly on a wafer. The individual semiconductor components are tested for detecting operative semiconductor components. At least one semiconductor component group is assembled, which is formed of a number of operative semiconductor components and which forms a coherent flat structure. The operative semiconductor components of the semiconductor component group are electrically connecting in parallel.
    Type: Grant
    Filed: December 21, 2005
    Date of Patent: August 19, 2014
    Assignee: Siemens Aktiengesellschaft
    Inventors: Karl Weidner, Robert Weinke
  • Publication number: 20140227813
    Abstract: A light emitting element for flip-chip mounting having a flat mounting surface which allows a decrease in the width of the streets of a wafer. In the light emitting element, the insulating member filling around the bumps and flattening the upper surface is formed with a margin of a region with a width which is equal to or larger than the width of the streets on the dividing lines, so that at the time of dividing the wafer along the dividing lines, the insulating member is not processed, which allows designing of the streets with a small width.
    Type: Application
    Filed: February 11, 2014
    Publication date: August 14, 2014
    Applicant: NICHIA CORPORATION
    Inventors: Akinori YONEDA, Shinji NAKAMURA, Akiyoshi KINOUCHI, Yoshiyuki AIHARA, Hirokazu SASA
  • Patent number: 8802469
    Abstract: A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.
    Type: Grant
    Filed: May 17, 2011
    Date of Patent: August 12, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Chen-Fu Chu, Trung Tri Doan, Hao-Chun Cheng, Feng-Hsu Fan, Fu-Hsien Wang
  • Patent number: 8802470
    Abstract: An optical device processing method including a protective layer includes forming a protective layer of an insulator on the front side of an optical device wafer so as to insulate at least the electrodes from each other, forming a groove on the front side of the wafer along each division line, forming a reflective film on the front side of the wafer to thereby form the reflective film on at least the side surfaces of the groove, removing the protective layer formed on the electrodes on the front side of the wafer to thereby expose the electrodes, and grinding a back side of the wafer to thereby reduce the thickness of the wafer to the finished thickness until the groove is exposed to the back side of the wafer to divide the wafer into individual optical device chips.
    Type: Grant
    Filed: June 4, 2013
    Date of Patent: August 12, 2014
    Assignee: Disco, Corporation
    Inventor: Kazuma Sekiya
  • Patent number: 8802463
    Abstract: An optical device wafer has a plurality of optical devices formed on a front side and a plurality of crossing division lines for partitioning the optical devices, each optical device having electrodes formed on the front side. A processing method includes: forming a groove on a back side of the wafer along each division line so as to form a slightly remaining portion on the front side of the wafer along each division line; forming a reflective film on the back side of the wafer to thereby form the reflective film on at least side surfaces of the groove; grinding the back side of the wafer to thereby reduce the thickness of the wafer to a finished thickness; and cutting the slightly remaining portion along each division line to thereby divide the wafer into individual optical device chips.
    Type: Grant
    Filed: June 4, 2013
    Date of Patent: August 12, 2014
    Assignee: Disco Corporation
    Inventor: Kazuma Sekiya
  • Patent number: 8790936
    Abstract: A wafer-level optical deflector assembly is formed on a front surface side of a wafer. Then, the front surface side of the wafer is etched by using elements of the wafer-level optical deflector assembly, to form a front-side dicing street. Then, a transparent substrate with an inside cavity is adhered to the front surface side of the wafer. Then, a second etching mask is formed on a back surface side of the wafer. Then, the back surface side of the wafer is etched to create a back-side dicing street. Then, an adhesive sheet with a ring-shaped rim is adhered to the back surface side of the wafer. Then, the transparent substrate is removed. Finally, the ring-shaped rim is expanded to widen the front-side dicing street and the back-side dicing street to pick up optical deflectors one by one from the wafer.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: July 29, 2014
    Assignee: Stanley Electric Co., Ltd.
    Inventor: Yoshiaki Yasuda
  • Patent number: 8786056
    Abstract: A method of forming a semiconductor light emitting element. The method can include forming a seed layer on a semiconductor layer assembly including at least one nitride semiconductor layer. An insulating mask can be formed on the seed layer. The insulating mask can include a plurality of element areas separated by cross spaces. Each element area of the plurality of element areas can be connected to at least one of the other element areas of the plurality of element areas. The seed layer can be plated such that a plating substrate is formed in each of the plurality of element areas.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: July 22, 2014
    Assignee: Nichia Corporation
    Inventors: Kentaro Watanabe, Giichi Marutsuki, Yuya Yamakami
  • Patent number: 8778712
    Abstract: An organic electroluminescence display panel includes a thin-film transistor layer above a substrate. A planarizing film is above the thin-film transistor layer with contact holes being formed in the planarizing film. A bank is above the planarizing film. The bank includes openings arranged in rows and columns that define regions for forming organic electroluminescence elements. Each opening is between a pair of adjacent concaves in one of the columns. The concaves are formed in an upper surface of the bank and sunken into the contact holes. The upper surface of the bank has repellency. A light-emitting layer is formed in each opening by ejecting drops of an ink from nozzles of an inkjet head into the openings while moving the inkjet head relative to the substrate. The nozzles further eject drops of the ink into the concaves when above the concaves for ejecting the drops of the ink through every nozzle.
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: July 15, 2014
    Assignee: Panasonic Corporation
    Inventor: Takayuki Takeuchi
  • Patent number: 8778780
    Abstract: Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: July 15, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Trung-Tri Doan, Chen-Fu Chu, Hao-Chun Cheng, Feng-Hsu Fan
  • Patent number: 8772137
    Abstract: A semiconductor wafer with an assisting dicing structure. The wafer comprises a substrate having a front surface and a rear surface. The front surface of the substrate comprises at least two device regions separated by at least one dicing lane. The rear surface of the substrate comprises at least one pre-dicing trench formed therein and substantially aligned with the dicing lane. A method for dicing a semiconductor wafer is also disclosed.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: July 8, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsien-Wei Chen, Shih-Hsun Hsu
  • Patent number: 8772064
    Abstract: A method of fabricating a III-nitride semiconductor laser device includes: preparing a substrate having a hexagonal III-nitride semiconductor and having a semipolar primary surface; forming a substrate product having a laser structure, an anode electrode and a cathode electrode, the laser structure including a substrate and a semiconductor region formed on the semipolar primary surface; scribing a first surface of the substrate product in part in a direction of the a-axis of the hexagonal III-nitride semiconductor; and carrying out breakup of the substrate product by press against a second surface of the substrate product, to form another substrate product and a laser bar.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: July 8, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shimpei Takagi, Yusuke Yoshizumi, Koji Katayama, Masaki Ueno, Takatoshi Ikegami
  • Patent number: 8772065
    Abstract: A package body (1) with an upper side (2), with an underside (22), opposite from the upper side (2), and with a side surface, which connects the upper side (2) and the underside (22) and is provided as a mounting surface (19), the package body (1) having a plurality of layers (8) which contain a ceramic material, and a main direction of extent of the layers (23, 24, 25) running obliquely in relation to the mounting surface (19). Furthermore, a method for producing a package body (1) is provided.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: July 8, 2014
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Georg Bogner, Karlheinz Arndt
  • Patent number: 8772126
    Abstract: A cavity is etched from a front surface into a semiconductor substrate. After providing an etch stop structure at the bottom of the cavity, the cavity is closed. From a back surface opposite to the front surface the semiconductor substrate is grinded at least up to an edge of the etch stop structure oriented to the back surface. Providing the etch stop structure at the bottom of an etched cavity allows for precisely adjusting a thickness of a semiconductor body of a semiconductor device.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: July 8, 2014
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Anton Mauder
  • Publication number: 20140183569
    Abstract: An LED chip unit and manufacturing method thereof, a LED module, an illuminating device and a display device. The LED chip unit includes a plurality of LED cores which are electrically isolated from each other. The LED chip unit is used for a cutting unit of an epitaxial wafer, so that scraping channels between the LED chip units are only reserved. The area which the space between the adjacent cores occupies is less than the scraping channel, so that utilization ratio of the epitaxial wafer is increased. The cores are integrated and the LED chip unit is packaged on the base plate as a basic unit, so that the cores are packaged on the base plate at a time thereby simplifying packaging.
    Type: Application
    Filed: May 11, 2011
    Publication date: July 3, 2014
    Applicant: SUNSUN LIGHTING CHINA CO., LTD.
    Inventor: Jianning Sun