Substrate Dicing Patents (Class 438/33)
  • Publication number: 20130069086
    Abstract: A method for producing a plurality of optoelectronic semiconductor chips includes providing a carrier wafer having a first surface and a second surface opposite the first surface. wherein a plurality of individual component layer sequences spaced apart from one another in a lateral direction are applied on the first surface, the component layer sequences being separated from one another by separation trenches; introducing at least one crystal imperfection in at least one region of the carrier wafer which at least partly overlaps a separation trench in a vertical direction; singulating the carrier wafer along the at least one crystal imperfection into individual semiconductor.
    Type: Application
    Filed: February 3, 2011
    Publication date: March 21, 2013
    Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Ewald K. M. Günther, Mathias Kämpf, Jens Dennemarck, Nikolaus Gmeinwieser
  • Patent number: 8399272
    Abstract: A method of manufacturing the semiconductor light emitting element comprises a semiconductor layer forming step of forming the multilayered nitride semiconductor layer on the first wafer having a transparent property; a bonding step of bonding the multilayered nitride semiconductor layer to the first wafer; a groove forming step of forming the groove extending from the lower surface of the first wafer to the multilayered nitride semiconductor layer; a light applying step of applying a first light to the lower surface of the multilayered nitride semiconductor layer through the first wafer to reduce a bonding force between the multilayered nitride semiconductor layer and the first wafer; a separating step of separating the first wafer from the multilayered nitride semiconductor layer; and a cutting step of cutting the second wafer along the groove to divide into a plurality of the semiconductor light emitting element.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: March 19, 2013
    Assignee: Panasonic Corporation
    Inventors: Kazuyuki Yamae, Hiroshi Fukshima, Masaharu Yasuda, Tomoya Iwahashi, Hidenori Kamei, Syuusaku Maeda
  • Publication number: 20130065336
    Abstract: A method for fabricating a group-III nitride semiconductor laser device stably supplies laser cavity mirrors having a low lasing threshold current through the use of a semi-polar plane. A blade 5g is forced down through a first region ER1 to keep the first region ER1 squeezed between a support member H2 and a movable member H1 together with a part of a protective sheet TF in contact with the first region ER1 while the tension generated in the area of the protective sheet TF in contact with the first region ER1 with the movable member H1 increases until the semi-polar principal surface SF at an end face EG1 of the first region ER1 tilts by a deflection angle THETA from the semi-polar principal surface SF of a second region ER2, and a force is thereby generated in the first region ER1 in a direction opposite to the direction of travel of the blade 5g toward the first region ER1.
    Type: Application
    Filed: August 6, 2012
    Publication date: March 14, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Shimpei TAKAGI
  • Publication number: 20130065334
    Abstract: A method of manufacturing a laser diode device includes: forming semiconductor layers on top of one another and supported by a top surface of a semiconductor substrate, the semiconductor layers including an active layer, forming a separation trench by etching and removing portions of the semiconductor layers, from a top semiconductor layer to and including the active layer; scribing a groove in a bottom surface of the semiconductor substrate, directly opposite and along the separation trench; and propagating a crack from the groove, splitting the semiconductor substrate along the groove and forming a cleaved surface extending from the bottom surface of the semiconductor substrate to a bottom surface of the separation trench.
    Type: Application
    Filed: May 17, 2012
    Publication date: March 14, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Takashi MOTODA
  • Publication number: 20130065335
    Abstract: A method of manufacturing a laser diode device includes: forming, in a semiconductor laser bar, separation trenches extending across all of a transverse dimension of the semiconductor laser bar and defining a mesa stripe, each of the separation trenches having wide portions located at longitudinal edge portions of the semiconductor laser bar and a narrow portion located in a longitudinal central portion of the semiconductor laser bar; scribing, in the semiconductor laser bar, grooves extending parallel to the separation trenches and terminating before reaching longitudinal edge portions of the semiconductor laser bar; and splitting the semiconductor laser bar along the grooves to form cleaved surfaces extending from a bottom surface of the semiconductor laser bar to bottom surfaces of the separation trenches.
    Type: Application
    Filed: May 17, 2012
    Publication date: March 14, 2013
    Applicant: Mitsubishi Electric Corporation
    Inventor: Takashi MOTODA
  • Publication number: 20130065337
    Abstract: A method for fabricating a group-III nitride semiconductor laser device having a semi-polar surface provides a laser cavity mirror which can reduce lasing threshold current. A support plate H tilts at an angle THETA from an m-axis toward a reference plane Ab defined by a direction PR of travel of the blade 5g and an a-axis in a c-m plane while the direction PR is being orthogonal to the front surface Ha of the support plate H. The blade 5g is positioned so as to be aligned to a plane which includes an intersection P1 between the endmost scribe mark 5b1 among a plurality of scribe marks 5b and the front surface 5a of the substrate product 5 and extends along the direction PR. In the case where the angle ALPHA defined ranges either from 71 to 79 degrees or from 101 to 109 degrees, the angle THETA then ranges from 11 to 19 degrees, and thereby the reference plane Ab along the direction PR extends along the c-plane orthogonal to the c-axis.
    Type: Application
    Filed: August 6, 2012
    Publication date: March 14, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Shimpei TAKAGI
  • Publication number: 20130064261
    Abstract: An edge emitting solid state laser and method. The laser comprises at least one AlInGaN active layer on a bulk GaN substrate with a non-polar or semi-polar orientation. The edges of the laser comprise {1 1?2±6} facets. The laser has high gain, low threshold currents, capability for extended operation at high current densities, and can be manufactured with improved yield. The laser is useful for optical data storage, projection displays, and as a source for general illumination.
    Type: Application
    Filed: September 7, 2012
    Publication date: March 14, 2013
    Applicant: Soraa, Inc.
    Inventors: Rajat Sharma, Eric M. Hall, Christiane Poblenz, Mark P. D'Evelyn
  • Publication number: 20130056745
    Abstract: A buffer layer of zinc telluride (ZnTe) or titanium dioxide (TiO2) is formed directly on a silicon substrate. Optionally, a layer of AlN is then formed as a second layer of the buffer layer. A template layer of GaN is then formed over the buffer layer. An epitaxial LED structure for a GaN-based blue LED is formed over the template layer, thereby forming a first multilayer structure. A conductive carrier is then bonded to the first multilayer structure. The silicon substrate and the buffer layer are then removed, thereby forming a second multilayer structure. Electrodes are formed on the second multilayer structure, and the structure is singulated to form blue LED devices.
    Type: Application
    Filed: September 7, 2011
    Publication date: March 7, 2013
    Applicant: Bridgelux, Inc.
    Inventor: Zhen Chen
  • Patent number: 8389312
    Abstract: A method of fabricating a group-III nitride semiconductor laser device includes: preparing a substrate of a hexagonal group-III nitride semiconductor, where the substrate has a semipolar primary surface; forming a substrate product having a laser structure, an anode electrode and a cathode electrode, where the laser structure includes the substrate and a semiconductor region, and where the semiconductor region is formed on the semipolar primary surface; scribing a first surface of the substrate product in part in a direction of the a-axis of the hexagonal group-III nitride semiconductor; and carrying out breakup of the substrate product by press against a second surface of the substrate product, to form another substrate product and a laser bar.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: March 5, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yusuke Yoshizumi, Shimpei Takagi, Takatoshi Ikegami, Masaki Ueno, Koji Katayama
  • Publication number: 20130049043
    Abstract: Engineered substrates for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a transducer structure having a plurality of semiconductor materials including a radiation-emitting active region. The device further includes an engineered substrate having a first material and a second material, at least one of the first material and the second material having a coefficient of thermal expansion at least approximately matched to a coefficient of thermal expansion of at least one of the plurality of semiconductor materials. At least one of the first material and the second material is positioned to receive radiation from the active region and modify a characteristic of the light.
    Type: Application
    Filed: August 31, 2011
    Publication date: February 28, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Martin F. Schubert, Cem Basceri, Vladimir Odnoblyudov, Casey Kurth, Thomas Gehrke
  • Publication number: 20130049022
    Abstract: An optoelectonice device package, an array of optoelectronic device packages and a method of fabricating an optoelectronic device package. The array includes a plurality of optoelectronic device packages, each enclosing an optoelectronic device, and positioned in at least one row. Each package including two geometrically parallel transparent edge portions and two geometrically parallel non-transparent edge portions, oriented substantially orthogonal to the transparent edge portions. The transparent edge portions are configured to overlap at least one adjacent package, and may be hermetically sealed. The optoelectronic device portion fabricated using R2R manufacturing techniques.
    Type: Application
    Filed: August 30, 2011
    Publication date: February 28, 2013
    Applicant: GENERAL ELECTRIC COMPANY
    Inventor: Donald Seton Farquhar
  • Patent number: 8383436
    Abstract: By performing plasma etching on the second surface of a semiconductor wafer on the first surface of which an insulating film is placed in dividing regions and on the second surface of which a mask for defining the dividing regions are placed, the second surface being located opposite from the first surface, the insulating film is exposed from an etching bottom portion by removing portions that correspond to the dividing regions. Subsequently, by continuously performing the plasma etching in the state in which the exposed insulating film is surface charged with electric charge due to ions in the plasma, corner portions put in contact with the insulating film are removed in the device-formation-regions. Consequently, individualized semiconductor chips having a high transverse rupture strength are manufactured.
    Type: Grant
    Filed: January 23, 2006
    Date of Patent: February 26, 2013
    Assignee: Panasonic Corporation
    Inventor: Kiyoshi Arita
  • Publication number: 20130037825
    Abstract: Disclosed is a semiconductor light emitting chip (20) that is composed of: a substrate (10), which has the C plane of a sapphire single crystal as the front surface, and the side surfaces (25, 26) configured of planes that intersect all the planes equivalent to the M plane of the sapphire single crystal, and which includes modified regions (23, 24) in the side surfaces (25, 26), the modified regions being formed by laser radiation; and a light emitting element (12), which is provided on the substrate front surface (10a) of the substrate (10). In the semiconductor light emitting chip, a tilt of the substrate side surfaces with respect to the substrate front surface is suppressed. Also disclosed is a method for processing the substrate.
    Type: Application
    Filed: February 16, 2011
    Publication date: February 14, 2013
    Applicant: SHOWA DENKO K.K.
    Inventors: Daisuke Hiraiwa, Takehiko Okabe
  • Publication number: 20130032815
    Abstract: An LED array includes a substrate, protrusions formed on a top surface of the substrate, and LEDs formed on the top surface of the substrate and located at a top of the protrusions. The LEDs are electrically connected with each other. Each LED includes a connecting layer, an n-type GaN layer, an active layer, and a p-type GaN layer formed on a top of the protrusions in sequence. A bottom surface of the n-type GaN layer connecting the connecting layer has a roughened exposed portion. The bottom surface of the n-type GaN layer has an N-face polarity.
    Type: Application
    Filed: March 16, 2012
    Publication date: February 7, 2013
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: TZU-CHIEN HUNG, CHIA-HUI SHEN
  • Publication number: 20130032810
    Abstract: A vertical GaN-based blue LED has an n-type GaN layer that was grown over a ZnS layer that in turn was grown directly on a silicon substrate. In one example, the ZnS layer is a transitional buffer layer that is 50 nm thick, and the n-type GaN layer is at least 2000 nm thick. Growing the n-type GaN layer on the ZnS buffer layer reduces lattice defect density in the n-type layer. The ZnS buffer layer provides a good lattice constant match with the silicon substrate and provides a compound polar template for subsequent GaN growth. After the epitaxial layers of the LED are formed, a conductive carrier is wafer bonded to the structure. The silicon substrate and the ZnS buffer layer are then removed. Electrodes are added and the structure is singulated to form finished LED devices.
    Type: Application
    Filed: August 3, 2011
    Publication date: February 7, 2013
    Applicant: Bridgelux, Inc.
    Inventor: Zhen Chen
  • Publication number: 20130032834
    Abstract: A vertical GaN-based blue LED has an n-type GaN layer that was grown directly on Low Resistance Layer (LRL) that in turn was grown over a silicon substrate. In one example, the LRL is a low sheet resistance GaN/AlGaN superlattice having periods that are less than 300 nm thick. Growing the n-type GaN layer on the superlattice reduces lattice defect density in the n-type layer. After the epitaxial layers of the LED are formed, a conductive carrier is wafer bonded to the structure. The silicon substrate is then removed. Electrodes are added and the structure is singulated to form finished LED devices. In some examples, some or all of the LRL remains in the completed LED device such that the LRL also serves a current spreading function. In other examples, the LRL is entirely removed so that no portion of the LRL is present in the completed LED device.
    Type: Application
    Filed: August 2, 2011
    Publication date: February 7, 2013
    Applicant: Bridgelux, Inc.
    Inventor: Zhen Chen
  • Patent number: 8367443
    Abstract: Provided is a method of manufacturing semiconductor light emitting devices including: forming light emitting structures by sequentially depositing a first material layer, an active layer and a second material layer; forming the roughness pattern on a region of the bottom of a substrate except at least a cleaving region for forming cleaving planes; and forming n-electrodes.
    Type: Grant
    Filed: August 10, 2011
    Date of Patent: February 5, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Youn-joon Sung, Su-hee Chae, Tae-hoon Jang, Kyu-sang Kim
  • Patent number: 8365398
    Abstract: Using developed photo-resist materials at the side walls of silicon substrates, the preferred embodiments of the present invention improve alignment accuracy of stacked substrates. Such alignment accuracy improves the area efficiency of side-wall connections as well as through-hole connections. The parasitic impedances of stacked substrate connections are also improved.
    Type: Grant
    Filed: April 10, 2011
    Date of Patent: February 5, 2013
    Inventor: Jeng-Jye Shau
  • Patent number: 8367442
    Abstract: A method of manufacturing the semiconductor light emitting element comprises a semiconductor layer forming step of forming the multilayered nitride semiconductor layer on the first wafer having a transparent property; a bonding step of bonding the multilayered nitride semiconductor layer to the first wafer; a groove forming step of forming the groove extending from the lower surface of the first wafer to the multilayered nitride semiconductor layer; a light applying step of applying a first light to the lower surface of the multilayered nitride semiconductor layer through the first wafer to reduce a bonding force between the multilayered nitride semiconductor layer and the first wafer; a separating step of separating the first wafer from the multilayered nitride semiconductor layer; and a cutting step of cutting the second wafer along the groove to divide into a plurality of the semiconductor light emitting element.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: February 5, 2013
    Assignee: Panasonic Corporation
    Inventors: Kazuyuki Yamae, Hiroshi Fukshima, Masaharu Yasuda, Tomoya Iwahashi, Hidenori Kamei, Syuusaku Maeda
  • Patent number: 8367523
    Abstract: A method for manufacturing a semiconductor light-emitting device of the invention includes: forming a semiconductor layer including a light-emitting layer and a first interconnect layer on a major surface of a temporary substrate; dividing the semiconductor layer and the first interconnect layer into a plurality of chips by a trench; collectively bonding each divided portion of the first interconnect layer of a plurality of chips to be bonded not adjacent to each other out of the plurality of chips on the temporary substrate to a second interconnect layer while opposing the major surface of the temporary substrate and the major surface of a supporting substrate forming the second interconnect layer, and collectively transferring a plurality of the bonded chips from the temporary substrate to the supporting substrate after irradiating interfaces between the bonded chips and the temporary substrate and separating the chips and the temporary substrate from each other.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: February 5, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiaki Sugizaki, Akihiro Kojima, Masanobu Ando, Kazuyoshi Furukawa
  • Publication number: 20130026483
    Abstract: A gallium and nitrogen containing optical device has a base region and no more than three major planar side regions configured in a triangular arrangement provided from the base region.
    Type: Application
    Filed: January 24, 2012
    Publication date: January 31, 2013
    Applicant: Soraa, Inc.
    Inventors: Rajat Sharma, Andrew Felker
  • Publication number: 20130029445
    Abstract: There is provided a method of manufacturing a semiconductor light emitting device, the method including: preparing a substrate including first and second main surfaces opposing each other; forming a plurality of protruding parts in the first main surface of the substrate; forming a light emitting stack on the first main surface on which the plurality of protruding parts are formed; forming a plurality of light emitting structures by removing portions of the light emitting stack formed in regions corresponding to groove parts around the plurality of protruding parts; and separating the substrate along the groove parts.
    Type: Application
    Filed: July 25, 2012
    Publication date: January 31, 2013
    Inventors: Gi Bum KIM, Won Goo HUR, Seung Woo CHOI, Seung Jae LEE, Si Hyuk LEE, Tae Hun KIM
  • Publication number: 20130029444
    Abstract: A laser dicing method includes: placing a workpiece substrate on a stage; generating a clock signal; emitting a pulse laser beam synchronous with the clock signal; switching irradiation and non-irradiation of the workpiece substrate with the pulse laser beam in a unit of light pulse in synchronization with the clock signal to perform first irradiation of the pulse laser beam on a first straight line by controlling the pulse laser beam using a pulse picker; performing second irradiation of the pulse laser beam on a second straight line, which is adjacent to the first straight line in a substantially parallel fashion, after the first irradiation; and forming a crack reaching a workpiece substrate surface on the workpiece substrate by the first irradiation and the second irradiation.
    Type: Application
    Filed: July 24, 2012
    Publication date: January 31, 2013
    Applicant: TOSHIBA KIKAI KABUSHIKI KAISHA
    Inventor: Shoichi SATO
  • Publication number: 20130028280
    Abstract: Disclosed herein is a semiconductor laser element including: on a substrate, a laser structure section configured to include a semiconductor laminated structure having an n-type semiconductor layer, active layer and p-type semiconductor layer in this order, and a p-side electrode on top of the p-type semiconductor layer; a pair of resonator edges provided on two opposed lateral sides of the semiconductor laminated structure; and films made of a non-metallic material having a thermal conductivity higher than that of surrounding gas, and provided in the region of the top side of the laser structure section including the positions of the resonator edges.
    Type: Application
    Filed: July 18, 2012
    Publication date: January 31, 2013
    Applicant: SONY CORPORATION
    Inventors: Kazuhiro Hongo, Koji Fukumoto
  • Patent number: 8361885
    Abstract: A method of fabricating group-III nitride semiconductor laser device includes: preparing a substrate comprising a hexagonal group-III nitride semiconductor and having a semipolar principal surface; forming a substrate product having a laser structure, an anode electrode, and a cathode electrode, where the laser structure includes a semiconductor region and the substrate, where the semiconductor region is formed on the semipolar principal surface; scribing a first surface of the substrate product in a direction of an a-axis of the hexagonal group-III nitride semiconductor to form first and second scribed grooves; and carrying out breakup of the substrate product by press against a second surface of the substrate product, to form another substrate product and a laser bar.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: January 29, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yusuke Yoshizumi, Shimpei Takagi, Takatoshi Ikegami, Masaki Ueno, Koji Katayama
  • Publication number: 20130020594
    Abstract: A light-emitting device includes a semiconductor layer, a light-emitting stack structure formed on a first surface of the semiconductor layer, and a plurality of inverted pyramid structures formed on a second surface of the semiconductor layer opposite to the first surface. Each of the inverted pyramid structures has a sectional area increasing as each of the inverted pyramid structures is more extended in a vertical direction from the second surface.
    Type: Application
    Filed: March 31, 2011
    Publication date: January 24, 2013
    Applicant: CSSOLUTION CO., LTD.
    Inventors: Hyung-Soo Ahn, Min Yang, Hongju Ha
  • Publication number: 20130023078
    Abstract: A method of manufacturing a display substrate is disclosed. In one embodiment, an electrode layer may be formed on a base substrate including a first cell area, a second cell area and an intervening area between the first and the second cell areas. First electrodes may be formed in display regions of the first and the second cell areas by patterning the electrode layer. The electrode layer in an intervening area may be removed. Source electrodes and drain electrodes of thin film transistor may be formed in the first and the second cell areas where the first electrodes are formed.
    Type: Application
    Filed: December 6, 2011
    Publication date: January 24, 2013
    Applicant: Samsung Mobile Display Co., Ltd.
    Inventor: Jin-Yup Kim
  • Patent number: 8357556
    Abstract: A method and apparatus are provided for protecting a semiconductor device from damage. The method may include the steps of providing an active semiconductor device on a surface of a semiconductor substrate where the active device is surrounded by an inactive semiconductor area, and providing a soft metallic guard element in the inactive semiconductor area around at least a portion of the periphery of the active device wherein the metallic guard element is connected to ground potential and not to the active device.
    Type: Grant
    Filed: June 2, 2009
    Date of Patent: January 22, 2013
    Assignee: Emcore Corporation
    Inventors: Richard Carson, Elaine Taylor, Douglas Collins
  • Publication number: 20130017635
    Abstract: A method of forming ohmic contacts on a light emitting diode that features a surface treatment of a substrate includes exposing a surface of a p-type gallium nitride layer to an acid-containing solution and a buffered oxide etch process. A quantum well is formed in a gallium nitride substrate and a layer of p-type gallium nitride is deposited over the quantum well. The surface of the p-type gallium nitride is exposed to an acid-containing solution and then a buffered oxide etch process is performed to provide an etched surface. A metal stack including a layer of silver disposed between layers of platinum is then deposited.
    Type: Application
    Filed: March 13, 2012
    Publication date: January 17, 2013
    Applicant: Sorra, Inc.
    Inventors: Andrew J. Felker, Nicholas Andrew Vickers
  • Publication number: 20130017631
    Abstract: A method of manufacturing a light-emitting device includes providing a plate-shaped substrate, forming a lattice frame on a light-emitting element mounting surface of the plate-shaped substrate, mounting a light-emitting device in an opening of the lattice frame on the light-emitting element mounting surface, sealing the light-emitting element by supplying a sealing material into the opening of the lattice frame, and cutting the lattice frame and the plate-shaped substrate so as to split the lattice flame to obtain a plurality of light-emitting devices with a sidewall.
    Type: Application
    Filed: June 6, 2012
    Publication date: January 17, 2013
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Shigeo TAKEDA, Makoto ISHIDA, Mitsushi TERAKAMI, Shota YAMAMORI
  • Publication number: 20130011948
    Abstract: There are disclosed a method of manufacturing a semiconductor light emitting device and a paste application apparatus. The method includes preparing a light emitting structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer; disposing a mask including an opening exposing a part of the light emitting structure on the light emitting structure; applying a paste including a wavelength conversion material to the light emitting structure through the opening of the mask, by using a pressure means; and planarizing the applied paste by using a roller.
    Type: Application
    Filed: July 3, 2012
    Publication date: January 10, 2013
    Inventors: Tsuyoshi TSUTSUI, Shin Kun KIM, Seong Jae HONG, Il Woo PARK
  • Publication number: 20130011949
    Abstract: A method of manufacturing a light-emitting device comprising the steps of cutting a substrate by a laser beam to form a cavity in the substrate and generate a by-product directly on the substrate by the cutting, and removing the by-product by a chemical solution containing an acid under a predetermined cleaning temperature.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 10, 2013
    Applicant: Epistar Corporation
    Inventors: Chien-Kai CHUNG, Ta-Cheng Hsu, Jung-Min Hwang, Min-Hsun Hsieh, Ya-Lan Yang, De-Shan Kuo, Tsun-Kai Ko, Chien-Fu Shen, Ting-Chia Ko, Schang-Jin Hon
  • Patent number: 8338203
    Abstract: A compound semiconductor light-emitting device has a light-emitting layer, on a substrate, wherein at least a part of a substrate portion of the device side surface has recessed portions in a side direction of the device.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: December 25, 2012
    Assignee: Showa Denko K.K.
    Inventor: Katsuki Kusunoki
  • Patent number: 8338204
    Abstract: The present invention provides a light-emitting element, a method of manufacturing the light-emitting element, a light-emitting device, and a method of manufacturing the light-emitting device. A method of manufacturing a light-emitting element includes: forming a first conductive layer of a first conductive type, a light-emitting layer, and a second conductive layer of a second conductive type on at least one first substrate, forming an ohmic layer on the second conductive layer and bonding the at least one first substrate to a second substrate. The second substrate being larger than the first substrate. The method further includes etching portions of the ohmic layer, the second conductive layer, and the light-emitting layer to expose a portion of the first conductive layer.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: December 25, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yu-Sik Kim, Sang-Joon Park
  • Patent number: 8338202
    Abstract: In a method for manufacturing a semiconductor device, a first conductivity type semiconductor layer and a second conductivity type semiconductor layer are sequentially grown on a growth substrate. Then, an electrode layer is formed on the second conductivity type semiconductor layer. Then, a support body is adhered to the electrode layer by providing at least one adhesive layer therebetween. Finally, at least a part of the growth substrate is removed. In this case, the adhesive layer is removable from the electrode layer.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: December 25, 2012
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Takako Chinone, Shinichi Tanaka, Sho Iwayama, Yusuke Yokobayashi, Satoshi Tanaka
  • Publication number: 20120319149
    Abstract: A light-emitting device structure and a method for manufacturing the same are described. The light-emitting device structure includes a substrate and an illuminant structure. The substrate has a top surface and a lower surface on opposite sides, and two inclined side surfaces on opposite sides. Two sides of each inclined side surface are respectively connected to the top surface and the lower surface. The illuminant structure is disposed on the top surface.
    Type: Application
    Filed: September 13, 2011
    Publication date: December 20, 2012
    Applicant: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Yan-Kuin Su, Kuan-Chun Chen, Chun-Liang Lin
  • Patent number: 8334153
    Abstract: A semiconductor light emitting device has a light emitting element, a first electrode layer, a second electrode layer, a seed electrode layer and a plated layer. The light emitting element has a nitride-based III-V compound semiconductor on a substrate. The light emitting element having a light extraction surface. The first electrode layer on the light extraction surface. The second electrode layer is provided on a surface opposite to the light extraction surface of the light emitting element. The seed electrode layer is configured to cover the entire surface of the second electrode layer. The plated layer is provided on the seed electrode layer. The light emitting element has a light emitting layer, a first conductive type semiconductor layer, and a second conductive type semiconductor layer.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: December 18, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toru Gotoda, Toshiyuki Oka, Shinya Nunoue, Kotaro Zaima
  • Patent number: 8329562
    Abstract: Various embodiments of the present invention include a semiconductor device and a fabrication method therefor, the semiconductor device including a first semiconductor chip disposed on a substrate, a first sealing resin sealing the first semiconductor chip, a built-in semiconductor device disposed on the first sealing resin, and a second sealing resin sealing the first sealing resin and the built-in semiconductor device and covering a side surface of the substrate. According to an aspect of the present invention, it is possible to provide a high-quality semiconductor device and a fabrication method therefor, in which downsizing and cost reduction can be realized.
    Type: Grant
    Filed: December 10, 2010
    Date of Patent: December 11, 2012
    Assignee: Spansion LLC
    Inventors: Masanori Onodera, Kouichi Meguro, Junji Tanaka
  • Patent number: 8324083
    Abstract: A method for producing a Group III nitride compound semiconductor element includes growing an epitaxial layer containing a Group III nitride compound semiconductor using a different kind of substrate as an epitaxial growth substrate, adhering a supporting substrate to the top surface of the epitaxial growth layer through a conductive layer, and then removing the epitaxial growth substrate by laser lift-off. Before adhesion of the epitaxial layer and the supporting substrate, a first groove that at least reaches an interface between the bottom surface of the epitaxial layer and the epitaxial growth substrate from the top surface of the epitaxial layer formed on the epitaxial growth substrate and acts as an air vent communicating with the outside of a wafer when the epitaxial layer and the supporting substrate are joined to each other.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: December 4, 2012
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Toshiya Uemura, Masanobu Ando, Tomoharu Shiraki, Masahiro Ohashi, Naoki Arazoe, Ryohei Inazawa
  • Patent number: 8324636
    Abstract: A method of manufacturing a light-emitting device using laser scribing to improve overall light output is disclosed. Upon placing a semiconductor wafer having light emitting diode (“LED”) devices separated by streets on a wafer chuck, the process arranges a first surface of semiconductor wafer containing front sides of the LED devices facing up and a second surface of semiconductor wafer containing back sides of the LED devices facing toward the wafer chuck. After aligning a laser device over the first surface of the semiconductor wafer above a street, the process is configured to focus a high intensity portion of a laser beam generated by the laser device at a location in a substrate closer to the back sides of the LED devices.
    Type: Grant
    Filed: October 18, 2010
    Date of Patent: December 4, 2012
    Assignee: Bridgelux, Inc.
    Inventors: Norihito Hamaguchi, Ghulam Hasnain
  • Patent number: 8318519
    Abstract: Systems and methods for fabricating a light emitting diode include forming a multilayer epitaxial structure above a carrier substrate; depositing at least one metal layer above the multilayer epitaxial structure; removing the carrier substrate.
    Type: Grant
    Filed: June 5, 2007
    Date of Patent: November 27, 2012
    Assignee: SemiLEDs Optoelectronics Co., Ltd.
    Inventors: Trung Tri Doan, Chen-Fu Chu
  • Patent number: 8313964
    Abstract: A method for singulation of thick GaN wafers (e.g., 300-400 um) through the use of a double-side laser-scribe process. In a preferred embodiment, the patterned GaN substrate is processed using a laser-scribe on each side of the substrate to form scribe lines. The scribe lines are aligned to each other. In a preferred embodiment, the substrate has not been subjected to a thinning or polishing process for reducing its thickness.
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: November 20, 2012
    Assignee: Soraa, Inc.
    Inventors: Rajat Sharma, Thomas M. Katona, Andrew Felker
  • Publication number: 20120288974
    Abstract: A GaN based light emitting diode device which emits polarized light or light of various degrees of polarization for use in the creation of optical devices. The die are cut to different shapes, or contain some indicia that are used to represent the configuration of the weak dipole plane and the strong dipole plane. This allows for the more efficient manufacturing of such light emitting diode based optical devices.
    Type: Application
    Filed: July 19, 2012
    Publication date: November 15, 2012
    Applicants: KAAI, Inc., Soraa, Inc.
    Inventors: Rajat Sharma, Eric M. Hall
  • Patent number: 8304268
    Abstract: A fabrication method of a semiconductor package structure includes: patterning a metal plate having first and second surfaces; forming a dielectric layer on the metal plate; forming a metal layer on the first surface and the dielectric layer; forming metal pads on the second surface, the metal layer having a die pad and traces each having a bond pad; mounting a semiconductor chip on the die pad, followed by connecting electrically the semiconductor chip to the bond pads through bonding wires; forming an encapsulant to cover the semiconductor chip and the metal layer; removing portions of the metal plate not covered by the metal pads so as to form metal pillars; and performing a singulation process. The fabrication method is characterized by disposing traces with bond pads close to the die pad to shorten the bonding wires and forming metal pillars protruding from the dielectric layer to avoid solder bridging.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: November 6, 2012
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Pang-Chun Lin, Chun-Yuan Li, Chien-Ping Huang, Chun-Chi Ke
  • Publication number: 20120273815
    Abstract: The present invention related to a lift-off structure adapted to a substrate having a photoelectric device, the structure comprising: a buffer layer, forming on the substrate; an upper sacrificial layer, forming on the buffer layer; an etch stop layer, forming on the upper sacrificial layer, and the photoelectric device structure forming on the etch stop layer.
    Type: Application
    Filed: October 14, 2011
    Publication date: November 1, 2012
    Applicant: Institute of Nuclear Energy Research Atomic Energy Council, Executive Yuan
    Inventors: YU-LI TSAI, Chih-Hung Wu, Jei-Li Ho, Chao-Huei Huang, Min-De Yang
  • Publication number: 20120267662
    Abstract: A light-emitting diode chip comprises a semiconductor body (1) having a first (1A) and a second region (1B); an active zone (2) within the semiconductor body (1), which active zone, during the operation of the light-emitting diode chip (100), emits electromagnetic radiation through a radiation coupling-out area (11) formed at least in places by a first main area (111) of the semiconductor body (1); at least one trench (3) in the semiconductor body (1) wherein parts of the semiconductor body (1) are removed in the region of the trench, wherein the at least one trench (3) extends at least as far as the active zone (2), the at least one trench (3) completely surrounds the first region (1A) in a lateral direction, and the second region (1B) completely surrounds the at least one trench (3) and the first region (1A) in a lateral direction.
    Type: Application
    Filed: July 13, 2010
    Publication date: October 25, 2012
    Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Markus Maute, Tony Albrecht, Anna Kasprzak-Zablocka
  • Publication number: 20120269220
    Abstract: A Group III nitride semiconductor laser device includes a laser structure including a support substrate with a semipolar primary surface of a hexagonal Group III nitride semiconductor, and a semiconductor region thereon, and an electrode, provided on the semiconductor region, extending in a direction of a waveguide axis in the laser device. The c-axis of the nitride semiconductor is inclined at an angle ALPHA relative to a normal axis to the semipolar surface toward the waveguide axis direction. The laser structure includes first and second fractured faces intersecting with the waveguide axis. A laser cavity of the laser device includes the first and second fractured faces extending from edges of first and second faces. The first fractured face includes a step provided at an end face of an InGaN layer of the semiconductor region and extending in a direction from one side face to the other of the laser device.
    Type: Application
    Filed: January 19, 2012
    Publication date: October 25, 2012
    Applicants: SONY CORPORATION, SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takashi KYONO, Shimpei TAKAGI, Takamichi SUMITOMO, Yusuke YOSHIZUMI, Yohei ENYA, Masaki UENO, Katsunori YANASHIMA
  • Patent number: 8293551
    Abstract: A gallium and nitrogen containing optical device has a base region and no more than three major planar side regions configured in a triangular arrangement provided from the base region.
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: October 23, 2012
    Assignee: Soraa, Inc.
    Inventors: Rajat Sharma, Andrew Felker
  • Patent number: 8286578
    Abstract: A coating device for coating a peripheral surface of a sleeve body with a coating formulation includes a vertical support column for supporting a sleeve body in a vertical position coaxial with a coating axis, a carriage slideable along the vertical support column, and an annular coating stage attached to the carriage and moveable therewith for containing the coating formulation and for coating a layer of the coating formulation onto the peripheral surface of the sleeve body during a sliding movement of the carriage along the vertical support column. The coating device includes an irradiation stage that is arranged to be moveable with the annular coating stage and to provide radiation to at least partially cure the layer of coating formulation onto the peripheral surface so as to prevent flow off of the coating formulation.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: October 16, 2012
    Assignee: Agfa Graphics NV
    Inventors: Luc Leenders, Willem Mues, Jackie Duprez, Bart Verhoest, Hilbrand Vanden Wyngaert, Eddie Daems, Luc Vanmaele
  • Patent number: 8288205
    Abstract: The present invention is a method of manufacture of a package-in-package system, comprising: providing a bottom internal stacking module incorporating a semiconductor die and a package substrate, attaching an internal stiffening module, with a die receptacle, on the bottom internal stacking module, and attaching a top internal stacking module incorporating a further semiconductor die and a further package substrate upside-down on the internal stiffening module.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: October 16, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Seong Bo Shim, KyungOe Kim, Yong Hee Kang