Substrate Dicing Patents (Class 438/33)
  • Publication number: 20130217163
    Abstract: A light emitting element manufacturing method includes a wafer preparing process of preparing the semiconductor wafer, and a wafer dividing process of dividing the semiconductor wafer. In the wafer dividing process, in a vertical dividing region, a line position shifted by a predetermined distance from a center line of the vertical dividing region in a width direction to one side in the width direction is taken as the cutting start point to divide the semiconductor wafer.
    Type: Application
    Filed: July 6, 2011
    Publication date: August 22, 2013
    Applicant: NICHIA CORPORATION
    Inventor: Akinori Yoneda
  • Publication number: 20130214321
    Abstract: There is provided a highly reliable semiconductor light emitting element and vehicle lighting unit as well as associated methods. The semiconductor light emitting element can include a support substrate, a semiconductor stacked body including a first semiconductor layer of a first conductivity type, an active layer formed on the first semiconductor layer, and a second semiconductor layer of a second conductivity type formed on the active layer. The element can further include a bonding layer configured to bond the support substrate and the semiconductor stacked body, the bonding layer having a side surface that forms an angle exceeding 90° with a surface of the bonding layer on the side of the semiconductor stacked body, and an interconnection layer configured to extend from the upper surface of the semiconductor stacked body to cover the side surface of the bonding layer.
    Type: Application
    Filed: February 21, 2013
    Publication date: August 22, 2013
    Applicant: STANLEY ELECTRIC CO., LTD.
    Inventor: Stanley Electric Co., Ltd.
  • Publication number: 20130217162
    Abstract: Embodiments disclose a method including forming at least one compound semiconductor layer on a top r-face of a substrate, forming a line for cleavage on a bottom r-face of the substrate along a length of a guide line, wherein the guide line extends in a (11-20)-plane direction of the substrate, wherein the guide line extends from one portion of an edge to another portion of the edge, and wherein the edge is disposed between the top r-face and the bottom r-face of the substrate, and applying a force to the bottom r-face of the substrate to cleave the substrate along the line for cleavage in the (11-20)-plane direction and to form a cleaved facet along a m-plane of the at least one compound semiconductor.
    Type: Application
    Filed: April 5, 2012
    Publication date: August 22, 2013
    Inventors: Young Hun HAN, Dong Han Yoo
  • Patent number: 8513040
    Abstract: According to one embodiment, a method is disclosed for manufacturing a display device. A film material layer is formed on a support substrate. A first heating process for the film material layer at a first temperature to form a film layer and a second heating process for a second region surrounding a first region at a second temperature higher than the first temperature are performed. The first region is provided in a central part of the film layer. A display layer is formed in the first region and a peripheral circuit section is formed at least in a part of the second region. A third heating process is performed for at least a part of the film layer at a third temperature higher than the second temperature. In addition, the film layer is peeled off from the support substrate.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: August 20, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsunori Sakano, Kentaro Miura, Nobuyoshi Saito, Shintaro Nakano, Tomomasa Ueda, Hajime Yamaguchi
  • Publication number: 20130207156
    Abstract: An optoelectronic semiconductor chip includes a carrier and a semiconductor body having a semiconductor layer sequence, the semiconductor body arranged on the carrier wherein an emission region and a detection region are formed in the semiconductor body having the semiconductor layer sequence; the semiconductor layer sequence includes an active region arranged between a first semiconductor layer and a second semiconductor layer and provided in the emission region to generate radiation; the first semiconductor layer is arranged on the side of the active region facing away from the carrier; and the emission region has a recess extending through the active region.
    Type: Application
    Filed: August 9, 2011
    Publication date: August 15, 2013
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventors: Jürgen Moosburger, Christoph Neureuther, Norwin von Malm
  • Patent number: 8507302
    Abstract: Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: August 13, 2013
    Assignee: SemiLEDs Optoelectronics Co., Ltd.
    Inventors: Chen-Fu Chu, Hao-Chun Cheng, Trung Tri Doan, Feng-Hsu Fan
  • Publication number: 20130203195
    Abstract: A method of manufacturing a semiconductor light emitting device, includes forming a light emitting structure on a growth substrate. The light emitting structure includes a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer. A support substrate having one or more protrusions formed on one surface thereof is prepared. The one or more protrusions formed on the one surface of the support substrate are attached to one surface of the light emitting structure. The growth substrate is separated from the light emitting structure.
    Type: Application
    Filed: February 8, 2013
    Publication date: August 8, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: SAMSUNG ELECTRONICS CO., LTD.
  • Patent number: 8502256
    Abstract: Disclosed is a light emitting device. The light emitting device includes a substrate, a semiconductor layer on the substrate, and an electrode on the semiconductor layer, wherein the substrate has at least one side surface having a predetermined tilt angle with respect to a bottom surface of the substrate, wherein the predetermined tilt angle is an obtuse angle, and wherein a side surface of the semiconductor layer disposes vertically.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: August 6, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventor: Sang Youl Lee
  • Patent number: 8501638
    Abstract: Laser annealing scanning methods that result in reduced annealing non-uniformities in semiconductor device structures under fabrication are disclosed. The methods include defining a length of an annealing laser beam such that the tails of the laser beam resided only within scribe lines that separate the semiconductor device structures. The annealing laser beam tails from adjacent scan path segments can overlap or not overlap within the scribe lines. The cross-scan length of the annealing laser beam can be selected to simultaneously scan more than one semiconductor device structure, as long as annealing laser beam is configured such that the tails do not fall within a semiconductor device structure.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: August 6, 2013
    Assignee: Ultratech, Inc.
    Inventor: Arthur W. Zafiropoulo
  • Patent number: 8502204
    Abstract: An optoelectronic module includes a layer structure having a plurality of semiconductor layers including a substrate layer, a first layer arrangement and a second layer arrangement, wherein 1) the first layer arrangement has a light-emitting layer arranged on the substrate layer, 2) the second layer arrangement contains at least one circuit that controls an operating state of the light-emitting layer, and 3) the second layer arrangement is arranged on the substrate layer and/or surrounded by the substrate layer.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: August 6, 2013
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Dieter Eissler, Siegfried Herrmann
  • Patent number: 8502240
    Abstract: Provided are a light-emitting device package and a method of manufacturing the same. The light-emitting device package may include a plurality of light-emitting chips on one substrate (board). The plurality of light-emitting chips may produce colors around a target color. The target color may be produced by combinations of the colors of light emitted from the plurality of light-emitting chips. The colors around the target color may have the same hue as the target color and have color temperatures different from that of the target color. The plurality of light-emitting chips may have color temperatures within about ±250K of that of the target color.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: August 6, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hyung-kun Kim
  • Publication number: 20130196461
    Abstract: A method for manufacturing a light-emitting device includes steps of: providing a light-emitting wafer including an upper surface and a lower surface opposite to the upper surface; setting a plurality of scribing streets on the upper surface of the light-emitting wafer; irradiating a laser beam to form a plurality of cutting regions along the scribing streets, wherein each of the plurality of cutting regions has a sharp end, or the plurality of cutting regions forms a specific pattern in a cross-sectional view; and forming a plurality of light-emitting devices by connecting the plurality of cutting regions and extending the plurality of cutting regions from the respective sharp ends thereof to the lower surface of the light-emitting wafer.
    Type: Application
    Filed: January 26, 2012
    Publication date: August 1, 2013
    Inventors: Chih-Hui Alston LIU, Tsung-Pao Yeh, Chang Yi-Cheng, Liao Chuen-Min
  • Patent number: 8497141
    Abstract: A method of manufacturing a semiconductor device capable of largely increasing the yield and a semiconductor device manufactured by using the method is provided. After a semiconductor layer is formed on a substrate, as one group, a plurality of functional portions with at least one parameter value different from each other is formed in the semiconductor layer for every unit chip area. Then, a subject that is changed depending on the parameter value is measured and evaluated and after that, the substrate is divided for every chip area so that a functional portion corresponding with a given criterion as a result of the evaluation is not broken. Thereby, at least one functional portion corresponding with a given criterion can be formed by every chip area by appropriately adjusting each parameter value.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: July 30, 2013
    Assignee: Sony Corporation
    Inventors: Yuji Masui, Takahiro Arakida, Yoshinori Yamauchi, Kayoko Kikuchi, Rintaro Koda, Norihiko Yamaguchi
  • Patent number: 8497146
    Abstract: Vertical solid-state transducers (“SSTs”) having backside contacts are disclosed herein. An SST in accordance with a particular embodiment can include a transducer structure having a first semiconductor material at a first side of the SST, a second semiconductor material at a second side of the SST opposite the first side, and an active region between the first and second semiconductor materials. The SST can further include first and second contacts electrically coupled to the first and second semiconductor materials, respectively. A portion of the first contact can be covered by a dielectric material, and a portion can remain exposed through the dielectric material. A conductive carrier substrate can be disposed on the dielectric material. An isolating via can extend through the conductive carrier substrate to the dielectric material and surround the exposed portion of the first contact to define first and second terminals electrically accessible from the first side.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: July 30, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Vladimir Odnoblyudov, Martin F. Schubert
  • Publication number: 20130187194
    Abstract: Each LED in an array of LEDs mounted on a submount wafer has at least a first semiconductor layer exposed and connected to a first electrode of each LED. The submount wafer has a first metal portion bonded to the first electrode of each LED for providing an energization current to each LED. The submount wafer also has a second metal portion running along and proximate to the first metal portion but not electrically connected to the first metal portion. The second metal portion may be interdigitated with the first metal portion. The second metal portion is connected to a bias voltage. When the wafer is immersed in an electrically conductive solution for electrochemical (EC) etching of the exposed first semiconductor layer, the solution electrically connects the second metal portion to the first metal portion for biasing the first semiconductor layer during the EC etching.
    Type: Application
    Filed: October 10, 2011
    Publication date: July 25, 2013
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventor: Yajun Wei
  • Patent number: 8492776
    Abstract: A semiconductor light emitting device (10) is provided with a base substrate (12) and three LED chips (14A, 14B, and 14C) disposed on the base substrate (12). Each LED chip (14A, 14B, and 14C) includes a semiconductor multilayer structure (20) and has a rhombus shape with interior angles of approximately 60° and approximately 120° in plan view. Each semiconductor multilayer structure (20) has an HCP single crystal structure and includes a light emission layer (24). The LED chips (14A, 14B, and 14C) are arranged on the base substrate (12) so as to face one another at a vertex forming the larger interior angle in plan view. With this arrangement, the LED chips (14A, 14B, and 14C) as a whole form a substantially regular hexagonal shape.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: July 23, 2013
    Assignee: Panasonic Corporation
    Inventor: Hideo Nagai
  • Publication number: 20130181219
    Abstract: Semiconductor growth substrates and associated systems and methods for die singulation are disclosed. A representative method for manufacturing semiconductor devices includes forming spaced-apart structures at a dicing street located between neighboring device growth regions of a substrate material. The method can further include epitaxially growing a semiconductor material by adding a first portion of semiconductor material to the device growth regions and adding a second portion of semiconductor material to the structures. The method can still further include forming semiconductor devices at the device growth regions, and separating the semiconductor devices from each other at the dicing street by removing the spaced-apart structures and the underlying substrate material at the dicing street.
    Type: Application
    Filed: January 12, 2012
    Publication date: July 18, 2013
    Inventors: Xiaolong Fang, Lifang Xu, Tingkai Li, Thomas Gehrke
  • Patent number: 8486742
    Abstract: A method for manufacturing a light-emitting device comprising the steps of: providing a substrate comprising a first surface and a second surface; forming a plurality of cutting lines on the substrate by a laser beam; cleaning the substrate by a chemical solution; and forming a light-emitting stack on an first surface of the substrate after cleaning the substrate.
    Type: Grant
    Filed: July 26, 2011
    Date of Patent: July 16, 2013
    Assignee: Epistar Corporation
    Inventors: Chien-Kai Chung, Ta-Cheng Hsu, Jung-Min Hwang, Min-Hsun Hsieh, Ya-Lan Yang, De-Shan Kuo, Tsun-Kai Ko, Chien-Fu Shen, Ting-Chia Ko, Schang-Jing Hon
  • Publication number: 20130175560
    Abstract: Solid-state transducers (“SSTs”) and SST arrays having backside contacts are disclosed herein. An SST in accordance with a particular embodiment can include a transducer structure having a first semiconductor material at a first side of the transducer structure, and a second semiconductor material at a second side of the transducer structure. The SST can further include a first contact at the first side and electrically coupled to the first semiconductor material, and a second contact extending from the first side to the second semiconductor material and electrically coupled to the second semiconductor material. A carrier substrate having conductive material can be bonded to the first and second contacts.
    Type: Application
    Filed: January 9, 2012
    Publication date: July 11, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Vladimir Odnoblyudov, Martin F. Schubert, Scott D. Schellhammer, Jeremy S. Frei
  • Publication number: 20130175573
    Abstract: The invention relates to a light-emitting diode chip, comprising an n-type semiconductor layer (3), a p-type semiconductor layer (4), an active region (2) between the n-type semiconductor layer (3) and the p-type semiconductor layer (4), a lateral surface (14), which limits the n-type semiconductor layer (3), the p-type semiconductor layer (4) and the active region (2) in a lateral direction, and a doped region (1), in which a dopant is introduced into a semiconductor material of the light-emitting diode chip, and/or comprising a neutralised region (1), wherein the doped region (1) and/or the neutralised region (1) are formed at the lateral surface (14) at least in the region of the active region, and the light-emitting diode chip is intended to emit incoherent electromagnetic radiation during operation.
    Type: Application
    Filed: June 17, 2011
    Publication date: July 11, 2013
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventors: Bernd Mayer, Wolfgang Schmid
  • Publication number: 20130175571
    Abstract: In a semiconductor light emitting element 1 having a sapphire substrate 100, and a lower semiconductor layer 210 and an upper semiconductor layer 220 laminated on the sapphire substrate 100, the sapphire substrate 100 includes a substrate top surface 113, a substrate bottom surface 114, first substrate side surfaces 111 and second substrate side surfaces 112; plural first cutouts 121a and plural second cutouts 122a are provided at a border between the first substrate side surface 111, the second substrate side surface 112 and the substrate top surface 113; the lower semiconductor layer 210 includes a lower semiconductor bottom surface, a lower semiconductor top surface 213, first lower semiconductor side surfaces 211 and second lower semiconductor side surfaces 212; plural first projecting portions 211a and plural first depressing portions 211b are provided on the first lower semiconductor side surface 211; and plural second protruding portions 212a and second flat portions 212b are provided on the second low
    Type: Application
    Filed: December 4, 2012
    Publication date: July 11, 2013
    Applicant: TOYODA GOSEI CO., LTD.
    Inventor: TOYODA GOSEI CO., LTD.
  • Publication number: 20130178006
    Abstract: A wafer dicing method includes forming a semiconductor device on a first surface of a wafer; first-dicing a portion of the wafer and the semiconductor device; and splitting the wafer and the semiconductor device into a plurality of semiconductor device chips by second-dicing the wafer that has been first-diced.
    Type: Application
    Filed: December 19, 2012
    Publication date: July 11, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: SAMSUNG ELECTRONICS CO., LTD.
  • Patent number: 8481352
    Abstract: The present invention provides a method of fabricating a light emitting diode chip having an active layer between an N type semiconductor layer and a P type semiconductor layer. The method comprises the steps of preparing a substrate; laminating the semiconductor layers on the substrate, the semiconductor layers having the active layer between the N type semiconductor layer and the P type semiconductor layer; and forming grooves on the semiconductor layers laminated on the substrate until the substrate is exposed, whereby inclined sidewalls are formed by the grooves in the semiconductor layers divided into a plurality of chips. According to embodiments of the present invention, a sidewall of a semiconductor layer formed on a substrate of a light emitting diode chip is inclined with respect to the substrate, whereby its directional angle is widened as compared with a light emitting diode chip without such inclination.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: July 9, 2013
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Jun Hee Lee, Jong Kyu Kim, Yeo Jin Yoon
  • Patent number: 8482020
    Abstract: System for wafer-level phosphor deposition. In an aspect, a semiconductor wafer is provided that includes a plurality of LED dies wherein at least one die includes an electrical contact, a photo-resist post covering the electrical contact, and a phosphor deposition layer covering the semiconductor wafer and surrounding the photo-resist post. In another aspect, a semiconductor wafer is provided that comprises a plurality of LED dies wherein at least one die comprises an electrical contact, a phosphor deposition layer covering the semiconductor wafer, and a cavity in the phosphor deposition layer exposing the at least one electrical contact.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: July 9, 2013
    Assignee: Bridgelux, Inc.
    Inventor: Tao Xu
  • Publication number: 20130168661
    Abstract: According to the present invention, an electro-optic device comprises: a substrate which is split into a light emitting unit and a non-light emitting unit, wherein said light emitting unit is divided into a plurality of driving regions; an electrode pad which is formed in the non-light emitting unit of the substrate; and an electrode unit which comprises a plurality of supplementary electrodes each of which has one end connected to the electrode pad and has the other end connected to the centers of each of the plurality of driving regions, and transparent electrodes formed on the upper sides of the plurality of supplementary electrodes in the light emitting unit, wherein the area of each of the plurality of driving regions is set to an area in which no voltage drop occurs, and the plurality of supplementary electrodes are manufactured in the same length.
    Type: Application
    Filed: June 15, 2011
    Publication date: July 4, 2013
    Inventors: Chon Kyu Min, Hyung Il Jeon
  • Publication number: 20130171755
    Abstract: Methods of cutting a light-emitting device chip wafer by using a laser scribing process. The method includes: preparing a wafer that has a plurality of semiconductor chips on an upper surface of the wafer; attaching a first tape covering the semiconductor chips to the upper surface of the wafer; forming scribing lines to define each of the semiconductor chips on the wafer by irradiating a laser beam onto a lower surface of the wafer; attaching a second tape to the lower surface of the wafer; and breaking the wafer into a plurality of chips by applying a physical force to the wafer along the scribing lines.
    Type: Application
    Filed: October 15, 2012
    Publication date: July 4, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Samsung Electronics Co., Ltd.
  • Patent number: 8476659
    Abstract: The present disclosure relates to methods for performing wafer-level measurement and wafer-level binning of LED devices. The present disclosure also relates to methods for reducing thermal resistance of LED devices. The methods include growing epitaxial layers consisting of an n-doped layer, an active layer, and a p-doped layer on a wafer of a growth substrate. The method further includes forming p-contact and n-contact to the p-doped layer and the n-doped layer, respectively. The method further includes performing a wafer-level measurement of the LED by supplying power to the LED through the n-contact and the p-contact. The method further includes dicing the wafer to generate diced LED dies, bonding the diced LED dies to a chip substrate, and removing the growth substrate from the diced LED dies.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: July 2, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Hsing-Kuo Hsia, Hung-Weng Huang, Ching-Hua Chiu, Gordon Kuo
  • Publication number: 20130148681
    Abstract: There is provided a method of manufacturing a semiconductor laser device. The method includes: preparing a production substrate on a hexagonal-system group III nitride semiconductor substrate having a semi-polar plane, the production substrate having an epitaxial layer that includes a luminous layer of a semiconductor laser device; forming a cutting guide groove in a partial region on a surface of the production substrate, the partial region being on a scribe line on a resonator-end-face side of the semiconductor laser device and including one or more corners of the semiconductor laser device, and the cutting guide groove being formed in an extending direction along the scribe line and being V-shaped in cross section when viewed from the extending direction; and cutting, along the scribe line, the production substrate in which the cutting guide groove is formed.
    Type: Application
    Filed: November 30, 2012
    Publication date: June 13, 2013
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., SONY CORPORATION
    Inventors: SONY CORPORATION, SUMITOMO ELECTRIC INDUSTRIES, LTD.
  • Publication number: 20130142209
    Abstract: A method of manufacturing a semiconductor laser element including: preparing a wafer; forming first grooves on at least one of an upper surface and a lower surface of the wafer, each of the first grooves being spaced apart from the optical waveguide formed in the wafer and extending in a direction intersecting the optical waveguide in a plan view; forming second grooves on the one of the upper surface and the lower surface of the wafer, each of the second grooves extending in a direction intersecting a straight line extended from each of the first grooves, and each of the second grooves having a smooth surface compared with the first grooves; dividing the wafer along the first grooves to obtain a plurality of laser bars; and dividing the laser bars in a direction intersecting an extending direction of the first grooves to obtain the semiconductor laser elements.
    Type: Application
    Filed: November 29, 2012
    Publication date: June 6, 2013
    Applicant: NICHIA CORPORATION
    Inventor: NICHIA CORPORATION
  • Patent number: 8455280
    Abstract: An exemplary method for manufacturing LEDs includes steps: providing a substrate and an epitaxial layer formed on the substrate; etching the epitaxial layer along a transverse direction thereof to divide the epitaxial layer into separated LED chips, and a groove defined between each two adjacent LED chips; providing insulating poles and inserting the insulating poles in the grooves; printing a solder paste layer on a top surface of each LED chip away from the substrate; reflow soldering the LED chips to make the solder paste layers mounted on the LED chips become solder balls; releasing the substrate from the LED chips; etching the insulating poles until the insulating poles are totally removed and the LED chips are separated from each other; and providing metallic plates and respectively soldering the metallic plates on the solder balls of the LED chips.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: June 4, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Chih-Chen Lai
  • Patent number: 8455332
    Abstract: A method of manufacturing a light-emitting device using laser scribing to improve overall light output is disclosed. Upon placing a semiconductor wafer having light emitting diode (“LED”) devices separated by streets on a wafer chuck, the process arranges a first surface of semiconductor wafer containing front sides of the LED devices facing up and a second surface of semiconductor wafer containing back sides of the LED devices facing toward the wafer chuck. After aligning a laser device over the first surface of the semiconductor wafer above a street, the process is configured to focus a high intensity portion of a laser beam generated by the laser device at a location in a substrate closer to the back sides of the LED devices.
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: June 4, 2013
    Assignee: Bridgelux, Inc.
    Inventors: Norihito Hamaguchi, Ghulam Hasnain
  • Patent number: 8455275
    Abstract: A light emitting diode package includes a substrate with a first metal layer, a second metal layer and an insulating layer between the first metal layer and the second metal layer. A cavity is defined in the insulating layer and the second metal layer. The second metal layer surrounding the cavity is divided into a first conductive portion and a second conductive portion. An LED chip is positioned inside the cavity and on an upper surface of the first metal layer. The LED chip has two electrodes electrically connected to the first conductive portion and the second conductive portion respectively. The cavity is filled with an encapsulation to cover the LED chip. A method for manufacturing the LED package is also disclosed.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: June 4, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Meng-Hsien Hong, Wen-Liang Tseng, Hsin-Tung Chiang, Pin-Chuan Chen
  • Patent number: 8455274
    Abstract: A method for manufacturing light emitting diodes includes steps: providing a substrate having an upper conductive layer and a lower conductive layer formed on a top face and bottom face thereof; dividing each of the upper conductive layer and the lower conductive layer into first areas and second areas; defining cavities in the substrate through the first areas of the upper conductive layer to expose the lower conductive layer; forming conductive posts within the substrate; forming an overlaying layer to connect the first areas of the upper and lower conductive layers; mounting chips on the overlaying layer within the cavities and electrically connecting each chip with an adjacent first area and post; forming an encapsulant on the substrate to cover the chips; and cutting the substrate into individual packages.
    Type: Grant
    Filed: October 31, 2011
    Date of Patent: June 4, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Pin-Chuan Chen, Hsin-Chiang Lin, Wen-Liang Tseng
  • Publication number: 20130137203
    Abstract: An optical device wafer processing method for processing an optical device wafer having an epitaxy substrate and an optical device layer formed on the front side of the epitaxy substrate through a buffer layer. The buffer layer of the optical device wafer is to be broken in the condition where the optical device layer of the optical device wafer is bonded through a bonding metal layer to a transfer substrate. The optical device wafer processing method includes a buffer layer breaking step of applying a pulsed laser beam having a wavelength having transmissivity to the epitaxy substrate and having absorptivity to the buffer layer from the back side of the epitaxy substrate to the buffer layer, thereby breaking the buffer layer. The buffer layer breaking step includes a first laser beam applying step of completely breaking the buffer layer corresponding to an optical device area and a second laser beam applying step of incompletely breaking the buffer layer corresponding to a peripheral marginal area.
    Type: Application
    Filed: November 8, 2012
    Publication date: May 30, 2013
    Applicant: DISCO CORPORATION
    Inventor: DISCO CORPORATION
  • Patent number: 8450128
    Abstract: A method for producing a semiconductor optical device includes the steps of forming a semiconductor region including a ridge structure on a substrate; forming an insulating film on the semiconductor region; forming a non-photosensitive resin region on the insulating film, forming a first mask that defines a scribe area; forming the scribe area by etching using the first mask; after removing the first mask, forming an insulating layer by etching the insulating film, forming an electrode on the ridge structure and the non-photosensitive resin region to produce a substrate product; forming a scribe line on a surface of the semiconductor region in the scribe area of the substrate product; and cutting the product along the scribe line to form a semiconductor laser bar.
    Type: Grant
    Filed: October 7, 2011
    Date of Patent: May 28, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hideki Yagi, Hiroyuki Yoshinaga
  • Patent number: 8450770
    Abstract: A light emitting diode (LED) package structure comprising a carrier, an LED chip, a first encapsulant, at least one bonding wire, a plurality of phosphor particles and a second encapsulant is provided. The LED chip is disposed on the carrier. The LED chip has at least one electrode. The first encapsulant is disposed on the carrier and covering the LED chip. The first encapsulant is provided with at least one preformed opening exposing at least a portion of the at least one electrode. The at least one bonding wire is electrically connected between the at least one electrode and the carrier via the at least one preformed opening. The phosphor particles are distributed within the first encapsulant. The second encapsulant is disposed on the carrier and encapsulates the LED chip, the first encapsulant and the at least one bonding wire.
    Type: Grant
    Filed: May 11, 2010
    Date of Patent: May 28, 2013
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Hyunsoo Jeong, Seongoo Lee, Ryungshik Park, Hyunil Lee
  • Publication number: 20130128909
    Abstract: An edge-emitting semiconductor laser is specified. A semiconductor body includes an active zone suitable for producing electromagnetic radiation. At least two facets on the active zone form a resonator. At least two contact points are spaced apart from one another in a lateral direction by at least one intermediate region and are mounted on an outer face of the semiconductor body.
    Type: Application
    Filed: May 9, 2011
    Publication date: May 23, 2013
    Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Harald Koenig, Uwe Strauss, Wolfgang Reill
  • Publication number: 20130127364
    Abstract: Front facing piggyback wafer assembly. In accordance with an embodiment of the present invention, a plurality of piggyback substrates are attached to a carrier wafer. The plurality of piggyback substrates are dissimilar in composition to the carrier wafer. The plurality of piggyback substrates are processed, while attached to the carrier wafer, to produce a plurality of integrated circuit devices. The plurality of integrated circuit devices are singulated to form individual integrated circuit devices. The carrier wafer may be processed to form integrated circuit structures prior to the attaching.
    Type: Application
    Filed: November 18, 2011
    Publication date: May 23, 2013
    Applicant: INVENSAS CORPORATION
    Inventors: Ilyas Mohammed, Masud Beroz, Liang Wang
  • Publication number: 20130130420
    Abstract: A laser lift-off method for LEDs forms an elevation difference structure on a conversion substrate corresponding to one isolation zone of an epitaxial layer before epitaxy is formed on the conversion substrate to form the epitaxial layer. The elevation difference structure can release stress between the material interfaces, thus can reduce broken probability while lifting off the conversion substrate and epitaxial layer via laser and further improve production yield.
    Type: Application
    Filed: November 17, 2011
    Publication date: May 23, 2013
    Inventors: Fu-Bang CHEN, Ruei-Sian Zeng, Chih-Sung Chang
  • Patent number: 8445916
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, an insulating film, a first interconnection, a second interconnection, a barrier metal layer, a first metal pillar, a second metal pillar, and a resin. The semiconductor layer has a first major surface, a second major surface formed on an opposite side to the first major surface, and a light emitting layer. The first electrode is provided on the second major surface of the semiconductor layer. The second electrode is provided on the second major surface of the semiconductor layer and includes a silver layer. The insulating film is provided on the second major surface side of the semiconductor layer. The barrier metal layer is provided between the second electrode and the insulating film and between the second electrode and the second interconnection to cover the second electrode.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: May 21, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akihiro Kojima, Yoshiaki Sugizaki
  • Publication number: 20130122619
    Abstract: An optical device wafer is divided into individual optical devices along streets. A modified layer is formed by applying a laser beam to a sapphire substrate constituting the optical device wafer along the streets from the back side of the sapphire substrate such that the focal point of the laser beam is set inside the sapphire substrate, thereby forming a modified layer inside the sapphire substrate along each street. A reflective film is formed on the back side of the sapphire substrate and the reflective film is cut by applying a laser beam along the streets from the back side of the sapphire substrate. The wafer is divided by applying an external force to the optical device wafer to thereby break the optical device wafer along each street where the modified layer is formed, so that the optical device wafer is divided into the individual optical devices.
    Type: Application
    Filed: November 1, 2012
    Publication date: May 16, 2013
    Applicant: DISCO CORPORATION
    Inventor: Disco Corporation
  • Patent number: 8441105
    Abstract: A semiconductor device includes an element forming region including at least one semiconductor element formed on at least one compound semiconductor layer formed on a substrate and a trench formed between an outer edge of the semiconductor device and the element forming region. The trench spatially separates the compound semiconductor layer, and the trench is formed at least to reach the substrate.
    Type: Grant
    Filed: May 7, 2009
    Date of Patent: May 14, 2013
    Assignee: Furukawa Electric Co., Ltd.
    Inventors: Yoshihiro Sato, Takehiko Nomura
  • Patent number: 8435807
    Abstract: A method for manufacturing a laser-active solid having a bonded passive Q-switch is provided. A plane-parallel first wafer plate may be manufactured from a laser-active material. A second plane-parallel wafer plate may be manufactured from a material that is suitable as a passive Q-switch. The first wafer plate and the second wafer plate may be bonded to form a wafer block, which may then be coated on both end faces with a resonator mirror. Subsequently, the wafer block may be separated into multiple passively Q-switched solid state lasers.
    Type: Grant
    Filed: July 22, 2008
    Date of Patent: May 7, 2013
    Assignee: Robert Bosch GmbH
    Inventors: Werner Herden, Heiko Ridderbusch
  • Patent number: 8431428
    Abstract: An optical device wafer processing method including a laser processed groove forming step of applying a laser beam for performing ablation to the front side or back side of a substrate of an optical device wafer along streets, thereby forming a laser processed groove as a break start point on the front side or back side of the substrate along each street, and a wafer dividing step of applying an external force to the optical device wafer after performing the laser processed groove forming step to thereby break the wafer along each laser processed groove, thereby dividing the wafer into individual optical devices. In performing the laser processed groove forming step, an etching gas atmosphere for etching a modified substance produced by applying the laser beam to the substrate is generated, whereby an etching gas in the etching gas atmosphere is converted into a plasma by the application of the laser beam to thereby etch away the modified substance.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: April 30, 2013
    Assignee: Disco Corporation
    Inventor: Kazuma Sekiya
  • Patent number: 8431422
    Abstract: A method for producing a multiplicity of optoelectronic components includes providing a semiconductor body carrier including on a first main area a multiplicity of semiconductor bodies, each provided with a contact structure and having an active layer that generates electromagnetic radiation, in a semiconductor layer sequence, and forming a planar filling structure on the first main area such that the planar filling structure at least partly covers regions of the contact structure and the semiconductor body carrier without covering the semiconductor body.
    Type: Grant
    Filed: June 18, 2009
    Date of Patent: April 30, 2013
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventor: Siegfried Herrmann
  • Publication number: 20130095581
    Abstract: A LED die and method for bonding, dicing, and forming the LED die are disclosed. In an example, the method includes forming a LED wafer, wherein the LED wafer includes a substrate and a plurality of epitaxial layers disposed over the substrate, wherein the plurality of epitaxial layers are configured to form a LED; bonding the LED wafer to a base-board to form a LED pair; and after bonding, dicing the LED pair, wherein the dicing includes simultaneously dicing the LED wafer and the base-board, thereby forming LED dies.
    Type: Application
    Filed: October 18, 2011
    Publication date: April 18, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yea-Chen Lee, Jung-Tang Chu, Ching-Hua Chiu, Hung-Wen Huang
  • Publication number: 20130095586
    Abstract: A method of cutting light emitting element packages includes preparing a ceramic substrate having a surface on which a plurality of light emitting element chips are mounted and a light-transmitting material layer is formed to cover the plurality of light emitting element chips; partially removing the light-transmitting material layer between the plurality of light emitting element chips along a cutting line by using a mechanical cutting method; and separating individual light emitting element packages by cutting the ceramic substrate along the cutting line by using a laser cutting method.
    Type: Application
    Filed: February 29, 2012
    Publication date: April 18, 2013
    Inventors: Eui-seok KIM, Won-soo JI, Choo-ho KIM, Shin-min RHEE, Dong-hun LEE, Hee-young JUN
  • Patent number: 8420418
    Abstract: A method of fabricating a light emitting device comprising: providing a substrate, wherein the substrate comprises a first major surface and a second major surface opposite to the first major surface, forming a plurality of light emitting stack layers on the first major surface, forming an etching protection layer on the plurality of light emitting stack layers, forming a plurality of discontinuous holes or continuous lines on the substrate by a laser beam with the depth of 10˜150 ?m, cleaving the substrate through the plurality of discontinuous holes or continuous lines, providing a adhesion layer on the second major surface of the substrate, and expanding the adhesion layer to form a plurality of separated light emitting device.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: April 16, 2013
    Assignee: Epistar Corporation
    Inventor: Tzu-Chieh Hsu
  • Patent number: 8420419
    Abstract: A method of fabricating a III-nitride semiconductor laser device includes: preparing a substrate product, where the substrate product has a laser structure, the laser structure includes a semiconductor region and a substrate of a hexagonal III-nitride semiconductor, the substrate has a semipolar primary surface, and the semiconductor region is formed on the semipolar primary surface; scribing a first surface of the substrate product to form a scribed mark, the scribed mark extending in a direction of an a-axis of the hexagonal III-nitride semiconductor; and after forming the scribed mark, carrying out breakup of the substrate product by press against a second region of the substrate product while supporting a first region of the substrate product but not supporting the second region thereof, to form another substrate product and a laser bar.
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: April 16, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shimpei Takagi, Yusuke Yoshizumi, Koji Katayama, Masaki Ueno, Takatoshi Ikegami
  • Patent number: 8420414
    Abstract: A method of manufacturing a light-emitting device includes forming a planar board that includes a plurality of first metallic plates and a plurality of second metallic plates continuously connected by a resin, by use of a positioning frame including a plurality of first concave portions and a plurality of second concave portions, mounting a plurality of light-emitting diode elements on the planar board, and sealing the light-emitting diode elements collectively, thereby producing a plurality of light-emitting devices.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: April 16, 2013
    Assignees: Citizen Electronics Co., Ltd., Citizen Holdings Co., Ltd.
    Inventors: Megumi Horiuchi, Shunichi Watanabe