Abstract: Disclosed are a driving backplane and a display apparatus, including: a base substrate, a first conducting layer disposed on one side of the base substrate, a second conducting layer disposed on one side, facing away from the base substrate, of the first conducting layer, and a first insulating layer disposed between the first conducting layer and the second conducting layer, where the second conducting layer includes a plurality of pads, and each pad is connected with the first conducting layer through at least two first via holes.

Abstract: A display panel includes a base layer, a first thin film transistor on the base layer, a second thin film transistor electrically coupled to the first thin film transistor, and a light emitting element electrically coupled to the second thin film transistor. The first thin film transistor includes a first semiconductor pattern on the base layer, a first barrier pattern on the first semiconductor pattern and including a gallium (Ga) oxide and a zinc (Zn) oxide, and a first control electrode on the first barrier pattern and overlapping the first semiconductor pattern. Accordingly, a signal transmission speed of the display panel may be improved, and electrical characteristics and reliability of the thin film transistor included in the display panel may be improved.

Abstract: The present application provides a method of fabricating a stretchable electronic device. The method includes forming an elastomer polymer layer on a base substrate; selectively stiffening the elastomer polymer layer in a plurality of defined regions of the elastomer polymer layer, thereby forming a modified elastomer polymer layer having a plurality of stiffened portions respectively in a plurality of stiffened regions spaced apart by one or more elastomeric portions in one or more elastomeric regions, the plurality of stiffened portions having a Young's modulus greater than a Young's modulus of the one or more elastomeric portions; and forming a plurality of electronic devices respectively in the plurality of stiffened regions, each of the plurality of electronic devices formed on a side of one of the plurality of stiffened portions distal to the base substrate.

Abstract: An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate; a first thin film transistor located on the base substrate and including a first active layer; and a second thin film transistor located on the base substrate and including a second active layer; a matrix material of the first active layer is the same as that of the second active layer, and the first active layer and the second active layer satisfy at least one of the following conditions: a carrier mobility of the first active layer is greater than that of the second active layer, and a carrier concentration of the first active layer is greater than that of the second active layer. The array substrate is employed to compensate a difference in threshold voltage caused by a difference in channel width-to-length ratio of different thin film transistors.

Abstract: Disclosed is a display apparatus and a method for manufacturing the same, wherein the display apparatus comprises a substrate, a light shielding layer, a signal line and a first electrode on the substrate, an active layer, a gate electrode, a second electrode, a first connection electrode for connecting the active layer with the signal line, and a second connection electrode for connecting the active layer with any one of the first electrode and the second electrode, wherein any one of the first electrode and the second electrode is a pixel electrode of a display device, and the other is a common electrode of the display device, the light shielding layer, the signal line and the first electrode are disposed on the same layer, and the first connection electrode and the second connection electrode are formed of the same material as that of the second electrode.

Abstract: The application relates to the field of OLED lighting, and provides a high-yield low-cost large-area flexible OLED lighting module, a manufacturing method thereof and an OLED lighting luminaire.

Abstract: A display device and a method for manufacturing a display device are disclosed. The display device may prevent a leakage current from occurring between adjacent pixels. The display device comprises a substrate, a first electrode provided in each of a first subpixel and a second subpixel arranged to be adjacent to the first subpixel, on the substrate, a trench provided between the first subpixel and the second subpixel, a light emitting layer provided in each of the first subpixel and the second subpixel on the first electrode, a second electrode provided in each of the first subpixel and the second subpixel on the light emitting layer, and a third electrode electrically connecting the second electrode provided in the first subpixel with the second electrode provided in the second subpixel. The second electrode is disconnected between the first subpixel and the second subpixel by the trench.

Abstract: An organic light-emitting diode panel for a lighting device includes a substrate including an array area having an emission area and a dummy area disposed outside the array area, an auxiliary wiring pattern, a first electrode, a passivation pattern, an OLED emission structure, a second electrode, an adhesive layer, and an encapsulation layer. The passivation pattern and the adhesive layer have an uneven boundary surface therebetween in the dummy area. Alternatively, a lower surface of the adhesive layer has a 3D structure. Thus, a moisture intrusion path between the passivation pattern and the adhesive layer of the dummy area of the substrate may be increased. Thus, degradation of the OLED emission structure due to external moisture intrusion may be reduced or prevented.

Abstract: A display back panel may include a substrate, an insulating layer disposed on one side of the substrate and including a plurality of recesses, the plurality of recesses including a bottom surface, a first electrode disposed on a surface of the insulating layer away from the substrate, a pixel defining layer disposed on a surface of the first electrode away from the substrate and including a plurality of openings, a light-emitting layer disposed in the plurality of openings and covering the first electrode, and a second electrode disposed on a surface of the light-emitting layer away from the substrate. Therein, the first electrode may reflect waveguide light laterally propagated by the light-emitting layer, thereby improving a light-emitting efficiency of the light-emitting layer. Further, the reflected waveguide light may not be absorbed by the second electrode, thereby enhancing an external quantum effect of the light-emitting layer.

Abstract: A display device includes a first base, a pixel electrode on the first base, a pixel defining layer having an opening that at least partially exposes the pixel electrode, a light emitting layer on the pixel electrode, an auxiliary electrode on the same layer as the pixel electrode, a partition wall on the auxiliary electrode that at least partially exposes a side surface of the auxiliary electrode, an organic layer on the partition wall, and a common electrode continuously arranged on the light emitting layer and the organic layer, wherein a side surface of the partition wall has a reverse-tapered shape, and the common electrode contacts the side surface of the auxiliary electrode.

Abstract: The present disclosure provides a display panel and a display device. The display panel includes a display area, a transmitted subregion, a substrate, an array layer, a first barrier wall, a second barrier wall, a light emitting layer, and a boss. The boss includes a plurality of step layers. The light emitting layer covers the boss and is discontinuous at the boss. The barrier walls and the boss prevent external substances from entering the panel through film layers, thereby effectively preventing continued diffusion of water vapor to protect the display panel.

Abstract: The present disclosure provides a display substrate, a display device, a mask plate, and a manufacturing method. The manufacturing method includes forming a pattern structure on a base substrate including a first substrate portion and a second substrate portion adjacent to the first substrate portion, wherein the pattern structure is formed on the first substrate portion; forming a planarization layer on the base substrate, which includes a first planarization layer on the first substrate portion and a second planarization layer on the second substrate portion, wherein a projection of the first planarization layer on the base substrate at least partially covers that of the pattern structure on the base substrate; and removing a part of the first planarization layer to reduce a difference between a height of a surface of the first planarization layer and a height of a surface of the second planarization layer.

Abstract: Embodiments of the present disclosure provide an array substrate, a display panel, and a display apparatus. The array substrate includes: a display region for displaying an image; a non-display region; a shift register provided in the non-display region; a gate line provided in the display region and extending along a first direction; and a gate signal output line, provided in the non-display region and having a first end and a second end. The first end of the gate signal output line is connected to the shift register, and the second end of the gate signal output line is connected to the gate line at a side of the gate line in a second direction perpendicular to the first direction.

Abstract: A display panel includes a plurality of blocks. The block includes a plurality of first-gate lines extending in a first direction and a plurality of second-gate lines extending in a second direction different from the first direction. The first-gate lines are connected to corresponding second-gate lines one-to-one in the block. The second-gate lines disposed in a first area of the block are connected to odd numbered first-gate lines among the plurality of first-gate lines one-to-one. The second-gate lines disposed in a second area of the block are connected to even numbered first-gate lines among the plurality of first-gate lines one-to-one.

Abstract: A manufacturing method of a semiconductor structure including the following steps is provided: forming a first metal layer on a substrate; forming an insulating layer on the first metal layer; forming an oxide semiconductor material layer on the insulating layer; performing an annealing treatment to the oxide semiconductor material layer; forming an etch stopping material layer on the oxide semiconductor material layer; forming a photoresist material layer on the etch stopping material layer and defining thereof with a half tone photomask to form a photoresist pattern; using the photoresist pattern as a mask, patterning the etch stopping material layer to form an etch stopping pattern, and patterning the oxide semiconductor material layer to form an oxide semiconductor layer; removing the photoresist pattern; using the etch stopping pattern as the mask, patterning the insulating layer; forming a second metal layer on the etch stopping pattern; and patterning the oxide semiconductor layer.

Abstract: A gate on array (GOA) device and a gate driving circuit are provided. The GOA device includes at least two GOA units. Each of the at least two GOA units includes at least one pull-down maintenance unit. The pull-down maintenance unit at least includes a first thin film transistor. The first thin film transistor includes a base substrate, a first electrode, a second electrode, and a third electrode. An electric potential of the first electrode is different from an electric potential of the second electrode. The first electrode or the second electrode is electrically connected to the third electrode.

Abstract: A metal wiring film, a method for fabricating the same, and a thin film transistor. The metal wiring film includes: a first film layer formed by a nickel-copper alloy, a mass percentage of nickel in the nickel-copper alloy ranges from 30% to 70%; a second film layer disposed above the first film layer, a material forming the second film layer is an aluminum-neodymium alloy, and the mass percentage of neodymium in the aluminum-neodymium alloy ranges from 1% to 5%; a third film layer disposed above the second film layer, a material forming the third film layer is the same as the material forming the first film layer.

Abstract: Provided are a display substrate, a preparation method thereof, and a display apparatus. The display substrate includes: a base substrate, a light emitting structure layer disposed on the base substrate, a color filter layer including a plurality of sub-pixels and disposed on a light emitting side of the light emitting structure layer, and a pinhole thin film structure layer disposed on a light emitting side of the color filter layer, the pinhole thin film structure layer including a plurality of amplification structures, the amplification structures corresponding to the sub-pixels one by one, and an orthographic projection of the amplification structures on the base substrate being inside an orthographic projection of the sub-pixels corresponding to the amplification structures on the base substrate, and the amplification structures being configured to amplify images of the sub-pixels corresponding to the amplification structures.

Abstract: A device includes a substrate including a display area and a pad area; a first conductive layer on the substrate; and a first insulating film on the first conductive layer, the first insulating film having a first contact hole in the display area to expose the first conductive layer and a pad opening exposing the first conductive layer in the pad area, the first conductive layer being arranged such that in a first region covered by the first insulating film, a second conductive capping layer of the first conductive layer is entirely on a first conductive capping layer of the first conductive layer; in a second region overlapping the contact hole, the second conductive capping layer is entirely on the first conductive capping layer; and in a third region exposed by the pad opening, the second conductive capping layer exposes at least a portion of the first conductive capping layer.

Abstract: The present disclosure provides an array substrate and a display device. The array substrate includes: a base substrate; a plurality of gate lines on the base substrate; and a touch electrode layer located on a side, away from the base substrate, of a layer where the gate lines are located. The touch electrode layer includes a plurality of touch electrodes, and the touch electrodes are provided with first hollowed-out areas at the positions of at least part of the gate lines.

Abstract: In a masking phase, a first segment of an amorphous mask is formed on an underlying layer of a substrate. The first segment comprises a first set of trenches exposing the underlying layer. In the masking phase, a second segment of the amorphous mask is formed on the underlying layer. The second segment comprises a second set of trenches exposing the underlying layer. The segments are non-overlapping. An open end of one of the first set of trenches faces an open end of one of the second set of trenches, but the ends are separated by a portion of the amorphous mask. In a semiconductor growth phase, semiconductor material is grown, by selective area growth, in the first and second sets of trenches to form first and second sub-networks of nanowires on the underlying layer. The first and second sub-networks of nanowires are joined to form a single nanowire network.

Abstract: A method of fabricating a thin-film transistor (TFT) array substrate including forming a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming a semiconductor layer on the gate insulating layer, forming an ohmic contact layer on the semiconductor layer, and forming a source electrode and a drain electrode comprising a plurality of metal layer patterns on the ohmic contact layer, in which the semiconductor layer, the ohmic contact layer, the source electrode and the drain electrode are formed through a single mask process, and one of the plurality of metal layer patterns is etched through a polishing process to form the source electrode and the drain electrode.

Abstract: A device for collecting and transferring light emitting elements of microscale size includes a non-magnetic plate, a plurality of magnetic probes, and a magnetic plate. The non-magnetic plate defines through holes. Each of the probes is fixed in one through holes. The magnetic plate is on a surface of the non-magnetic plate and closes one opening of each of the through holes. The magnetic plate generates a magnetic field, so that each of the probes magnetically attracts one light emitting element. A method for making the transfer device and a method for transferring light emitting elements using the transfer device are also disclosed.

Abstract: A display device includes a substrate including a display area and a non-display area, a pixel located in the display area, a pad unit on one side of the non-display area, and a driver connected to the pixel. The pixel includes a first insulating layer, a first light emitting element on the first insulating layer, a second insulating layer on the first light emitting element and exposing one end portion and another end portion of the first light emitting element, a first contact electrode on the second insulating layer and connected to the one end portion of the first light emitting element, and a second contact electrode on the second insulating layer and connected to the other end portion of the first light emitting element. The pad unit includes a pad metal layer, a first pad insulating layer, a second pad insulating layer, and a pad electrode.

Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve electrical characteristics of and reliability in the semiconductor device including an oxide semiconductor film. A method for manufacturing a semiconductor device includes the steps of forming a gate electrode and a gate insulating film over a substrate, forming an oxide semiconductor film over the gate insulating film, forming a pair of electrodes over the oxide semiconductor film, forming a first oxide insulating film over the oxide semiconductor film and the pair of electrodes by a plasma CVD method in which a film formation temperature is 280° C. or higher and 400° C. or lower, forming a second oxide insulating film over the first oxide insulating film, and performing heat treatment at a temperature of 150° C. to 400° C. inclusive, preferably 300° C. to 400° C. inclusive, further preferably 320° C. to 370° C. inclusive.

Abstract: A display panel with a high aperture ratio, a manufacturing method thereof, and a display device are provided. The display panel includes effective light emitting regions and invalid light emitting regions. Added opening regions are further defined on the invalid light emitting regions of the display panel. Color filter layers are formed in the added opening regions. Regions where the color filter layers in the added opening regions on the display panel are located on are added effective light emitting regions. An aperture ratio and a pixel density of the display panel can be increased to achieve a purpose of improving display effect of the display panel.

Abstract: A display substrate (10) includes a first base substrate (101) including a plurality of pixel units (101a) arranged in an array, at least one of the plurality of pixel units (101a) including at least two sub-pixel units and a transparent area (TA). The at least two sub-pixel units includes a first sub-pixel unit that is arranged between transparent areas (TA) of adjacent pixel units (101a) in a first direction. An orthographic projection of a pixel drive circuit (105) electrically coupled to the first sub-electrode (102a) corresponding to the first sub-pixel unit on the first base substrate (101) partially overlaps with an orthographic projection of a first sub-electrode (102a) positionally corresponding to another sub-pixel unit on the first base substrate (101).

Abstract: A display device includes: a substrate including a display area including a plurality of first pixels and a sensor area including a plurality of second pixels and a plurality of transmission portions, a plurality of first counter electrodes disposed corresponding to the plurality of first pixels, respectively, a plurality of second counter electrodes disposed corresponding to the plurality of second pixels, respectively, and a spacer disposed to overlap at least a portion of a boundary region between a transmission portion of the plurality of transmission portions and a second counter electrode of the plurality of second counter electrodes, which are adjacent to each other.

Abstract: The present disclosure generally relates to the field of display technology, and in particular, to an array substrate, a method of fabricating the array substrate, a display panel including the army substrate, and a method of fabricating the display panel. An array substrate includes: a base substrate; an electrode layer provided on the substrate; a first pixel defining layer on the electrode layer defining a plurality of pixel regions; and a second pixel defining layer on the first pixel defining layer, wherein the second pixel defining layer has a plurality of first grooves and a plurality of second grooves alternately arranged between two adjacent rows of pixel regions.

Abstract: A BCE IGZO TFT device and a manufacturing method thereof include steps of providing a substrate, depositing a first metal layer on the substrate, wherein the first metal layer forms a gate and a first electrode layer by a patterning process, depositing a gate insulating layer on the substrate, the gate, and the first electrode layer, wherein the gate insulating layer is etched to remove a part of the gate insulating layer on a surface of the first electrode layer, depositing an active layer on the first electrode layer and the gate insulating layer, wherein the active layer and the first electrode layer are in direct contact, and depositing a second metal layer on the active layer, wherein the second metal layer forms a source, a drain, and a second electrode layer by a patterning process.

Abstract: Disclosed are a display panel and a display device. The display panel includes a substrate and multiple organic light-emitting units located in the display region on a first side of the substrate, where an area of at least one of organic light-emitting units in the second display region is smaller than an area of each of organic light-emitting units with a same light-emitting color in the first display region, and/or, density of the organic light-emitting units in the first display region is greater than density of the organic light-emitting units in the second display region. The second display region includes at least one quantum dot light-emitting unit, which does not overlap the organic light-emitting units; and each of the at least one quantum dot light-emitting unit emits light of a same color as at least one of the organic light-emitting units located in the second display region.

Abstract: An inorganic light emitting diode device includes: a substrate including a plurality of sub-pixels; a thin film transistor (TFT) in each of the plurality of sub-pixels, wherein the TFT has at least one inorganic layer; an encapsulation layer on an organic light emitting layer, wherein the encapsulation layer includes at least one organic encapsulation layer and at least one inorganic encapsulation layer; and an opening exposing the inorganic layer of the TFT, wherein the opening connects the at least one inorganic encapsulation layer with the inorganic layer of the TFT.

Abstract: An apparatus for manufacturing a tension mask-frame assembly includes a frame loading unit configured to load a tension mask-frame assembly, a pressing unit configured to press the support frame, a load cell configured to measure a force applied to the support frame, and a control unit configured to control the pressing unit to pre-deform the support frame in accordance with at least a portion of a bending deformation amount of the support frame, caused by own weight of the support frame and tension of the tension mask. The pressing unit includes inward pressing members which press the pair of support frames toward the inside of the frame, and outward pressing members which press the support frame toward the outside of the frame. The outward pressing members are disposed in a slot formed in a lengthwise direction of the support frame.

Abstract: A backside Vertical Cavity Surface Emitting Laser (VCSEL) has a substrate. A first mirror device is formed on the substrate. An active region is formed on the first mirror device. A second mirror device is formed on the active region. A pillar is formed by directional Inductive Coupled Plasma-Reactive Ion Etcher (ICP-RIE). The pillar exposes a portion of the first mirror device, the active region and the second mirror device. A first metal contact is formed over a top section of the pillar. A second metal contact is formed on the substrate. An opening formed in the second metal contact and aligned with the pillar.

Abstract: An electronic device according to various embodiments includes: a housing; at least one input area disposed on an outer surface of the housing and facing a first direction; a sensor assembly including at least one pressure sensor disposed on an inner surface of the housing facing a second direction opposite the first direction, and configured to sense pressure applied to the input area; at least one first opening provided at a first portion of the housing adjacent to the sensor assembly; and a second opening provided at a second portion of the housing spaced apart from the first opening in the second direction, wherein the first opening and the second opening are configured to be deformed based on the pressure that is applied to the input area.

Abstract: An array substrate is disclosed. The array substrate may include a base substrate (21), a pixel defining layer (22) on the base substrate (21), and a charge generating layer (24) above the pixel defining layer (22). The pixel defining layer (22) may define a plurality of pixel regions. The pixel defining layer (22) may include a plurality of acoustic structures (220), and each of the plurality of acoustic structures (220) may be configured to resonate under an action of an acoustic wave of a threshold frequency to form a slit to disconnect the charge generating layer (24) of two adjacent pixel regions of the plurality of pixel regions.

Abstract: A novel display device or the like in which a transistor connected to a scan line has small gate capacitance is provided. A novel display device or the like in which a scan line has low resistance is provided. A novel display device or the like in which pixels can be arranged with high density is provided. A novel display device or the like that can be manufactured without an increase in cost is provided. In a transistor including a first gate electrode and a second gate electrode, the first gate electrode is formed using a metal material with low resistance and the second gate electrode is formed using a metal oxide material that can reduce oxygen vacancies in an oxide semiconductor layer. The first gate electrode is connected to the scan line, and the second gate electrode is connected to a wiring to which a constant potential is supplied.

Abstract: Synthesizing a color stable Mn4+ doped phosphor by contacting a gaseous fluorine-containing oxidizing agent with a precursor of: AaBbCcDdXx:Mn4+; AaiBbiCciDdXxYd:Mn4+; A13G2?m?nMnmMgnLi3F12Op; or AZF4:Mn4+. Where A is Li, Na, K, Rb, Cs, or a combination; B is Be, Mg, Ca, Sr, Ba, or a combination; C is Sc, Y, B, Al, Ga, In, Tl, or a combination; D is Ti, Zr, Hf, Rf, Si, Ge, Sn, Pb, or a combination; X is F or a combination of F and one of Br, Cl, and I; Y is O, or a combination of O and one of S and Se; A1 is Na or K, or a combination; G is Al, B, Sc, Fe, Cr, Ti, In, or a combination; Z is La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, Sc, Y, In, or a combination.

Abstract: Disclosed is a manufacturing method of a complementary metal oxide semiconductor transistor, comprising a step of implementing a channel doping to an N-type channel region. The step comprises: preparing a low temperature polysilicon layer on a substrate, and patterning the low temperature polysilicon layer to form the N-type channel region correspondingly above a light shielding pattern; coating a negative photoresist on the substrate, and using the light shielding pattern as a mask to implement exposure to the negative photoresist from a back surface of the substrate to form a negative photoresist mask plate exposing the N-type channel region after development; implementing the channel doping to the N-type channel region with shielding of the negative photoresist mask plate. Further disclosed is a manufacturing method of an array substrate, applied with the aforesaid manufacturing method of the complementary metal oxide semiconductor transistor.

Abstract: A manufacturing method of a display panel and a display panel are provided. The advantages thereof are that a shadow area of an edge of a pixel caused by an angle of evaporation can be avoided and reduced, a pixel position accuracy (PPA) shift caused by raising a temperature of a fine metal mask during a coating process can be prevented, and it is applicable to manufacture of high-resolution display panels.

Abstract: A micro light emitting device includes an epitaxial structure and a first type electrode. The epitaxial structure includes a first type semiconductor layer, a light emitting layer and a second type semiconductor layer. The light emitting layer is disposed between the first type semiconductor layer and the second type semiconductor layer. The first type semiconductor layer has a first accommodating cavity. The first type electrode is disposed on the first accommodating cavity. A maximum width of the first type electrode is greater than or equal to a maximum width of an upper surface of the first type semiconductor layer.

Abstract: A material of the vapor deposition mask that a resin film layer is disposed on a surface of a metal film layer on which one or more openings are formed is welded on a metal frame in a manner so that the resin film layer faces outward under a condition that a predetermined tension is applied in a predetermined direction; the metal frame is held on a base mount; a taper forming member/material having a reflection surface or the like is disposed to facing the metal film layer which is inward of the metal frame; laser beams are irradiated from above the resin film layer.

Abstract: A display panel includes a light-emitting element and a capping layer disposed at a light exit side of the light-emitting element. The light-emitting element includes a first light-emitting element, a second light-emitting element and a third light-emitting element emitting a first color light, a second color light and a third color light, respectively. The capping layer includes a first capping layer and a second capping layer stacked together. The second capping layer includes a first sub-capping layer, a second sub-capping layer and a third sub-capping layer correspondingly disposed at light exit sides of the first light-emitting element, the second light-emitting element and the third light-emitting element, respectively. At least one of the first sub-capping layer, the second sub-capping layer, or the third sub-capping layers is configured to have a larger refractive index of light emitted by the corresponding light-emitting element than light emitted by other light-emitting elements.

Abstract: An electro-luminescent display device includes a data line disposed in a first direction on a substrate; a first insulating layer disposed on the data line; an active layer disposed on the first insulating layer; a gate line disposed above the first insulating layer in a second direction crossing the first direction to define a pixel region with the data line; a second insulating layer interposed between the first insulating layer and the gate line; a gate electrode disposed above the active layer and the second insulating layer interposed between the gate electrode and the active layer; a third insulating layer disposed on the gate electrode and the gate line; a source electrode and a drain electrode disposed on the third insulating layer and electrically connected to the active layer; a contact hole disposed between adjacent data lines of adjacent pixel regions and electrically connecting the source electrode and the data line, wherein the contact hole is formed by removing portions of the first insulating

Abstract: In an exemplary embodiment of the present disclosure, a thin film transistor including a gate electrode, an active layer, a source electrode, and a drain electrode on a non-pixel area of a substrate includes a first insulating layer that insulates the gate electrode from the source electrode and the drain electrode, and a second insulating layer that covers the source electrode and the drain electrode. According to an exemplary embodiment of the present disclosure, the first insulating layer and the second insulating layer are configured so as not to be extended to a pixel area of the substrate in order to reduce possible oscillation of transmittance depending on a viewing angle which occurs when a specific light of a light source passes through the pixel area.

Abstract: A light-emitting device includes a substrate and a first light-emitting unit. The first light-emitting unit is disposed on the substrate, and includes a first semiconductor layer, a first light-emitting layer, and a second semiconductor layer. The first semiconductor layer is disposed on the substrate. The first light-emitting layer is disposed between the first semiconductor layer and the second semiconductor layer. The second semiconductor layer is disposed on the first light-emitting layer. The first semiconductor layer has a first sidewall and a second sidewall. A first angle is between the substrate and the first sidewall. A second angle is between the substrate and the second sidewall. The first angle is smaller than the second angle.

Abstract: In a masking phase, a first segment of an amorphous mask is formed on an underlying layer of a substrate. The first segment comprises a first set of trenches exposing the underlying layer. In the masking phase, a second segment of the amorphous mask is formed on the underlying layer. The second segment comprises a second set of trenches exposing the underlying layer. The segments are non-overlapping. An open end of one of the first set of trenches faces an open end of one of the second set of trenches, but the ends are separated by a portion of the amorphous mask. In a semiconductor growth phase, semiconductor material is grown, by selective area growth, in the first and second sets of trenches to form first and second sub-networks of nanowires on the underlying layer. The first and second sub-networks of nanowires are joined to form a single nanowire network.

Abstract: A light-emitting device display comprising a first light-emitting device and a second light emitting device is provided. The first light-emitting device and the second light-emitting device have a first forward voltage and a second forward voltage respectively, and the second forward voltage is higher than the first forward voltage. A first scan voltage and a second scan voltage is respectively provided to the first light-emitting device and the second light-emitting device. The first scan voltage is switched between a first scan-on voltage and a first scan-off voltage. The second scan voltage is switched between a second scan-on voltage and a second scan-off voltage. An absolute value of a difference between the second scan-on voltage and the second scan-off voltage is greater than an absolute value of a difference between the first scan-on voltage and the first scan-off voltage.

Abstract: A transistor array panel includes a transistor which includes a gate electrode, a semiconductor layer on the gate electrode, and a source electrode and a drain electrode on the semiconductor layer. The semiconductor layer includes a first portion overlapping the source electrode, a second portion overlapping the drain electrode, and a third portion between the first portion and the second portion. The first portion, the second portion, and the third portion have different minimum thicknesses.

Abstract: An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.