Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis.

Abstract: Provided is a semiconductor device that has pseudo lattice matched layers with good crystallinity, formed with lattice mismatched materials. Tensile-strained n-type Al0.5Ga0.5N layers (lower side) and compressive-strained n-type Ga0.9In0.1N layers (upper side) are grown on a GaN crystal layer substrate in 16.5 periods to form an n-type DBR mirror; an undoped GaN spacer layer and an active region are grown on the n-type DBR mirror; and an undoped a GaN spacer layer is grown on the active region. Further, tensile-strained p-type Al0.5Ga0.5N layers (lower side) and compressive-strained p-type Ga0.9In0.1N layers (upper side) are grown on the spacer layer in 12 periods to form a p-type DBR mirror and eventually complete a surface emitting semiconductor laser.

Abstract: A method for monitoring particles and defects on a wafer surface and in a process is described, which uses a monitoring instrument to detect particles and defects possibly present on a substantially effective surface of a wafer. Before the monitoring step, a substantially uniform conformal layer is formed on the substantially effective surface of the wafer, wherein the thickness of the conformal layer is controlled so that the apparent sizes of the particles and the defects possibly present on the wafer surface can be increased moderately.

Abstract: A method of carrying out the controlled oxidation of A material, such as Al(Ga)As is oxidized in a controlled manner placing it in a reactor, and causing a carrier gas containing an oxidizing vapour, such as water, at a controlled partial pressure to flow over the oxidizable Material. In this way, the reaction process can be made sensitive to only one variable.

Abstract: To shift the bandgap of a quantum well microstructure, the surface of the microstructure is selectively irradiated in a pattern with ultra violet radiation to induce alteration of a near-surface region of said microstructure. Subsequently the microstructure is annealed to induce quantum well intermixing and thereby cause a bandgap shift dependent on said ultra violet radiation.

Abstract: A process for forming a pattern in a semiconductor film is provided. The process comprises the steps of: providing a substrate; providing an organic semiconductor film adjacent the substrate; and providing a destructive agent adjacent selected portions of the organic semiconductor film, the destructive agent changing a property of selected portions of the organic semiconductor film substantially through the full thickness of the organic semiconductor film such that the property of the selected portions of the organic semiconductor film differs from the property of remaining portions of the organic semiconductor film.

Abstract: An optical semiconductor device includes an SiC substrate having an n-type conductivity, and an AlGaN buffer layer having an n-type conductivity formed on the SiC substrate with a composition represented as AlxGa1−xN, wherein the AlGaN buffer layer has a carrier density in the range between 3×1018−1×1012cm−3, and the compositional parameter x is larger than 0 but smaller than 0.4 (0<x<0.4).

Abstract: High power edge emitting semiconductor lasers are formed to emit with very narrow spectral width at precisely selected wavelengths. An epitaxial structure is grown on a semiconductor substrate, e.g., GaAs, and includes an active region at which light emission occurs, upper and lower confinement layers and upper and lower cladding layers. A distributed feedback grating is formed in an aluminum free section of the upper confinement layer to act upon the light generated in the active region to produce lasing action and emission of light from an edge face of the semiconductor laser. Such devices are well suited to being formed to provide a wide stripe, e.g., in the range of 50 to 100 &mgr;m or more, and high power, in the 1 watt range, at wavelengths including visible wavelengths.

Abstract: A sparse-carrier device comprising a crystal structure formed of a first material and including a crystallographic facet having a length, a first width and a second width, and quantum dots formed of a second material and positioned on the crystallographic facet, the quantum dots extending along the length of the crystallographic facet in a first distribution pattern along the first width and a second distribution pattern along the second width.

Abstract: InxGa1−xAs structures with compositionally graded buffers grown with organometallic vapor phase epitaxy (OMPVE) on GaAs substrates. A semiconductor structure and a method of processing such a structure including providing a substrate of GaAs; and epitaxially growing a relaxed graded layer of InxGa1−xAs at a temperature ranging upwards from about 600° C.

Abstract: A metal surface having optimized reflectance is created utilizing the following process steps alone or in combination: 1) performing alloy/sintering of the metal-silicon interface prior to a chemical mechanical polish of the intermetal dielectric before the reflective metal electrode is formed; 2) chemical-mechanical polishing the intermetal dielectric layer again after vias are formed; 3) forming a metal adhesion layer composed of collimated titanium over the underlying dielectric; 4) depositing metal upon the adhesion layer at as low a temperature as feasible to maintain small grain size; 5) depositing at least the first layer of the reflectance enhancing coating on top of the freshly deposited metal prior to etching the metal; and 6) depositing the initial layer of the reflective enhancing coating at a temperature as close as possible to the temperature of formation of the metal electrode layer in order to suppress hillock formation in the metal. Deposition of the REC serves two distinct purposes.

Abstract: Channel-hot-carrier reliability can be improved by deuterium sintering. However, the benefits obtained by deuterium sintering can be greatly reduced or destroyed by thermal processing steps which break Si--H and Si--D bonds. A solution is to increase the deuterium concentration near the interface to avoid subsequent depletion of deuterium due to diffusion. By using a rapid quench of a sintered wafer, the deuterium concentration near the interface is increased, because the rapid quench impedes the ability of the deuterium to diffuse away from the gate oxide interface.

Abstract: A liquid crystal transducer pixel cell includes support pillars separating a top and bottom plate of the cell. During the process for forming the pixel cell, the support pillars are formed prior to formation of the pixel electrode. This process flow obviates the need for depositing a thick dielectric layer on top of the pixel electrode. This process flow also prevents exposure of the surface of the pixel electrode to etching during subsequent processing, preserving the reflectance of the pixel cell electrode. Finally, the process flow in accordance with the present invention eliminates the creation of keyhole voids within the support pillars by forming the support pillars over a flat upper level intermetal dielectric rather than over narrow trenches formed in the pixel electrode layer.

Abstract: An X-ray imaging array is described together with a method for its manufacture. The array is defined by a set of PN junctions in a silicon wafer that extend all the way through between the two surfaces of the wafer. The PN junctions are formed using neutron transmutation doping that is applied to P-type silicon through a mask, resulting in an array of N-type regions (that act as pixels) in a sea of P-type material. Through suitable placement of the biassing electrodes, a space charge region is formed that is narrower at the top surface, where X-rays enter the device, and wider at the lower surface. This ensures that most of the secondary electrons, generated by the X-ray as it passes through the wafer, get collected at the lower surface where they are passed to a charge readout circuit.

Abstract: An array of infrared vertical cavity surface-emitting lasers (VCSELs) and method of manufacturing the same is disclosed which reduces device-to-device non-uniformity for VCSEL arrays manufactured using well-known vapor phase epitaxial processes. The method involves growing layers comprising a standard infrared VCSEL array using a vapor phase epitaxial process on a substrate which is mosoriented from the (100) plane in the {111}A direction by preferably between eight and twelve degrees or more.

Abstract: In a method of fabricating a high resolution low voltage flat panel radiation imaging sensor having a radiation transducer having a radiation conversion layer of amorphous semiconductor and an electrode on one side thereof and an array of pixels arranged in rows and columns on an opposite side thereof, each pixel including a pixel electrode and storage capacitor and a charge readout device connected to the pixel electrode and the storage capacitor, the improvement comprising the step of shining light on selected regions of the radiation conversion layer which are aligned with the pixel electrodes to thereby crystallize the regions, resulting in a plurality of low resistivity and high charge mobility crystallized regions where the semiconductor material has been exposed to the light surrounded by high resistivity and low charge mobility regions where the semiconductor material has not been exposed to the light, for preventing lateral charge diffusion between respective ones of the low resistivity and high char

Abstract: Methods for defect-free impurity-induced laser disordering (IILD) of AlGaInP and AlGaAs heterostructures. Phosphorus-doped or As-doped films are used in which silicon serves as a diffusion source and silicon nitride acts as a barrier for selective IILD. High-performance, index-guided (AlGa).sub.0.5 In.sub.0.5 P lasers may be fabricated with this technique, analogous to those made in the AlGaAs material system. The deposition of the diffusion source films preferably is carried out in a low pressure reactor. Also disclosed is a scheme for reducing or eliminating phosphorus overpressure during silicon diffusion into III-V semiconducting material by adding a pre-diffusion anneal step. Defects produced during intermixing are also reduced using a GaInP or GaInP/GaAs cap.