With Epitaxial Deposition Of Semiconductor In Groove Patents (Class 438/44)
  • Patent number: 5882951
    Abstract: An InP-based opto-electronic integrated circuit including an active layer having one or more quantum wells (36, 38). According to the invention, a barrier layer (34) of AlGaInAs is formed, preferably between the quantum wells and the substrate (30) to prevent the migration of species from the substrate and lower InP layers that tend to shift the emission wavelengths of the quantum wells to shorter wavelengths, i.e., a blue shift. The barrier layer can be patterned so that some areas of the quantum wells exhibit blue shifting to a shorter wavelength while other areas retain their longer wavelength during annealing.
    Type: Grant
    Filed: June 18, 1997
    Date of Patent: March 16, 1999
    Assignee: Bell Communications Research, Inc.
    Inventor: Rajaram Bhat
  • Patent number: 5863809
    Abstract: The specification describes photonic integrated circuit structures, and methods for making structures in which the active and passive waveguides are coplanar, and further in which all the layers of both the active and passive device regions are essentially coplanar, resulting in a planar surface and design flexibility for contact pad and metallization placement. The fabrication strategy eliminates the deep etch used in conventional processing to form laser devices, and thereby eliminates the step between the laser mesa and the passive waveguide sections.
    Type: Grant
    Filed: March 28, 1997
    Date of Patent: January 26, 1999
    Assignee: Lucent Technologies Inc.
    Inventor: Uziel Koren
  • Patent number: 5835516
    Abstract: A method of fabricating a semiconductor laser device includes successively forming an active layer and upper cladding layers on a lower cladding layer, etching and removing portions except regions of the upper cladding layers where a current is to flow to form a stripe-shaped ridge structure, and forming a buffer layer comprising Al.sub.x Ga.sub.1-x As having an Al composition ratio x of 0 to 0.3 on a surface of the upper cladding layers exposed by the etching and forming a current blocking layer of first conductivity type Al.sub.y Ga.sub.1-y As having an Al composition ratio y of at least 0.5 on the buffer layer to bury portions of the upper cladding layers which are not removed by the etching process. Therefore, since the layer grown on the upper cladding layer exposed by etching of AlGaAs or GaAs having a low Al composition ratio (0-0.3), three-dimensional growth of and crystalline defects in the buffer layer are suppressed.
    Type: Grant
    Filed: December 8, 1995
    Date of Patent: November 10, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Motoharu Miyashita, Hirotaka Kizuki, Yasuaki Yoshida, Yutaka Mihashi, Yasutomo Kajikawa, Shoichi Karakida, Yuji Ohkura
  • Patent number: 5827754
    Abstract: A fabrication method for a high output quantum wire array laser diode structure having a low threshold current and a high output is formed by fabricating a short period GaAs quantum wire array and removing an unnecessary quantum well layer with laser holographic lithography techniques and a metalorganic chemical vapor deposition and by forming a current blocking layer which is required in fabricating a laser diode with lithography techniques using a photoresist mask on a micro-patterned structure.
    Type: Grant
    Filed: December 20, 1996
    Date of Patent: October 27, 1998
    Assignee: Korea Institute of Science and Technology
    Inventors: Suk-Ki Min, Eun Kyu Kim
  • Patent number: 5824453
    Abstract: Disclosed is a fabricating method of a GaAs substrate having a V-shaped groove in a higher density, that is a double density, the method comprising the steps of forming a Si.sub.3 N.sub.4 layer on a main surface of the GaAs substrate; patterning the Si.sub.3 N.sub.4 layer using a photo-lithography to form a patterned Si.sub.3 N.sub.4 layer having a minimum width; wet-etching the GaAs substrate using the patterned Si.sub.3 N.sub.4 layer as a mask, so as to form (111) and (100) surfaces of the GaAs substrate beneath the patterned Si.sub.3 N.sub.4 ; selectively growing a GaAs film on the GaAs substrate etched thus using the patterned Si.sub.3 N.sub.4 layer as a mask so as to form the GaAs film with two (111) facets only on a (100) surface of the GaAs substrate; and removing the Si.sub.3 N.sub.4 layer. The V-shaped grooves can be formed on a GaAs substrate utilizing a difference of growth rate caused by surface orientation of the substrate, and therefore the grooves can be formed in double density.
    Type: Grant
    Filed: October 9, 1997
    Date of Patent: October 20, 1998
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung-Bock Kim, Seong-Ju Park, Jeong-Rae Ro, El-Hang Lee
  • Patent number: 5814532
    Abstract: Disclosed is a method of manufacturing a semiconductor laser. A wafer having a substrate having a semiconductor layer including a light-emitting forming portion epitaxially grown on a surface of the substrate is broken into laser chips having a light-emitting surface at an end face thereof. When breaking the wafer into the chips, the breaking at the light-emitting surface is carried out by first forming street grooves in the substrate and thereafter cleaving the light-emitting layer forming portion. By doing so, there is no necessity of thinning the substrate to a required extent, facilitating handling during the manufacture process. A roughened surface of the street groove is provided in the substrate underlying the light-emitting layer forming portion, which is convenient for irregular reflection of a return light beam often encountered in an optical disc pickup device.
    Type: Grant
    Filed: April 29, 1997
    Date of Patent: September 29, 1998
    Assignee: Rohm Co., Ltd.
    Inventor: Jun Ichihara
  • Patent number: 5795798
    Abstract: A method and apparatus for producing full-color luminescent monolithic semiconductor devices. Each portion of the device is bandgap engineered by using different dopants to change the direct bandgap of selected areas of each region, thereby allowing that region to produce different wavelengths of emitted light at high efficiencies.
    Type: Grant
    Filed: November 27, 1996
    Date of Patent: August 18, 1998
    Assignee: The Regents of the University of California
    Inventors: Umesh Kumar Mishra, Steven P. DenBaars, David Joseph Kapolnek
  • Patent number: 5770475
    Abstract: A crystal growth method for a compound semiconductor is capable of forming a plurality of quantum wells (formed of a barrier layer having a large energy band gap and an active layer having a small energy band gap) on the compound semiconductor substrate. After etching a V-shaped groove having a (111) surface with a predetermined angle .theta.1 with respect to the (100) surface on the GaAs semiconductor substrate, the substrate is further etched by a hydrochloric solution and a solution of H.sub.2 SO.sub.4 :H.sub.2 O.sub.2 :H.sub.2 O=20:1 to cause the V-shaped groove walls to become a non-(111) surface having a lower predetermined slope angle .theta.2. The quantum wells then grown in the bottom of the V-shaped groove will be effectively disconnected from simultaneous growths on the side walls of the groove thus giving rise to closely controlled multi-dimensional quantum well structures.
    Type: Grant
    Filed: September 23, 1996
    Date of Patent: June 23, 1998
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung-Bock Kim, Jeong-Rae Ro, El-Hang Lee
  • Patent number: 5759872
    Abstract: A passive region is provided adjacent the mirror surface of a laser. A mesa is formed with an end face parallel to the mirror surface to be formed. The passive region is grown against the end face, and the mirror surface is formed therein by cleaving. The passive region is provided exclusively at the area of the active region. The passive region is provided at the area of the active region preferably in the following manner: two depressions are formed in the layer structure of the laser at the area of the mirror surface to be formed, reaching down to the active layer. Then a portion of the active layer situated between the depressions is selectively removed, whereupon the passive region is grown starting from the depressions in the tubular cavity thus formed.
    Type: Grant
    Filed: April 18, 1996
    Date of Patent: June 2, 1998
    Inventors: Raymond Van Roijen, Petrus J.A. Thijs, Patrick H. Van Gestel
  • Patent number: 5757833
    Abstract: A semiconductor laser is produced by forming a laser activation section and a light emitting section having an InGaAsP layer as a quantum well on a GaAs substrate according to metal organic chemical vapor deposition by using a selective area growth mask, in such a manner that the laser activation section and the light emitting section have different film thicknesses. The laser activation section includes a laser activation layer whose oscillation wavelength is set to 0.8 to 1.1 .mu.m, and the light emitting section includes an optical waveguide layer having a broader forbidden band than the laser activation layer.
    Type: Grant
    Filed: November 1, 1996
    Date of Patent: May 26, 1998
    Assignee: The Furukawa Electric Co., Ltd.
    Inventors: Satoshi Arakawa, Norihiro Iwai, Takuya Ishikawa, Akihiko Kasukawa, Michio Ohkubo, Takao Ninomiya
  • Patent number: 5747366
    Abstract: In a method of fabricating a surface emitting semiconductor layer, to achieve good electrical confinement and good flatness of the mirrors delimiting the resonant cavity of the laser, an electrical confinement layer is made by growing a localized aluminum alloy layer on the active layer, except for an opening area on top of which the mirror is to be formed. After epitaxial regrowth, the alloy layer is oxidized laterally. Applications include the fabrication of semiconductor lasers on III-V substrates such as InP and GaAs.
    Type: Grant
    Filed: December 26, 1996
    Date of Patent: May 5, 1998
    Assignee: Alcatel Alsthom Compagnie Generale D'Electricite
    Inventors: Fran.cedilla.ois Brillouet, Leon Goldstein, Joel Jacquet, Antonina Plais, Paul Salet
  • Patent number: 5728605
    Abstract: An optical semiconductor device includes a plurality of electrodes formed on a common side of a substrate. On the substrate, a first type conductivity layer, a first main layer such as an active layer, which has any one of an undoped type, a first type conductivity and a second type conductivity, and a second type conductivity layer are formed in this order. The layers down to at least the second type conductivity layer are removed to form a ridge and at least one contact groove, which reaches the first type conductivity layer, is formed, such that surfaces having different surface indices from a surface index of the substrate are exposed at the ridge and the contact groove. A regrowth is performed on the exposed surfaces using an amphi-conductivity impurity as a dopant, such that a first portion having a first type conductivity is grown on the contact groove and a second portion having a second type conductivity is grown on the ridge.
    Type: Grant
    Filed: December 19, 1996
    Date of Patent: March 17, 1998
    Assignee: Canon Kabushiki Kaisha
    Inventor: Natsuhiko Mizutani
  • Patent number: 5633193
    Abstract: Heteroepitaxial growth of phosphorus-containing III/V semiconductor material (e.g., InGaAsP) on a non-planar surface of a different phosphorus-containing III/V semiconductor material (e.g., InP) is facilitated by heating the non-planar surface in a substantially evacuated chamber to a mass-transport temperature, and exposing the surface to a flux of at least phosphorus form a solid phosphorus source. This mass-transport step is followed by in situ growth of the desired semiconductor material, with at least an initial portion of the growth being done at a first growth temperature that is not greater than the mass transport temperature. Growth typically is completed at a second growth temperature higher than the first growth temperature. A significant aspect of the method is provision of the required fluxes (e.g., phosphorus, arsenic, indium, gallium) from solid sources, resulting in hydrogen-free mass transport and growth, which can be carried out at lower temperatures than is customary in the prior art.
    Type: Grant
    Filed: May 22, 1996
    Date of Patent: May 27, 1997
    Assignee: Lucent Technologies Inc.
    Inventors: James N. Baillargeon, Alfred Y. Cho, Sung-Nee G. Chu, Wen-Yen Hwang
  • Patent number: 5616522
    Abstract: For end-to-end alignment of two optical waveguides one of which is in the form of a strip buried in a semiconductor wafer, a longitudinal lateral mark is used constituted by the flank of a valley etched in the wafer and self-aligned to the strip formed beforehand. To achieve this self-alignment a protection layer is deposited in the area in which the mark is to be formed, a register layer is deposited on top of the protection layer and a photosensitive resin is deposited on top of these layers and the substrate. First selective etching eliminates the register layer at the location of the valley of the mark. Second and third selective etching respectively etch the lateral channels of the strip and then the valley of the mark.
    Type: Grant
    Filed: August 23, 1995
    Date of Patent: April 1, 1997
    Assignee: Alcatel N.V.
    Inventors: Franck Mallecot, Claude Artigue, Denis LeClerc, Lionel Legouezigou, Francis Poingt, Fr ed eric Pommereau