By Electromagnetic Irradiation (e.g., Electron, Laser, Etc.) Patents (Class 438/463)
  • Patent number: 10818554
    Abstract: A laser processing method for a wafer that is segmented by plural planned dividing lines set on a surface in a lattice manner uses a laser processing apparatus including a laser beam irradiation unit that irradiates, through a collecting lens, the wafer held by a chuck table, with plural laser beams formed by being oscillated by a laser beam oscillator and being split by a laser beam splitting unit. The method includes a processed groove forming step of irradiating the wafer with the plural laser beams along the planned dividing lines and forming a processed groove along the planned dividing lines. The plural laser beams split by the laser beam splitting unit are arranged in a line manner along a direction that is non-parallel to an extension direction of the planned dividing line irradiated with the plural laser beams.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: October 27, 2020
    Assignee: DISCO CORPORATION
    Inventor: Yuri Ban
  • Patent number: 10818552
    Abstract: The present invention provides a method for plasma dicing a substrate. The substrate is provided with a top surface and a bottom surface, the top surface of the substrate having a plurality of street areas and at least one device structure. The substrate is placed onto a support film on a frame to form a work piece. A process chamber having a plasma source is provided. A work piece support is provided within the plasma process chamber. The work piece is placed onto the work piece support. A plasma is generated from the plasma source in the plasma process chamber. The work piece is processed using the generated plasma and a byproduct generated from the support film while the support film is exposed to the generated plasma.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: October 27, 2020
    Assignee: Plasma-Therm LLC
    Inventors: Tsu-Wu Chiang, Russell Westerman
  • Patent number: 10807198
    Abstract: A laser processing apparatus includes: a chuck table that holds a packaged wafer by a holding surface; a laser processing unit that applies a laser beam to the packaged wafer to form a through-groove along each division line; an X-axis moving unit that moves the chuck table in an X-axis direction; and an examination unit. The chuck table includes: a holding member that forms the holding surface; and a light emitting body. The examination unit includes: a line sensor that extends in a Y-axis direction; and a control unit that determines the result of processing through reception by the line sensor of light from the light emitting body through the through-groove. The line sensor images the whole surface of the packaged wafer being held by the chuck table.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: October 20, 2020
    Assignee: DISCO CORPORATION
    Inventors: Yuri Ban, Yuta Yoshida, Kentaro Odanaka
  • Patent number: 10758999
    Abstract: The object to be processed cutting method includes: a crystal orientation identifying step of identifying a crystal orientation of the substrate; a line to cut setting step of setting, for the object to be processed, a line to cut passing through a street region formed between adjacent functional devices, after the crystal orientation identifying step; and a cutting step of cutting the object to be processed along the line to cut, after the line to cut setting step. In the line to cut setting step, in a case where an extending direction of the street region does not match the crystal orientation, the line to cut parallel to the crystal orientation and inclined with respect to the extending direction of the street region, is set for the object to be processed.
    Type: Grant
    Filed: August 8, 2016
    Date of Patent: September 1, 2020
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Junji Okuma, Yo Sugimoto
  • Patent number: 10763172
    Abstract: A method of processing a wafer having a face side where devices are formed in respective areas demarcated by a grid of projected dicing lines includes a groove forming step, a protective film sticking step, a protective-member-combined wafer forming step, a grinding step, a tape bonding step, a holding step, a peeling step, and a die-attach film dividing step.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: September 1, 2020
    Assignee: DISCO CORPORATION
    Inventor: Kazuma Sekiya
  • Patent number: 10702952
    Abstract: The present application describes a method for laser scribing first and second transparent electrically conductive layers (14, 14?) deposited on respective opposing first and second surfaces (12, 13) of a transparent substrate (11), the method comprising: directing a first laser beam (21) through one or more lenses (22) to a focal spot on or closely adjacent to the first surface (12) of the substrate (11), such that the focusing laser beam (21) passes through the second electrically conductive layer (14?) and the second surface (13) of the substrate (11); initiating relative movement between the first laser beam (21) and the substrate (11) in two axes in a plane orthogonal to the axis of the first laser beam (21) to scribe a first pattern in the first electrically conductive layer (14); directing a second laser beam (21?) through one or more lenses (22?) to a focal spot on or closely adjacent to the second surface (13) of the substrate (11), such that the focusing laser beam (21?) passes through the first ele
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: July 7, 2020
    Assignee: M-SOLV LITD.
    Inventor: David Charles Milne
  • Patent number: 10682728
    Abstract: The invention relates to a method of processing a substrate. The substrate has on a first surface a device area with a plurality of devices partitioned by a plurality of division lines. A pulsed laser beam is applied to the substrate at least in a plurality of positions along each of the division lines, with a focal point located at a distance from the first surface in the direction from the first surface towards a second, opposite surface, so as to form a plurality of modified regions in the substrate along each of the division lines. The second surface of the substrate is then ground to adjust the substrate thickness. After forming modified regions and/or hole regions in the substrate, a plasma can be applied to the substrate so as to form a plurality of grooves extending along the division lines.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: June 16, 2020
    Assignee: DISCO CORPORATION
    Inventors: Karl Heinz Priewasser, Hitoshi Hoshino, Kenji Furuta
  • Patent number: 10679910
    Abstract: A packaged wafer processing method includes a processing step of processing each division line formed on a packaged wafer by using a laser beam applying unit and a feeding mechanism, and indexing the wafer by a preset index amount “a” corresponding to the pitch of the division lines by using an indexing mechanism, thereby forming a laser processed groove along each division line. A correcting step images the next division line to be processed in an exposed peripheral portion of the wafer and the laser processed groove just formed along the present division line, at any arbitrary time during the processing step. The distance “b” between the next division line and the laser processed groove just formed is determined, and then a correction index amount “c” is calculated by using the deviation corresponding to the difference (a?b) between the preset index amount “a” and the distance “b”.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: June 9, 2020
    Assignee: DISCO CORPORATION
    Inventors: Makoto Tanaka, Xin Lu
  • Patent number: 10679865
    Abstract: The method of dicing a wiring substrate that includes a core substrate having a front surface and a rear surface at least one of which is provided with an adhesive layer and a rim pattern thereon. The adhesive layer is provided with a laminate that has wiring layers and insulating layers, laminating. The rim pattern is provided with the insulating layers laminated thereon. The method includes steps of forming separation grooves by removing portions of the insulating layers laminated on the rim pattern to expose the rim pattern; exposing at least one of the front and rear surfaces of the core substrate by dissolving and removing the rim pattern of the groove bottoms; and dicing the core substrate exposed at groove bottoms, along cutting margins each being smaller than a groove width of each of the groove bottoms.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: June 9, 2020
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventors: Koji Imayoshi, Yuki Nitta
  • Patent number: 10672660
    Abstract: A method of manufacturing a semiconductor element includes: providing a wafer having a semiconductor layered body on a sapphire substrate; irradiating a laser light in an interior region of the sapphire substrate to create cracks in the sapphire substrate by performing a first scan to irradiate the laser light at a first depth with a first pulse energy to create a first modified region, and a second scan following the first scan to irradiate the laser light at a second depth with a second pulse energy greater than the first pulse energy along and within the first modified region; and dividing the wafer by extending the cracks to obtain a semiconductor element.
    Type: Grant
    Filed: February 22, 2018
    Date of Patent: June 2, 2020
    Assignee: NICHIA CORPORATION
    Inventors: Naoto Inoue, Sho Kusaka, Minoru Yamamoto, Masayuki Ibaraki, Hiroaki Tamemoto
  • Patent number: 10658171
    Abstract: A laser processing apparatus including a condenser having a function of spherical aberration. Since the condenser has a function of spherical aberration, the focal point of a laser beam to be focused by the condenser and applied to a wafer can be continuously changed in position along the thickness of the wafer. Accordingly, a uniform shield tunnel composed of a fine hole and an amorphous region surrounding the fine hole can be formed so as to extend from the front side of the wafer to the back side thereof, by one shot of the laser beam.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: May 19, 2020
    Assignee: DISCO CORPORATION
    Inventor: Naotoshi Kirihara
  • Patent number: 10639747
    Abstract: A method of manufacturing a light emitting element includes: providing a wafer that includes a substrate having a first principal face and a second principal face, a dielectric multilayer film disposed on the first principal face, and a semiconductor structure disposed on the second principal face; forming modified regions in the substrate by focusing a laser beam inside the substrate via the dielectric multilayer film, and allowing cracks to form from the modified regions to the dielectric multilayer film; subsequent to forming the modified regions in the substrate, removing regions of the dielectric multilayer film that contain cracks; and cleaving the wafer along regions where cracks were formed in the substrate.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: May 5, 2020
    Assignee: NICHIA CORPORATION
    Inventors: Naoto Inoue, Yoshitaka Sumitomo
  • Patent number: 10610975
    Abstract: A method of removing material from an opposite side of workpiece includes directing a laser beam at a first side of the workpiece to remove the material from an opposite second side of the workpiece.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: April 7, 2020
    Assignee: GENTEX CORPORATION
    Inventors: Henry A. Luten, Kurtis L. Geerlings, Donald L. Bareman
  • Patent number: 10580700
    Abstract: A method for avoiding crack formation during a laser lift-off process is provided. The method includes: forming a composite glue layer on a carrier substrate in which the composite glue layer includes an ultraviolet glue and fillers therein and a Young's modulus of the fillers is greater than a Young's modulus of the ultraviolet glue; placing a semiconductor structure onto the composite glue layer in which the semiconductor structure includes a growth substrate, an epitaxial layer present on the growth substrate, and a metal layer present on the epitaxial layer, wherein placing the semiconductor structure makes the metal layer be in contact with and attached to the composite glue layer; and performing the laser lift-off process to separate the growth substrate from the epitaxial layer.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: March 3, 2020
    Assignee: MIKRO MESA TECHNOLOGY CO., LTD.
    Inventors: Yi-Ching Lin, Li-Yi Chen
  • Patent number: 10576585
    Abstract: A method for processing a crystalline substrate to form multiple patterns of subsurface laser damage facilitates subsequent fracture of the substrate to yield first and second substrate portions of reduced thickness. Multiple (e.g., two, three, or more) groups of parallel lines of multiple subsurface laser damage patterns may be sequentially interspersed with one another, with at least some lines of different groups not crossing one another. Certain implementations include formation of multiple subsurface laser damage patterns including groups of parallel lines that are non-parallel to one another, but with each line remaining within ±5 degrees of perpendicular to the <1120> direction of a hexagonal crystal structure of a material of the substrate.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: March 3, 2020
    Assignee: CREE, INC.
    Inventors: Matthew Donofrio, John Edmond, Harshad Golakia
  • Patent number: 10573505
    Abstract: A method for producing a wafer from an ingot of single crystal SiC includes an end surface planarizing step of planarizing an end surface of the ingot, a separation layer forming step of setting a focal point of a laser beam having a transmission wavelength to single crystal SiC inside the ingot at a predetermined depth from the end surface of the ingot, the predetermined depth corresponding to the thickness of the wafer to be produced, and next applying the laser beam to the ingot to thereby form a separation layer for separating the wafer from the ingot, a hard plate providing step of providing a hard plate through an adhesive on the end surface of the ingot in which the separation layer has been formed, and a separating step of separating the wafer with the hard plate from the ingot along the separation layer.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: February 25, 2020
    Assignee: DISCO CORPORATION
    Inventor: Kazuya Hirata
  • Patent number: 10515854
    Abstract: The present invention relates to a laser lift-off method of wafer. The method includes the steps as follows: focusing laser in an inside for a wafer (10) to form a plurality of cracking points (19), the plurality of cracking points (19) are located on a separating surface (20); and exerting, under a temperature of ?400K to 0K, forces with opposite directions to opposite sides of the wafer (10), thereby dividing the wafer (10) into two pieces along the separating surface (20).
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: December 24, 2019
    Assignee: Han's Laser Technology Industry Group Co., Ltd.
    Inventors: Yanhua Wang, Changhui Zhuang, Fuhai Li, Wei Zeng, Wei Zhu, Jiangang Yin, Yunfeng Gao
  • Patent number: 10510605
    Abstract: An embodiment method includes providing a wafer including a first integrated circuit die, a second integrated circuit die, and a scribe line region between the first integrated circuit die and the second integrated circuit die. The method further includes forming a kerf in the scribe line region and after forming the kerf, using a mechanical sawing process to fully separate the first integrated circuit die from the second integrated circuit die. The kerf extends through a plurality of dielectric layers into a semiconductor substrate.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Fu-Chen Chang, Cheng-Lin Huang, Wen-Ming Chen
  • Patent number: 10438898
    Abstract: A wafer processing method for processing a wafer has a front side and a back side, the front side of the wafer being formed with a plurality of crossing streets for defining a plurality of separate regions where a plurality of devices are individually formed. The wafer processing method includes the steps of first attaching a protective tape to the front side of the wafer, next heating the protective tape and the wafer, next applying a laser beam having a transmission wavelength to the wafer to the back side of the wafer along the streets, thereby forming a modified layer inside the wafer along each street, and next grinding the back side of the wafer, thereby reducing a thickness of the wafer to a predetermined thickness and also dividing the wafer into individual chips along each street where the modified layer is formed as a division start point.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: October 8, 2019
    Assignee: Disco Corporation
    Inventors: Masaru Nakamura, Masamitsu Agari
  • Patent number: 10421158
    Abstract: A method for processing a crystalline substrate to form multiple patterns of subsurface laser damage facilitates subsequent fracture of the substrate to yield first and second substrate portions of reduced thickness. Multiple (e.g., two, three, or more) groups of parallel lines of multiple subsurface laser damage patterns may be sequentially interspersed with one another, with at least some lines of different groups not crossing one another. Certain implementations include formation of multiple subsurface laser damage patterns including groups of parallel lines that are non-parallel to one another, but with each line remaining within ±5 degrees of perpendicular to the <1120> direction of a hexagonal crystal structure of a material of the substrate.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: September 24, 2019
    Assignee: CREE, INC.
    Inventors: Matthew Donofrio, John Edmond, Harshad Golakia
  • Patent number: 10410924
    Abstract: Provided is a manufacturing process of an element chip, which comprises a preparation step for preparing a substrate including a semiconductor layer having first and second sides and a wiring layer on the first side thereof, the substrate having a plurality of dicing regions and element regions defined by the dicing regions, a scribing step for radiating a laser beam towards the first side of the wiring layer onto the dicing regions to form apertures exposing the semiconductor layer along the dicing regions, and a dicing step for dicing the substrate along the apertures into a plurality of the element chips, wherein the laser beam has a beam profile having a M-shaped distribution whose peripheral intensity is greater than a central intensity in a width direction of the laser beam along the dicing regions.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: September 10, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hidehiko Karasaki, Hidefumi Saeki, Atsushi Harikai
  • Patent number: 10410923
    Abstract: A method of processing a wafer includes forming a mask on portions of a face side of the wafer which correspond to devices; performing plasma etching on the face side of the wafer through the mask to etch areas of streets other than areas thereof corresponding to metal components, thereby forming grooves in the areas of the streets to a depth corresponding to a finished thickness of device chips; bonding a protective member for protecting the face side of the wafer, holding the face side of the wafer on a chuck table through the protective member and grinding a reverse side of the wafer until bottoms of the grooves are exposed, to fragmentize the wafer into the device chips; and picking up the device chips from the protective member, leaving remaining regions of the substrate which correspond to the metal components on the protective member.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: September 10, 2019
    Assignee: DISCO CORPORATION
    Inventor: Hideyuki Sandoh
  • Patent number: 10396237
    Abstract: A light-emitting diode substrate and a manufacturing method thereof, and a display device are provided. The manufacturing method of a light-emitting diode (LED) substrate, including: disposing a supporting substrate supporting a plurality of LED units to be opposed to a receiving substrate so that a side of the supporting substrate facing the receiving substrate supports the plurality of LED units; and irradiating a side of the supporting substrate away from the receiving substrate with laser, stripping the LED units from the supporting substrate, and transferring the LED units onto the receiving substrate. The manufacturing method of the LED substrate can better transfer LED units from the supporting substrate onto the receiving substrate.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: August 27, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Long Wang, Yanzhao Li, Chieh Hsing Chung, Jie Sun
  • Patent number: 10381292
    Abstract: A lead frame includes a plate portion provided with a first surface and a second surface, the second surface being opposite to the first surface; a protruding portion integrally formed with the plate portion to be protruded from the first surface of the plate portion, wherein a surface of the lead frame includes a work affected layer existing region at which a work affected layer is formed, and a work affected layer non-existing region at which a work affected layer is not formed, wherein a front end surface of the protruding portion is the work affected layer existing region, wherein a region of the first surface at which the protruding portion is not formed is the work affected layer non-existing region, and wherein the second surface of the plate portion includes the work affected layer non-existing region.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: August 13, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Koji Watanabe, Kentaro Kaneko
  • Patent number: 10363629
    Abstract: Methods of dicing semiconductor wafers are described. In an example, a method of dicing a wafer having a plurality of integrated circuits thereon involves dicing the wafer into a plurality of singulated dies disposed above a dicing tape. The method also involves forming a material layer over and between the plurality of singulated dies above the dicing tape. The method also includes expanding the dicing tape, wherein a plurality of particles is collected on the material layer during the expanding.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: July 30, 2019
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Jungrae Park, Ajay Kumar, Brad Eaton
  • Patent number: 10347534
    Abstract: Embodiments are provided herein for separating integrated circuit (IC) device die of a wafer, the wafer having a front side with an active device region and a back side, the active device region having a plurality of active devices arranged in rows and columns and separated by cutting lanes, the method including: attaching the front side of the wafer onto a first dicing tape; forming a modification zone within each cutting lane through the back side of the wafer, wherein each modification zone has a first thickness near a corner of each active device and a second thickness near a center point of each active device, wherein the second thickness is less than the first thickness; and propagating cracks through each cutting lane to separate the plurality of active devices.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: July 9, 2019
    Assignee: NXP B.V.
    Inventors: Martin Lapke, Hartmut Buenning, Sascha Moeller, Guido Albermann, Michael Zernack, Leo M. Higgins, III
  • Patent number: 10328529
    Abstract: Employing laser scanning directions (20) that are oblique to and against a predominant gas flow direction (25) equalize the quality and waviness characteristics of orthogonal scribe lines (26) made by the laser scans. Positioning and sequence of multiple scan passes to form a feature wider than the width of a scribe line (26) can be controlled to enhance quality and waviness characteristics of the edges of the feature.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: June 25, 2019
    Assignee: ELECTRO SCIENTIFIC INDUSTRIES, INC
    Inventors: Daragh Finn, Robert A. Ferguson
  • Patent number: 10293433
    Abstract: A laser processing method which can efficiently perform laser processing while minimizing the deviation of the converging point of a laser beam in end parts of an object to be processed is provided.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: May 21, 2019
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Kazuhiro Atsumi, Koji Kuno, Masayoshi Kusunoki, Tatsuya Suzuki, Kenshi Fukumitsu, Fumitsugu Fukuyo
  • Patent number: 10269641
    Abstract: The present invention provides a method for plasma dicing a substrate. The substrate is provided with a top surface and a bottom surface, the top surface of the substrate having a plurality of street areas and at least one device structure. The substrate is placed onto a support film on a frame to form a work piece. A process chamber having a plasma source is provided. A work piece support is provided within the plasma process chamber. The work piece is placed onto the work piece support. A plasma is generated from the plasma source in the plasma process chamber. The work piece is processed using the generated plasma and a byproduct generated from the support film while the support film is exposed to the generated plasma.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: April 23, 2019
    Assignee: Plasma-Therm LLC
    Inventors: Tsu-Wu Chiang, Russell Westerman
  • Patent number: 10236402
    Abstract: In various embodiments, photovoltaic modules are hermetically sealed by providing a first glass sheet, a photovoltaic device disposed on the first glass sheet, and a second glass sheet, a gap being defined between the first and second glass sheets, disposing a glass powder within the gap, and heating the powder to seal the glass sheets.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: March 19, 2019
    Assignee: SIVA POWER, INC.
    Inventor: Markus Eberhard Beck
  • Patent number: 10147646
    Abstract: A manufacturing process of an element chip comprises a preparation step for preparing a substrate, the substrate including first and second streets crossing each other to define a plurality of element regions. Also, it comprises a first shallow-groove formation step for radiating a laser beam along the first streets to form a plurality of first shallow grooves being shallower than a thickness of the substrate, a second shallow-groove formation step for radiating the laser beam along the second streets to form a plurality of second shallow grooves being shallower than a thickness of the substrate, a first groove formation step for radiating the laser beam along the first shallow grooves to form a plurality of first grooves, and a plasma dicing step for etching the substrate along the first grooves and the second shallow grooves by a plasma exposure to dice the substrate into a plurality of element chips.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: December 4, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hidehiko Karasaki, Hidefumi Saeki, Atsushi Harikai
  • Patent number: 10141265
    Abstract: A bent-bridge semiconductive apparatus includes a silicon bridge that is integral to a semiconductive device and the silicon bridge is deflected out of planarity. The silicon bridge may couple two semiconductive devices, all of which are from an integral processed die.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: November 27, 2018
    Assignee: Intel IP Corporation
    Inventors: Bernd Waidhas, Stephan Stoeckl, Andreas Wolter, Reinhard Mahnkopf, Georg Seidemann, Thomas Wagner, Laurent Millou
  • Patent number: 10096517
    Abstract: Disclosed herein is a wafer processing method for dividing a wafer into individual device chips along division lines. The wafer processing method includes a frame supporting step of attaching the wafer to an adhesive tape fixed at its peripheral portion to an annular frame, thereby supporting the wafer through the adhesive tape to the annular frame, a laser processing step of applying a laser beam to each division line to thereby form a strength reduced portion along each division line, and a dividing step of applying a radial tension to the adhesive tape and next applying an external force to the wafer in the condition where the radial tension is kept acting on the adhesive tape, thereby dividing the wafer into the individual device chips along the division lines.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: October 9, 2018
    Assignee: Disco Corporation
    Inventors: Tomoki Yoshino, Takumi Shotokuji
  • Patent number: 10087550
    Abstract: Techniques for processing materials for manufacture of gallium-containing nitride substrates are disclosed. More specifically, techniques for fabricating and reusing large area substrates using a combination of processing techniques are disclosed. The methods can be applied to fabricating substrates of GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, and others. Such substrates can be used for a variety of applications including optoelectronic devices, lasers, light emitting diodes, solar cells, photo electrochemical water splitting and hydrogen generation, photo detectors, integrated circuits, transistors, and others.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: October 2, 2018
    Assignee: SLT TECHNOLOGIES, INC.
    Inventors: Mark P. D'Evelyn, Michael Ragan Krames
  • Patent number: 10067288
    Abstract: The invention relates to a method and a device for producing at least one fiber Bragg grating in a waveguide, wherein the waveguide has at least one core having a first refractive index and the fiber Bragg grating contains a plurality of spatial regions which each occupy a partial volume of the core and have a second refractive index, wherein the spatial regions are each produced by the action of laser radiation on a partial volume of the core, wherein the laser radiation contains a plurality of pulse trains each containing a plurality of individual pulses, wherein the time interval between successive individual pulses is smaller than the time interval between successive pulse trains and the time interval between successive individual pulses is chosen between 10 ns and 100 ps or the pulse train has a duration of 50 fs to 50 ps.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: September 4, 2018
    Assignee: Fraunhofer Gesellschaft Zur Forderung Der Angew. Forschung E.V.
    Inventors: Wolfgang Schade, Jörg Burgmeier
  • Patent number: 9935008
    Abstract: Disclosed herein is a semiconductor device chip manufacturing method including a chipping prevention layer forming step of forming a chipping prevention layer at each intersection of a plurality of crossing division lines formed on the front side of a wafer, a modified layer forming step of applying a laser beam having a transmission wavelength to the wafer to the back side thereof along each division line in the condition where the focal point of the laser beam is set inside the wafer, thereby forming a modified layer inside the wafer along each division line, and a dividing step of grinding the back side of the wafer after performing the modified layer forming step, thereby reducing the thickness of the wafer and also dividing the wafer into individual semiconductor device chips along each division line where the modified layer is formed as a break start point.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: April 3, 2018
    Assignee: Disco Corporation
    Inventor: Toshiyuki Tateishi
  • Patent number: 9905453
    Abstract: A protective sheeting for use in processing a semiconductor-sized wafer has a substantially circular base sheet and a substantially annular adhesive layer applied to a peripheral portion of a first surface of the base sheet. The inner diameter of the adhesive layer is smaller than the diameter of the wafer. Further, the outer diameter of the adhesive layer is larger than the inner diameter of an annular frame for holding the wafer. A related method includes attaching the protective sheeting to a front side or a back side of the wafer via the adhesive layer on the first surface of the base sheet so that an inner peripheral portion of the adhesive layer adheres to an outer peripheral portion of the front side or the back side of the wafer, and processing the wafer after the protective sheeting has been attached to the front side or the back side thereof.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: February 27, 2018
    Assignee: DISCO Corporation
    Inventor: Karl Heinz Priewasser
  • Patent number: 9828277
    Abstract: Methods and apparatus for separating substrates are disclosed, as are articles formed from the separated substrates. A method of separating a substrate having first and second surfaces includes directing a beam of laser light to pass through the first surface and, thereafter, to pass through the second surface. The beam of laser light has a beam waist located at a surface of the substrate or outside the substrate. Relative motion between the beam of laser light and the substrate is caused to scan a spot on a surface of the substrate to be scanned along a guide path. Portions of the substrate illuminated within the spot absorb light within the beam of laser light so that the substrate can be separated along the guide path.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: November 28, 2017
    Assignee: Electro Scientific Industries, Inc.
    Inventors: Haibin Zhang, Qian Xu
  • Patent number: 9818911
    Abstract: A semiconductor light-emitting element includes a substrate and a semiconductor stack portion provided on the substrate and having at least a first-conductivity-type semiconductor layer, a light-emitting layer, and a second-conductivity-type semiconductor layer. The substrate has a property to allow transmission of light from the light-emitting layer, and has a hexahedral shape including a first surface on which a semiconductor stack portion is provided, a second surface located opposite to the first surface, a pair of third surfaces orthogonal to the first surface and the second surface, and a pair of fourth surfaces orthogonal to the first surface and the second surface and different from the pair of third surfaces.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: November 14, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroaki Yamamoto, Susumu Ohmi, Yufeng Weng, Kiminori Tanabe
  • Patent number: 9779993
    Abstract: A method for dividing a wafer including: attaching a protective tape to a functional layer of the wafer with the adhesive layer of the tape in contact with the functional layer; and a wafer dividing step. The dividing step includes a cut groove forming step and a laser processing step. The cut groove forming step uses a blade to form a cut groove with a depth that does not reach the functional layer, resulting in part of the substrate being left along each division line. The laser processing step includes applying a laser beam to the part of the substrate left after the cut groove forming step and the functional layer of the wafer to form a laser processed groove having a depth reaching the tape. The tape is closely attached to the functional layer during the tape attaching step to prevent the adhesion of debris to the devices.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: October 3, 2017
    Assignee: DISCO CORPORATION
    Inventors: Yuki Ogawa, Kensuke Nagaoka, Tsubasa Obata, Yuri Ban
  • Patent number: 9721791
    Abstract: According to an embodiment of a method of fabricating III-Nitride semiconductor dies, the method includes: growing a III-Nitride body over a group IV substrate in a semiconductor wafer; forming at least one device layer over the III-Nitride body; etching grid array trenches in the III-Nitride body and in the group IV substrate; forming an edge trench around a perimeter of the semiconductor wafer, the grid array trenches terminating inside the group IV substrate; and forming separate dies by cutting the semiconductor wafer approximately along the grid array trenches.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: August 1, 2017
    Assignee: Infineon Technologies Americas Corp.
    Inventor: Michael A. Briere
  • Patent number: 9711934
    Abstract: A laser apparatus may include a first laser resonator configured to generate a laser beam, a first optical element configured to adjust a divergence in a first direction of the laser beam, a second optical element configured to adjust a divergence in a second direction of the laser beam, a measuring unit configured to measure the divergence in the first direction and the divergence in the second direction of the laser beam, and a controller configured to control one or both of the first optical element and the second optical element based on the divergence in the first direction and the divergence in the second direction of the laser beam both measured by the measuring unit.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: July 18, 2017
    Assignee: Gigaphoton Inc.
    Inventors: Osamu Wakabayashi, Takashi Matsunaga
  • Patent number: 9701581
    Abstract: The invention relates to a method and apparatus for processing substrates, such as glass and semiconductor wafers. The method comprises directing to the substrate from a laser source a plurality of sequential focused laser pulses having a predetermined duration, pulsing frequency and focal spot diameter, the pulses being capable of locally melting the substrate, and moving the laser source and the substrate with respect to each other at a predetermined moving velocity so that a structurally modified zone is formed to the substrate. According to the invention, the pulse duration is in the range of 20-100 ps, pulsing frequency at least 1 MHz and moving velocity adjusted such that the distance between successive pulses is less than ? of the diameter of the focal spot. The invention can be utilized, for example, for efficient dicing, scribing and welding of materials which are normally transparent.
    Type: Grant
    Filed: June 4, 2009
    Date of Patent: July 11, 2017
    Assignee: Corelase Oy
    Inventors: Jarno Kangastupa, Tiina Amberla
  • Patent number: 9698303
    Abstract: A light-emitting device is disclosed. The light-emitting diode device includes a substrate, comprising an upper surface, a lower surface and a plurality of side surfaces; and a semiconductor stack formed on the upper surface of the substrate; wherein the plurality of side surfaces comprises: a first region, adjacent to the upper surface and having a first surface roughness; a second region, comprising one or a plurality of textured areas substantially parallel to the upper surface and/or the lower surface in a side view, wherein the textured area is composed of a plurality of textured stripes and has a second surface roughness; and a third region, having a third surface roughness and being between the first region and the second region, and/or between the plurality of textured areas; wherein the first surface roughness is smaller than the second surface roughness, and the third surface roughness is smaller than the first surface roughness.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: July 4, 2017
    Assignee: EPISTAR CORPORATION
    Inventors: Po-Shun Chiu, De-Shan Kuo, Jhih-Jheng Yang, Jiun-Ru Huang, Jian-Huei Li, Ying-Chieh Chen, Zi-Jin Lin
  • Patent number: 9620415
    Abstract: A wafer formed from an SiC substrate having a first surface and a second surface is divided into individual device chips. A division start point formed by a cutting blade has a depth corresponding to the finished thickness of each device chip along division lines formed on the first surface. A separation start point is formed by a laser beam having a focal point set inside the SiC substrate at a predetermined depth from the second surface, and the laser beam is applied to the second surface while relatively moving the focal point and the SiC substrate to thereby form a modified layer parallel to the first surface and cracks extending from the modified layer along a c-plane. An external force is applied to the wafer, thereby separating the wafer into a first wafer having the first surface and a second wafer having the second surface.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: April 11, 2017
    Assignee: Disco Corporation
    Inventors: Kazuya Hirata, Yoko Nishino
  • Patent number: 9536786
    Abstract: A wafer is formed with a plurality of division lines on a front surface of a single crystal substrate having an off angle and formed with devices in a plurality of regions partitioned by the division lines. The wafer is processed by setting a numerical aperture (NA) of a focusing lens for focusing a pulsed laser beam so that a value obtained by dividing the numerical aperture (NA) by a refractive index (N) of the single crystal substrate falls within the range from 0.05 to 0.2. The pulsed laser beam is applied along the division lines, with a focal point of the pulsed laser beam positioned at a desired position from a back surface of the single crystal substrate, so as to form shield tunnels each composed of a pore and a pore-shielding amorphous portion along the division lines from the focal point positioned inside the single crystal substrate.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: January 3, 2017
    Assignee: Disco Corporation
    Inventors: Hiroshi Morikazu, Motohiko Shimada
  • Patent number: 9496155
    Abstract: A method for selectively transferring active components (22) from a source substrate (20) to a destination substrate (10) includes providing a source substrate with one or more active components located on the source substrate, providing a destination substrate, locating a selectively curable adhesive layer (30) between and adjacent to the destination substrate and the source substrate, selecting one or more active components (22A), selectively curing area(s) (32A) of the adhesive layer corresponding to the selected active components to adhere the selected active components to the destination substrate, and removing the source substrate from the destination substrate leaving the selected active components adhered to the destination substrate in the selected areas.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: November 15, 2016
    Assignee: Semprius, Inc.
    Inventors: Etienne Menard, Joseph Carr
  • Patent number: 9431299
    Abstract: A package substrate is divided into a plurality of device packages. An adhesive tape is attached to a back side of the substrate by cutting the substrate along a plurality of division lines formed on a front side of the substrate. The substrate includes a device portion partitioned into a plurality of device package regions by the division lines, and a marginal portion surrounding the device portion. A first ultraviolet light is applied to reduce the adhesive force of the adhesive tape in the marginal portion. The adhesive tape is partially peeled from the substrate in the marginal portion, and the substrate is cut along each division line by using a cutting blade to thereby divide the substrate into the device packages. In the dividing step, the marginal portion separated from the substrate is scattered by rotation of the cutting blade and thereby removed from the adhesive tape.
    Type: Grant
    Filed: November 11, 2015
    Date of Patent: August 30, 2016
    Assignee: Disco Corporation
    Inventors: Hayato Kiuchi, Shigeya Kurimura
  • Patent number: 9425084
    Abstract: Embodiments of mechanisms of forming a semiconductor device structure are provided. The semiconductor device structure is provided. The semiconductor device structure includes a substrate having a front side and a back side. The semiconductor device structure also includes devices formed on the front side of the substrate and interconnect structures formed on the devices. The semiconductor device structure further includes a protection layer formed on the back side of the substrate, and the protection layer has a thickness over about 10 A.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: August 23, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Shyang Tsai, Wen-Han Tan, Wen-Lung Ho
  • Patent number: 9330977
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the plurality of integrated circuits. The mask is then patterned with a galvo scanner and linear stage hybrid motion laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the plurality of integrated circuits. The semiconductor wafer is then plasma etched through the gaps in the patterned mask to singulate the plurality of integrated circuits.
    Type: Grant
    Filed: January 5, 2015
    Date of Patent: May 3, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Brad Eaton, Ajay Kumar