By Electromagnetic Irradiation (e.g., Electron, Laser, Etc.) Patents (Class 438/463)
  • Patent number: 8207009
    Abstract: Methods for laser scribing a film stack including a plurality of thin film layers on a substrate are provided. A pulse of a laser beam is applied to the film stack, where the laser beam has a power that varies as a function of time during the pulse according to a predetermined power cycle. For example, the pulse can have a pulse lasting about 0.1 nanoseconds to about 500 nanoseconds. This pulse of the laser beam can be repeated across the film stack to form a scribe line through at least one of the thin film layers on the substrate. Such methods are particularly useful in laser scribing a cadmium telluride thin-film based photovoltaic device.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: June 26, 2012
    Assignee: PrimeStar Solar, Inc.
    Inventor: Jonathan Mack Frey
  • Patent number: 8193072
    Abstract: Formulations and processes for forming wafer coat layers are disclosed. In one embodiment, an organic surface protectant is incorporated into a wafer coat formulation deposited onto a semiconductor wafer prior to the laser scribe operation. Upon removal of the wafer coat layer, the organic surface protectant remains on the bumps and thereby prevents oxidation of the bumps between die prep and chip and attach. In an alternative embodiment, an ultraviolet light absorber is added to the wafer coat formulation to enhance the wafer coat layer's energy absorption and thereby improve the laser's ability to ablate the wafer coat layer. In an alternative embodiment, a conformal wafer coat layer is deposited on the wafer and die bumps, thereby reducing wafer coat layer thickness variations that can impact the laser scribing ability.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: June 5, 2012
    Assignee: Intel Corporation
    Inventors: Eric J. Li, Daoqiang Lu, Christopher L. Rumer, Paul A. Koning, Darcy E. Fleming, Gudbjorg H. Oskarsdottir, Tiffany Byrne
  • Patent number: 8193073
    Abstract: An improved method for producing a plurality of parts (30) from a plate-type substrate (20) is disclosed, comprising the steps of: (a) laterally separating the parts (30) from a plate-type substrate (20) fixed on a first vacuum plate (3); (b) sucking the parts (30) on a first vacuum plate (3); and (c) detaching the separated parts (30) from the first vacuum plate (3).
    Type: Grant
    Filed: September 25, 2006
    Date of Patent: June 5, 2012
    Assignee: Schott AG
    Inventor: Jörn Besinger
  • Publication number: 20120135585
    Abstract: A method for manufacturing a chip constituted by a functional device formed on a substrate comprises a functional device forming step of forming the functional device on one main face of a sheet-like object to be processed made of silicon; a first modified region forming step of converging a laser light at the object so as to form a first modified region along the one main face of the object at a predetermined depth corresponding to the thickness of the substrate from the one main face; a second modified region forming step of converging the laser light at the object so as to form a second modified region extending such as to correspond to a side edge of the substrate as seen from the one main face on the one main face side in the object such that the second modified region joins with the first modified region along the thickness direction of the object; and an etching step of selectively advancing etching along the first and second modified regions after the first and second modified region forming steps so
    Type: Application
    Filed: July 19, 2011
    Publication date: May 31, 2012
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Hideki Shimoi, Keisuke Araki
  • Patent number: 8187983
    Abstract: A method for fabricating semiconductor components includes the steps of providing a semiconductor substrate having a circuit side, a back side and integrated circuits and circuitry on the circuit side; thinning the substrate from the back side to a selected thickness; laser processing the back side of the thinned substrate to form at least one lasered feature on the back side; and dicing the substrate into a plurality of components having the lasered feature. The lasered feature can cover the entire back side or only selected areas of the back side, and can be configured to change electrical properties, mechanical properties or gettering properties of the substrate. A semiconductor component includes a thinned semiconductor substrate having a back side and a circuit side containing integrated circuits and associated circuitry. The semiconductor component also includes at least one lasered feature on the back side configured to provide selected electrical or physical characteristics for the substrate.
    Type: Grant
    Filed: April 16, 2009
    Date of Patent: May 29, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Alan G. Wood, Tim Corbett
  • Patent number: 8183131
    Abstract: A method of cutting an object which can accurately cut the object is provided. An object to be processed 1 such as a silicon wafer is irradiated with laser light L while a light-converging point P is positioned therewithin, so as to form a modified region 7 due to multiphoton absorption within the object 1, and cause the modified region 7 to form a starting point region for cutting 8 shifted from the center line CL of the thickness of the object 1 toward the front face 3 of the object 1 along a line along which the object should be cut. Subsequently, the object 1 is pressed from the rear face 21 side thereof. This can generate a fracture from the starting point region for cutting 8 acting as a start point, thereby accurately cutting the object 1 along the line along which the object should be cut.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: May 22, 2012
    Assignee: Hamamatsu Photonics K. K.
    Inventors: Fumitsugu Fukuyo, Kenshi Fukumitsu
  • Patent number: 8178423
    Abstract: A laser beam machining method wherein machining areas in which to form machined grooves and machining start point areas in which to form shallow grooves shallower than the machined grooves are alternately set in each of streets formed on a wafer, and the machined grooves and the shallow grooves are continuously formed by scanning an irradiation point of a laser beam along each of the streets.
    Type: Grant
    Filed: September 1, 2009
    Date of Patent: May 15, 2012
    Assignee: Disco Corporation
    Inventor: Tomohiro Endo
  • Patent number: 8178424
    Abstract: Provided are a method of fabricating a light-emitting apparatus with improved light extraction efficiency and a light-emitting apparatus fabricated using the method. The method includes: preparing a monocrystalline substrate; forming an intermediate structure on the substrate, the intermediate structure comprising a light-emitting structure which comprises a first conductive pattern of a first conductivity type, a light-emitting pattern, and a second conductive pattern of a second conductivity type stacked sequentially, a first electrode which is electrically connected to the first conductive pattern, and a second electrode which is electrically connected to the second conductive pattern; forming a polycrystalline region, which extends in a horizontal direction, by irradiating a laser beam to the substrate in the horizontal direction such that the laser beam is focused on a beam-focusing point within the substrate; and cutting the substrate in the horizontal direction along the polycrystalline region.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: May 15, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yu-Sik Kim, Seong-Deok Hwang, Seung-Jae Lee, Sun-Pil Youn
  • Patent number: 8178425
    Abstract: An optical device wafer processing method for dividing an optical device wafer into a plurality of individual optical devices. The optical device wafer is composed of a substrate and a semiconductor layer formed on the front side of the substrate. The optical devices are partitioned by a plurality of crossing division lines formed on the semiconductor layer.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: May 15, 2012
    Assignee: Disco Corporation
    Inventors: Tasuku Koyanagi, Hiroshi Morikazu
  • Publication number: 20120115308
    Abstract: A fabrication method for dicing semiconductor wafers using laser cutting techniques, which can effectively prevent the devices on semiconductor die units from the phenomenon of etching undercut caused by the sequential steps after laser cutting, comprises following steps: covering the wafer surface with a protection layer; dicing the wafer by laser and separating the die units from each other; removing the laser cutting residues on the devices on the die units by wet etching; removing the protection layer and cleaning the devices on the die units. The selection of materials for the protection layer must consider the following factors: where (1) the materials for the protection layer must have relatively good properties for adhering and covering on the wafer; (2) and the materials for the protection layer must be corrosion-resistant to the acidic or basic solution for etching residues.
    Type: Application
    Filed: April 4, 2011
    Publication date: May 10, 2012
    Inventors: Chang-Huang HUA, Ping Wei CHEN, Kevin HUANG, Benny HO, Chen-Che CHIN
  • Publication number: 20120108035
    Abstract: A method of fabricating a semiconductor device includes preparing a semiconductor wafer having a top surface and a bottom surface. The semiconductor wafer is loaded onto a wafer chuck, and the bottom surface of the loaded semiconductor wafer faces the wafer chuck. A groove is formed in the top surface of the loaded semiconductor wafer by irradiating a second laser onto the top surface, and a reforming region is formed in the loaded semiconductor wafer under the groove by irradiating a first laser through wafer chuck and bottom surface of the semiconductor wafer into a region in which the first laser is focused. The semiconductor wafer is unloaded from the wafer chuck. The bottom surface of the semiconductor wafer is ground to decrease a thickness of the semiconductor wafer. The semiconductor wafer is separated along the groove and the reforming region, thereby forming a plurality of unit chips.
    Type: Application
    Filed: September 9, 2011
    Publication date: May 3, 2012
    Inventors: Goon-Woo Kim, Heui-Seog Kim, Dong-Chun Lee, Jeong-sam Lee, Sung-Soo Lee
  • Patent number: 8168514
    Abstract: A method of separating a sheet of coated brittle material comprises the steps of providing a sheet of layered brittle material comprising a brittle layer and a coating material adhered to a surface of the brittle layer and applying a laser along a separation line in the sheet, thereby cutting the coating material and separating the brittle layer by inducing a stress fracture therein.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: May 1, 2012
    Assignee: Corning Incorporated
    Inventors: Sean Matthew Garner, Xinghua Li, Robert Stephen Wagner
  • Patent number: 8168458
    Abstract: A semiconductor wafer contains a plurality of semiconductor die each having a peripheral area around the die. A recessed region with angled or vertical sidewall is formed in the peripheral area. A conductive layer is formed in the recessed region. A first stud bump is formed over a contact pad of the semiconductor die. A second stud bump is formed over the first conductive layer within the recessed region. A bond wire is formed between the first and second stud bumps. A third stud bump is formed over the bond wire and first stud bump. A dicing channel partially formed through the peripheral area. The semiconductor wafer undergoes backgrinding to the dicing channel to singulate the semiconductor wafer and separate the semiconductor die. The semiconductor die can be disposed in a semiconductor package with other components and electrically interconnected through the bond wire and stud bumps.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: May 1, 2012
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Byung Tai Do, Reza A. Pagaila, Linda Pei Ee Chua
  • Publication number: 20120100696
    Abstract: A workpiece has a substrate and a film formed on the front side of the substrate. A first laser beam applied to the film from the front side of the workpiece along streets formed on the film, thereby forming a plurality of laser processed grooves along the streets. An adhesive tape is attached to the front side of the workpiece. Thereafter, a second laser beam is applied to the substrate from the back side of the workpiece along the streets, with the focal point of the second laser beam set inside the substrate, forming a plurality of modified layers along the streets. Thereafter, the adhesive tape is expanded to divide the substrate along the streets, thereby obtaining a plurality of individual devices. The back side of the substrate of each device is then ground to remove the modified layers and reduce the thickness of each device to a predetermined thickness.
    Type: Application
    Filed: October 18, 2011
    Publication date: April 26, 2012
    Applicant: DISCO CORPORATION
    Inventor: Masaru Nakamura
  • Publication number: 20120100695
    Abstract: A manufacturing method of a semiconductor device according to one embodiment includes attaching a front-side protecting member to a first main surface of a semiconductor wafer having an element region formed therein; laser-dicing the semiconductor wafer by applying a laser beam from a second main surface opposite to the first main surface of the semiconductor wafer; forming a backside metal film on the second main surface of the semiconductor wafer; and pressing a spherical surface against the front-side protecting member to expand the front-side protecting member and form individually divided semiconductor chips having the backside metal film attached thereto.
    Type: Application
    Filed: September 30, 2011
    Publication date: April 26, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: YASUHARU SUGAWARA, HIDEFUMI YASUDA, SHUJI ITONAGA
  • Patent number: 8158490
    Abstract: A method for producing a Group III nitride-based compound semiconductor device includes, before bonding a support substrate to an epitaxial layer formed on an epitaxial growth substrate, forming trenches in such a manner as to extend from the top surface of a stacked structure including the epitaxial layer to at least the interface between the epitaxial growth substrate and the bottom surface of the epitaxial layer. The trenches divide the epitaxial layer into extended device areas which encompass respective product device structures, and stress relaxation areas. A plurality of laser irradiations are performed for laser lift-off such that, after each laser irradiation, the expanded device areas and the stress relaxation areas are formed by a laser-irradiated area and a laser-unirradiated area, and a strip-shaped laser-unirradiated stress relaxation area is formed at a boundary between the laser-irradiated area and the laser-unirradiated area.
    Type: Grant
    Filed: March 30, 2010
    Date of Patent: April 17, 2012
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Toshiya Umemura, Masahiro Ohashi
  • Patent number: 8158493
    Abstract: Various embodiments may be used for laser-based modification of target material of a workpiece while advantageously achieving improvements in processing throughput and/or quality. Embodiments of a method of processing may include focusing and directing laser pulses to a region of the workpiece at a pulse repetition rate sufficiently high so that material is efficiently removed from the region and a quantity of unwanted material within the region, proximate to the region, or both is reduced relative to a quantity obtainable at a lower repetition rate. Embodiments of an ultrashort pulse laser system may include at least one of a fiber amplifier or fiber laser. Various embodiments are suitable for at least one of dicing, cutting, scribing, and forming features on or within a semiconductor substrate. Workpiece materials may also include metals, inorganic or organic dielectrics, or any material to be micromachined with femtosecond, picosecond, and/or nanosecond pulses.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: April 17, 2012
    Assignee: IMRA America, Inc.
    Inventors: Lawrence Shah, Gyu Cheon Cho, Jingzhou Xu
  • Publication number: 20120088354
    Abstract: In a semiconductor wafer with a supporting tape attached to the back side of the wafer, a coating member having a refractive index close to that of the supporting tape is formed on a pear-skin surface of the supporting tape to thereby planarize the pear-skin surface. Thereafter, a pulsed laser beam is applied from the upper side of the coating member to the semiconductor wafer in the condition where the focal point of the pulsed laser beam is set at a predetermined depth in the semiconductor wafer. Accordingly, the pulsed laser beam can be sufficiently focused inside the semiconductor wafer to thereby well form a modified layer inside the semiconductor wafer.
    Type: Application
    Filed: October 5, 2011
    Publication date: April 12, 2012
    Applicant: DISCO CORPORATION
    Inventor: Kenji Furuta
  • Patent number: 8153509
    Abstract: Disclosed is a method of fabricating a light emitting diode using a laser lift-off apparatus. The method includes growing an epitaxial layer including a first conductive-type compound semiconductor layer, an active layer and a second conductive-type compound semiconductor layer on a first substrate, bonding a second substrate, having a different thermal expansion coefficient from that of the first substrate, to the epitaxial layers at a first temperature of the first substrate higher than a room temperature, and separating the first substrate from the epitaxial layer by irradiating a laser beam through the first substrate at a second temperature of the first substrate higher than the room temperature but not more than the first temperature. Thus, during a laser lift-off process, focusing of the laser beam can be easily achieved and the epitaxial layers are prevented from cracking or fracture. The laser lift-off process is performed by a laser lift-off apparatus including a heater.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: April 10, 2012
    Assignee: Seoul Opto Device Co., ltd.
    Inventors: Chang Youn Kim, Joon Hee Lee, Jong Kyun You, Hwa Mok Kim
  • Patent number: 8153511
    Abstract: It is an object to improve a yield of a step of cutting off a substrate. A substrate is cut off by using an ablation process. An ablation process uses a phenomenon in which a molecular bond in a portion irradiated with a laser beam, that is, a portion which absorbs the laser beam is cut off, photodegraded, and evaporated. In other words, a substrate is irradiated with a laser beam, a molecular bond in a portion of the substrate is cut off, photodegraded, and evaporated; accordingly, a groove is formed in the substrate. A method for cutting the substrate has steps of selectively emitting a laser beam and forming a groove in the substrate, and selectively emitting a laser beam to the groove and cutting off the substrate. Methods for manufacturing a groove in a substrate and cutting off a substrate are used for manufacturing a semiconductor device.
    Type: Grant
    Filed: May 30, 2006
    Date of Patent: April 10, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daiki Yamada, Naoto Kusumoto
  • Patent number: 8148240
    Abstract: A semiconductor wafer is prepared. The wafer has a first and a second surface opposite to each other, and has a recess portion and a rim portion. The semiconductor wafer has semiconductor elements formed on the first surface. The rim portion surrounds the recess portion. The recess portion and the rim portion are composed of the first and second surfaces. The recess portion is formed so as to recede toward the first surface. A tape is adhered to the second surface of the semiconductor wafer. At least the recess portion of the semiconductor wafer is placed on a stage. The tape is sandwiched between the recess portion and the stage. Laser beam is irradiated to the recess portion from the side of the first surface and along predetermined dicing lines. The recess portion is cut off to divide the semiconductor wafer into chips.
    Type: Grant
    Filed: August 21, 2009
    Date of Patent: April 3, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Motoshige Kobayashi, Hideki Nozaki
  • Patent number: 8148184
    Abstract: An optical device wafer processing method for dividing an optical device wafer into a plurality of individual optical devices. The optical device wafer is composed of a substrate and a semiconductor layer formed on the front side of the substrate. The optical devices are partitioned by a plurality of crossing division lines formed on the semiconductor layer.
    Type: Grant
    Filed: January 24, 2011
    Date of Patent: April 3, 2012
    Assignee: Disco Corporation
    Inventors: Tasuku Koyanagi, Hiroshi Morikazu
  • Patent number: 8143141
    Abstract: A laser processing method is provided, which, when cutting a substrate formed with a multilayer part including a plurality of functional devices, makes it possible to cut the multilayer part with a high precision in particular. In a state where a protective tape 22 is attached to the front face 16a of a multilayer part 16, a substrate 4 is irradiated with laser light L while using its rear face 4b as a laser light entrance surface, so as to form a modified region 7 within the substrate 4 along a line to cut, thereby generating a fracture 24 reaching the front face 4a of the substrate 4 from a front-side end part 7a of the modified region 7. Attaching an expandable tape to the rear face 4b of the substrate 4 and expanding it in the state where such a fracture 24 is generated can cut not only the substrate 4 but also the multilayer part 16 on the line to cut, i.e., interlayer insulating films 17a, 17b, with a favorable precision along the line to cut.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: March 27, 2012
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Ryuji Sugiura, Takeshi Sakamoto
  • Patent number: 8138450
    Abstract: A method of cutting an object to be processed is provided, which can accurately cut an object to be processed comprising a substrate and a multilayer part provided on the front face of the substrate while having a plurality of functional devices into the functional devices along a line to cut in a short time even when the substrate is thick. A substrate 4 is irradiated with laser light L from the multilayer part 16 side while locating a converging point P within the substrate 4, so as to form a first modified region 71 shifted from the center position CL in the thickness direction of the substrate 4 to the rear face 21 side of the substrate 4 and a second modified region 72 shifted from the center position CL in the thickness direction of the substrate 4 to the front face 3 side of the substrate 4 within the substrate 4 along a line to cut, and generate a fracture 24 from the second modified region 72 to the front face 3 of the substrate 4.
    Type: Grant
    Filed: July 3, 2006
    Date of Patent: March 20, 2012
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Takeshi Sakamoto, Kenichi Muramatsu
  • Publication number: 20120058624
    Abstract: A method includes providing a donor substrate comprising single crystal silicon and having a surface region, a cleave region, and a thickness of material to be removed between the surface region and the cleave region. The method also includes introducing through the surface region a plurality of hydrogen particles within a vicinity of the cleave region using a high energy implantation process. The method further includes applying compressional energy to cleave the semiconductor substrate and remove the thickness of material from the donor substrate.
    Type: Application
    Filed: August 13, 2011
    Publication date: March 8, 2012
    Applicant: Silicon Genesis Corporation
    Inventor: FRANCOIS J. HENLEY
  • Patent number: 8129258
    Abstract: A method for dicing a semiconductor wafer, including: cutting a reference slot in a back main surface of the wafer; cutting a back slot in the back main surface, the back slot positioned with respect to the reference slot; determining a desired location for a chip edge with respect to the reference slot; and applying radiant energy in a path such that a series of reformed regions are formed within the wafer along the path. A crystalline structure of the wafer is modified in the series of reformed regions and an alignment of an edge of the laser is with respect to the desired location for the chip edge and in alignment with the back slot. The method includes separating the wafer along the series of reformed regions to divide portions of the wafer on either side of the series of reformed regions.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: March 6, 2012
    Assignee: Xerox Corporation
    Inventors: Paul A. Hosier, Nicholas J. Salatino
  • Patent number: 8124500
    Abstract: A laser processing method which can securely prevent particles from attaching to chips obtained by cutting a planar object is provided. When applying a stress to an object to be processed 1 through an expandable tape 23, forming materials of the object 1 (the object 1 formed with molten processed regions 13, semiconductor chips 25 obtained by cutting the object 1, particles produced from cut sections of the semiconductor chips 25, and the like) are irradiated with soft x-rays. As a consequence, the particles produced from the cut sections of the semiconductor chips 25 obtained by cutting the object 1 fall on the expandable tape 23 without dispersing randomly. This can securely prevent the particles from attaching to the semiconductor chips 25 obtained by cutting the object 1.
    Type: Grant
    Filed: May 21, 2010
    Date of Patent: February 28, 2012
    Assignee: Hamamatsu Photonics K.K.
    Inventor: Takeshi Sakamoto
  • Patent number: 8124499
    Abstract: Free standing thickness of materials are fabricated using one or more semiconductor substrates, e.g., single crystal silicon, polysilicon, silicon germanium, germanium, group III/IV materials, and others. A semiconductor substrate is provided having a surface region and a thickness. The surface region of the semiconductor substrate is subjected to a first plurality of high energy particles generated using a linear accelerator to form a region of a plurality of gettering sites within a cleave region, the cleave region being provided beneath the surface region to defined a thickness of material to be detached, the semiconductor substrate being maintained at a first temperature. The surface region of the semiconductor substrate is subjected to a second plurality of high energy particles generated using the linear accelerator, the second plurality of high energy particles being provided to increase a stress level of the cleave region from a first stress level to a second stress level.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: February 28, 2012
    Assignee: Silicon Genesis Corporation
    Inventors: Francois J. Henley, Albert Lamm, Babak Adibi
  • Patent number: 8119501
    Abstract: Provided is a method for separating a semiconductor wafer into individual semiconductor dies. The method for separating the semiconductor wafer, among other steps, may include implanting an impurity into regions of a semiconductor wafer proximate junctions where semiconductor dies join one another, the impurity configured to disrupt bonds in the semiconductor wafer proximate the junctions and lead to weakened regions. The method for separating the semiconductor wafer may further include separating the semiconductor wafer having the impurity into individual semiconductor dies along the weakened regions.
    Type: Grant
    Filed: November 16, 2009
    Date of Patent: February 21, 2012
    Assignee: Agere Systems Inc.
    Inventors: Edward B. Harris, Kurt G. Steiner
  • Patent number: 8110777
    Abstract: The present invention relates to a method of dividing a plane-parallel plate made of a brittle material into a plurality of individual plates having a specified edge length, in which break-off cuts are made along specified scored lines that form a lattice-like pattern by introducing thermally induced stresses by means of a laser beam, and in which, after making the break-off cuts along a first working direction, the resultant plate strips are spaced out at intervals in that a framed stretch film to which the plane-parallel plate is bonded is stretched by means of a vacuum device. The invention also relates to a device with a special clamping table for use in carrying out the method.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: February 7, 2012
    Assignee: JENOPTIK Automatisierungstechnik GmbH
    Inventors: Hans-Ulrich Zuehlke, Patrick Mende, Gabriele Eberhardt
  • Patent number: 8110425
    Abstract: Light-emitting devices, and related components, systems, and methods associated therewith are provided.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: February 7, 2012
    Assignee: Luminus Devices, Inc.
    Inventor: Feng Yun
  • Patent number: 8108998
    Abstract: At least one exemplary embodiment is directed to a laser cutting method where a laser beam is condensed at internal points inside a substrate forming processing regions, and where the laser is swept along a cutting line, where the cutting line is associated with a recess on the substrate and where the recess can be formed contemporaneously with the formation of the processing regions.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: February 7, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Genji Inada, Junichiro Iri, Masayuki Nishiwaki, Sadayuki Sugama
  • Publication number: 20120018854
    Abstract: A method for manufacturing a semiconductor device is provided with: a step of preparing a semiconductor wafer (22) in a state where the circumference of the semiconductor wafer, which has been divided into semiconductor device parts, is adhered on a dicing sheet (21) supported by a wafer ring (23); a step of fixing the wafer ring (23) after transferring the wafer ring to a table (14) where laser printing is to be performed; and a step of marking on the main surface where the semiconductor material of the semiconductor device parts which configure the semiconductor wafer (22) is exposed, by radiating laser beams through the dicing sheet and an adhesive layer.
    Type: Application
    Filed: February 25, 2010
    Publication date: January 26, 2012
    Inventors: Takanori Kato, Isao Nakatsuka
  • Patent number: 8101504
    Abstract: A semiconductor chip fabrication method including a modified layer forming step of applying a laser beam having a transmission wavelength to the semiconductor wafer from the back side of the semiconductor wafer along the streets formed on the front side of the semiconductor wafer so that a focal point of the laser beam is set inside the semiconductor wafer, thereby forming a modified layer in the semiconductor wafer along each street, a metal film deposition step of depositing a metal film on the back side of the semiconductor wafer after the modified layer forming step, a semiconductor wafer attaching step of attaching the semiconductor wafer to an adhesive tape supported to an annular frame, and a semiconductor wafer dividing step of applying an external force to the semiconductor wafer in the condition where the semiconductor wafer is attached to the adhesive tape to thereby divide the semiconductor wafer with the metal film into the individual semiconductor chips along the modified layer formed along each
    Type: Grant
    Filed: February 18, 2009
    Date of Patent: January 24, 2012
    Assignee: Disco Corporation
    Inventor: Tadato Nagasawa
  • Patent number: 8097525
    Abstract: A semiconductor structure includes at least one silicon substrate having first and second planar surfaces, and at least one through silicon via filled with a conductive material and extending vertically through the first planar surface of the at least one silicon substrate to the second planar surface thereof. The through silicon via forms a vertical interconnection between a plurality of electronic circuits and an amount of dielectric insulation surrounding the through silicon via is varied based on a defined function of the through silicon via.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: January 17, 2012
    Assignee: International Business Machines Corporation
    Inventors: John E. Barth, Jr., Kerry Bernstein
  • Publication number: 20120009763
    Abstract: A method for manufacturing semiconductor chips from a semiconductor wafer, including the steps of: a) arranging the wafer on a surface of an elastic film stretched on a first support frame having dimensions much greater than the wafer dimensions, so that, in top view, a ring-shaped film portion separates this outer contour from the inner contour of the frame; b) performing manufacturing operations by using equipment capable of receiving the first frame; c) arranging, on the ring-shaped film portion, a second frame of outer dimensions smaller than the inner dimensions of the first frame; d) cutting the film between the outer contour of the second frame and the inner contour of the first frame and removing the first frame; and e) performing manufacturing operations by using equipment capable of receiving the second frame.
    Type: Application
    Filed: May 11, 2011
    Publication date: January 12, 2012
    Applicant: STMicroelectronics (Tours) SAS
    Inventor: Vincent Jarry
  • Patent number: 8084334
    Abstract: To divide a semiconductor wafer by stealth dicing, a test pad in a cutting region and an alignment target are collectively arranged along one side in a width direction of the cutting region, and a laser beam for forming a modified region is irradiated to a position away in plane from the test pad and the alignment target Am. In this manner, defects in cutting shape in a cutting process of a semiconductor wafer using stealth dicing can be reduced or prevented.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: December 27, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Yoshiyuki Abe, Chuichi Miyazaki, Hideo Mutou, Tomoko Higashino
  • Patent number: 8084333
    Abstract: An object cutting method which can reliably remove particles remaining on cut sections of chips is provided. An expandable tape 23 is electrically charged in a state where a plurality of semiconductor chips 25 obtained by cutting a planar object to be processed along a line to cut are separated from each other on the expandable tape 23. This electric action causes particles remaining on cut sections of the semiconductor chips 25 to eject therefrom even when a molten processed region is formed in the cut sections. Therefore, particles remaining on the cut sections of the chips 25 can reliably be removed.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: December 27, 2011
    Assignee: Hamamatsu Photonics K.K.
    Inventor: Takeshi Sakamoto
  • Publication number: 20110312115
    Abstract: Provided is a laser machining method in which, when modified regions are formed plural number of times by changing the depth in the thickness direction of a substrate, displacement of the formed modified regions from a planned cutting line is inhibited. Specifically provided is a laser machining method for cutting a substrate (10) into chips. Modified regions are formed at a deep distance (d1) inside the substrate from the entrance surface of a laser beam by first scanning (a) in which the substrate is scanned with the laser beam along a planned cutting line (21a) in the X direction of the substrate and second scanning (b) in which the substrate is scanned with the laser beam along a planned cutting line (21b) in the Y direction.
    Type: Application
    Filed: February 25, 2010
    Publication date: December 22, 2011
    Applicant: SHOWA DENKO K.K.
    Inventor: Kazuhiro Kato
  • Publication number: 20110312158
    Abstract: A method and apparatus for dividing a thin film device having a first layer which is a lower electrode layer, a second layer which is an active layer and a third layer which is an upper electrode layer, the layers each being continuous over the device, into separate cells which are electrically interconnected in series.
    Type: Application
    Filed: July 15, 2011
    Publication date: December 22, 2011
    Inventor: Adam North Brunton
  • Publication number: 20110298095
    Abstract: Embodiments of the invention provide a semiconductor chip having a passivation layer extending along a surface of a semiconductor substrate to an edge of the semiconductor substrate, and methods for their formation. One aspect of the invention provides a semiconductor chip comprising: a semiconductor substrate; a passivation layer including a photosensitive polyimide disposed along a surface of the semiconductor substrate and extending to at least one edge of the semiconductor substrate; and a channel extending through the passivation layer to the surface of the semiconductor substrate.
    Type: Application
    Filed: June 8, 2010
    Publication date: December 8, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Timothy H. Daubenspeck, Ekta Misra, Marie-Claude Paquet, Francis Santerre, Wolfgang Sauter
  • Publication number: 20110300692
    Abstract: The present invention relates to a method for dividing a semiconductor film formed on a substrate into plural regions by multiple laser beam irradiation using a sequence of at least two laser beam treatments affecting essentially a same area of said film. Except of a final laser beam treatment, the treatments of said sequence of at least two laser beam treatments are used for a conditioning of the treated film area which is to be removed. Said final laser beam treatment is applied to actually remove material in order to form a groove. Further, the invention relates to an arrangement for dividing a semiconductor film formed on a substrate into plural regions by multiple laser beam irradiation using a sequence of at least two laser beam treatments affecting essentially a same area of said film.
    Type: Application
    Filed: October 20, 2009
    Publication date: December 8, 2011
    Applicant: OERLIKON SOLAR AG, TRUBBACH
    Inventors: Jens Günster, Ivan Sinicco
  • Patent number: 8071464
    Abstract: A light emitting device manufacturing method including the steps of corrugatedly scanning a laser beam along a plurality of division lines formed on a light emitting device wafer having a sapphire substrate layer and a light emitting layer to apply the laser beam to the sapphire substrate layer, thereby performing laser processing for the sapphire substrate layer and next applying an external force to a processed locus formed along each division line by the above laser processing to thereby divide the light emitting device wafer into a plurality of light emitting devices. The sapphire layer of each light emitting device has side surfaces whose horizontal sectional shape is a corrugated shape. Accordingly, the number of total reflections on the side surfaces of the sapphire layer can be reduced to thereby achieve efficient emergence of light from the sapphire layer.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: December 6, 2011
    Assignee: Disco Corporation
    Inventor: Tomohiro Endo
  • Publication number: 20110291111
    Abstract: A chip size package includes: a radio frequency substrate having a radio frequency semiconductor circuit formed on a principal surface; a semiconductor cover substrate arranged at a position facing the principal surface of the radio frequency substrate; and a joining frame arranged in a manner such as to surround the radio frequency semiconductor circuit between the radio frequency substrate and the semiconductor cover substrate, the joining frame joining the radio frequency substrate and the semiconductor cover substrate, wherein: the radio frequency substrate further has a wire formed on a surface opposite to the principal surface; and the radio frequency semiconductor circuit and the wire are electrically connected to each other through a via hole penetrating through the radio frequency substrate in a thickness direction thereof.
    Type: Application
    Filed: August 10, 2011
    Publication date: December 1, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Shuichi NAGAI, Takeshi FUKUDA, Hiroyuki SAKAI
  • Patent number: 8063452
    Abstract: A gate insulating film having a high dielectric constant, a semiconductor device provided with the gate insulating film, and a method for manufacturing such film and device are provided. The semiconductor device is provided with a group 14 (IVA) semiconductor board and a first oxide layer. The first oxide layer is composed of MO2 existing on the board, where M is a first metal species selected from the group 4 (IVB); and M?xOy, where M? is a second metal species selected from the group 3 (IIIB) and a group composed of lanthanide series, and x and y are integers decided by the oxidation number of M.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: November 22, 2011
    Assignee: The University of Tokyo
    Inventors: Akira Toriumi, Koji Kita, Kazuyuki Tomida, Yoshiki Yamamoto
  • Patent number: 8062960
    Abstract: The present invention provides a method of manufacturing a compound semiconductor device capable of improving yield when a wafer is divided into device regions. The method of manufacturing a compound semiconductor device includes a division step. The division step includes: a first division step of dividing a wafer 30 in a first direction ? to obtain first strip wafers each having at least two rows of device portions 10 arranged in the first direction ?; a second division step of dividing the first strip wafer in a second direction ? to obtain second strip wafers each having a row of the device portions 10 arranged in the second direction ?; and a third division step of dividing the second strip wafer into the device portions 10, thereby forming compound semiconductor devices including the device portions 10.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: November 22, 2011
    Assignee: Showa Denko K.K.
    Inventor: Kazuhiro Kato
  • Patent number: 8062961
    Abstract: Provided is a method for manufacturing a semiconductor device which includes: forming a removal layer over a base (support base); forming an interconnect layer over the removal layer; mounting semiconductor chip(s) over the interconnect layer; and separating the base from the interconnect layer while inducing the separation so as to originate from the removal layer, by irradiating a laser having a wavelength transparent with respect to the support base from the back side thereof, selectively to an unmounted region having no semiconductor chip(s) mounted thereon.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: November 22, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Norikazu Motohashi
  • Publication number: 20110275193
    Abstract: A method and apparatus for dividing a thin film device having a first layer which is a lower electrode layer, a second layer which is an active layer and a third layer which is an upper electrode layer, the layers each being continuous over the device, into separate cells which are electrically interconnected in series.
    Type: Application
    Filed: April 15, 2010
    Publication date: November 10, 2011
    Inventor: Adam North Brunton
  • Patent number: 8053337
    Abstract: In a method of manufacturing a semiconductor device, a first groove and a second groove each having a width less than that of a scribe line are formed along the scribe line in a first protective film provided below a second protective film which protects element forming regions when a wafer is divided into parts by a laser dicing, and the first groove and the second groove are filled with the second protective film. Then, the laser dicing is performed on a region between the first groove and the second groove along the scribe line from the surface where the second protective film is formed to form a cutting groove that reaches at least a predetermined depth of the multi-layer interconnect.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: November 8, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Takamitsu Noda
  • Patent number: 8048780
    Abstract: A method of dividing an optical device wafer includes: a laser beam processing step of performing laser beam processing on the face side of an optical device wafer so as to form breakage starting points along streets; a protective plate bonding step of bonding the face side of the optical device wafer to a surface of a highly rigid protective plate with a bonding agent permitting peeling; a back side grinding step of grinding the back side of the optical device wafer so as to form the optical device wafer to a finished thickness of optical devices; a dicing tape adhering step of adhering the back-side surface of the optical device wafer to a dicing tape; a cut groove forming step of cutting the protective plate bonded to the optical device wafer along the streets so as to form cut grooves; and a wafer dividing step of exerting an external force on the optical device wafer through the protective plate, so as to break up the optical device wafer along the breakage starting points formed along the streets, there
    Type: Grant
    Filed: July 6, 2009
    Date of Patent: November 1, 2011
    Assignee: Disco Corporation
    Inventors: Hitoshi Hoshino, Takashi Yamaguchi