Abstract: A laser processing apparatus includes: a laser light source that generates a laser beam; a first beam splitter on which the laser beam is incident; a second beam splitter on which the laser beam having passed through the first beam splitter is incident; and a homogenizer that controls an energy density of the laser beam emitted from the second beam splitter. The laser beam output from the homogenizer includes a p-polarized component and an s-polarized component, and a ratio of energy intensity of the p-polarized component to the s-polarized component is preferably not lower than 0.74 and not higher than 1.23 on a surface of the workpiece.

Abstract: An ion implantation system is provided having an ion source configured to form an ion beam from aluminum iodide. A beamline assembly selectively transports the ion beam to an end station configured to accept the ion beam for implantation of aluminum ions into a workpiece. The ion source has a solid-state material source having aluminum iodide in a solid form. A solid source vaporizer vaporizes the aluminum iodide, defining gaseous aluminum iodide. An arc chamber forms a plasma from the gaseous aluminum iodide, where arc current from a power supply is configured to dissociate aluminum ions from the aluminum iodide. One or more extraction electrodes extract the ion beam from the arc chamber. A water vapor source further introduces water to react residual aluminum iodide to form hydroiodic acid, where the residual aluminum iodide and hydroiodic acid is evacuated from the system.

Abstract: An ion implantation system is provided having an ion source configured to form an ion beam from aluminum iodide. A beamline assembly selectively transports the ion beam to an end station configured to accept the ion beam for implantation of aluminum ions into a workpiece. An arc chamber forms a plasma from the aluminum iodide, where arc current from a power supply is configured to dissociate aluminum ions from the aluminum iodide. One or more extraction electrodes extract the ion beam from the arc chamber. A hydrogen co-gas source further introduces a hydrogen co-gas to react residual aluminum iodide and iodide, where the reacted residual aluminum iodide and iodide is evacuated from the system.

Abstract: Disclosed is a method of fabricating a semiconductor device. The method comprises stacking an etching target layer, a first mask layer, an under layer, and a photoresist layer on a substrate, irradiating extreme ultraviolet (EUV) radiation on the photoresist layer to form a photoresist pattern, and performing a nitrogen plasma treatment on the photoresist pattern while using the first mask layer as an etching stop layer, the performing continuing until a top surface of the first mask layer is exposed. During the performing, the under layer is etched to form an under pattern below the photoresist pattern.

Abstract: The present invention describes a process to modify a top portion of a porous ultra low-k (ULK) material in order to maximize porosity filling with a filling material that initially displayed low compatibility with the ULK material. Surface modification is achieved by a plasma treatment, enhancing the compatibility between the ULK surface and the filling material. The invention obtains high filling levels with minimum modification to the ULK material, as only a thin top portion is modified without significant pore sealing.

Abstract: According to one embodiment, a semiconductor device manufacturing method includes depositing a silicon film above a semiconductor substrate, forming an insulating film which includes silicon oxide or silicon nitride on the silicon film, forming a physical guide having a depressed portion above the insulating film, forming a directed self-assembly material layer which includes a first polymer and a second polymer in the depressed portion of the physical guide, phase-separating the directed self-assembly material layer into a first region which includes the first polymer and a second region which includes the second polymer, removing the second region, processing the insulating film by using the physical guide and the first region as masks, and transferring a pattern corresponding to the second region to the insulating film. Further, the silicon film is processed by using the pattern transferred onto the insulating film as a mask.

Abstract: An insulating layer containing a silicon peroxide radical is used as an insulating layer in contact with an oxide semiconductor layer for forming a channel. Oxygen is released from the insulating layer, whereby oxygen deficiency in the oxide semiconductor layer and an interface state between the insulating layer and the oxide semiconductor layer can be reduced. Accordingly, a semiconductor device where reliability is high and variation in electric characteristics is small can be manufactured.

Abstract: A method for automatically detecting fault conditions and classifying the fault conditions during substrate processing is provided. The method includes collecting processing data by a set of sensors during the substrate processing. The method also includes sending the processing data to a fault detection/classification component. The method further includes performing data manipulation of the processing data by the fault detection/classification component. The method yet also includes executing a comparison between the processing data and a plurality of fault models stored within a fault library. Each fault model of the plurality of fault models represents a set of data characterizing a specific fault condition. Each fault model includes at least a fault signature, a fault boundary, and a set of principal component analysis (PCA) parameters.

Abstract: A method of manufacturing a semiconductor apparatus is disclosed. A first-type doped layer, a second-type doped layer, and an internal electrical connection layer are formed. The internal electrical connection layer is deposited and electrically coupled between the first-type doped layer and the second-type doped layer. In one embodiment, the internal electrical connection layer is formed by using a group IV based precursor and nitrogen based precursor. In another embodiment, the internal electrical connection layer is formed by a mixture comprising a carbon-contained doping source, and the internal electrical connection layer has a carbon concentration greater than 1017 atoms/cm3. In a further embodiment, the internal electrical connection layer is formed at a temperature lower than those of the first-type doped layer and the second-type doped layer.

Abstract: Methods for performing post etch treatments on silicon surfaces etched using halogen chemistry are provided. The methods may be performed in-situ a chamber in which the silicon surfaces where etch, ex-situ the chamber, or in a hybrid process that combines both in-situ and ex-situ post etch treatment processes. In one embodiment the post etch treatment process includes exposing a substrate having a silicon surface etched using halogen chemistry to a gas mixture comprising CxHy and oxygen, wherein x and y are integers, forming a plasma from the gas mixture, binding halogen residues with species comprising the plasma to form non-volatile halogen containing elements, and pumping the non-volatile halogen containing elements from a chamber containing the substrate.

Abstract: A method for fabricating a semiconductor device include forming devices on a front side of a semiconductor substrate, forming a hydrogen-containing layer on a back side of the semiconductor substrate, forming an outgassing prevention layer over the hydrogen-containing layer, and performing a hydrogen treatment process to diffuse hydrogen, contained in the hydrogen-containing layer, into the semiconductor substrate.

Abstract: Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools.

Abstract: An epitaxial growth method includes plasma treating a surface of a bulk crystalline Aluminum Nitride (AlN) substrate and subsequently heating the substrate in an ammonia-rich ambient to a temperature of above 1000° C. for at least 5 minutes without epitaxial growth. After heating the surface, a III-nitride layer is epitaxially grown on the surface.

Abstract: Compressively strained silicon is epitaxially grown directly onto a silicon substrate at low temperature using hydrogen to engineer the strain level. Hydrogen dilution may be varied during such growth to provide a strain gradient.

Abstract: A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bonding of materials such as silicon, silicon nitride and SiO2. The surfaces to be bonded are polished to a high degree of smoothness and planarity. VSE may use reactive ion etching or wet etching to slightly etch the surfaces being bonded. The surface roughness and planarity are not degraded and may be enhanced by the VSE process. The etched surfaces may be rinsed in solutions such as ammonium hydroxide or ammonium fluoride to promote the formation of desired bonding species on the surfaces.

Abstract: Various methods for implanting dopant ions into a three dimensional feature of a semiconductor wafer are disclosed. The implant temperature may be varied to insure that the three dimensional feature, after implant, has a crystalline inner core, which is surrounded by an amorphized surface layer. The crystalline core provides a template from which the crystalline structure for the rest of the feature can be regrown. In some embodiments, the implant energy and the implant temperature may each be modified to achieve the desired crystalline inner core with the surrounding amorphized surface layer.

Abstract: The invention offers a method of producing a semiconductor device that can suppress the worsening of the property due to surface roughening of a wafer by sufficiently suppressing the surface roughening of the wafer in the heat treatment step and a semiconductor device in which the worsening of the property caused by the surface roughening is suppressed. The method of producing a MOSFET as a semiconductor device is provided with a step of preparing a wafer 3 made of silicon carbide and an activation annealing step that performs activation annealing by heating the wafer 3. In the activation annealing step, the wafer 3 is heated in an atmosphere containing a vapor of silicon carbide generated from the SiC piece 61, which is a generating source other than the wafer 3.

Abstract: [Problem] To provide a substrate bonding technique having a wide range of application. [Solution] A silicon thin film is formed on a bonding surface, and the interface with the substrate is surface-treated using energetic particles/metal particles.

Abstract: A method for fabricating a semiconductor device include forming devices on a front side of a semiconductor substrate, forming a hydrogen-containing layer on a back side of the semiconductor substrate, forming an outgassing prevention layer over the hydrogen-containing layer, and performing a hydrogen treatment process to diffuse hydrogen, contained in the hydrogen-containing layer, into the semiconductor substrate.

Abstract: In semiconductor devices, integrity of a titanium nitride material may be increased by exposing the material to an oxygen plasma after forming a thin silicon nitride-based material. The oxygen plasma may result in an additional passivation of any minute surface portions which may not be appropriately covered by the silicon nitride-based material. Consequently, efficient cleaning recipes, such as cleaning processes based on SPM, may be performed after the additional passivation without undue material loss of the titanium nitride material. In this manner, sophisticated high-k metal gate stacks may be formed with a very thin protective liner material on the basis of efficient cleaning processes without unduly contributing to a pronounced yield loss in an early manufacturing stage.

Abstract: A method for manufacturing a semiconductor device according to the invention irradiates a first pulse laser beam with an irradiation energy density of 1.0 J/cm2 or higher to blow off particles on the surface of wafer in activating an impurity layer positioned at a shallow location from the surface of wafer such as p+-type collector layer in an FS-type IGBT or in an NPT-type IGBT. By irradiating a second laser beam, region, on which particles were, is activated in the same manner as the region, on which particles are not, and p+-type collector layer is formed uniformly. The manufacturing method according to the invention facilitates preventing nonuniform laser beam irradiation from causing in laser annealing and preventing defective devices from causing.

Abstract: An object is to provide a semiconductor device with a novel structure and favorable characteristics. A semiconductor device includes an oxide semiconductor layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode, and the drain electrode, and a gate electrode over the gate insulating layer. The source electrode and the drain electrode include an oxide region formed by oxidizing a side surface thereof. Note that the oxide region of the source electrode and the drain electrode is preferably formed by plasma treatment with a high frequency power of 300 MHz to 300 GHz and a mixed gas of oxygen and argon.

Abstract: A method for manufacturing includes the steps of forming a BCB resin region on a semiconductor optical device; processing a surface of the BCB resin region with inductively coupled plasma produced with a high-frequency power supply for supplying ICP power and a high-frequency power supply for supplying bias power, thus forming a silicon oxide film on the surface of the BCB resin region and roughening the surface of the BCB resin region with projections and recesses; and forming an electrode pad on the surface of the BCB resin region in direct contact with the silicon oxide film. The surface roughness of the BCB resin region and the thickness of the silicon oxide film on the surface of the BCB resin region are controlled by adjusting the bias power and the ICP power.

Abstract: A method for depositing material on a substrate is described. The method comprises directionally depositing a thin film on one or more surfaces of a substrate using a gas cluster ion beam (GCIB) formed from a source of precursor to the thin film, wherein the deposition occurs on surfaces oriented substantially perpendicular to the direction of incidence of the GCIB, and deposition is substantially avoided on surfaces oriented substantially parallel to the direction of incidence.

Abstract: An object is to provide a method for manufacturing a semiconductor device which suppresses an influence on a semiconductor element due to entry of an impurity element, moisture, or the like from outside even in the case of thinning or removing a substrate after forming a semiconductor element over the substrate. A feature is to form an insulating film functioning as a protective film on at least one side of the substrate by performing surface treatment on the substrate, to form a semiconductor element such as a thin film transistor over the insulating film, and to thin the substrate. As the surface treatment, addition of an impurity element or plasma treatment is performed on the substrate. As a means for thinning the substrate, the substrate can be partially removed by performing grinding treatment, polishing treatment, or the like on the other side of the substrate.

Abstract: The invention relates to a method for forming a pattern on a substrate (S) with an upper surface and a lower surface which comprises the steps of depositing a first layer (E1) of an opaque material on the upper surface of the substrate (S), depositing a photosensitive layer (R) such that part of the photosensitive layer (R) covers at least part of the first layer (E1), exposing the photosensitive layer (R) to a light beam (L), the light beam (L) impinging on the lower surface of the substrate (S) under an oblique angle (?) of incidence, removing the exposed region of the photosensitive layer (R), depositing a second layer (E2) of an opaque material such that part of the second layer (E2) covers a remaining region of the photosensitive layer (R), and removing at least a part of the remaining region of the photosensitive layer (R).

Abstract: A device and a device manufacturing process. First, a gettering layer is formed on the bottom surface of a silicon substrate. Gates having a MOS structure are then formed on the principal surface of the silicon substrate, and the gettering layer is removed. According to this manufacturing method, the formation of the gates having a MOS structure is performed such that the gettering layer getters dissolved oxygen present in the silicon substrate. This reduces the concentration of dissolved oxygen in the silicon substrate, resulting in improved device characteristics.

Abstract: An object is to provide a manufacturing method of a semiconductor substrate provided with a single crystal semiconductor layer with a surface having a high degree of flatness. Another object is to manufacture a semiconductor device with high reliability by using the semiconductor substrate provided with a single crystal semiconductor layer with a high degree of flatness. In a manufacturing process of a semiconductor substrate, a thin embrittled region containing a large crystal defect is formed in a single crystal semiconductor substrate at a predetermined depth by subjecting the single crystal semiconductor substrate to a rare gas ion irradiation step, a laser irradiation step, and a hydrogen ion irradiation step. Then, by performing a separation heating step, a single crystal semiconductor layer that is flatter on a surface side than the embrittled region is transferred to a base substrate.

Abstract: An electrode assembly for a plasma reaction chamber used in semiconductor substrate processing. The assembly includes an upper showerhead electrode which includes an inner electrode mechanically attached to a backing plate by a clamp ring and an outer electrode attached to the backing plate by a series of spaced apart cam locks. A guard ring surrounds the backing plate and is movable to positions at which openings in the guard ring align with openings in the backing plate so that the cam locks can be rotated with a tool to release cam pins extending upward from the upper face of the outer electrode. To compensate for differential thermal expansion, the clamp ring can include expansion joins at spaced locations which allow the clamp ring to absorb thermal stresses.

Abstract: A method of producing an epitaxial substrate for a solid-state imaging device, comprising: forming a gettering sink by injecting laser beam to a semiconductor substrate through one surface thereof, condensing the laser beam to an arbitrarily selected portion of the semiconductor substrate, thereby causing multi-photon absorption process to occur in the portion, and forming a gettering sink having a modified crystal structure; and epitaxially growing at least two epitaxial layers on the semiconductor substrate in which the gettering sink is formed.

Abstract: Disclosed are methods of operation to grow, modify, deposit, or dope a layer upon a substrate using a multi-nozzle and skimmer assembly for introducing a process gas mixture, or multiple process gases mixtures, in a gas cluster ion beam (GCIB) system. Also disclosed is a method of forming a shallow trench isolation (STI) structure on a substrate, for example, an SiO2 STI structure, using a multiple nozzle system with two separate gas supplies, for example providing a silicon-containing gas and an oxygen-containing gas.

Abstract: A substrate carrier structure includes a tray and a secondary electron absorbing material. The tray holds a semiconductor substrate having a first surface on which semiconductor device elements are formed. The secondary electron absorbing material is interposed between the tray and this first surface of the semiconductor substrate. When the semiconductor substrate is irradiated with charged particles to form lattice defects, the secondary electron absorbing material prevents unwanted trapping of secondary electrons emitted from the tray, and thereby reduces the variability of electrical characteristics of semiconductor device elements formed on the semiconductor substrate.

Abstract: Method for producing nanostructures comprising: a step of providing a substrate (100) having a buried barrier layer (2) and above said barrier layer (2) a crystalline film (5) provided with a network of crystalline defects and/or stress fields (12) in a crystalline zone (13), one or several steps of attacking the substrate (100), of which a preferential attack either of the crystalline defects and/or the stress fields, or the crystalline zone (13) between the crystalline defects and/or the stress fields, said attack steps enabling the barrier layer (2) to be laid bared locally and protrusions (7) to be formed on a nanometric scale, separated from each other by hollows (7.1) having a base located in the barrier layer, the protrusions leading to nanostructures (7, 8).

Abstract: Embodiments of methods for improving electrical leakage performance and minimizing electromigration in semiconductor devices are generally described herein. Other embodiments may be described and claimed.

Abstract: A semiconductor device manufacturing method is provided, including: providing a semiconductor substrate, forming on the semiconductor substrate a layer including a semiconductor compound and a dope additive, and thereafter forming an emitter region and gettering impurities by annealing the semiconductor substrate including the layer.

Abstract: A method for producing a buried n-doped semiconductor zone in a semiconductor body. In one embodiment, the method includes producing an oxygen concentration at least in the region to be doped in the semiconductor body. The semiconductor body is irradiated via one side with nondoping particles for producing defects in the region to be doped. A thermal process is carried out. The invention additionally relates to a semiconductor component with a field stop zone.

Abstract: To suppress an effect of metal contamination caused in manufacturing an SOI substrate. After forming a damaged region by irradiating a semiconductor substrate with hydrogen ions, the semiconductor substrate is bonded to a base substrate. Heat treatment is performed to cleave the semiconductor substrate; thus an SOI substrate is manufactured. Even if metal ions enter the semiconductor substrate together with the hydrogen ions in the step of hydrogen ion irradiation, the effect of metal contamination can be suppressed by the gettering process. Accordingly, the irradiation with hydrogen ions can be performed positively by an ion doping method.

Abstract: When manufacturing a bonded substrate using an insulator substrate as a handle wafer, there is provided a method for manufacturing a bonded substrate which can be readily removed after carried and after mounted by roughening a back surface of the bonded substrate (corresponding to a back surface of the insulator substrate) and additionally whose front surface can be easily identified like a process of a silicon semiconductor wafer in case of the bonded substrate using a transparent insulator substrate as a handle wafer. There is provided a method for manufacturing a bonded substrate in which an insulator substrate is used as a handle wafer and a donor wafer is bonded to a front surface of the insulator substrate, the method comprises at least that a sandblast treatment is performed with respect to a back surface of the insulator substrate.

Abstract: The invention relates to a method for preparing a surface of a semiconductor substrate by oxidizing the surface of the semiconductor substrate to thereby transform the natural oxide into an artificial oxide and then removing the artificial oxide, in particular to obtain an oxide-free substrate surface.

Abstract: An SOI substrate having an SOI layer that can be used in practical applications even when a substrate with low upper temperature limit, such as a glass substrate, is used, is provided. A semiconductor device using such an SOI substrate, is provided. In bonding a single-crystal semiconductor layer to a substrate having an insulating surface or an insulating substrate, a silicon oxide film formed using organic silane as a material on one or both surfaces that are to form a bond is used. According to the present invention, a substrate with an upper temperature limit of 700° C. or lower, such as a glass substrate, can be used, and an SOI layer that is strongly bonded to the substrate can be obtained. In other words, a single-crystal semiconductor layer can be formed over a large-area substrate that is longer than one meter on each side.

Abstract: An object is to provide a manufacturing method of a semiconductor substrate provided with a single crystal semiconductor layer with a surface having a high degree of flatness. Another object is to manufacture a semiconductor device with high reliability by using the semiconductor substrate provided with a single crystal semiconductor layer with a high degree of flatness. In a manufacturing process of a semiconductor substrate, a thin embrittled region containing a large crystal defect is formed in a single crystal semiconductor substrate at a predetermined depth by subjecting the single crystal semiconductor substrate to a rare gas ion irradiation step, a laser irradiation step, and a hydrogen ion irradiation step. Then, by performing a separation heating step, a single crystal semiconductor layer that is on a surface side than the embrittled region is transferred to a base substrate.

Abstract: The invention relates to a method of fabricating a release substrate produced from semiconductor materials, the method comprising creating a reversible connection between two substrate release layers characterized in that the reversible connection is formed by a connecting layer produced using a first material as the basis, the connecting layer further comprising a nanoparticle concentrating zone of a second material disposed to facilitate release of the substrate, the first and second materials being selected to maintain the bonding energy of the reversible connection substantially constant even when the substrate is exposed to heat treatment.

Abstract: In a method for producing a bonded wafer by bonding a wafer for active layer and a wafer for support layer and thinning the wafer for active layer according to the invention, oxygen ions are implanted into the wafer for active layer at a state of holding a temperature of the wafer for active layer below 200° C. under a dose of 5×1015 to 5×1016 atoms/cm2, whereby there can be obtained a bonded wafer being excellent in the thickness uniformity after thinning and having a dramatically improved surface roughness.

Abstract: A dehydrogenation treatment method which includes forming a hydrogenated amorphous silicon film above a non-heat-resistant substrate, and eliminating bonded hydrogen from the hydrogenated amorphous silicon film by irradiating an atmospheric thermal plasma discharge to the hydrogenated amorphous silicon film for a time period of 1 to 500 ms. The surface of the substrate is heated at a temperature of 1000 to 2000° C. by irradiating the atmospheric thermal plasma discharge.

Abstract: Embodiments of methods for improving electrical leakage performance and minimizing electromigration in semiconductor devices are generally described herein. Other embodiments may be described and claimed.

Abstract: A method for generating radiation in a range of desired wavelengths in a direction of emission is provided. According to the method, initial radiation is produced by a radiation source, the wavelengths thereof including the desired range, and the initial radiation is filtered in such a way as to substantially eliminate the initial radiation beams having a wavelength outside the desired range. The inventive method is characterized in that the filtering is carried out by setting up a controlled distribution of the refractive index of the beams in a control region through which the initial radiation passes, in such a way as to selectively deviate the beams of the initial radiation according to the wavelength thereof and to recover the beams having desired wavelengths. The invention also relates to an associated device.

Abstract: A design structure is provided for a semiconductor device having radiation hardened buried insulators and isolation insulators in SOI technology. The device includes a first structure and a second structure. The first structure includes: a radiation hardened BOX layer under an active device layer; radiation hardened shallow trench isolation (STI) structures between active regions of the active device layer and above the radiation hardened BOX layer; metal interconnects in one or more interlevel dielectric layers above gates structures of the active regions. The second structure is bonded to the first structure. The second structure includes: a Si based substrate; a BOX layer on the substrate; a Si layer with active regions on the BOX; oxide filled STI structures between the active regions of the Si layer; and metal interconnects in one or more interlevel dielectric layers above gates structures. At least one metal interconnect is electrically connecting the first structure to the second structure.

Abstract: A method is provided for fabricating a semiconductor device and more particularly to a method of manufacturing a semiconductor device having radiation hardened buried insulators and isolation insulators in SOI technology. The method includes removing a substrate from an SOI wafer and selectively removing a buried oxide layer formed as a layer between the SOI wafer and active regions of a device. The method further comprises selectively removing isolation oxide formed between the active regions, and replacing the removed buried oxide layer and the isolation oxide with radiation hardened insulators.

Abstract: Even if an oxygen ion implanted layer in a wafer for active layer is not a completely continuous SiO2 layer but a layer mixed partially with Si or SiOx, it is removed by here is provided a method for producing a bonded wafer in which it is possible to remove an oxygen ion implanted layer effectively as it is by repetitive treatment with an oxidizing solution and HF solution at a step of removing the oxygen ion implanted layer in a bonded wafer.

Abstract: A system for shielding personnel and/or equipment from radiation particles. In one embodiment, a first substrate is connected to a first array or perpendicularly oriented metal-like fingers, and a second, electrically conducting substrate has an array of carbon nanostructure (CNS) fingers, coated with an electro-active polymer extending toward, but spaced apart from, the first substrate fingers. An electric current and electric charge discharge and dissipation system, connected to the second substrate, receives a current and/or voltage pulse initially generated when the first substrate receives incident radiation. In another embodiment, an array of CNSs is immersed in a first layer of hydrogen-rich polymers and in a second layer of metal-like material. In another embodiment, a one- or two-dimensional assembly of fibers containing CNSs embedded in a metal-like matrix serves as a radiation-protective fabric or body covering.