Abstract: A surface of a substrate is coated with a coating agent to form a coating film. The coating agent contains a material capable of generating moisture (for example, hydrogen-silsesquioxane or hydroxysilazane) and an additive capable of generating a gas by reaction with the moisture thus generated (for example, a material containing an isocyanate group). By heat-treatment of the substrate, moisture is generated from the coating film and a gas is discharged from the coating film by reaction between the moisture thus generated and the additive, to form fine voids in the coating film. Such a coating film is converted into a dielectric film having a low dielectric constant.

Abstract: A method of removing metallic impurities diffused in a semiconductor substrate, comprising, the semiconductor-substrate-heating step of heating a semiconductor substrate to at least 200.degree. C. or higher and promoting the release and rediffusion of metallic impurities diffused in the semiconductor substrate, and the metallic-impurity-removing step of dissolving the metallic impurities arrived at the surface of the semiconductor substrate with a chemical agent and removing them from the substrate.

Abstract: On the back side of a base body, three layers of polysilicon layer are formed. These polysilicon layers contain boron. A boron concentration C.sub.B(1), C.sub.B(2) and C.sub.B(3) of the first, second and third polysilicon layers from the base body side have a relationship of C.sub.B(1) .ltoreq.C.sub.B(2) .ltoreq.C.sub.B(3). On the other hand, between the polysilicon layers, silicon oxide layers are formed respectively. Upon fabrication of a semiconductor device, at first, a gettering heat treatment is effected for the substrate under a given condition. Thus, contaminating impurity is captured at the grain boundary of polysilicon layers formed on the back side of the base body. Next, the polysilicon formed at the most back side is removed by etching. By this, contaminated impurity is removed from the semiconductor substrate.

Abstract: The present invention provides the broad concept of increasing product performance and reliability by causing the ion contaminants to migrate to a region of the semiconductor film and removing that region (containing a concentration of the ion contaminants), thus reducing a total concentration of the ion contaminants in the semiconductor film. Since a concentration of ion contaminants may adversely affect performance and reliability of devices manufactured from semiconductor films having the ion contaminants, the present invention removes the ion contaminants to alleviate performance and reliability problems associated with the presence of the ion contaminants.

Abstract: In a silicon wafer having a CVD film formed on one main face and having the other main face mirror-polished, the components and/or composition of the CVD film change in the thicknesswise direction of the film. This makes it possible to provide a silicon wafer having a thin film provided on the back surface, which thin film has excellent and persistent gettering capability that can remove a greater variety of types of elements and can prevent autodoping.

Abstract: A method and system for providing a via structure for a high conductivity metal of a integrated circuit is disclosed. In a first aspect the method and system comprises etching a photoresist material and a dielectric material down to the high conductivity metal to form a via hole. The via hole includes sputtered high conductivity metal on the sidewalls. The method and system further includes providing a via plug material within the via hole. The vial plug material substantially covers a base portion of the high conductivity metal and the sidewalls of the via hole. The via plug material is also capable of gettering or dissolving the high conductivity metal sputtered on the sidewalls of the dielectric material. In a second aspect, a via structure for an integrated circuit is disclosed in accordance with the present invention. The via structure includes a high conductivity metal and a dielectric material surrounding the high conductivity metal.

Abstract: The present invention provides a method of using a getter layer on a semiconductor substrate having a first metal stack formed thereon to improve metal to metal contact resistance. The method comprises the steps of forming a getter layer, which may be titanium, on the first metal stack, wherein the getter layer has a higher affinity for oxygen or a higher getter capability than the first metal stack, substantially removing the getter layer by exposing the getter layer to radiation, and forming a second metal stack, which in an advantageous embodiment may also be titanium, on the first metal stack.

Abstract: Concentration of metal element which promotes crystallization of silicon and which exists within a crystal silicon film obtained by utilizing the metal element is reduced. A first heat treatment for crystallization is implemented after introducing nickel element to an amorphous silicon film 103. Then, after obtaining the crystal silicon film, another heat treatment is implemented within an oxidizing atmosphere at a temperature higher than that of the previous heat treatment. At this time, HCl or the like is added to the atmosphere. A thermal oxide film 106 is formed in this step. At this time, gettering of the nickel element into the thermal oxide film 106 takes place. Next, the thermal oxide film 106 is removed. Thereby, a crystal silicon film 107 having low concentration of the metal element and a high crystallinity can be obtained.

Abstract: A method of preventing edge stain in silicon wafers from the edge polishing step with an alkaline slurry, the method consisting of formation of an oxide layer by an ozone dipping step prior to edge polishing.

Abstract: In a method of forming a silicon substrate, a gettering film is formed on a bottom surface of a silicon substrate. An oxygen ion implantation into a top surface of the silicon substrate is carried out at a substrate temperature in the range of 400.degree. C.-700.degree. C. The gettering film is removed from the silicon substrate. The silicon substrate is subjected to a heat treatment at a temperature of not less than 1300.degree. C. for causing a reaction of oxygen and silicon to form a silicon oxide film in the silicon substrate after the gettering film is removed.

Abstract: An encapsulant molding technique used in chip-on-board encapsulation wherein an oxidizable metal layer is patterned on a substrate and the oxidizable metal layer is oxidized to facilitate removal of unwanted encapsulant material. The oxidizable metal layer which adheres to the substrate is applied over a specific portion of the substrate. The oxidizable metal layer is oxidized to form a metal oxide layer which does not adhere to encapsulant materials.

Abstract: A method of manufacturing a thin-film solar cell, comprising the steps or: forming an amorphous silicon film on a substrate; holding a metal element that accelerates the crystallization of silicon in contact with the surface of the amorphous silicon film; subjecting the amorphous silicon film to a heat treatment to obtain a crystalline silicon film; depositing a silicon film to which phosphorus has been added in close contact with the crystalline silicon film; and subjecting the crystalline silicon film and the silicon film to which phosphorus has been added to a heat treatment.

Abstract: A process applicable to the restoration of defective or rejected semiconductor wafers to a defect-free form uses etchants and a variation of the Smart-Cut.RTM. process. Because of the use of the variation on the Smart-Cut.RTM. process, diffusion regions are removed without significantly affecting the specifications of the semiconductor wafer. Therefore, a defective or rejected wafer can be restored to near original condition for use in semiconductor manufacturing.

Abstract: A device isolation region and a gate oxide film are formed on a front surface of a silicon substrate, with a gate electrode formed on the gate oxide film. Next, an interlayer insulator film is formed on their entire surfaces. Then, polycrystalline silicon film is grown on the rear surface of the silicon substrate. The polycrystalline silicon film is deposited in such a way as to be in contact with the rear surface of the substrate. Then, to permit the polycrystalline silicon film formed at the rear surface of the silicon substrate to getter a pollution heavy metal, a heat treatment is performed for the substrate at a temperature of 500 to 900.degree. C. After this gettering process, an interconnection line is formed on the interlayer insulator film.

Abstract: A silicon semiconductor substrate including a silicon semiconductor layer at one of upper and lower surfaces thereof, the silicon semiconductor layer being composed of polysilicon or noncrystal silicon and containing oxygen in the range of 2 atomic % to 20 atomic % both inclusive, nitrogen in the range of 4 atomic % to 20 atomic % both inclusive, or both nitrogen at 2 atomic % or greater and oxygen at 1 atomic % or greater. The polysilicon or noncrystal silicon semiconductor layer acts as a core for extrinsic gettering. In the silicon semiconductor substrate, the gettering performance is not deteriorated, even if the silicon semiconductor substrate experiences thermal treatment. Thus, it is possible to get rid of contamination caused by heavy metals in the silicon semiconductor substrate.

Abstract: A method of manufacturing a silicon substrate which optimizes extrinsic gettering during semiconductor fabrication is provided in which phosphorous ions are diffused into the backside surface of a silicon substrate during wafer slice manufacture. Forming gettering sites at the backside surface prior to gate polysilicon deposition, extrinsic gettering is optimized. Initially, both the frontside and backside surfaces of a silicon substrate are subjected to dopant materials. Thereafter, at least one thin film is formed on both the frontside and backside surfaces. The thin films are then removed from the frontside surface along with a layer of the silicon substrate immediately below the frontside surface to a depth of about 10.0 .mu.m. The final polishing step of a typical silicon wafer manufacturing process removes a layer of silicon to a depth of about 10.0 .mu.

Abstract: The method of manufacturing a semiconductor device including the step of forming a silicon oxide film on an obverse surface and a reverse surface of a silicon substrate before formation of an element separation region on a semiconductor substrate. Further, the reverse surface of the silicon substrate is exposed by selectively removing only the silicon oxide film formed on the reverse surface of the silicon substrate. A silicon thin film is formed on each of the silicon oxide film and the exposed reverse surface of the silicon substrate, gettering occurring in the silicon thin film formed on the reverse surface of the silicon substrate. The first thin film is formed on each of the silicon thin films. An element separation resist is patterned on the first thin film on the obverse surface of the silicon substrate. The first thin film on the obverse surface of the silicon substrate by etching using the patterned resist as a mask member.

Abstract: A method is provided for a planar surface of a semiconductor integrated circuit, and an integrated circuit formed according to the same. A gate electrode is formed over a substrate having source/drain regions adjacent to the gate electrode and in the substrate. A silicon dioxide layer is formed over the gate electrode and a portion of the substrate not covered by the gate electrode. A first phosphorous doped spin-on-glass layer is formed over the silicon dioxide layer, wherein the spin-on-glass is doped to a concentration sufficient to facilitate gettering of charge mobile ions. An opening is then formed in the spin-on-glass layer and the silicon dioxide layer exposing a portion of the source drain region.

Abstract: A silicon wafer has a polycrystalline silicon film formed on one main surface. The polycrystalline silicon film has a multilayer structure composed of X layers (X is an integer equal to or greater than two) containing <220> oriented components in different proportions. The proportion of the <220> oriented component in the first polycrystalline silicon layer in contact with the silicon wafer is larger than the respective proportions of the <220> oriented components in the second to X-th polycrystalline silicon layers superposed on the first polycrystalline silicon layer. It becomes possible to provide a silicon wafer whose polycrystalline silicon film possesses high gettering capability and in which stress acting on the silicon wafer is decreased.

Abstract: A process for reducing halogen concentration in a material layer (56) includes the deposition of a dielectric layer (58) overlying the material layer (56). An annealing process is carried out to diffuse halogen atoms from the material layer (56) into the overlying dielectric layer (58). Once the diffusion process is complete, the dielectric layer (58) is removed.

Abstract: A silicon dioxide layer overlies a monocrystal silicon substrate and has a first upper surface. A first monocrystal silicon layer overlies the first upper surface and has phosphorus atoms diffused. A second monocrystal silicon layer overlies the first monocrystal silicon layer. The first monocrystal silicon layer may have phosphorus or silicon atoms each of which has a positive electric charge instead of the phosphorus atoms diffused. A lattice mismatching layer may overlie the first upper surface instead of the first monocrystal silicon layer. The lattice mismatching layer has parts in each of which misfit dislocation is caused. The first and the second monocrystal silicon layers may overlie the monocrystal silicon substrate and layer, respectively. In this event, a silicon glass layer is interposed between the first and the second monocrystal silicon layers. The second monocrystal silicon layer has phosphorus atoms diffused.

Abstract: A method of manufacturing a silicon substrate which optimizes extrinsic gettering during semiconductor fabrication is provided in which phosphorous ions are diffused into the backside surface of a silicon substrate during wafer slice manufacture. Forming gettering sites at the backside surface prior to gate polysilicon deposition, extrinsic gettering is optimized. Initially, both the frontside and backside surfaces of a silicon substrate are subjected to dopant materials. Thereafter, at least one thin film is formed on both the frontside and backside surfaces. The thin films are then removed from the frontside surface along with a layer of the silicon substrate immediately below the frontside surface to a depth of about 10.0 .mu.m. The final polishing step of a typical silicon wafer manufacturing process removes a layer of silicon to a depth of about 10.0 .mu.

Abstract: An object of the present invention is to provide a technology of reducing a nickel element in the silicon film which is crystallized by using nickel. An extremely small amount of nickel is introduced into an amorphous silicon film which is formed on the glass substrate. Then this amorphous silicon film is crystallized by heating. At this time, the nickel element remains in the crystallized silicon film. Then an amorphous silicon film is formed on the surface of the silicon film crystallized with the action of nickel. Then the amorphous silicon film is further heat treated. By carrying out this heat treatment, the nickel element is dispersed from the crystallized silicon film into the amorphous silicon film with the result that the nickel density in the crystallized silicon film is lowered.

Abstract: The present invention, a silicon-on-insulator (SOI) substrate and its fabrication method, is suited to the wafer-bonding method. A pre-oxidation treatment accompanying the oxidation treatment and the adhesive thermal treatment to prevent metal impurities from polluting semiconductor wafers. Before an oxide layer is thermally grown on one wafer or after two bonded wafers are subjected to a adhesive thermal treatment at a temperature T1, the pre-oxidation treatment is performed at a temperature of T2, which satisfies the relation equation of T1-300.ltoreq.T2.ltoreq.T1-100 (.degree.C.). Water steam, pure oxygen, or diluted oxygen, is conducted into the furnace, in which the pre-oxidation treatment is performed in an oxidation ambient. Accordingly, an oxide film having a predetermined thickness is formed on the surface of the SOI substrate serving as a barrier for preventing metal impurities, such as Fe, Cr, or the like, from invading the substrate and degrading the electrical characteristics thereof.

Abstract: A semiconductor device includes a semiconductor substrate having first and second main surfaces and including a denuded zone, in which an oxygen concentration is lower than that in an inner portion of the semiconductor substrate and which does not include a bulk microdefect, and an intrinsic gettering zone, and element region formed on the first surface of the semiconductor substrate, and an extrinsic gettering layer, made of an amorphous semiconductor material which traps a metal impurity, and formed directly on at least a portion of the intrinsic gettering region or the denuded zone entirely or partially thinned of the second main surface of the semiconductor substrate.

Abstract: The removal of particulate contaminants, such as dust particles, from the surface of a semiconductor wafer is achieved by pressing a soft adhesive layer against the wafer surface, leaving it in place for a short time and then removing it. The adhesive is brought to the wafer surface on a flexible medium which serves as a backing layer and to whose other side pressure can be applied. To remove the adhesive, the backing layer is peeled off, either by pulling on one end or by passing a sticky roller over it. The operation may be performed in air or under vacuum.

Abstract: A method of making semiconductor wafers can prevent processing strain on peripheral portions of wafers caused by non-wax polishing using a template. This involves mirror chamfering or etching the peripheral portions of the wafers after the non-wax polishing step.

Abstract: A method of forming a thin film transistor relative to a substrate includes, a) providing a thin film transistor layer of polycrystalline material on a substrate, the polycrystalline material comprising grain boundaries; b) providing a fluorine containing layer adjacent the polycrystalline thin film layer; c) annealing the fluorine containing layer at a temperature and for a time period which in combination are effective to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries; and d) providing a transistor gate operatively adjacent the thin film transistor layer. The thin film transistor can be fabricated to be bottom gated or top gated. A buffering layer can be provided intermediate the thin film transistor layer and the fluorine containing layer, with the buffering layer being transmissive of fluorine from the fluorine containing layer during the annealing.

Abstract: A method is provided for optimizing the manufacturing yield of semiconductors. The method provides a backside dielectric layer which protects the semiconductor from electro-static discharge damage during manufacturing. The backside dielectric layer may be a nitride. The backside dielectric layer may be an oxide. The method also provides for optimized ion implantation flood gun current control.

Abstract: A polysilicon layer is formed on a surface of a silicon substrate after oxygen ions are implanted into the silicon substrate and an SiO.sub.2 film is formed in the silicon substrate at a position in a prescribed depth from the surface of silicon substrate. A heat treatment is performed to a silicon layer between the polysilicon layer and the SiO.sub.2 film, thereby providing an SOI layer with improved crystal quality.