Organic Source Patents (Class 438/562)
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Patent number: 11840609Abstract: Polypropylene (PP) superhydrophobic sheets and a fabrication method using a stream of polypropylene from plastic waste thereof are provided. Superhydrophobic PP sheets of varying thickness having a base layer and a top layer may be fabricated using recycled or waste polypropylene, where the fabrication process uses 20% of total plastic waste to prepare said sheets having contact angles ranging from 140 to 160 degrees. The polypropylene superhydrophobic sheets may impart protective water-repellent properties against the elements.Type: GrantFiled: April 12, 2023Date of Patent: December 12, 2023Assignee: KING FAISAL UNIVERSITYInventors: Junaid Saleem, Safdar Hossain Sk, Zubair Khalid Baig Moghal, Gordon McKay
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Patent number: 11404560Abstract: A method of forming a semiconductor device that includes forming a fin structure from a bulk semiconductor substrate and forming an isolation region contacting a lower portion of a sidewall of the fin structure, wherein an upper portion of the sidewall of the fin structure is exposed. A sacrificial spacer is formed on the upper portion of the sidewall of the fin structure. The isolation regions are recessed to provide an exposed section of the sidewall of the fin structure. A doped semiconductor material is formed on the exposed section of the lower portion of the sidewall of the fin structure. Dopant is diffused from the doped semiconductor material to a base portion of the fin structure.Type: GrantFiled: April 14, 2020Date of Patent: August 2, 2022Assignee: TESSERA LLCInventors: Veeraraghavan S. Basker, Zuoguang Liu, Tenko Yamashita, Chun-chen Yeh
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Patent number: 11024708Abstract: A semiconductor device, including: a silicon substrate; multiple fin structures, formed on the silicon substrate, where each extends along a first direction; a shallow trench insulator, located among the multiple fin structures; a gate stack, intersecting with the multiple fin structures and extending along a second direction, where first spacers are formed on two sidewalls in the first direction of the gate stack; source-or-drain regions, formed on the multiple fin structures, and located at two sides of the gate stack along the first direction; and a channel region, including a portion of the multiple fin structures located between the first spacers. and notch structures. A notch structure recessed inward is located between each of the multiple fin structures and the silicon substrate. The notch structure includes an isolator that isolates each of the multiple fin structures from the silicon substrate.Type: GrantFiled: March 20, 2020Date of Patent: June 1, 2021Assignee: Institute of Microelectronics, Chinese Academy of SciencesInventors: Yongliang Li, Xiaohong Cheng, Qingzhu Zhang, Huaxiang Yin, Wenwu Wang
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Patent number: 9620354Abstract: A method for manufacturing a semiconductor substrate. An impurity diffusion ingredient can be diffused well and uniformly from a coating film into a semiconductor substrate by forming a coating film having a thickness of not more than 30 nm on a surface of a semiconductor substrate with a diffusion agent composition containing an impurity diffusion ingredient and a silicon compound that can be hydrolyzed to produce a silanol group.Type: GrantFiled: October 1, 2015Date of Patent: April 11, 2017Assignee: TOKYO OHKA KOGYO CO., LTD.Inventor: Yoshihiro Sawada
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Patent number: 9359513Abstract: Printable dopant formulations, methods of making such dopant formulations, and methods of using such dopant formulations are disclosed. The dopant formulations provide a printable dopant ink with a viscosity sufficient to prevent ink spreading when deposited in a pattern on a substrate. Furthermore, an ion exchange purification process provides the dopant formulation with a reduced metal ion concentration, and thus a relatively high purity level. Consequently, the dopant residue remaining on the substrate after curing and/or dopant activation process is relatively uniform, and therefore can be easily removed.Type: GrantFiled: June 16, 2014Date of Patent: June 7, 2016Assignee: Thin Film Electronics ASAInventors: Mao Takashima, Inna Tregub, Wenzhuo Guo, Brian Bedwell, Klaus Kunze, Aditi Chandra, Arvind Kamath, Jun Li, Li Li, Junfeng Mei
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Patent number: 9076719Abstract: Disclosed herein is a method for doping a substrate, comprising disposing a coating of a composition comprising a dopant-containing polymer and a non-polar solvent on a substrate; and annealing the substrate at a temperature of 750 to 1300° C. for 1 second to 24 hours to diffuse the dopant into the substrate; wherein the dopant-containing polymer is a polymer having a covalently bound dopant atom; wherein the dopant-containing polymer is free of nitrogen and silicon; and wherein the method is free of a step of forming an oxide capping layer over the coating prior to the annealing step.Type: GrantFiled: August 21, 2013Date of Patent: July 7, 2015Assignees: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, ROHM AND HAAS ELECTRONICS MATERIALS LLCInventors: Rachel A. Segalman, Megan L. Hoarfrost, Ali Javey, Kuniharu Takei, Peter Trefonas, III
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Patent number: 9012316Abstract: A method for forming an ultra-shallow boron dopant region in a substrate is provided. In one embodiment, the method includes depositing, by atomic layer deposition (ALD), a boron dopant layer in direct contact with the substrate, where the boron dopant layer contains an oxide, a nitride, or an oxynitride formed by alternating gaseous exposures of a boron amide precursor and a reactant gas. The method further includes patterning the dopant layer and forming an ultra-shallow dopant region in the substrate by diffusing boron from the boron dopant layer into the substrate by a thermal treatment.Type: GrantFiled: November 12, 2013Date of Patent: April 21, 2015Assignee: Tokyo Electron LimitedInventor: Robert D Clark
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Patent number: 8975170Abstract: Dopant ink compositions for forming doped regions in semiconductor substrates and methods for fabricating dopant ink compositions are provided. In an exemplary embodiment, a dopant ink composition comprises a dopant compound including at least one alkyl group bonded to a Group 13 element or a Group 15 element. Further, the dopant ink composition includes a silicon-containing compound.Type: GrantFiled: October 24, 2011Date of Patent: March 10, 2015Assignee: Honeywell International Inc.Inventors: Ligui Zhou, Richard A. Spear, Roger Yu-Kwan Leung, Wenya Fan, Helen X. Xu, Lea M. Metin, Anil Shriram Bhanap
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Publication number: 20150056793Abstract: Disclosed herein is a method for doping a substrate, comprising disposing a coating of a composition comprising a dopant-containing polymer and a non-polar solvent on a substrate; and annealing the substrate at a temperature of 750 to 1300° C. for 1 second to 24 hours to diffuse the dopant into the substrate; wherein the dopant-containing polymer is a polymer having a covalently bound dopant atom; wherein the dopant-containing polymer is free of nitrogen and silicon; and wherein the method is free of a step of forming an oxide capping layer over the coating prior to the annealing step.Type: ApplicationFiled: August 21, 2013Publication date: February 26, 2015Applicants: Rohm and Haas Electronic Materials LLC, THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Rachel A. Segalman, Megan L. Hoarfrost, Ali Javey, Kuniharu Takei, Peter Trefonas, III
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Patent number: 8809173Abstract: A method is provided for fabricating a fin field-effect transistor. The method includes providing a semiconductor substrate; and forming a plurality of fins on top of the semiconductor substrate. The method also includes forming isolation structures between adjacent fins; and forming doping sidewall spacers in top portions of the isolation structures near the fins. Further, the method includes forming a punch-through stop layer at the bottom of each of the fins by thermal annealing the doping sidewall spacers; and forming a high-K metal gate on each of the fins.Type: GrantFiled: July 12, 2013Date of Patent: August 19, 2014Assignee: Semiconductor Manufacturing International (Shanghai) CorporationInventors: Huaxiang Yin, Mieno Fumitake
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Publication number: 20140227865Abstract: A diffusion-agent composition including a borate ester (A); a polyhydric alcohol (B) represented by general formula (1); and an alkoxysilane compound (C). In general formula (1), k represents an integer from 0 to 3, m represents an integer of 1 or more, and R2 and R3 each independently represent a hydrogen atom, a hydroxyl group, a C1-5 alkyl group, or a C1-5 hydroxyalkyl group. When there are a plurality of R2s and R3s, the plurality of R2s and R3s may be the same as or different from one another. When k is 2 or more, the plurality of R2s and R3s always include at least one or more hydroxyl groups or C1-5 hydroxyalkyl groups having 1 to 5 carbon atoms. R4 and R5 each independently represent a hydrogen atom or a C1-3 alkyl group.Type: ApplicationFiled: September 3, 2012Publication date: August 14, 2014Applicant: TOKYO OHKA KOGYO CO., LTD.Inventors: Takashi Kamizono, Toshiro Morita
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Patent number: 8748301Abstract: Provided are: a diffusing agent composition for ink-jet; a method for production of electrode and solar battery using the diffusing agent composition; and a solar battery produced by the method for production. The diffusing agent composition for ink-jet includes (a) a silicon compound, (b) an impurity-diffusing component and (c) a solvent, in which: the solvent (c) contains (c1) a solvent having a boiling point of no higher than 100° C. and (c2) a solvent having a boiling point of 180 to 230° C.; and the solvent (c1) is contained at a ratio of 70 to 90% by mass and the solvent (c2) is contained at a ratio of 1 to 20% by mass both relative to the total mass of the composition.Type: GrantFiled: April 8, 2009Date of Patent: June 10, 2014Assignee: Tokyo Ohka Kogyo Co., Ltd.Inventors: Toshiro Morita, Katsuya Tanitsu
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Patent number: 8580664Abstract: A method for forming an ultra-shallow boron dopant region in a substrate is provided. In one embodiment, the method includes depositing, by atomic layer deposition (ALD), a boron dopant layer in direct contact with the substrate, where the boron dopant layer contains an oxide, a nitride, or an oxynitride formed by alternating gaseous exposures of boron amide precursor or an organoboron precursor and a reactant gas. The method further includes patterning the dopant layer and forming an ultra-shallow dopant region in the substrate by diffusing boron from the boron dopant layer into the substrate by a thermal treatment.Type: GrantFiled: March 31, 2011Date of Patent: November 12, 2013Assignee: Tokyo Electron LimitedInventor: Robert D. Clark
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Patent number: 8563409Abstract: A film-forming composition for use in a coating diffusion method, capable of diffusing a dopant at a higher concentration, and further capable of concomitantly forming a silica-based coating film is provided. A film-forming composition for constituting a diffusion film provided for diffusing a dopant element into a silicon wafer, the film-forming composition including: (A) a polymeric silicon compound; (B) an oxide of the dopant element, or a salt including the dopant element; and (C) porogene.Type: GrantFiled: July 1, 2011Date of Patent: October 22, 2013Assignee: Tokyo Ohka Kogyo Co., Ltd.Inventor: Toshiro Morita
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Patent number: 8501530Abstract: It is an object of the present invention to form an organic transistor including an organic semiconductor having high crystallinity without loosing an interface between an organic semiconductor of a channel where carriers are spread out and a gate insulating layer and deteriorating a yield. A semiconductor device according to the present invention has a stacked structure of organic semiconductor layers, and at least the upper organic semiconductor layer is in a polycrystalline or a single crystalline state and the lower organic semiconductor layer is made of a material serving as a channel. Carrier mobility can be increased owing to the upper organic semiconductor layer having high crystallinity; thus, insufficient contact due to the upper organic semiconductor layer can be compensated by the lower organic semiconductor layer.Type: GrantFiled: January 20, 2011Date of Patent: August 6, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shinobu Furukawa, Ryota Imahayashi
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Patent number: 8362465Abstract: An organic EL light-emitting material and an organic EL light-emitting element using the same are provided. Between an anode and a cathode, there are provided a hole transport layer, a light-emitting layer constituted of an organic EL light-emitting material including at least one kind of metal pyrazole complex constituted of a metal ion that is a monovalent cation of a d10 group element and a pyrazole ligand that has a predetermined substituent at the whole or a part of 3, 4 and 5 sites, and an electron transport layer, in this order from the anode side.Type: GrantFiled: August 21, 2009Date of Patent: January 29, 2013Assignee: Sony CorporationInventor: Masashi Enomoto
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Patent number: 7700463Abstract: A semiconductor device having high electrical characteristics is manufactured at low cost and with high throughput. A semiconductor film is crystallized or activated by being irradiated with a laser beam emitted from one fiber laser. Alternatively, laser beams are emitted from a plurality of fiber lasers and coupled by a coupler to be one laser beam, and then a semiconductor film is irradiated with the coupled laser beam so as to be crystallized or activated.Type: GrantFiled: August 21, 2006Date of Patent: April 20, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Akihisa Shimomura
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Patent number: 7674655Abstract: Semiconductor devices and assemblies including interconnects and methods for forming such interconnects are disclosed herein. One embodiment of a method of manufacturing a semiconductor device includes forming a plurality of first side trenches to an intermediate depth in a molded portion of a molded wafer having a plurality of dies arranged in rows and columns. The method also includes removing material from a second side of the molded portion at areas aligned with the first side trenches, wherein removing the material forms openings through the molded portion. The method further includes forming a plurality of electrical contacts at the second side of the molded portion at the openings and electrically connecting the second side contacts to corresponding bond-sites on the dies.Type: GrantFiled: November 1, 2007Date of Patent: March 9, 2010Assignee: Micron Technology, Inc.Inventors: Swee Kwang Chua, Suan Jeung Boon, Yong Poo Chia
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Publication number: 20090239363Abstract: Methods for forming doped regions in semiconductor substrates using non-contact printing processes and dopant-comprising inks for forming such doped regions using non-contact printing processes are provided. In an exemplary embodiment, a method for forming doped regions in a semiconductor substrate is provided. The method comprises providing an ink comprising a conductivity-determining type dopant, applying the ink to the semiconductor substrate using a non-contact printing process, and subjecting the semiconductor substrate to a thermal treatment such that the conductivity-determining type dopant diffuses into the semiconductor substrate.Type: ApplicationFiled: November 19, 2008Publication date: September 24, 2009Applicant: HONEYWELL INTERNATIONAL, INC.Inventors: Roger Yu-Kwan Leung, De-Ling Zhou, Wenya Fan
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Patent number: 7534646Abstract: The present invention provides an organic field effect transistor and a method of fabricating the transistor. The transistor includes a semiconductive film comprising organic molecules. Probe molecules capable of binding to target molecules are coupled to an outer surface of the semiconductive film such that the interior of the film being substantially free of the probe molecules.Type: GrantFiled: May 31, 2006Date of Patent: May 19, 2009Assignee: Alcatel-Lucent USA Inc.Inventors: Zhenan Bao, Bernard Yurke
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Patent number: 7435668Abstract: A solution containing impurity ions is applied onto the surface of a silicon film to form a solution layer, followed by drying into a compound layer containing the impurities. Heat treatment is performed by irradiation with an energy beam so as to diffuse the impurity atoms in the compound layer toward the silicon film into a source region and a drain region. Subsequently, the compound layer is removed.Type: GrantFiled: January 24, 2005Date of Patent: October 14, 2008Assignee: Sony CorporationInventors: Akio Machida, Takahiro Kamei, Yoshiyuki Kawana
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Patent number: 7247548Abstract: The present invention achieves a shallow junction of a source and a drain, and provides a doping method which makes device properties reproducible and a semiconductor device fabricated using the method. In the present invention, doping for the semiconductor is conducted by attaching a molecular species with a higher electron affinity or lower ionization energy out of fullerene derivatives or metallocenes to the semiconductor surface to induce charge transfer from the molecule to the semiconductor.Type: GrantFiled: December 6, 2004Date of Patent: July 24, 2007Assignee: National Institute of Advanced Industrial Science and TechnologyInventors: Tetsuya Tada, Toshihiko Kanayama, Hidefumi Hiura
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Patent number: 7160754Abstract: The present invention provides an organic field-effect transistor (OFET) and a method of fabricating the OFET. The OFET, configured to function as a p-type semiconductor, includes a substrate having a top surface and a semiconductor layer located over the top surface. The semiconductor layer comprises organic semiconductor molecules. Each of the organic semiconductor molecules includes a core having conjugated pi bonds, a fluorinated alkyl group, and an alkyl spacer group having a chain of two or more carbon atoms. One end of the chain is bonded to the fluorinated alkyl group and another end of the chain is bonded to the core. Substituents coupled to the carbon atoms have an electronegativity of less than about 4.Type: GrantFiled: January 23, 2006Date of Patent: January 9, 2007Assignee: Lucent Technologies Inc.Inventors: Zhenan Bao, Evert-Jan Borkent
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Patent number: 6989288Abstract: An organic EL display device includes first and second electrodes with a light-emitting layer interposed therebetween and an organic soluble derivative layer arranged between the first electrode and the light-emitting layer, wherein the organic soluble derivative layer prevents impurities from being diffused to the light-emitting layer.Type: GrantFiled: December 15, 2004Date of Patent: January 24, 2006Assignee: Samsung SDI Co., Ltd.Inventors: Min-Chul Suh, Mu-Hyun Kim, Jang-Hyuk Kwon
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Patent number: 6232207Abstract: In doping process for producing homojunctions in a semiconductor substrate, and the semiconductor substrate, dopants penetrate by way of diffusion employing an ultraviolet light source. A mask is introduced between the light source and the semiconductor which has regions of varying thickness. Dopant material is placed between the mask and the substrate, and the mask is then irradiated by the light source.Type: GrantFiled: May 29, 1998Date of Patent: May 15, 2001Assignee: Fraunhofer Gesellschaft zur Förderung der angewandten Forschung e.V.Inventor: Roland Schindler
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Patent number: 5855962Abstract: A spin on insulating coating with ionic barrier properties is formed on a substrate, by mixing a P or B containing material such as phosphazene or borazine with a solution of silsesquioxane, spin coating on a substrate to form a film of pre-determined thickness. The coated film is cured in a step wise manner to drive out the solvents and most of the H and OH groups, with the resulting film having a composition SiONX, where X can be B, P, F and mixtures thereof. The amount of P, B or other elements are predetermined by calculating the solids in the silsesquioxane and adding suitable amount of borazine or phosphazene. The coated and cured film fills and planarizes any topography on the substrate created by etching trenches, forming gate stacks or metal lines. In one of the variation, the substrate has a layer of insulating material disposed thereon prior to the application of the spin-on insulator.Type: GrantFiled: January 9, 1997Date of Patent: January 5, 1999Assignee: International Business Machines CorporationInventors: Donna Rizzone Cote, Son Van Nguyen