Abstract: A housing for an electronic device, including an aluminum layer enclosing a volume that includes a radio-frequency (RF) antenna is provided. The housing includes a window aligned with the RF antenna; the window including a non-conductive material filling a cavity in the aluminum layer; and a thin aluminum oxide layer adjacent to the aluminum layer and to the non-conductive material; wherein the non-conductive material and the thin aluminum oxide layer form an RF-transparent path through the window. A housing for an electronic device including an integrated RF-antenna is also provided. A method of manufacturing a housing for an electronic device as described above is provided.

Abstract: The present disclose provides in some embodiments an array substrate and a method for fabricating the same, and a display device. The array substrate includes a source-drain metal layer formed on a base substrate and including copper, an alloy layer formed on the source-drain metal layer and including copper alloy, non-copper metal in the copper alloy being easier to be oxidized than copper in the copper alloy, a passivation layer formed on the alloy layer, and an oxide layer formed between the alloy layer and the passivation layer.

Abstract: A semiconductor manufacturing method includes preparing a substrate having a metal film formed on a surface thereof; forming an oxide layer by oxidizing a surface of the metal film by plasma of a mixed gas of an oxygen-containing gas and a hydrogen-containing gas; and forming a thin film on the oxide layer by supplying at least an oxidizing gas to the substrate.

Abstract: A method of manufacturing a display substrate includes forming a gate electrode on a base substrate, forming an active pattern which includes an oxide semiconductor and overlaps with the gate electrode, forming an etch stopper which partially covers the active pattern, and performing a plasma treatment process to promote a reduction reaction to portions of the active pattern exposed by the etch stopper, thereby forming a source electrode and a drain electrode.

Abstract: A metal layer is deposited over an underlying material layer. The metal layer includes an elemental metal that can be converted into a dielectric metal-containing compound by plasma oxidation and/or nitridation. A hard mask portion is formed over the metal layer. Plasma oxidation or nitridation is performed to convert physically exposed surfaces of the metal layer into the dielectric metal-containing compound. The sequence of a surface pull back of the hard mask portion, trench etching, another surface pull back, and conversion of top surfaces into the dielectric metal-containing compound are repeated to form a line pattern having a spacing that is not limited by lithographic minimum dimensions.

Abstract: An organic solderability preservative solution includes pyrazine derivatives which inhibit corrosion of metal. The solution is applied to metal surfaces of components for electronic apparatus to improve solderability of electrical connections between the components in the electronic apparatus.

Abstract: A method for forming a raised silicide contact including depositing a layer of silicon at a bottom of a contract trench using a gas cluster implant technique which accelerates clusters of silicon atoms causing them to penetrate a surface oxide on a top surface of the silicide, a width of the silicide and the contact trench are substantially equal; heating the silicide including the silicon layer to a temperature from about 300° C. to about 950° C. in an inert atmosphere causing silicon from the layer of silicon to react with the remaining silicide partially formed in the silicon containing substrate; and forming a raised silicide from the layer of silicon, wherein the thickness of the raised silicide is greater than the thickness of the silicide and the raised silicide protrudes above a top surface of the silicon containing substrate.

Abstract: Methods and apparatus for forming nitrogen-containing layers are provided herein. In some embodiments, a method includes placing a substrate having a first layer disposed thereon on a substrate support of a process chamber; heating the substrate to a first temperature; and exposing the first layer to an RF plasma formed from a process gas comprising ammonia (NH3) to transform the first layer into a nitrogen-containing layer, wherein the plasma has an ion energy of less than about 8 eV.

Abstract: A method of making a semiconductor structure is provided. The method includes forming a dielectric layer using a high density plasma oxidation process. The dielectric layer is on a storage layer and the thickness of the storage layer is reduced during the high density plasma oxidation process.

Abstract: A method includes patterning a plurality of magnetic tunnel junction (MTJ) layers to form an MTJ cell, and forming a dielectric cap layer over a top surface and on a sidewall of the MTJ cell. The step of patterning and the step of forming the dielectric cap layer are in-situ formed in a same vacuum environment. A plasma treatment is performed on the dielectric cap layer to transform the dielectric cap layer into a treated dielectric cap layer, whereby the treated dielectric cap layer improves protection from H2O or O2, and thus degradation.

Abstract: A method for removing germanium suboxide between a germanium (Ge) substrate and a dielectric layer made of metal oxide includes causing a supercritical fluid composition that includes a supercritical carbon dioxide fluid and an oxidant to diffuse into the germanium suboxide such that metal residues in the dielectric layer, the germanium suboxide and the oxidant are subjected to a redox reaction so as to reduce the germanium suboxide into germanium.

Abstract: Devices and methods for selectively oxidizing silicon are described herein. An apparatus for selective oxidation of exposed silicon surfaces includes a thermal processing chamber with a plurality of walls, first inlet connection and a second inlet connection, wherein the walls define a processing region within the processing chamber, a substrate support within the processing chamber, a hydrogen source connected with the first inlet connection, a heat source connected with the hydrogen source, and a remote plasma source connected with the second inlet connection and an oxygen source. A method for selective oxidation of non-metal surfaces, can include positioning a substrate in a processing chamber at a temperature less than 800° C., flowing hydrogen into the processing chamber, generating a remote plasma comprising oxygen, mixing the remote plasma with the hydrogen gas in the processing chamber to create an activated processing gas, and exposing the substrate to the activated gas.

Abstract: The present invention provides a method of forming an electrode having reduced corrosion and water decomposition on a surface thereof. A conductive layer is deposited on a substrate. The conductive layer is partially oxidized by an oxygen plasma process to convert a portion thereof to an oxide layer thereby forming the electrode. The oxide layer is free of surface defects and the thickness of the oxide layer is from about 0.09 nm to about 10 nm and ranges therebetween, controllable with 0.2 nm precision.

Abstract: A method for fabricating a semiconductor device including performing oxygen plasma treatment to a surface of a nitride semiconductor layer, a power density of the oxygen plasma treatment being 0.2 to 0.3 W/cm2.

Abstract: Methods and apparatus for improving selective oxidation against metals in a process chamber are provided herein. In some embodiments, a method of oxidizing a first surface of a substrate disposed in a process chamber having a processing volume defined by one or more chamber walls may include exposing the substrate to an oxidizing gas to oxidize the first surface; and actively heating at least one of the one or more chamber walls to increase a temperature of the one or more chamber walls to a first temperature of at least the dew point of water while exposing the substrate to the oxidizing gas.

Abstract: Embodiments of the present invention provide a method for surface treatment on a metal oxide and a method for preparing a thin film transistor. The method for surface treatment on a metal oxide comprises: utilizing plasma to perform a surface treatment on a device to be processed; the plasma comprises a mixture gas of an F-based gas and O2, and the device to be processed is a metal oxide or a manufactured article coated with a metal oxide. The embodiments provided by the present invention can reduce the contact resistance between a metal oxide and other electrodes, and improve the effect of ohmic contact of the metal oxide.

Abstract: A method includes providing a semiconductor structure including a plurality of devices; depositing a nitride cap over the semiconductor structure; forming an aluminum mask over the nitride cap, the aluminum mask including a plurality of first openings; converting the aluminum mask to an aluminum oxide etch stop layer; and performing middle-of-line fabrication processing, leaving the aluminum oxide etch stop layer in place. A semiconductor structure includes a plurality of devices on a substrate; a nitride cap over the plurality of devices; an aluminum oxide etch stop layer over the nitride cap; an inter-level dielectric (ILD) over the aluminum oxide etch stop layer; and a plurality of contacts extending through the ILD, the aluminum oxide etch stop layer and the nitride cap to the plurality of devices.

Abstract: A system and method for forming a semiconductor device is provided. An embodiment comprises forming a silicide region on a substrate along with a transition region between the silicide region and the substrate. The thickness of the silicide precursor material layer along with the annealing conditions are controlled such that there is a larger ratio of one atomic species within the transition region than another atomic species, thereby increasing the hole mobility within the transition region.

Abstract: A semiconductor process is described as follows. A material layer is provided on a substrate. A low-temperature oxidation treatment is performed to the material layer. A photoresist layer is formed on the material layer after the low-temperature oxidation treatment. The photoresist layer is patterned.

Abstract: To form a dielectric layer, an organometallic precursor is adsorbed on a substrate loaded into a process chamber. The organometallic precursor includes a central metal and ligands bound to the central metal. An inactive oxidant is provided onto the substrate. The inactive oxidant is reactive with the organometallic precursor. An active oxidant is also provided onto the substrate. The active oxidant has a higher reactivity than that of the inactive oxidant.

Abstract: A system of via structures disposed in a substrate. The system includes a first via structure that comprises an outer conductive layer, an inner insulating layer, and an inner conductive layer disposed in the substrate. The outer conductive layer separates the inner insulating layer and the substrate and the inner insulating layer separates the inner conductive layer and the outer conductive layer. A first signal of a first complementary pair passes through the inner conductive layer and a second signal of the first complementary pair passes through the outer conductive layer. In different embodiments, a method of forming a via structure in an electronic substrate is provided.

Abstract: A gate oxide and method of fabricating a gate oxide that produces a more reliable and thinner equivalent oxide thickness than conventional SiO2 gate oxides are provided. Gate oxides formed from alloys such as cobalt-titanium are thermodynamically stable such that the gate oxides formed will have minimal reactions with a silicon substrate or other structures during any later high temperature processing stages. The process shown is performed at lower temperatures than the prior art, which inhibits unwanted species migration and unwanted reactions with the silicon substrate or other structures. Using a thermal evaporation technique to deposit the layer to be oxidized, the underlying substrate surface smoothness is preserved, thus providing improved and more consistent electrical properties in the resulting gate oxide.

Abstract: A magnetoresistive element includes: a magnetization free layer having a first plane and a second plane located on the opposite side from the first plane, and having a variable magnetization direction; a magnetization pinned layer provided on the first plane side of the magnetization free layer, and having a pinned magnetization direction; a first tunnel barrier layer provided between the magnetization free layer and the magnetization pinned layer; a second tunnel barrier layer provided on the second plane of the magnetization free layer; and a non-magnetic layer provided on a plane on the opposite side of the second tunnel barrier layer from the magnetization free layer. The magnetization direction of the magnetization free layer is variable by applying current between the magnetization pinned layer and the non-magnetic layer, and a resistance ratio between the first tunnel barrier layer and the second tunnel barrier layer is in a range of 1:0.25 to 1:4.

Abstract: A method of making a semiconductor structure is provided. The method includes forming a dielectric layer using a high density plasma oxidation process. The dielectric layer is on a storage layer and the thickness of the storage layer is reduced during the high density plasma oxidation process.

Abstract: The invention includes methods of forming material on a substrate and methods of forming a field effect transistor gate oxide. In one implementation, a first species monolayer is chemisorbed onto a substrate within a chamber from a gaseous first precursor. The first species monolayer is discontinuously formed over the substrate. The substrate having the discontinuous first species monolayer is exposed to a gaseous second precursor different from the first precursor effective to react with the first species to form a second species monolayer, and effective to form a reaction product of the second precursor with substrate material not covered by the first species monolayer. The substrate having the second species monolayer and the reaction product is exposed to a third gaseous substance different from the first and second precursors effective to selectively remove the reaction product from the substrate relative to the second species monolayer. Other implementations are contemplated.

Abstract: A method of manufacturing a semiconductor device includes placing a chip on a carrier, and applying an electrically conducting layer to the chip and the carrier. The method additionally includes converting the electrically conducting layer into an electrically insulating layer.

Abstract: Provided is a novel electronic device that comprises graphite, graphene or the like. An electronic device having a substrate, a layer comprising a 6-member ring-structured carbon homologue as the main ingredient, a pair of electrodes, a layer comprising aluminium oxide as the main ingredient and disposed between the pair of electrodes, and a layer comprising aluminium as the main ingredient, wherein the layer comprising aluminium oxide as the main ingredient is disposed between the layer comprising a 6-member ring-structured carbon homologue as the main ingredient and the layer comprising aluminium as the main ingredient so as to be in contact with the two layers.

Abstract: Apparatus and methods for detecting evaporation conditions in an evaporator for evaporating metal onto semiconductor wafers, such as GaAs wafers, are disclosed. One such apparatus can include a crystal monitor sensor configured to detect metal vapor associated with a metal source prior to metal deposition onto a semiconductor wafer. This apparatus can also include a shutter configured to remain in a closed position when the crystal monitor sensor detects an undesired condition, so as to prevent metal deposition onto the semiconductor wafer. In some implementations, the undesired condition can be indicative of a composition of a metal source, a deposition rate of a metal source, impurities of a metal source, position of a metal source, position of an electron beam, and/or intensity of an electron beam.

Abstract: Apparatus and methods for evaporating metal onto semiconductor wafers are disclosed. One such apparatus can include an evaporation chamber that includes a wafer holder, such as a dome, and a test wafer holder that is separate and spaced apart from the wafer holder. In certain implementations, the test wafer can be coupled to a cross beam supporting at least one shaper. A metal can be evaporated onto production wafers positioned in the wafer holder while metal is evaporated on a test wafer positioned in a test wafer holder. In some instances, the production wafers can be GaAs wafers. The test wafer can be used to make a quality assessment about the production wafers.

Abstract: A method of manufacturing a functional film by which a functional film formed on a film formation substrate can be easily peeled from the film formation substrate. The method includes the steps of: (a) forming a separation layer on a substrate by using an inorganic material which is decomposed to generate a gas by being applied with an electromagnetic wave; (b) forming a layer to be peeled containing a functional film, which is formed by using a functional material, on the separation layer; and (c) applying the electromagnetic wave toward the separation layer so as to peel the layer to be peeled from the substrate or reduce bonding strength between the layer to be peeled and the substrate.

Abstract: A semiconductor package includes one or more semiconductor chips to form a semiconductor package. The semiconductor package may include a first semiconductor chip package having a first substrate including a first surface having a center portion on which a first semiconductor chip is mounted, at least one first boundary portion on which a plurality of conductive connection pad groups are formed, and/or a molding member including a body that covers the first semiconductor chip and at least one extension that extends from the body. The extension extends while avoiding the conductive connection pad group. The semiconductor package may further include a second semiconductor chip package stacked on the first semiconductor chip package and including a second substrate on which at least one second semiconductor chip that is electrically connected to the conductive connection pad group may be mounted.

Abstract: The invention provides a manufacturing method for a semiconductor photoelectrochemical cell, comprising the steps of burning a base made of titanium or a titanium alloy in an atmosphere of 700° C. to 1000° C. at a rate of temperature increase of no lower than 5° C./second so that a titanium oxide layer is formed on the surface, and thus, mixing titanium metal into said titanium oxide layer.

Abstract: An integrated circuit can be formed with a high-k dielectric layer. A first titanium oxide layer is deposited over a substrate using a first ALD process. A first metal oxide layer is also deposited over the substrate using a second ALD process. A second titanium oxide layer is deposited over the substrate using a third ALD process and a second metal oxide layer is deposited over the substrate using a fourth ALD process. The first and second metal oxides are preferably strontium oxide and/or aluminum oxide.

Abstract: There are provided a method of manufacturing a zinc oxide semiconductor, and a zinc oxide semiconductor manufactured using the method. A metal catalyst layer is formed on a zinc oxide thin film that has an electrical characteristic of a n-type semiconductor, and a heat treatment is performed thereon so that the zinc oxide thin film is modified into a zinc oxide thin film having an electrical characteristic of a p-type semiconductor. Hydrogen atoms existing in the zinc oxide thin film are removed by a metal catalyst during the heat treatment. Accordingly, the hydrogen atoms existing in the zinc oxide thin film are removed by the metal catalyst and the heat treatment, and the concentration of holes serving as carriers is increased. That is, an n-type zinc oxide thin film is modified into a highly-concentrated p-type zinc oxide semiconductor.

Abstract: A gate oxide and method of fabricating a gate oxide that produces a more reliable and thinner equivalent oxide thickness than conventional SiO2 gate oxides are provided. Gate oxides formed from alloys such as cobalt-titanium are thermodynamically stable such that the gate oxides formed will have minimal reactions with a silicon substrate or other structures during any later high temperature processing stages. The process shown is performed at lower temperatures than the prior art, which inhibits unwanted species migration and unwanted reactions with the silicon substrate or other structures. Using a thermal evaporation technique to deposit the layer to be oxidized, the underlying substrate surface smoothness is preserved, thus providing improved and more consistent electrical properties in the resulting gate oxide.

Abstract: A processing method includes a gas having a Si—CH3 bond supplied into a processing chamber after a target substrate to be processed is loaded into the processing chamber; and a silylation process performed on the target substrate. The internal pressure of the chamber by the supply of the gas having the Si—CH3 bond and the gas supply time are set to be within ranges where the silylation process can be performed while the internal pressure of the chamber is decreased to reach an eligible pressure level where the wafer can be unloaded after the internal pressure of the chamber is increased up to a preset pressure by the supply of the gas.

Abstract: A method of manufacturing a metal compound thin film is disclosed. The method may include forming a first metal compound layer on a substrate by atomic layer deposition, performing annealing on the first metal compound layer in an atmosphere containing a nitrogen compound gas, thereby diffusing nitrogen into the first metal compound layer, and forming a second metal compound layer on the first metal compound layer by atomic layer deposition.

Abstract: In a method of manufacturing a semiconductor device, an active channel pattern is formed on a substrate. The active channel pattern includes preliminary gate patterns and single crystalline silicon patterns that are alternately stacked with each other. A source/drain layer is formed on a sidewall of the active channel pattern. Mask pattern structures including a gate trench are formed on the active channel pattern and the source/drain layer. The patterns are selectively etched to form tunnels. The gate trench is then filled with a gate electrode. The gate electrode surrounds the active channel pattern. The gate electrode is protruded from the active channel pattern. The mask pattern structures are then removed. Impurities are implanted into the source/drain regions to form source/drain regions. A silicidation process is carried out on the source/drain regions to form a metal silicide layer, thereby completing a semiconductor device having a MOS transistor.

Abstract: Methods and apparatus are provided for magnetic tunnel junction (MTJ) devices and arrays, comprising metal-insulator-metal (M-I-M) structures with opposed first and second ferro-magnetic electrodes with alterable relative magnetization direction. The insulator is formed by depositing an oxidizable material (e.g., Al) on the first electrode, naturally oxidizing it, e.g., at about 0.03 to 10 milli-Torr for up to a few thousand seconds at temperatures below about 35° C., then further rapidly (e.g., plasma) oxidizing at a rate much larger than that of the initial natural oxidation. The second electrode of the M-I-M structure is formed on this oxide. More uniform tunneling properties result. A second oxidizable material layer is optionally provided after the initial natural oxidation and before the rapid oxidation step during which it is substantially entirely converted to insulating oxide. A second natural oxidation cycle may be optionally provided before the second layer is rapidly oxidized.

Abstract: Methods of manufacturing a semiconductor device include forming an absorption layer on a surface of a substrate by exposing the surface of the substrate to a first reaction gas at a first temperature. A metal oxide layer is then formed on the surface of the substrate by exposing the absorption layer to a second reaction gas at a second temperature. The first reaction gas may include a precursor containing zirconium (e.g., tetrakis(ethylmethylamino)zirconium) and the second reaction gas may include an oxidizing agent.

Abstract: A method for depositing a high-k dielectric material on a semiconductor substrate is disclosed. The method includes applying a chemical bath to a surface of a substrate, rinsing the surface, applying a co-reactant bath to the surface of the substrate, and rinsing the surface. The chemical bath includes a metal precursor which includes at least a hafnium compound, an aluminium compound, a titanium compound, zirconium compound, a scandium compound, a yttrium compound or a lanthanide compound.

Abstract: An oxide layer is selectively formed on a layer including silicon by a plasma process using hydrogen gas and a gas including oxygen. The hydrogen gas is controlled to have a flow rate less than about 50 percent of an overall flow rate by adding helium gas to the plasma process.

Abstract: The present invention provides a manufacturing method of a thinned semiconductor device with high reliability at low cost and a semiconductor device manufactured by the method. A peeling layer, a transistor, and an insulating layer are formed in this order over a substrate, an opening is formed so as to expose at least a part of the peeling layer, and the transistor is peeled off from the substrate by a physical means. The peeling layer is formed by forming a metal film and a metal oxide film so as to be in contact with the metal film by a method using a solution.

Abstract: Provided is a method of manufacturing a semiconductor device. The method includes: forming a charge storage layer on a substrate on which a gate insulating layer is formed; forming a first metal oxide layer on the charge storage layer using a first reaction source including a metal oxide layer precursor and a first oxidizing agent and changing the first metal oxide layer to a second metal oxide layer using a second reaction source including a second oxidizing agent having larger oxidizing power than the first oxidizing agent and repeating the forming of the first metal oxide layer and the changing of the first metal oxide layer to the second metal oxide layer several times to form a blocking insulating layer; and forming an electrode layer on the blocking insulating layer.

Abstract: Methods of using thin metal layers to make Carbon Nanotube Films, Layers, Fabrics, Ribbons, Elements and Articles are disclosed. Carbon nanotube growth catalyst is applied on to a surface of a substrate, including one or more thin layers of metal. The substrate is subjected to a chemical vapor deposition of a carbon-containing gas to grow a non-woven fabric of carbon nanotubes. Portions of the non-woven fabric are selectively removed according to a defined pattern to create the article. A non-woven fabric of carbon nanotubes may be made by applying carbon nanotube growth catalyst on to a surface of a wafer substrate to create a dispersed monolayer of catalyst. The substrate is subjected to a chemical vapor deposition of a carbon-containing gas to grow a non-woven fabric of carbon nanotubes in contact and covering the surface of the wafer and in which the fabric is substantially uniform density.

Abstract: A principal surface at one side of a support substrate has thereon an adjustment layer made of material having a higher thermal expansion coefficient than that of the support substrate. Then, a nitride-base semiconductor element layer and the support substrate on a growth substrate are joined via an adhesion layer. Next, the support substrate is joined to the nitride-base semiconductor element layer via the adhesion layer. Next, the growth substrate is separated from the joined nitride-base semiconductor element layer and the support substrate.

Abstract: A method for enhancing the reliability of copper interconnects and/or contacts, such as the bottom of vias exposing top surfaces of buried copper, or at the top of copper lines just after CMP. The method comprises contacting the exposed copper surface with a vapor phase compound of a noble metal and selectively forming a layer of the noble metal on the exposed copper surface, either by a copper replacement reaction or selective deposition (e.g., ALD or CVD) of the noble metal.

Abstract: A substrate having a copper wiring is prepared. An insulating film is formed on the copper wiring. The insulating film is etched with a gas containing fluorine to form an opening reaching the copper wiring. A plasma treatment is carried out on a surface of copper exposed at a bottom of the opening without turning plasma discharge off after forming the opening in the same chamber as the formation of the opening.

Abstract: A method for depositing a Ru metal layer on a patterned substrate from a film precursor vapor delivered from a multi-tray film precursor evaporation system. The method comprises providing a patterned substrate in a process chamber of a deposition system, and forming a process gas containing Ru3(CO)12 precursor vapor and a carrier gas comprising CO gas. The process gas is formed by: providing a solid Ru3(CO)12 precursor in a plurality of spaced trays within a precursor evaporation system, wherein each tray is configured to support the solid precursor and wherein the plurality of spaced trays collectively provide a plurality of surfaces of solid precursor; heating the solid precursor in the plurality of spaced trays in the precursor evaporation system to a temperature greater than about 60° C.

Abstract: In a process involving the formation of an insulating film on a substrate for an electronic device, the insulating film is formed on the substrate surface by carrying out two or more steps for regulating the characteristic of the insulating film involved in the process under the same operation principle. The formation of an insulating film having a high level of cleanness can be realized by carrying out treatment such as cleaning, oxidation, nitriding, and a film thickness reduction while avoiding exposure to the air. Further, carrying out various steps regarding the formation of an insulating film under the same operation principle can realize simplification of the form of an apparatus and can form an insulating film having excellent property with a high efficiency.