Using Electromagnetic Or Wave Energy Patents (Class 438/771)
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Patent number: 11699569Abstract: There is provided an ion implanter including a beamline unit that transports an ion beam, an implantation processing chamber in which an implantation process of irradiating a wafer with an ion beam is performed, an illumination device that performs irradiation with illumination light in a direction intersecting with a transport direction of the ion beam in at least one of the beamline unit and the implantation processing chamber, an imaging device that generates a captured image captured by imaging a space through which the illumination light passes, and a control device that detects a particle which scatters the illumination light, based on the captured image.Type: GrantFiled: September 23, 2021Date of Patent: July 11, 2023Assignee: SUMITOMO HEAVY INDUSTRIES ION TECHNOLOGY CO., LTD.Inventors: Aki Ninomiya, Takanori Yagita, Takao Morita, Sayumi Hirose
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Patent number: 10978307Abstract: A method of patterning a substrate includes receiving a substrate having microfabricated structures, including mandrels; executing a deposition process that deposits a first material on the mandrels, the deposition process including cyclically moving the substrate through a set of deposition modules. The substrate is moved through the set of deposition modules so that the first material is deposited at a first thickness at top portions of the mandrels and at a second thickness at bottom portions of mandrels, the first thickness being greater than the second thickness. The method includes executing a spacer deposition process that conformally deposits a second material on the substrate; executing a spacer open etch that removes depositions of the second material from over a top surface of the mandrels; removing the first material and the mandrels from the substrate, leaving sidewall spacers; and transferring a pattern defined by the sidewall spacers into an underlying layer.Type: GrantFiled: July 24, 2020Date of Patent: April 13, 2021Assignee: Tokyo Electron LimitedInventors: David O'Meara, Eric Chih-Fang Liu, Richard Farrell, Soo Doo Chae
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Patent number: 10153169Abstract: In a method of controlling a threshold of a transistor, a gate insulating film is formed in a channel region of a metal-oxide-semiconductor (MOS) transistor on a main surface of a semiconductor substrate. A first electrode layer is formed on the gate insulating film and a second electrode layer containing a work function adjusting metal is formed on the first electrode layer. Thereafter, an oxidation treatment or nitridation treatment using a microwave plasma processing apparatus is performed to inactivate the work function adjusting metal, thereby executing a threshold control of the MOS transistor.Type: GrantFiled: February 2, 2017Date of Patent: December 11, 2018Assignee: Tokyo Electron LimitedInventors: Kentaro Shiraga, Koji Akiyama, Junya Miyahara, Yutaka Fujino
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Patent number: 9557110Abstract: A substrate in which a high-dielectric-constant gate insulator is formed on a silicon substrate with an interface layer film sandwiched in between is housed in a chamber. A mixed gas of ammonia and nitrogen gas is supplied to the chamber to form an ammonia atmosphere, and flash light is applied in the ammonia atmosphere from flash lamps to the surface of the substrate for an emission time of 0.2 milliseconds to one second. This allows the high-dielectric-constant gate insulator to be heated in the ammonia atmosphere and accelerates nitriding of the high-dielectric-constant gate insulator. Since the time for which flash light is applied is an extremely short time, nitrogen will not reach and nitride the interface layer film, which is formed as a base of the high-dielectric-constant gate insulator.Type: GrantFiled: December 21, 2015Date of Patent: January 31, 2017Assignee: SCREEN Holdings Co., Ltd.Inventor: Hikaru Kawarazaki
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Publication number: 20150140834Abstract: Methods and apparatus for processing using a plasma source for the treatment of semiconductor surfaces are disclosed. The apparatus includes an outer vacuum chamber enclosing a substrate support, a plasma source (either a direct plasma or a remote plasma), and an optional showerhead. Other gas distribution and gas dispersal hardware may also be used. The plasma source may be used to generate activated species operable to alter the surface of the semiconductor materials. Further, the plasma source may be used to generate activated species operable to enhance the nucleation of deposition precursors on the semiconductor surface.Type: ApplicationFiled: November 18, 2013Publication date: May 21, 2015Applicant: Intermolecular Inc.Inventors: Kevin Kashefi, Frank Greer
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Patent number: 9006064Abstract: A gate dielectric can be formed by depositing a first silicon oxide material by a first atomic layer deposition process. The thickness of the first silicon oxide material is selected to correspond to at least 10 deposition cycles of the first atomic layer deposition process. The first silicon oxide material is converted into a first silicon oxynitride material by a first plasma nitridation process. A second silicon oxide material is subsequently deposited by a second atomic layer deposition process. The second silicon oxide material is converted into a second silicon oxynitride material by a second plasma nitridation process. Multiple repetitions of the atomic layer deposition process and the plasma nitridation process provides a silicon oxynitride material having a ratio of nitrogen atoms to oxygen atoms greater than 1/3, which can be advantageously employed to reduce the leakage current through a gate dielectric.Type: GrantFiled: March 11, 2013Date of Patent: April 14, 2015Assignee: International Business Machines CorporationInventors: Michael P. Chudzik, Barry P. Linder, Shahab Siddiqui
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Patent number: 9006115Abstract: A method of forming a silicone oxide film includes: forming a silicon oxide film on a plurality of target objects by supplying a chlorine-containing silicon source into a reaction chamber accommodating the plurality of target objects; and modifying the silicon oxide film, which is formed by forming the silicon oxide film, by supplying hydrogen and oxygen or hydrogen and nitrous oxide into the reaction chamber and making an interior of the reaction chamber be under a hydrogen-oxygen atmosphere or a hydrogen-nitrous oxide atmosphere.Type: GrantFiled: June 28, 2013Date of Patent: April 14, 2015Assignee: Tokyo Electron LimitedInventors: Tomoyuki Obu, Masaki Kurokawa
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Patent number: 8993458Abstract: Methods and apparatus for improving selective oxidation against metals in a process chamber are provided herein. In some embodiments, a method of oxidizing a first surface of a substrate disposed in a process chamber having a processing volume defined by one or more chamber walls may include exposing the substrate to an oxidizing gas to oxidize the first surface; and actively heating at least one of the one or more chamber walls to increase a temperature of the one or more chamber walls to a first temperature of at least the dew point of water while exposing the substrate to the oxidizing gas.Type: GrantFiled: February 11, 2013Date of Patent: March 31, 2015Assignee: Applied Materials, Inc.Inventors: Agus Tjandra, Christopher S. Olsen, Johanes Swenberg, Lara Hawrylchak
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Patent number: 8906790Abstract: In some embodiments of the present invention, methods of using one or more small spot showerhead apparatus to deposit materials using CVD, PECVD, ALD, or PEALD on small spots in a site isolated, combinatorial manner are described. The small spot showerheads may be configured within a larger combinatorial showerhead to allow multi-layer film stacks to be deposited in a combinatorial manner.Type: GrantFiled: November 8, 2013Date of Patent: December 9, 2014Assignee: Intermolecular, Inc.Inventors: Albert Lee, Tony P. Chiang, Jason Wright
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Patent number: 8889551Abstract: A deposition device includes a deposition source for discharging a deposition material to be deposited on a substrate, an angle control member at least partly in a discharging path of the deposition material for controlling a discharging angle of the deposition material, and an angle control member driver coupled to the angle control member, the angle control member driver for moving the angle control member in a discharging direction of the deposition material to control the discharging angle.Type: GrantFiled: September 13, 2012Date of Patent: November 18, 2014Assignee: Samsung Display Co., Ltd.Inventor: Sang-Woo Lee
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Patent number: 8871654Abstract: A film deposition apparatus forming a thin film by after repeating cycles of sequentially supplying gases to a substrate on a turntable inside a vacuum chamber that includes a first supplying portion for causing the substrate to absorb a first gas containing silicon; a second supplying portion apart from the first supplying portion for supplying a second gas containing active species to produce a silicone dioxide; a separating area between the first and second supplying portions for preventing their mixture; a main heating mechanism for heating the substrate; and an auxiliary mechanism including a heat lamp above the turntable and having a wavelength range absorbable by the substrate to directly heat to be a processing temperature at which an ozone gas is thermally decomposed, wherein a maximum temperature is lower than the thermally decomposed temperature, at which, the first gas is absorbed and oxidized by the second gas.Type: GrantFiled: July 3, 2013Date of Patent: October 28, 2014Assignee: Tokyo Electron LimitedInventors: Hitoshi Kato, Shigehiro Miura
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Patent number: 8866297Abstract: A structure includes a substrate, and a first metal line and a second metal line over the substrate, with a space therebetween. A first air gap is on a sidewall of the first metal line and in the space, wherein an edge of the first metal line is exposed to the first air gap. A second air gap is on a sidewall of the second metal line and in the space, wherein an edge of the second metal line is exposed to the second air gap. A dielectric material is disposed in the space and between the first and the second air gaps.Type: GrantFiled: November 30, 2012Date of Patent: October 21, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-Hsiung Tsai, Chung-Ju Lee, Tien-I Bao
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Publication number: 20140291817Abstract: Semiconductor devices including porous low-k dielectric layers and fabrication methods are provided. A dielectric layer is formed on a substrate by introducing and polymerizing a main reaction gas on a surface of the substrate. The main reaction gas has a chemical structure including a ring-shaped group, silicon, carbon, and hydrogen, and the ring-shaped group includes at least carbon and hydrogen. A porous low-k dielectric layer is then formed from the dielectric layer by curing the dielectric layer with UV light.Type: ApplicationFiled: February 12, 2014Publication date: October 2, 2014Applicant: Semiconductor Manufacturing International (Shanghai) CorporationInventor: MING ZHOU
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Publication number: 20140235068Abstract: Provided is a method of manufacturing a semiconductor device. The method includes (a) loading a substrate having a silicon-containing film formed thereon into a process chamber; (b) supplying a gas into the process chamber from a gas supply unit until an inner pressure of the process chamber is equal to or greater than atmospheric pressure; and (c) supplying a process liquid from a process liquid supply unit to the substrate to oxidize the silicon-containing film.Type: ApplicationFiled: April 30, 2014Publication date: August 21, 2014Applicant: Hitachi Kokusai Electric Inc.Inventors: Hiroshi ASHIHARA, Tomihiro AMANO, Shin HIYAMA, Harunobu SAKUMA, Yuichi WADA, Hideto TATENO
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Patent number: 8790982Abstract: Oxidation methods and resulting structures including providing an oxide layer on a substrate and then reoxidizing the oxide layer by vertical ion bombardment of the oxide layer in an atmosphere containing at least one oxidant. The oxide layer may be provided over diffusion regions, such as source and drain regions, in a substrate. The oxide layer may overlie the substrate and is proximate a gate structure on the substrate. The at least one oxidant may be oxygen, water, ozone, or hydrogen peroxide, or a mixture thereof. These oxidation methods provide a low-temperature oxidation process, less oxidation of the sidewalls of conductive layers in the gate structure, and less current leakage to the substrate from the gate structure.Type: GrantFiled: July 19, 2013Date of Patent: July 29, 2014Assignee: Micron Technology, Inc.Inventors: Li Li, Pai-Hung Pan
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Patent number: 8778813Abstract: An apparatus for plasma processing a substrate is provided. The apparatus comprises a processing chamber, a substrate support disposed in the processing chamber, a shield member disposed in the processing chamber below the substrate support, and a lid assembly coupled to the processing chamber. The lid assembly comprises a conductive gas distributor coupled to a power source, and an electrode separated from the conductive gas distributor and the chamber body by electrical insulators. The electrode is also coupled to a source of electric power. The substrate support is formed with a stiffness that permits very little departure from parallelism. The shield member thermally shields a substrate transfer opening in the lower portion of the chamber body. A pumping plenum is located below the substrate support processing position, and is spaced apart therefrom.Type: GrantFiled: May 6, 2011Date of Patent: July 15, 2014Assignee: Applied Materials, Inc.Inventors: Ramprakash Sankarakrishnan, Ganesh Balasubramanian, Juan Carlos Rocha-Alvarez, Dale R. Du Bois, Mark Fodor, Jianhua Zhou, Amit Bansal, Mohamad A. Ayoub, Shahid Shaikh, Patrick Reilly, Deenesh Padhi, Thomas Nowak
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Publication number: 20140179116Abstract: A semiconductor device comprises a semiconductor substrate, a first electrode formed on a first main surface of the semiconductor substrate, and a second electrode formed on a second main surface of the semiconductor substrate. The semiconductor substrate includes a first region in which a density of oxygen-vacancy defects is greater than a density of vacancy cluster defects, and a second region in which the density of vacancy cluster defects is greater than the density of oxygen-vacancy defects.Type: ApplicationFiled: February 28, 2014Publication date: June 26, 2014Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: TADASHI MISUMI, SHINYA IWASAKI, TAKAHIDE SUGIYAMA
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Patent number: 8735303Abstract: One illustrative method disclosed herein includes forming a first recess in a first active region of a substrate, forming a first layer of channel semiconductor material for a first PFET transistor in the first recess, performing a first thermal oxidation process to form a first protective layer on the first layer of channel semiconductor material, forming a second recess in the second active region of the semiconducting substrate, forming a second layer of channel semiconductor material for the second PFET transistor in the second recess and performing a second thermal oxidation process to form a second protective layer on the second layer of channel semiconductor material.Type: GrantFiled: November 2, 2011Date of Patent: May 27, 2014Assignee: GLOBALFOUNDRIES Inc.Inventors: Hans-Juergen Thees, Stephan Kronholz, Peter Javorka
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Patent number: 8728951Abstract: A method of processing a substrate includes performing a first exposure that comprises generating a plasma containing reactive gas ions in a plasma chamber and generating a bias voltage between the substrate and the plasma chamber. The method also includes providing a plasma sheath modifier having an aperture disposed between the plasma and substrate and operable to direct the reactive gas ions toward the substrate, and establishing a pressure differential between the plasma chamber and substrate region while the reactive gas ions are directed onto the substrate.Type: GrantFiled: July 31, 2012Date of Patent: May 20, 2014Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Ludovic Godet, Xianfeng Lu, Deepak A. Ramappa
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Publication number: 20140134851Abstract: An ozone gas generation processing apparatus that includes a light source of ultraviolet rays and a wafer placement section, generates ozone gas by irradiating ultraviolet rays from the light source in an atmosphere containing oxygen, and processes a wafer on the wafer placement section with the ozone gas, the ozone gas generation processing apparatus comprising a light-blocking plate that allows the generated ozone gas to pass therethrough and blocks the ultraviolet rays between the light source and the wafer placed on the wafer placement section. An ozone gas generation processing apparatus and a method of forming an oxide film silicon film can make an adjustment to make thinner an oxide film formed on a wafer surface, the wafer surface is not damaged by ultraviolet rays when processed, and a method for evaluating a silicon single crystal wafer, obtaining a more stable measurement value of C-V characteristics are provided.Type: ApplicationFiled: July 25, 2012Publication date: May 15, 2014Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventor: Fumitaka Kume
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Patent number: 8703410Abstract: The present invention relates to a CO2 laser-transparent material having a mark on the surface thereof and the method for making the same. The method includes the following steps: providing a first substrate, which has a top surface and a bottom surface; providing a second substrate which has a top surface; putting the bottom surface of the first substrate on the top surface of the second substrate; irradiating a CO2 laser beam to the top surface of the second substrate by passing through the top surface and the bottom surface of the first substrate; and forming a mark on the bottom surface of the first substrate. The material of the mark is oxide of the second substrate or the same as the material of the second substrate. Whereby the cheap CO2 laser is utilized to form the mark on the first substrate, and the mark can be erased easily by a proper chemical for recycling the first substrate.Type: GrantFiled: September 11, 2013Date of Patent: April 22, 2014Assignee: National Cheng Kung UniversityInventors: Chen-Kuei Chung, Meng-Yu Wu, En-Jou Hsiao, Shih-Lung Lin
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Publication number: 20140106573Abstract: A substrate processing apparatus includes a substrate processing chamber including a plasma generation space where a plasma is generated and a substrate processing space where a substrate is placed during a substrate process; an inductive coupling structure outside the plasma generation space wherein a sum of electrical lengths of a coil of the inductive coupling structure and a waveform adjustment circuit connected to the coil is an integer multiple of a wavelength of an applied power; a substrate mounting table in the substrate processing space and supporting the substrate including grooves having high aspect ratios with a silicon-containing layer disposed thereon; a substrate transfer port at a wall of the substrate processing chamber; a substrate mounting table elevator moving the substrate mounting table upward/downward; an oxygen gas supply system to supply an oxygen-containing gas into the plasma generation space; and an exhaust unit exhausting gas from the substrate processing chamber.Type: ApplicationFiled: September 11, 2013Publication date: April 17, 2014Applicant: Hitachi Kokusai Electric Inc.Inventors: Tadashi TERASAKI, Masanori NAKAYAMA, Mitsunori TAKESHITA, Katsunori FUNAKI
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Patent number: 8697583Abstract: Provided according to embodiments of the present invention are an oxidation-promoting compositions, methods of forming oxide layers, and methods of fabricating semiconductor devices. In some embodiments of the invention, the oxidation-promoting composition includes an oxidation-promoting agent having a structure of A-M-L, wherein L is a functional group that is chemisorbed to a surface of silicon, silicon oxide, silicon nitride, or metal, A is a thermally decomposable oxidizing functional group, and M is a moiety that allows A and L to be covalently bonded to each other.Type: GrantFiled: September 2, 2011Date of Patent: April 15, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Kyung-seok Oh, Kyung-mun Byun, Shin-hye Kim, Deok-young Jung, Gil-heyun Choi, Eunkee Hong
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Patent number: 8671878Abstract: An apparatus for forming spacers is provided. A plasma processing chamber is provided, comprising a chamber wall, a substrate support, a pressure regulator, an antenna, a bias electrode, a gas inlet, and a gas outlet. A gas source comprises an oxygen gas source and an anisotropic etch gas source. A controller comprises a processor and computer readable media. The computer readable media comprises computer readable code for placing a substrate of the plurality of substrates in a plasma etch chamber, computer readable code for providing a plasma oxidation treatment to form a silicon oxide coating over the spacer layer, computer readable code for sputtering silicon to form silicon oxide with the oxygen plasma, computer readable code for providing an anisotropic main etch, computer readable code for etching the spacer layer, computer readable code for removing the substrate from the plasma etch chamber after etching the spacer layer.Type: GrantFiled: September 27, 2012Date of Patent: March 18, 2014Assignee: Lam Research CorporationInventors: Qinghua Zhong, Sung Cho, Gowri Kamarthy, Linda Braly
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Publication number: 20140057456Abstract: The substrate processing apparatus includes a process chamber; a susceptor configured to support a wafer; lifter pins configured to support the wafer on the susceptor; a gas supply unit configured to supply a gas into the process chamber; a heating unit configured to heat the wafer; an excitation unit configured to excite the gas supplied into the process chamber; an exhaust unit configured to exhaust the inside of the process chamber; and a controller. The controller controls a reducing gas to be supplied into the process chamber in a state in which the wafer is supported by the lifter pins, and controls the gas supply unit to supply an oxidizing gas and a reducing gas into the process chamber in a state in which the wafer is supported by the susceptor.Type: ApplicationFiled: February 18, 2013Publication date: February 27, 2014Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventor: HITACHI KOKUSAI ELECTRIC INC.
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Patent number: 8642487Abstract: A film deposition method including: a step of carrying a substrate into a vacuum chamber, and placing the substrate on a turntable; a step of rotating the turntable; and an adsorption-formation-irradiation step of supplying a first reaction gas to the substrate from a first reaction gas supply part to adsorb the first reaction gas on the substrate; supplying a second reaction gas from a second reaction gas supply part so that the first reaction gas adsorbed on the substrate reacts with the second reaction gas so as to form a reaction product on the substrate; and supplying a hydrogen containing gas to a plasma generation part that is separated from the first reaction gas supply part and the second reaction gas supply part in a circumferential direction of the turntable so as to generate plasma above the turntable and to irradiate the plasma to the reaction product.Type: GrantFiled: May 15, 2012Date of Patent: February 4, 2014Assignee: Tokyo Electron LimitedInventors: Hitoshi Kato, Shigehiro Ushikubo, Tatsuya Tamura, Shigenori Ozaki, Takeshi Kumagai, Hiroyuki Kikuchi
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Publication number: 20140011369Abstract: A film deposition apparatus forming a thin film by after repeating cycles of sequentially supplying gases to a substrate on a turntable inside a vacuum chamber that includes a first supplying portion for causing the substrate to absorb a first gas containing silicon; a second supplying portion apart from the first supplying portion for supplying a second gas containing active species to produce a silicone dioxide; a separating area between the first and second supplying portions for preventing their mixture; a main heating mechanism for heating the substrate; and an auxiliary mechanism including a heat lamp above the turntable and having a wavelength range absorbable by the substrate to directly heat to be a processing temperature at which an ozone gas is thermally decomposed, wherein a maximum temperature is lower than the thermally decomposed temperature, at which, the first gas is absorbed and oxidized by the second gas.Type: ApplicationFiled: July 3, 2013Publication date: January 9, 2014Inventors: Hitoshi KATO, Shigehiro Miura
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Patent number: 8609519Abstract: In some embodiments of the present invention, methods of using one or more small spot showerhead apparatus to deposit materials using CVD, PECVD, ALD, or PEALD on small spots in a site isolated, combinatorial manner are described. The small spot showerheads may be configured within a larger combinatorial showerhead to allow multi-layer film stacks to be deposited in a combinatorial manner.Type: GrantFiled: November 22, 2011Date of Patent: December 17, 2013Assignee: Intermolecular, Inc.Inventors: Albert Lee, Tony P. Chiang, Jason Wright
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Publication number: 20130277723Abstract: Some embodiments include methods of forming silicon dioxide in which silicon dioxide is formed across silicon utilizing a first treatment temperature of no greater than about 1000° C., and in which an interface between the silicon dioxide and the silicon is annealed utilizing a second treatment temperature which is at least about 1050° C. Some embodiments include methods of forming transistors in which a trench is formed to extend into monocrystalline silicon. Silicon dioxide is formed along multiple crystallographic planes along an interior of the trench utilizing a first treatment temperature of no greater than about 1000° C., and an interface between the silicon dioxide and the monocrystalline silicon is annealed utilizing a second treatment temperature which is at least about 1050° C. A transistor gate is formed within the trench, and a pair of source/drain regions is formed within the monocrystalline silicon adjacent the transistor gate. Some embodiments include DRAM cells.Type: ApplicationFiled: April 19, 2012Publication date: October 24, 2013Applicant: MICRON TECHNOLOGY, INC.Inventors: Shivani Srivastava, Kunal Shrotri, Fawad Ahmed
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Patent number: 8557715Abstract: The present invention relates to a CO2 laser-transparent material having a mark on the surface thereof and the method for making the same. The method includes the following steps: providing a first substrate, which has a top surface and a bottom surface; providing a second substrate which has a top surface; putting the bottom surface of the first substrate on the top surface of the second substrate; irradiating a CO2 laser beam to the top surface of the second substrate by passing through the top surface and the bottom surface of the first substrate; and forming a mark on the bottom surface of the first substrate. The material of the mark is oxide of the second substrate or the same as the material of the second substrate. Whereby the cheap CO2 laser is utilized to form the mark on the first substrate, and the mark can be erased easily by a proper chemical for recycling the first substrate.Type: GrantFiled: July 19, 2010Date of Patent: October 15, 2013Assignee: National Cheng Kung UniversityInventors: Chen-Kuei Chung, Meng-Yu Wu, En-Jou Hsiao, Shih-Lung Lin
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Patent number: 8546201Abstract: A method of crystallizing a silicon layer and a method of manufacturing a thin film transistor using the same, the method of crystallizing the silicon layer including forming an amorphous silicon layer on a substrate; performing a hydrophobicity treatment on a surface of the amorphous silicon layer so as to obtain a hydrophobic surface thereon; forming a metallic catalyst on the amorphous silicon layer that has been subjected to the hydrophobicity treatment; and heat-treating the amorphous silicon layer including the metallic catalyst thereon to crystallize the amorphous silicon layer into a polycrystalline silicon layer.Type: GrantFiled: May 27, 2011Date of Patent: October 1, 2013Assignee: Samsung Display Co., Ltd.Inventors: Yun-Mo Chung, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Yong-Duck Son, Byung-Soo So, Seung-Kyu Park, Byoung-Keon Park, Dong-Hyun Lee, Kil-Won Lee, Tak-Young Lee, Jong-Ryuk Park
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Patent number: 8547085Abstract: An arrangement for measuring process parameters within a processing chamber is provided. The arrangement includes a probe arrangement disposed in an opening of an upper electrode. Probe arrangement includes a probe head, which includes a head portion and a flange portion. The arrangement also includes an o-ring disposed between the upper electrode and the flange portion. The arrangement further includes a spacer made of an electrically insulative material positioned between the head portion and the opening of the upper electrode to prevent the probe arrangement from touching the upper electrode. The spacer includes a disk portion configured for supporting an underside of the flange portion. The spacer also includes a hollow cylindrical portion configured to encircle the head portion. The spacer forms a right-angled path between the o-ring and an opening to the processing chamber to prevent direct line-of-sight path between the o-ring and the opening to the processing chamber.Type: GrantFiled: July 7, 2009Date of Patent: October 1, 2013Assignee: Lam Research CorporationInventors: Jean-Paul Booth, Douglas Keil
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Patent number: 8503189Abstract: Provided are a bonded structure by a lead-free solder and an electronic article comprising the bonded structure. The bonded structure has a stable bonding interface with respect to a change in process of time, an enough strength and resistance to occurrence of whiskers while keeping good wettability of the solder. In the bonded structure, a lead-free Sn—Ag—Bi alloy solder is applied to an electrode through an Sn—Bi alloy layer. The Sn—Bi alloy, preferably, comprises 1 to 20 wt % Bi in order to obtain good wettability of the solder. In order to obtain desirable bonding characteristics having higher reliability in the invention, a copper layer is provided under the Sn—Bi alloy layer thereby obtaining an enough bonding strength.Type: GrantFiled: May 4, 2010Date of Patent: August 6, 2013Assignee: Renesas Electronics CorporationInventors: Hanae Shimokawa, Tasao Soga, Hiroaki Okudaira, Toshiharu Ishida, Tetsuya Nakatsuka, Yoshiharu Inaba, Asao Nishimura
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Patent number: 8497218Abstract: A silicon carbide semiconductor device (90), includes: 1) a silicon carbide substrate (1); 2) a gate electrode (7) made of polycrystalline silicon; and 3) an ONO insulating film (9) sandwiched between the silicon carbide substrate (1) and the gate electrode (7) to thereby form a gate structure, the ONO insulating film (9) including the followings formed sequentially from the silicon carbide substrate (1): a) a first oxide silicon film (O) (10), b) an SiN film (N) (11), and c) an SiN thermally-oxidized film (O) (12, 12a, 12b). Nitrogen is included in at least one of the following places: i) in the first oxide silicon film (O) (10) and in a vicinity of the silicon carbide substrate (1), and ii) in an interface between the silicon carbide substrate (1) and the first oxide silicon film (O) (10).Type: GrantFiled: November 17, 2011Date of Patent: July 30, 2013Assignee: Nissan Motor Co., Ltd.Inventors: Satoshi Tanimoto, Noriaki Kawamoto, Takayuki Kitou, Mineo Miura
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Patent number: 8492291Abstract: The present invention provides a method for manufacturing a gate dielectric (710) that includes providing a nitrided dielectric layer (220) over a substrate (120). The nitrided dielectric layer (220) has a nonuniform concentration of nitrogen in a bulk thereof. The nitrided dielectric layer (220) is exposed to oxygen radicals (410), resulting in a reduction of the non-uniformity.Type: GrantFiled: September 19, 2011Date of Patent: July 23, 2013Assignee: Texas Instruments IncorporatedInventors: Hiroaki Niimi, Reima T. Laaksonen
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Patent number: 8492292Abstract: Methods for processing substrates are provided herein. In some embodiments, a method for processing a substrate includes providing a substrate having an oxide layer disposed thereon, the oxide layer including one or more defects; and exposing the oxide layer to a plasma formed from a process gas comprising an oxygen-containing gas to repair the one or more defects. In some embodiments, the oxide layer may be formed on the substrate. In some embodiments, forming the oxide layer further comprises depositing the oxide layer atop the substrate. In some embodiments, forming the oxide layer further comprises thermally oxidizing the surface of the substrate to form the oxide layer. In some embodiments, a processing temperature is maintained at about 700 degrees Celsius or below during the thermal oxidation of the surface.Type: GrantFiled: June 22, 2010Date of Patent: July 23, 2013Assignee: Applied Materials, Inc.Inventors: Yoshitaka Yokota, Christopher S. Olsen, Agus Sofian Tjandra, Yonah Cho, Matthew S. Rogers
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Patent number: 8465990Abstract: The present invention provides a manufacturing method of a magneto-resistance effect element, in which the step coverage of a formed film can be enlarged and also the film can be deposited in a low temperature range. In an embodiment of the present invention, an insulating protective layer is formed on a multilayered structure by a plasma CVD apparatus in which a plasma source and a film deposition chamber are separated from each other by a partition wall plate. According to the present method, it is possible to deposit the protective layer without inviting the degradation of a magnetic characteristic and also to perform low temperature film deposition even at a temperature lower than 150° C. Hence, it is possible to deposit the protective layer while leaving resist and also to reduce the number of steps in the manufacturing of the magneto-resistance effect element having a multilayered structure.Type: GrantFiled: April 14, 2011Date of Patent: June 18, 2013Assignee: Canon Anelva CorporationInventors: Naoko Matsui, Eiji Ozaki, Hiroshi Akasaka
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Patent number: 8435906Abstract: Methods and apparatus for forming an oxide layer on a semiconductor substrate are disclosed. In one or more embodiments, plasma oxidation is used to form a conformal oxide layer by controlling the temperature of the semiconductor substrate at below about 100° C. Methods for controlling the temperature of the semiconductor substrate according to one or more embodiments include utilizing an electrostatic chuck and a coolant and gas convection.Type: GrantFiled: January 22, 2010Date of Patent: May 7, 2013Assignee: Applied Materials, Inc.Inventors: Agus S. Tjandra, Christopher S. Olsen, Johanes F. Swenberg, Yoshitaka Yokota
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Publication number: 20130095669Abstract: A substrate can be appropriately oxidized, while oxidation of the substrate can be suppressed. The present invention includes a step of generating mixed plasma by causing a mixed gas of hydrogen (H2) gas and oxygen (O2) or oxygen-containing gas supplied to a processing chamber to form a plasma discharge, and processing the starting substrate by the mixed plasma; and a step of generating hydrogen plasma by causing hydrogen (H2) gas supplied to the processing chamber to form a plasma discharge, and processing the substrate by the hydrogen plasma.Type: ApplicationFiled: November 8, 2012Publication date: April 18, 2013Applicant: Hitachi Kokusai Electric Inc.Inventor: Hitachi Kokusai Electric Inc.
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Patent number: 8420541Abstract: A method for increasing adhesion between polysilazane and silicon nitride is disclosed, comprising, providing a substrate comprising a trench, forming a silicon nitride liner layer on a bottom surface and a sidewall of the trench, performing a treating process to the silicon nitride liner layer for producing a hydrophilic surface with OH groups that can increase adhesion between the silicon nitride liner layer and a subsequently formed polysilazane coating layer, and forming a polysilazane coating layer into the trench and on the silicon nitride liner layer.Type: GrantFiled: May 6, 2011Date of Patent: April 16, 2013Assignee: Nanya Technology CorporationInventors: Shing-Yih Shih, Yi-Nan Chen, Hsien-Wen Liu
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Patent number: 8404602Abstract: A plasma oxidation method includes the steps of: generating oxygen-containing plasma with a process gas containing oxygen; applying a bias voltage to a substrate placed on a stage; and radiating positive ions and negative ions in the oxygen-containing plasma onto the substrate so as to perform plasma oxidation of the substrate while controlling a bias potential of the substrate in such a manner that a maximum value Vmax and a minimum value Vmin of the bias potential and a plasma potential Vp satisfy a following relationship: Vmin<Vp<Vmax.Type: GrantFiled: April 12, 2011Date of Patent: March 26, 2013Assignees: FUJIFILM Corporation, Tokai University Educational SystemInventors: Shuji Takahashi, Haruo Shindo
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Patent number: 8404601Abstract: A method of manufacturing a semiconductor device according to the present invention includes the steps of: (a) introducing hydrogen and oxygen on a SiC substrate; and (b) subjecting the hydrogen and the oxygen to a combustion reaction on the SiC substrate to form a gate oxide film being a silicon oxide film on a surface of the SiC substrate by the combustion reaction.Type: GrantFiled: June 12, 2012Date of Patent: March 26, 2013Assignee: Mitsubishi Electric CorporationInventor: Kazuo Kobayashi
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Patent number: 8389412Abstract: The invention relates to a finishing method for a silicon-on-insulator (SOI) substrate that includes an oxide layer buried between an active silicon layer and a support layer of silicon. The method includes applying the following steps in succession: a first rapid thermal annealing (RTA) of the SOI substrate; a sacrificial oxidation of the active silicon layer of the substrate conducted to remove a first oxide thickness; a second RTA of the substrate; and a second sacrificial oxidation of the active silicon layer conducted to remove a second oxide thickness that is thinner than the first oxide thickness.Type: GrantFiled: March 17, 2010Date of Patent: March 5, 2013Assignee: SoitecInventors: Walter Schwarzenbach, Sébastien Kerdiles, Patrick Reynaud, Ludovic Ecarnot, Eric Neyret
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Patent number: 8389420Abstract: A method of forming a silicon oxide film on silicon exposed on a surface of a workpiece includes mounting the workpiece on a mounting table in a processing chamber; generating plasma of a process gas containing oxygen by supplying the process gas into the processing chamber; applying a bias to the workpiece by supplying high-frequency power to the mounting table; and forming the silicon oxide film by applying the plasma to the biased workpiece and oxidizing the silicon. A ratio of oxygen in the process gas is set to be in the range of 0.1% to 10%. A pressure in the processing chamber is set to be in the range of 1.3 Pa to 266.6 Pa upon forming the silicon oxide film. An output of the high-frequency power is set to be in the range of 0.14 W/cm2 to 2.13 W/cm2 per unit area of the workpiece.Type: GrantFiled: March 29, 2011Date of Patent: March 5, 2013Assignee: Tokyo Electron LimitedInventors: Yoshiro Kabe, Hideo Nakamura, Junichi Kitagawa
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Patent number: 8372761Abstract: A silicon oxide film is formed in a processing chamber of a plasma processing apparatus by performing oxidation process, by using plasma to a processing object having a patterned irregularity, wherein the plasma is generated while high-frequency power is supplied to a mount table under the conditions that the oxygen content in a process gas is not less than 0.5% and less than 10% and the process pressure is 1.3 to 665 Pa.Type: GrantFiled: March 28, 2008Date of Patent: February 12, 2013Assignee: Tokyo Electron LimitedInventors: Yoshiro Kabe, Takashi Kobayashi, Toshihiko Shiozawa, Junichi Kitagawa
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Publication number: 20130012033Abstract: A silicon oxide film forming method includes forming a silicon oxide film by allowing a plasma of a processing gas to react on a silicon exposed on a surface of a target object to be processed in a processing chamber of a plasma processing apparatus. The processing gas includes an ozone-containing gas having a volume ratio of O3 to a total volume of O2 and O3, ranging 50% or more.Type: ApplicationFiled: March 9, 2011Publication date: January 10, 2013Applicant: Tokyo Electron LimitedInventors: Yoshiro Kabe, Shuichiro Otao, Yoshihiro Sato
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Patent number: 8318552Abstract: A process for forming gate structures is described. A web comprises a substrate, a plurality of conductive elements disposed on the substrate, and a conductive anodization bus. The web is moved through an anodization station to form a plurality of gate structures comprising a plurality of gate dielectrics adjacent to a plurality of gate electrodes. A process for forming electronic devices further providing a semiconductor, a source electrode, and a drain electrode is described.Type: GrantFiled: May 20, 2008Date of Patent: November 27, 2012Assignee: 3M Innovative Properties CompanyInventors: Jeffrey H. Tokie, Michael A. Haase, Robert J. Schubert, Michael W. Bench, Donald J. McClure, Grace L. Ho
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Patent number: 8318586Abstract: Two plates, each comprising a thin layer of silicon or silicon oxide at a surface thereof, are bonded by subjecting the thin layer of at least one of the plates to a surface treatment step forming a silicon oxynitride superficial thin film with a thickness of less than 5nm. The thin film is performed with a nitrogen-based plasma generated by an inductively coupled plasma source. Furthermore, a potential difference applied between the plasma and a substrate holder supporting said plate during the surface treatment step is less than 50 V, advantageously less than 15 V and preferably zero. This enables a defect-free bonding interface to be obtained irrespective of a temperature of any heat treatment carried out after a contacting step between the respective thin layers of the two plates.Type: GrantFiled: April 28, 2009Date of Patent: November 27, 2012Assignee: Commissariat a l'Energie Atomique et aux Energies AlternativesInventors: Laure Libralesso, Hubert Moriceau, Christophe Morales, François Rieutord, Caroline Ventosa, Thierry Chevolleau
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Publication number: 20120282733Abstract: A method for band gap tuning of metal oxide semiconductors is provided, comprising: placing a metal oxide semiconductor in a plasma chamber; (a1) treating the metal oxide semiconductor with an oxygen plasma for oxidizing the metal oxide semiconductor to decrease band gap thereof; and (a2) treating the metal oxide semiconductor with a hydrogen plasma for reducing the metal oxide semiconductor to increase band gap thereof; or (b1) treating the metal oxide semiconductor with an oxygen plasma for oxidizing the metal oxide semiconductor to increase band gap thereof; and (b2) treating the metal oxide semiconductor with a hydrogen plasma for reducing the metal oxide semiconductor to decrease band gap thereof.Type: ApplicationFiled: August 11, 2011Publication date: November 8, 2012Inventors: Szetsen Steven LEE, Jr-Wei Peng
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Patent number: 8298949Abstract: A method of forming spacers from a non-silicon oxide, silicon containing spacer layer with horizontal surfaces and sidewall surfaces over a substrate is provided. A plasma oxidation treatment is provided to form a silicon oxide coating over the spacer layer, wherein the silicon oxide coating provides a horizontal coating on the horizontal surfaces and sidewall coatings on the sidewall surfaces of the spacer layer. An anisotropic main etch that selectively etches horizontal surfaces of the spacer layer and silicon oxide coating with respect to sidewall surfaces of the spacer layer and the sidewall coatings of the silicon oxide coating is provided. The spacer layer is etched, wherein the sidewall coatings of the silicon oxide coating protect sidewall surfaces of the spacer layer.Type: GrantFiled: January 7, 2009Date of Patent: October 30, 2012Assignee: Lam Research CorporationInventors: Qinghua Zhong, Sung Cho, Gowri Kamarthy, Linda Braly