Abstract: A method of manufacturing a semiconductor device includes: providing a substrate comprising a surface; depositing a first dielectric layer and a second dielectric layer over the substrate; performing a first treatment by introducing a trap-repairing element on the first and second dielectric layers; forming a dummy gate electrode over the second dielectric layer; forming a gate spacer surrounding the dummy gate electrode; forming lightly-doped source/drain (LDD) regions in the substrate on two sides of the gate spacer; forming source/drain regions in the respective LDD regions; removing the dummy gate electrode to form a replacement gate; and forming an inter-layer dielectric (ILD) layer over the replacement gate and the source/drain regions.

Abstract: The present disclosure provides systems and methods for controlling a semiconductor manufacturing apparatus. A control system includes an inspection unit capturing a set of images of the semiconductor manufacturing apparatus, a sensor interface receiving the set of images and generating at least one input signal for a database server, and a control unit. The control unit includes a front end subsystem, a calculation subsystem, and a message and feedback subsystem. The calculation subsystem receives the data signal from the front end subsystem, wherein the calculation subsystem performs an artificial intelligence analytical process to determine, according to the data signal, whether a malfunction has occurred in the semiconductor manufacturing apparatus and to generate an output signal. The message and feedback subsystem generates an alert signal and a feedback signal according to the output signal, and the alert signal is transmitted to a user of the semiconductor manufacturing apparatus.

Abstract: A method for making a semiconductor device includes forming a ROX layer on a substrate and a patterned silicon oxynitride layer on the patterned ROX layer; conformally forming a dielectric oxide layer to cover the substrate, the patterned silicon oxynitride layer, and the patterned ROX layer; and fully oxidizing the patterned silicon oxynitride layer to form a fully oxidized gate oxide layer on the substrate.

Abstract: A method includes depositing a gate dielectric layer over a substrate. A gate electrode layer, a protection oxide layer, and a hard mask are sequentially deposited over the gate dielectric layer. The gate electrode layer and the protection oxide layer are patterned by using the hard mask as an etching mask to form a gate structure over the gate dielectric layer. An etching process is performed to remove the hard mask and thin the protection oxide layer after forming the gate structure.

Abstract: An epitaxial wafer and a method of fabricating an epitaxial wafer, the method including providing a semiconductor substrate doped with both boron and germanium such that a sum of boron concentration and germanium concentration is at least 8.5E+18 atoms/cm3 and the germanium concentration is 6 times or less the boron concentration; forming an epitaxial layer on the semiconductor substrate such that the semiconductor substrate and the epitaxial layer constitute the epitaxial wafer; and annealing the epitaxial wafer for 1 hour or longer at a temperature of 1,000° C. or less.

Abstract: The invention relates to a method of providing a structure by depositing a layer on a substrate in a reactor. The method comprising: introducing a silicon halide precursor in the reactor; introducing a reactant gas comprising oxygen in the reactor; and, providing an energy source to create a plasma from the reactant gas so that the oxygen reacts with the first precursor in a layer comprising silicon dioxide.

Abstract: The present disclosure discloses a method for preparing an isolation area of a gallium oxide device, the method comprising: depositing a mask layer on a gallium oxide material; removing a preset portion region of the mask layer; preparing an isolation area in a position, corresponding to the preset portion region, on the gallium oxide material by using a high-temperature oxidation technique, with the isolation area being located between active areas of the gallium oxide device; and removing the remaining mask layer on the gallium oxide material. In the disclosure, the isolation area is prepared by using the high-temperature oxidation technique, which prevents damage to the gallium oxide device during the preparation of the isolation area, thereby achieving isolation between the active areas of the gallium oxide device.

Abstract: A composition and method for using the composition in the fabrication of an electronic device are disclosed. Compounds, compositions and methods for depositing a low dielectric constant (<4.0) and high oxygen ash resistance silicon-containing film such as, without limitation, a carbon doped silicon oxide, are disclosed.

Abstract: Disclosed is a technology relating to a method for fabricating a multilayer structure. In the method for fabricating the multilayer structure according to the disclosed embodiment, a first material layer including at least one atomic layer is deposited using a first source gas, which includes a first component, and an oxygen-containing reactive gas which is reactive with the first source gas. On the first material layer, a second material layer including at least one atomic layer is deposited using a second source gas, which includes a second component different from the first component, and an oxygen-containing reactive gas which is reactive with the second source gas. The step of depositing the first material layer and the step of depositing the second material layer constitute one cycle, and the cycle is performed at least once.

Abstract: A display panel includes an array substrate, including a display region containing a plurality of display pixels and a border region; and a scattering layer, located on one side of the array substrate and including a scattering region. The plurality of display pixels includes a plurality of pixel rows extending along a first direction and a plurality of pixel columns extending along a second direction. The first direction and the second direction intersect each other. The border region includes an irregularly-shaped border. The plurality of display pixels includes a first plurality of display pixels adjacent to the irregularly-shaped border. The first plurality of display pixels is located in different pixel rows and different pixel columns. A plurality of scattering particles is disposed in the scattering region, and an orthogonal projection of the scattering region on the array substrate covers at least a portion of the first plurality of display pixels.

Abstract: A method of manufacturing a thin film transistor substrate may include forming a gate electrode on a base substrate, forming a gate insulation layer on the base substrate, the gate insulation layer covering the gate electrode, performing a simultaneous ultraviolet ray irradiation and thermal treatment (SUT) process by irradiating an ultraviolet ray at the gate insulation layer and supplying heat to the gate insulation layer at substantially the same time, forming an active pattern on the gate insulation layer, the active pattern overlapping the gate electrode, and forming a source electrode and a drain electrode on the gate insulation layer, the source electrode and the drain electrode being electrically connected to the active pattern.

Abstract: There is provided a technique that includes forming a first film including a ring-shaped structure composed of silicon and carbon and containing nitrogen so as to fill a recess formed in a surface of a substrate by performing a cycle a predetermined number of times, and performing post-treatment by supplying an oxidizing agent to the substrate under a condition that the ring-shaped structure included in the first film is preserved. The cycle includes non-simultaneously performing supplying a precursor including the ring-shaped structure and containing halogen to the substrate with the recess formed in the surface, and supplying a nitriding agent to the substrate, wherein the cycle is performed under a condition that the ring-shaped structure included in the precursor is preserved.

Abstract: A method for manufacturing a semiconductor device includes forming a semiconductor layer on a substrate, the semiconductor layer including a first semiconductor material and a second semiconductor material, patterning the semiconductor layer to form a preliminary active pattern, oxidizing at least two sidewalls of the preliminary active pattern to form an oxide layer on each of the at least two sidewalls of the preliminary active pattern, at least two upper patterns and a semiconductor pattern being formed in the preliminary active pattern when the oxide layers are formed, the semiconductor pattern being disposed between the at least two upper patterns, and removing the semiconductor pattern to form an active pattern, the active pattern including the at least two upper patterns. A concentration of the second semiconductor material in each of the at least two upper patterns is higher than a concentration of the second semiconductor material in the semiconductor pattern.

Abstract: A method includes forming a channel region on a semiconductor substrate. An interfacial layer is formed on the channel region. The interfacial layer is treated with trimethyl aluminum (TMA). A high-k dielectric layer is formed on the interfacial layer after treating the interfacial layer with TMA. A gate electrode is formed on the high-k dielectric layer. The treating the interfacial layer with TMA and forming the high-k dielectric layer are performed in the same chamber. The interfacial layer is annealed before treating the interfacial layer with TMA. The annealing the interfacial layer and treating the interfacial layer with TMA are performed in different chambers.

Abstract: To provide an abnormality detection system capable of reducing work load of an engineer. An algorithm storage unit stores therein a detection algorithm corresponding to identification information of a detection target. An abnormality detection unit detects an abnormality in a detection target signal obtained from a monitor signal of the detection target using a corresponding detection algorithm in the algorithm storage unit. A detection target identification unit determines whether the detection algorithm corresponding to the identification information of the detection target is stored in the algorithm storage unit, and issues a generation request when it is not stored therein. An algorithm generation unit generates the detection algorithm using a corresponding detection target signal according to the generation request.

Abstract: A method of fabricating III-V fin structures includes providing numerous fins. Then, a group III-V material layer is formed to encapsulate an upper portion of each of the fins. Later, part of the group III-V material layer is removed to expose an end of each of the fins, and divides the group III-V material layer into numerous U-shaped structures. Next, a first part of each of the fins and the entire silicon oxide layer are removed. Finally, part of each of the U-shaped structures is removed to segment each of the U-shaped structures into two III-V fin structures.

Abstract: According to one embodiment, there is provided an anomaly detection system for a second unit incidental to a first unit that processes a substrate. The anomaly detection system includes a collecting unit, a first calculating unit, a second calculating unit, and a determining unit. The collecting unit is configured to collect a plurality of types of parameters related to a state of the second unit. The first calculating unit is configured to calculate a divergence of a coordinate point from a reference space in a virtual coordinate space of a plurality of types of parameters, the coordinate point being indicated by the plurality of types of collected parameters. The second calculating unit is configured to accumulate the calculated divergence and calculate a cumulative divergence. The determining unit is configured to compare the calculated cumulative divergence with a threshold value and determine an anomaly in the second unit.

Abstract: A method of manufacturing a semiconductor device is disclosed. The method includes forming a thin film containing a predetermined element, boron, carbon, and nitrogen on a substrate by performing a cycle a predetermined number of times. The cycle includes forming a first layer containing boron and a halogen group by supplying a first precursor gas containing boron and the halogen group to the substrate; and forming a second layer containing the predetermined element, boron, carbon, and nitrogen by supplying a second precursor gas containing the predetermined element and an amino group to the substrate and modifying the first layer.

Abstract: The present disclosure provides one embodiment of a method. The method includes applying a first cleaning fluid to a substrate, thereby cleaning the substrate and forming a protection layer on the substrate; and applying a removing process to the substrate, thereby removing the protection layer from the substrate. The first cleaning fluid includes a cleaning chemical, a protection additive and a solvent.

Abstract: Provided is a substrate processing apparatus including a substrate processing chamber configured to process a substrate; a gas supply unit configured to alternately supply a first processing gas and a second processing gas to the substrate when processing the substrate; a substrate support unit including a support mechanism configured to support a portion of a back side of the substrate and a support unit configured to support the support mechanism; a heating unit configured to heat the substrate from the back side thereof; a standby chamber configured to accommodate the substrate support unit in standby position; and a control unit configured to control at least one of the gas supply unit and a gas exhaust unit in a manner that an inner pressure of the substrate processing chamber is higher than that of the standby chamber.

Abstract: A metal oxide film forming method includes: repeating a cycle a first predetermined number of times, the cycle including supplying a gas containing an organic metal precursor into a processing chamber where an object to be processed is accommodated, and supplying oxygen gas into the processing chamber after the gas containing the organic metal precursor is supplied into the processing chamber; and supplying ozone gas into the processing chamber, wherein repeating the cycle and supplying the ozone gas are repeated a second predetermined number of times, so that a metal oxide film is formed on a surface of the object to be processed.

Abstract: Embodiments of mechanisms of monitoring metal impurity in a high-k dielectric film are provided. The method includes forming an interfacial layer over a substrate. The method also includes forming a high-k dielectric film on the interfacial layer, and the interfacial layer and the high-k dielectric film form a stacked structure over the substrate. The method further includes conducting the first thickness measurement on the stacked structure. In addition, the method includes performing a treatment to the stacked structure after the first thickness measurement, and the treatment includes an annealing process. The method also includes conducting the second thickness measurement on the stacked structure after the treatment.

Abstract: This disclosure relates to a method for dissolving a silicon dioxide layer in a structure, including, from the back surface thereof to the front surface thereof, a supporting substrate, the silicon dioxide layer and a semiconductor layer, the dissolution method being implemented in a furnace in which structures are supported on a support, the dissolution method resulting in the diffusion of oxygen atoms included in the silicon dioxide layer through the semiconductor layer and generating volatile products, and the furnace including traps suitable for reacting with the volatile products, so as to reduce the concentration gradient of the volatile products parallel to the front surface of at least one structure.

Abstract: A method for cleaning a base for supporting an object to process in an apparatus configured to perform a heat process, the method comprising a first step of forming an oxide film on the base including silicon carbide, by subjecting the base to a heat process in a gas atmosphere including oxygen, and a second step of, after the first step, subjecting the base to a heat process in a gas atmosphere including steam, wherein the first step is performed for 10 hours at a temperature of 1000° C. or more.

Abstract: Embodiments described herein generally relate to methods of forming sub-10 nm node FinFETs. Various processing steps are performed on a substrate to provide a trench defining a mandrel structure. Sidewalls of the mandrel structure and a bottom surface of the trench are oxidized and subsequently etched to reduce a width of the mandrel structure. The oxidation and etching of the mandrel structure may be repeated until a desired width of the mandrel structure is achieved. A semiconducting material is subsequently deposited on a regrowth region of the mandrel structure to form a fin structure. The oxidizing and etching the mandrel structure provides a method for forming the fin structure which can achieve sub-10 nm node dimensions and provide increasingly smaller FinFETs.

Abstract: A method of making a semiconductor structure is provided. The method includes forming a tunneling layer over a channel connecting a source and a drain formed in a surface of a substrate, forming a charge storage layer overlying the tunneling layer, and forming a blocking structure on the charge storage layer by plasma oxidation. A thickness of the charge storage layer is reduced through oxidation of a portion of the charge storage layer during the formation of the blocking structure. Other embodiments are also described.

Abstract: A metal-insulator-semiconductor field-effect transistor (MISFET) includes a SiC layer with source and drain regions of a first conductivity type spaced apart therein. A first gate insulation layer is on the SiC layer and has a net charge along an interface with the SiC layer that is the same polarity as majority carriers of the source region. A gate contact is on the first gate insulation layer over a channel region of the SiC layer between the source and drain regions. The net charge along the interface between the first gate insulation layer and the SiC layer may deplete majority carriers from an adjacent portion of the channel region between the source and drain regions in the SiC layer, which may increase the threshold voltage of the MISFET and/or increase the electron mobility therein.

Abstract: Methods and apparatus to form films on sensitive substrates while preventing damage to the sensitive substrate are provided herein. In certain embodiments, methods involve forming a bilayer film on a sensitive substrate that both protects the underlying substrate from damage and possesses desired electrical properties. Also provided are methods and apparatus for evaluating and optimizing the films, including methods to evaluate the amount of substrate damage resulting from a particular deposition process and methods to determine the minimum thickness of a protective layer. The methods and apparatus described herein may be used to deposit films on a variety of sensitive materials such as silicon, cobalt, germanium-antimony-tellerium, silicon-germanium, silicon nitride, silicon carbide, tungsten, titanium, tantalum, chromium, nickel, palladium, ruthenium, or silicon oxide.

Abstract: Provided is a method of forming a seed layer as a seed of a thin film on an underlayer, which includes: forming a first seed layer on a surface of the underlayer by heating the underlayer, followed by supplying an aminosilane-based gas onto the surface of the heated underlayer; and forming a second seed layer on the surface of the underlayer with the first seed layer formed thereon by heating the underlayer, followed by supplying a disilane or higher order silane-based gas onto the surface of the heated underlayer.

Abstract: An object is to provide a technique to manufacture an insulating film having excellent film characteristics. In particular, an object is to provide a technique to manufacture a dense insulating film with a high withstand voltage. Moreover, an object is to provide a technique to manufacture an insulating film with few electron traps. An insulating film including oxygen is subjected to plasma treatment using a high frequency under the conditions where the electron density is 1×1011 cm?3 or more and the electron temperature is 1.5 eV or less in an atmosphere including oxygen.

Abstract: A semiconductor device includes an oxide semiconductor layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode, and the drain electrode, and a gate electrode over the gate insulating layer. The source electrode and the drain electrode include an oxide region formed by oxidizing a side surface thereof. Note that the oxide region of the source electrode and the drain electrode is preferably formed by plasma treatment with a high frequency power of 300 MHz to 300 GHz and a mixed gas of oxygen and argon.

Abstract: A method of manufacturing an SiC semiconductor device includes the steps of forming a first oxide film on a first surface of an SiC semiconductor, removing the first oxide film, and forming a second oxide film constituting the SiC semiconductor device on a second surface exposed as a result of removal of the first oxide film in the SiC semiconductor. Between the step of removing the first oxide film and the step of forming a second oxide film, the SiC semiconductor is arranged in an atmosphere cut off from an ambient atmosphere.

Abstract: A non-volatile memory device includes a field region that defines an active region in a semiconductor substrate, a floating gate pattern on the active region, a dielectric layer on the floating gate pattern and a control gate on the dielectric layer. The control gate includes a first conductive pattern that has a first composition that crystallizes in a first temperature range, and a second conductive pattern that has a second composition that is different from the first composition and that crystallizes in a second temperature range that is lower than the first temperature range, the first conductive pattern being between the dielectric layer and the second conductive pattern.

Abstract: A method of semiconductor fabrication includes providing an unpatterned lightly doped Czochralski bulk silicon substrate (LDCBS substrate) having a concentration of oxygen atoms of at least (?) 1017 atoms/cm3 with a boron doping or n-type doping concentration of between 1×1012 cm?3 and 5×1014 cm?3. Before any oxidization processing, the LDCBS substrate is annealed at a nucleating temperature between 550° C. and 760° C. for a nucleating time that nucleates the oxygen atoms in a sub-surface region of the LDCBS substrate to form oxygen precipitates therefrom. After the annealing, a surface of the LDCBS substrate or an epitaxial layer on the surface of the LDCBS substrate is initially oxidized in an oxidizing ambient at a peak temperature of between 800° C. and 925° C. for a time less than or equal (?) to 30 minutes.

Abstract: A substrate processing apparatus capable of forming an oxide film on a substrate by forming a layer on the substrate by supplying a source gas into a process vessel accommodating the substrate via the first nozzle, and simultaneously supplying an oxygen-containing gas through a second nozzle and a hydrogen-containing gas through a first nozzle into the process vessel having an inside pressure thereof lower than atmospheric pressure; mixing and reacting the oxygen-containing gas with the hydrogen-containing gas in a non-plasma atmosphere within the process vessel to generate atomic oxygen; and oxidizing the layer with the atomic oxygen to change the layer into an oxide layer is disclosed.

Abstract: A method of forming a silicone oxide film includes: forming a silicon oxide film on a plurality of target objects by supplying a chlorine-containing silicon source into a reaction chamber accommodating the plurality of target objects; and modifying the silicon oxide film, which is formed by forming the silicon oxide film, by supplying hydrogen and oxygen or hydrogen and nitrous oxide into the reaction chamber and making an interior of the reaction chamber be under a hydrogen-oxygen atmosphere or a hydrogen-nitrous oxide atmosphere.

Abstract: A method for producing a semiconductor device is disclosed. The method includes providing a semiconductor body having a first surface, and a second surface opposite the first surface, producing a first trench having a bottom and sidewalls and extending from the first surface into the semiconductor body, forming a dielectric layer along at least one sidewall of the trench, and filling the trench with a filling material. Forming the dielectric layer includes forming a protection layer on the least one sidewall such that the protection layer leaves a section of the at least one sidewall uncovered, oxidizing the semiconductor body in the region of the uncovered sidewall section to form a first section of the dielectric layer, removing the protection layer, and forming a second section of the dielectric layer on the at least one sidewall.

Abstract: Methods and apparatus for improving selective oxidation against metals in a process chamber are provided herein. In some embodiments, a method of oxidizing a first surface of a substrate disposed in a process chamber having a processing volume defined by one or more chamber walls may include exposing the substrate to an oxidizing gas to oxidize the first surface; and actively heating at least one of the one or more chamber walls to increase a temperature of the one or more chamber walls to a first temperature of at least the dew point of water while exposing the substrate to the oxidizing gas.

Abstract: A method for fabricating a nonvolatile charge trap memory device and the device are described. In one embodiment, the method includes providing a substrate in an oxidation chamber, wherein the substrate comprises a first exposed crystal plane and a second exposed crystal plane, and wherein the crystal orientation of the first exposed crystal plane is different from the crystal orientation of the second exposed crystal plane. The substrate is then subjected to a radical oxidation process to form a first portion of a dielectric layer on the first exposed crystal plane and a second portion of the dielectric layer on the second exposed crystal plane, wherein the thickness of the first portion of the dielectric layer is approximately equal to the thickness of the second portion of the dielectric layer.

Abstract: A lithographic material stack including a metal-compound hard mask layer is provided. The lithographic material stack includes a lower organic planarizing layer (OPL), a dielectric hard mask layer, and the metal-compound hard mask layer, an upper OPL, an optional anti-reflective coating (ARC) layer, and a photoresist layer. The metal-compound hard mask layer does not attenuate optical signals from lithographic alignment marks in underlying material layers, and can facilitate alignment between different levels in semiconductor manufacturing.

Abstract: A silicon carbide substrate having a main face is prepared. By applying thermal oxidation to the main face of the silicon carbide substrate at a first temperature, an oxide film is formed on the main face. After the oxide film is formed, heat treatment is applied to the silicon carbide substrate at a second temperature higher than the first temperature. An opening exposing a portion of the main face is formed at the oxide film. A Schottky electrode is formed on the main face exposed by the opening.

Abstract: Disclosed a method for manufacturing an oxide layer, applicable to a manufacture procedure of a field oxide layer of a CMOS transistor in the field of semiconductor manufacturing, the method includes: injecting a first gas satisfying a first predetermined condition into a processing furnace in which a first CMOS transistor semi-finished product formed with an N-well and a P-well is placed, and dry-oxidizing the first CMOS transistor semi-finished product into a second CMOS transistor semi-finished product; and injecting a second gas satisfying a second predetermined condition different from the first predetermined condition into the processing furnace, and wet-oxidizing the second CMOS transistor semi-finished product into a third CMOS transistor semi-finished product.

Abstract: A method of manufacturing a semiconductor device includes forming a thin film containing a specific element, oxygen, carbon, and nitrogen by performing a cycle a predetermined number of times. The cycle includes supplying a specific element-containing gas, supplying a carbon-containing gas, supplying an oxidizing gas, and supplying a nitriding gas. The act of supplying the nitriding gas is performed before the act of supplying the specific element-containing gas, and the act of supplying the carbon-containing gas and the act of supplying the oxidizing gas are not performed until the act of supplying the specific element-containing gas is performed.

Abstract: A manufacturing method of a semiconductor device, which includes the steps of forming a gate electrode layer over a substrate having an insulating surface, forming a gate insulating layer over the gate electrode layer, forming an oxide semiconductor layer over the gate insulating layer, forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer, forming an insulating layer including oxygen over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and after formation of an insulating layer including hydrogen over the insulating layer including oxygen, performing heat treatment so that hydrogen in the insulating layer including hydrogen is supplied to at least the oxide semiconductor layer.

Abstract: An insulating film having features such as a low dielectric constant, a low etching rate and a high insulating property is formed. An oxycarbonitride film is formed on a substrate by performing a cycle a predetermined number of times, the cycle including: (a) supplying a gas containing an element to the substrate; (b) supplying a carbon-containing gas to the substrate; (c) supplying a nitrogen-containing gas to the substrate; and (d) supplying an oxygen-containing gas to the substrate.

Abstract: A method for fabricating a nonvolatile charge trap memory device is described. The method includes subjecting a substrate to a first oxidation process to form a tunnel oxide layer overlying a polysilicon channel, and forming over the tunnel oxide layer a multi-layer charge storing layer comprising an oxygen-rich, first layer comprising a nitride, and an oxygen-lean, second layer comprising a nitride on the first layer. The substrate is then subjected to a second oxidation process to consume a portion of the second layer and form a high-temperature-oxide (HTO) layer overlying the multi-layer charge storing layer. The stoichiometric composition of the first layer results in it being substantially trap free, and the stoichiometric composition of the second layer results in it being trap dense. The second oxidation process can comprise a plasma oxidation process or a radical oxidation process using In-Situ Steam Generation.

Abstract: The disclosure relates to a fin field effect transistor (FinFET). An exemplary FinFET comprises a substrate comprising a major surface; a fin structure protruding from the major surface comprising a lower portion comprising a first semiconductor material having a first lattice constant; an upper portion comprising the first semiconductor material having the first lattice constant; a middle portion between the lower portion and upper portion, wherein the middle portion comprises a second semiconductor material having a second lattice constant different from the first lattice constant; and a pair of notches extending into opposite sides of the middle portion; and an isolation structure surrounding the fin structure, wherein a top surface of the isolation structure is higher than a top surface of the pair of notches.

Abstract: An apparatus includes a wafer annealing tool and a plurality of electrodes coupled to the wafer annealing tool, wherein the electrodes are configured to be in physical contact with a wafer so that, when the wafer is annealed, a negative electrical bias is formed across one or more gate stacks of the wafer.

Abstract: The disclosure relates to an apparatus for oxidation and annealing processes comprising: a chamber; an oxidizing unit located in the chamber, where an oxidizing process for a subject to be processed is conducted; and an annealing unit located in the chamber, where an annealing process for the subject to be processed is conducted. Further, The disclosure relates to a method for the oxidation and annealing processes comprising: preparing a chamber comprising an oxidizing unit and an annealing unit; preparing a subject to be processed on a susceptor located in the oxidizing unit; oxidizing the subject to be processed; converting atmosphere of the oxidizing unit; transferring the subject to be processed to the annealing unit; and annealing the subject to be processed.

Abstract: Oxygen is selectively removed from metal-containing materials in a partially-fabricated integrated circuit. In some embodiments, the partially-fabricated integrated circuit has exposed silicon and metal-containing materials, e.g., as part of a transistor. The silicon and metal-containing material are oxidized. Oxygen is subsequently removed from the metal-containing material by an anneal in an atmosphere containing a reducing agent. Advantageously, the silicon oxide formed by the silicon oxidation is maintained while oxygen is removed from the metal-containing material, thereby leaving a high quality metal-containing material along with silicon oxide.