Organic Reactant Patents (Class 438/794)
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Patent number: 11764072Abstract: A method for processing a workpiece is provided. The method can include placing a workpiece on a susceptor disposed within a processing chamber. The method can include performing a multi-cycle thermal treatment process on the workpiece in the processing chamber. The multi-cycle thermal treatment process can include at least two thermal cycles. Each thermal cycle of the at least two thermal cycles can include performing a first treatment on the workpiece at a first temperature; heating a device side surface of the workpiece to a second temperature in less than one second; performing a second treatment on the workpiece at approximately the second temperature; and cooling the workpiece subsequent to performing the second treatment.Type: GrantFiled: February 24, 2020Date of Patent: September 19, 2023Assignees: Beijing E-Town Semiconductor Technology, Co., LTD, Mattson Technology, Inc.Inventors: Michael X. Yang, Shawming Ma
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Patent number: 11746411Abstract: The present invention relates to a method for forming a thin film, and more particularly, to a method for forming a thin film comprising steps of: i) adsorbing a growth inhibitor for forming a thin film on a surface of a substrate, the growth inhibitor for forming a thin film being represented by Chemical Formula 1 below; and ii) adsorbing a Ti-based thin film precursor on a surface of a substrate on which the growth inhibitor is adsorbed. AnBmXo??[Chemical Formula 1] wherein A is carbon or silicon, B is hydrogen or a C1-C3 alkyl, X is a halogen, n is an integer of 1 to 15, o is an integer of 1 or more, and m is 0 to 2n+1. According to the present invention, it is possible to suppress side reactions to appropriately lower a thin film growth rate and remove process byproducts in the thin film, thereby preventing corrosion or deterioration and greatly improving step coverage and thickness uniformity of a thin film, even when the thin film is formed on a substrate having a complex structure.Type: GrantFiled: January 6, 2020Date of Patent: September 5, 2023Inventors: Changbong Yeon, Jaesun Jung, Hyeran Byun, Taeho Song, Sojung Kim, Seokjong Lee
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Patent number: 11702743Abstract: Described herein are compositions and methods for forming silicon and oxygen containing films. In one aspect, the film is deposited from at least one precursor, wherein the at least one precursor selected from the group consisting of Formula C: as defined herein.Type: GrantFiled: July 12, 2021Date of Patent: July 18, 2023Assignee: Versum Materials US, LLCInventors: Xinjian Lei, Matthew R. MacDonald, Meiliang Wang
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Patent number: 11699584Abstract: Methods are disclosed for forming a Silicon Metal Oxide film using a mono-substituted TSA precursor. The precursors have the formula: (SiH3)2N—SiH2-X, wherein X is selected from a halogen atom; an isocyanato group; an amino group; an N-containing C4-C10 saturated or unsaturated heterocycle; or an alkoxy group.Type: GrantFiled: March 10, 2021Date of Patent: July 11, 2023Assignee: L'Air Liquide, Société Anonyme pour l'Edute ed l'Exploitation des Procédés Georges ClaudeInventors: Jean-Marc Girard, Peng Zhang, Antonio Sanchez, Manish Khandelwal, Gennadiy Itov, Reno Pesaresi
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Patent number: 10770590Abstract: A method for fabricating a semiconductor structure includes providing a base substrate, including a substrate, a plurality of gate structures formed on the substrate, and a cap layer formed on the plurality of gate structures; removing the cap layer to form a trench on each gate structure; and forming a substitution layer in the trench. The dielectric constant of the substitution layer is smaller than the dielectric constant of the cap layer.Type: GrantFiled: August 28, 2018Date of Patent: September 8, 2020Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, SMIC New Technology Research and Development (Shanghai) CorporationInventor: Fei Zhou
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Patent number: 9478434Abstract: A method of removing titanium nitride hardmask is described. The hardmask resides above a low-k dielectric layer prior to removal and the low-k dielectric layer retains a relatively low net dielectric constant after the removal process. The low-k dielectric layer may be part of a dual damascene structure having copper at the bottom of the vias. A non-porous carbon layer is deposited prior to the titanium nitride hardmask removal to protect the low-k dielectric layer and the copper. The titanium nitride hardmask is removed with a gas-phase etch using plasma effluents formed in a remote plasma from a chlorine-containing precursor. Plasma effluents within the remote plasma are flowed into a substrate processing region where the plasma effluents react with the titanium nitride.Type: GrantFiled: November 17, 2014Date of Patent: October 25, 2016Assignee: Applied Materials, Inc.Inventors: Xikun Wang, Mandar Pandit, Zhenjiang Cui, Mikhail Korolik, Anchuan Wang, Nitin K. Ingle, Jie Liu
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Publication number: 20150147893Abstract: Classes of liquid aminosilanes have been found which allow for the production of silicon carbo-nitride films of the general formula SixCyNz. These aminosilanes, in contrast, to some of the precursors employed heretofore, are liquid at room temperature and pressure allowing for convenient handling. In addition, the invention relates to a process for producing such films. The classes of compounds are generally represented by the formulas: and mixtures thereof, wherein R and R1 in the formulas represent aliphatic groups typically having from 2 to about 10 carbon atoms, e.g., alkyl, cycloalkyl with R and R1 in formula A also being combinable into a cyclic group, and R2 representing a single bond, (CH2)n, a ring, or SiH2.Type: ApplicationFiled: December 16, 2014Publication date: May 28, 2015Applicant: AIR PRODUCTS AND CHEMICALS, INC.Inventors: Manchao Xiao, Arthur Kenneth Hochberg
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Publication number: 20150147871Abstract: Described herein are precursors and methods for forming silicon-containing films.Type: ApplicationFiled: June 2, 2014Publication date: May 28, 2015Applicant: AIR PRODUCTS AND CHEMICALS, INC.Inventors: Manchao Xiao, Xinjian Lei, Daniel P. Spence
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Patent number: 9029171Abstract: The present disclosure relates to a structure and method to create a self-repairing dielectric material for semiconductor device applications. A porous dielectric material is deposited on a substrate, and exposed with treating agent particles such that the treating agent particles diffuse into the dielectric material. A dense non-porous cap is formed above the dielectric material which encapsulates the treating agent particles within the dielectric material. The dielectric material is then subjected to a process which creates damage to the dielectric material. A chemical reaction is initiated between the treating agent particles and the damage, repairing the damage. A gradient concentration resulting from the consumption of treating agent particles by the chemical reaction promotes continuous diffusion the treating agent particles towards the damaged region of the dielectric material, continuously repairing the damage.Type: GrantFiled: June 25, 2012Date of Patent: May 12, 2015Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tsung-Min Huang, Chung-Ju Lee, Tien-I Bao
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Publication number: 20150111395Abstract: According to the present disclosure, a film containing a predetermined element, carbon and nitrogen is formed with high controllability of a composition thereof. A method of manufacturing a semiconductor device includes forming a film containing a predetermined element, carbon and nitrogen on a substrate by performing a cycle a predetermined number of times. The cycle includes supplying a first processing gas containing the predetermined element and a halogen element to the substrate, supplying a second processing gas composed of three elements of carbon, nitrogen and hydrogen to the substrate, and supplying a third processing gas containing carbon to the substrate.Type: ApplicationFiled: September 25, 2014Publication date: April 23, 2015Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Yoshitomo HASHIMOTO, Yoshiro HIROSE, Tatsuru MATSUOKA
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Publication number: 20150087139Abstract: Described herein are precursors and methods for forming silicon-containing films. In one aspect, the precursor comprises a compound represented by one of following Formulae A through E below: In one particular embodiment, the organoaminosilane precursors are effective for a low temperature (e.g., 350° C. or less), atomic layer deposition (ALD) or plasma enhanced atomic layer deposition (PEALD) of a silicon-containing film. In addition, described herein is a composition comprising an organoaminosilane described herein wherein the organoaminosilane is substantially free of at least one selected from the amines, halides (e.g., Cl, F, I, Br), higher molecular weight species, and trace metals.Type: ApplicationFiled: September 11, 2014Publication date: March 26, 2015Applicant: AIR PRODUCTS AND CHEMICALS, INC.Inventors: Mark Leonard O'Neill, Manchao Xiao, Xinjian Lei, Richard Ho, Haripin Chandra, Matthew R. MacDonald, Meiliang Wang
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Patent number: 8940648Abstract: A method for depositing a silicon containing film on a substrate using an organoaminosilane is described herein. The organoaminosilanes are represented by the formulas: wherein R is selected from a C1-C10 linear, branched, or cyclic, saturated or unsaturated alkyl group with or without substituents; a C5-C10 aromatic group with or without substituents, a C3-C10 heterocyclic group with or without substituents, or a silyl group in formula C with or without substituents, R1 is selected from a C3-C10 linear, branched, cyclic, saturated or unsaturated alkyl group with or without substituents; a C6-C10 aromatic group with or without substituents, a C3-C10 heterocyclic group with or without substituents, a hydrogen atom, a silyl group with substituents and wherein R and R1 in formula A can be combined into a cyclic group and R2 representing a single bond, (CH2), chain, a ring, C3-C10 branched alkyl, SiR2, or SiH2.Type: GrantFiled: August 12, 2013Date of Patent: January 27, 2015Assignee: Air Products and Chemicals, Inc.Inventors: Manchao Xiao, Xinjian Lei, Heather Regina Bowen, Mark Leonard O'Neill
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Publication number: 20150024608Abstract: Described herein are precursors and methods for forming silicon-containing films. In one aspect, there is provided a precursor of Formula I: wherein R1 is selected from linear or branched C3 to C10 alkyl group, linear or branched C3 to C10 alkenyl group, linear or branched C3 to C10 alkynyl group, C1 to C6 dialkylamino group, electron withdrawing group, and C6 to C10 aryl group; R2 is selected from hydrogen, linear or branched C1 to C10 alkyl group, linear or branched C3 to C6 alkenyl group, linear or branched C3 to C6 alkynyl group, C1 to C6 dialkylamino group, C6 to C10 aryl group, linear or branched C1 to C6 fluorinated alkyl group, electron withdrawing group, and C4 to C10 aryl group; optionally wherein R1 and R2 are linked together to form ring selected from substituted or unsubstituted aromatic ring or substituted or unsubstituted aliphatic ring; and n=1 or 2.Type: ApplicationFiled: October 10, 2014Publication date: January 22, 2015Applicant: AIR PRODUCTS AND CHEMICALS, INC.Inventors: Steven Gerard Mayorga, Heather Regina Bowen, Xinjian Lei, Manchao Xiao, Haripin Chandra, Anupama Mallikarjunan, Ronald Martin Pearlstein
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Publication number: 20140363985Abstract: Provided are a novel amino-silyl amine compound, a method for preparing the same, and a silicon-containing thin-film using the same, wherein the amino-silyl amine compound has thermal stability and high volatility and is maintained in a liquid state at room temperature and under a pressure where handling is easy to thereby form a silicon-containing thin-film having high purity and excellent physical and electrical properties by various deposition methods.Type: ApplicationFiled: June 4, 2014Publication date: December 11, 2014Inventors: Se Jin Jang, Sang Do Lee, Sung Gi Kim, Jong Hyun Kim, Byeong IL Yang, Jang Hyeon Seok, Sang Ick Lee, Myong Woon Kim
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Patent number: 8759234Abstract: A system and method for manufacturing a semiconductor device is provided. An embodiment comprises forming a deposited layer using an atomic layer deposition (ALD) process. The ALD process may utilize a first precursor for a first time period, a first purge for a second time period longer than the first time period, a second precursor for a third time period longer than the first time period, and a second purge for a fourth time period longer than the third time period.Type: GrantFiled: October 17, 2011Date of Patent: June 24, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yao-Wen Chang, Cheng-Yuan Tsai, Hsing-Lien Lin
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Patent number: 8563443Abstract: A method of forming a dielectric film having at least Si—N, Si—C, or Si—B bonds on a semiconductor substrate by atomic layer deposition (ALD), includes: supplying a precursor in a pulse to adsorb the precursor on a surface of a substrate; supplying a reactant gas in a pulse over the surface without overlapping the supply of the precursor; reacting the precursor and the reactant gas on the surface; and repeating the above steps to form a dielectric film having at least Si—N, Si—C, or Si—B bonds on the substrate. The precursor has at least one Si—C or Si—N bond, at least one hydrocarbon, and at least two halogens attached to silicon in its molecule.Type: GrantFiled: August 3, 2012Date of Patent: October 22, 2013Assignee: ASM Japan K.K.Inventor: Atsuki Fukazawa
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Patent number: 8530361Abstract: A method for depositing a silicon containing film on a substrate using an organoaminosilane is described herein. The organoaminosilanes are represented by the formulas: wherein R is selected from a C1-C10 linear, branched, or cyclic, saturated or unsaturated alkyl group with or without substituents; a C5-C10 aromatic group with or without substituents, a C3-C10 heterocyclic group with or without substituents, or a silyl group in formula C with or without substituents, R1 is selected from a C3-C10 linear, branched, cyclic, saturated or unsaturated alkyl group with or without substituents; a C6-C10 aromatic group with or without substituents, a C3-C10 heterocyclic group with or without substituents, a hydrogen atom, a silyl group with substituents and wherein R and R1 in formula A can be combined into a cyclic group and R2 representing a single bond, (CH2)n chain, a ring, C3-C10 branched alkyl, SiR2, or SiH2.Type: GrantFiled: December 22, 2010Date of Patent: September 10, 2013Assignee: Air Products and Chemicals, Inc.Inventors: Manchao Xiao, Xinjian Lei, Heather Regina Bowen, Mark Leonard O'Neill
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Patent number: 8394724Abstract: A method for forming device features with reduced line end shortening (LES) includes trimming the device feature to achieve the desired sub-ground rule critical dimension during the etch to form the device feature.Type: GrantFiled: August 22, 2007Date of Patent: March 12, 2013Assignee: Globalfoundries Singapore Pte. Ltd.Inventors: Hai Cong, Wei Loong Loh, Krishan Gopal, Xin Zhang, Mei Sheng Zhou, Pradeep Ramachandramurthy Yelehanka
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Patent number: 8329599Abstract: A method of forming a dielectric film having at least Si—N, Si—C, or Si—B bonds on a semiconductor substrate by atomic layer deposition (ALD), includes: adsorbing a precursor on a surface of a substrate; supplying a reactant gas over the surface; reacting the precursor and the reactant gas on the surface; and repeating the above steps to form a dielectric film having at least Si—N, Si—C, or Si—B bonds on the substrate. The precursor has at least one Si—C or Si—N bond, at least one hydrocarbon, and at least one halogen attached to silicon in its molecule.Type: GrantFiled: February 18, 2011Date of Patent: December 11, 2012Assignee: ASM Japan K.K.Inventors: Atsuki Fukazawa, Noboru Takamure
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Patent number: 8212286Abstract: The semiconductor light receiving element 1 includes a semiconductor substrate 101, and a semiconductor layer having a photo-absorption layer 105 disposed on the top of the semiconductor substrate 101. The semiconductor layer of the semiconductor light receiving element 1 containing at least the photo-absorption layer 105 has a mesa structure, and a side wall of the mesa is provided with a protective film 113 covering the side wall. The protective film 113 is a silicon nitride film containing hydrogen, and a hydrogen concentration in one surface of the protective film 113 located at the side of the mesa side wall is lower than a hydrogen concentration in the other surface of the protective film 113 located at the side that is opposite to the side of the mesa side wall.Type: GrantFiled: December 25, 2008Date of Patent: July 3, 2012Assignee: NEC CorporationInventor: Emiko Fujii
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Patent number: 8187973Abstract: A method for manufacturing a semiconductor device which includes: alternately supplying a silicon source and an oxidant to deposit a silicon oxide film on a surface of a semiconductor substrate, wherein the silicon source is supplied under a supply condition where an adsorption amount of molecules of the silicon source on the semiconductor substrate is increased without causing an adsorption saturation of the molecules of the silicon source on the semiconductor substrate, and wherein the oxidant is supplied under a supply condition where impurities remain in the molecules of the silicon source adsorbed on the semiconductor substrate.Type: GrantFiled: March 16, 2009Date of Patent: May 29, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Katsuyuki Sekine, Kazuhei Yoshinaga
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Patent number: 8178439Abstract: A method is provided for integrating metal-containing cap layers into copper (Cu) metallization of semiconductor devices. In one embodiment, the method includes providing a planarized patterned substrate containing metal surfaces and dielectric layer surfaces with a residue formed thereon, removing the residue from the planarized patterned substrate, and depositing metal-containing cap layers selectively on the metal surfaces by exposing the dielectric layer surfaces and the metal surfaces to a deposition gas containing metal-containing precursor vapor. The removing includes treating the planarized patterned substrate containing the residue with a reactant gas containing a hydrophobic functional group, and exposing the treated planarized patterned substrate to a reducing gas.Type: GrantFiled: March 30, 2010Date of Patent: May 15, 2012Assignee: Tokyo Electron LimitedInventors: Kazuhito Tohnoe, Frank M. Cerio, Jr.
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Patent number: 8119483Abstract: Some embodiments include methods of utilizing polysilazane in forming non-volatile memory cells. The memory cells may be multi-level cells (MLCs). The polysilazane may be converted to silicon nitride, silicon dioxide, or silicon oxynitride with thermal processing and exposure to an ambient that contains one or both of oxygen and nitrogen. The methods may include using the polysilazane in forming a charge trapping layer of a non-volatile memory cell. The methods may alternatively, or additionally include using the polysilazane in forming intergate dielectric material of a non-volatile memory cell. Some embodiments include methods of forming memory cells of a NAND memory array.Type: GrantFiled: March 3, 2011Date of Patent: February 21, 2012Assignee: Micron Technology, Inc.Inventor: Ronald A. Weimer
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Patent number: 7951730Abstract: Methods for forming silicon nitride hard masks are provided. The silicon nitride hard masks include carbon-doped silicon nitride layers and undoped silicon nitride layers. Carbon-doped silicon nitride layers that are deposited from a mixture comprising a carbon source compound, a silicon source compound, and a nitrogen source in the presence of RF power are provided. Also provided are methods of UV post-treating silicon nitride layers to provide silicon nitride hard masks. The carbon-doped silicon nitride layers and UV post-treated silicon nitride layers have desirable wet etch rates and dry etch rates for hard mask layers.Type: GrantFiled: February 4, 2009Date of Patent: May 31, 2011Assignee: Applied Materials, Inc.Inventors: Ritwik Bhatia, Li-Qun Xia, Chad Peterson, Hichem M'Saad
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Patent number: 7915126Abstract: Some embodiments include methods of utilizing polysilazane in forming non-volatile memory cells. The memory cells may be multi-level cells (MLCs). The polysilazane may be converted to silicon nitride, silicon dioxide, or silicon oxynitride with thermal processing and exposure to an ambient that contains one or both of oxygen and nitrogen. The methods may include using the polysilazane in forming a charge trapping layer of a non-volatile memory cell. The methods may alternatively, or additionally include using the polysilazane in forming intergate dielectric material of a non-volatile memory cell. Some embodiments include methods of forming memory cells of a NAND memory array.Type: GrantFiled: February 14, 2007Date of Patent: March 29, 2011Assignee: Micron Technology, Inc.Inventor: Ronald A. Weimer
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Patent number: 7910475Abstract: A method for forming a semiconductor device is provided. In one embodiment, the method includes providing a semiconductor substrate with a surface region. The surface region includes one or more layers overlying the semiconductor substrate. In addition, the method includes depositing a dielectric layer overlying the surface region. The dielectric layer is formed by a CVD process. Furthermore, the method includes forming a diffusion barrier layer overlying the dielectric layer. In addition, the method includes forming a conductive layer overlying the diffusion barrier layer. Additionally, the method includes reducing the thickness of the conductive layer using a chemical-mechanical polishing process. The CVD process utilizes fluorine as a reactant to form the dielectric layer. In addition, the dielectric layer is associated with a dielectric constant equal or less than 3.3.Type: GrantFiled: July 17, 2009Date of Patent: March 22, 2011Assignee: Semiconductor Manufacturing International (Shanghai) CorporationInventor: Ting Cheong Ang
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Patent number: 7875556Abstract: Classes of liquid aminosilanes have been found which allow for the production of silicon carbo-nitride films of the general formula SixCyNz. These aminosilanes, in contrast, to some of the precursors employed heretofore, are liquid at room temperature and pressure allowing for convenient handling. In addition, the invention relates to a process for producing such films. The classes of compounds are generally represented by the formulas: and mixtures thereof, wherein R and R1 in the formulas represent aliphatic groups typically having from 2 to about 10 carbon atoms, e.g., alkyl, cycloalkyl with R and R1 in formula A also being combinable into a cyclic group, and R2 representing a single bond, (CH2)n, a ring, or SiH2.Type: GrantFiled: May 16, 2005Date of Patent: January 25, 2011Assignee: Air Products and Chemicals, Inc.Inventors: Manchao Xiao, Arthur Kenneth Hochberg
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Patent number: 7807586Abstract: A method for forming a stressed passivation film. In one embodiment, the method includes depositing a silicon nitride film over an integrated circuit structure on a substrate and embedding oxygen into a surface of the silicon nitride film by exposing the silicon nitride film to a process gas containing oxygen radicals formed by non-ionizing electromagnetic radiation induced dissociation of an oxygen-containing gas or an oxygen- and nitrogen-containing gas. The method further includes heat-treating the oxygen-embedded silicon nitride film to form a stressed silicon oxynitride film.Type: GrantFiled: March 28, 2008Date of Patent: October 5, 2010Assignee: Tokyo Electron LimitedInventor: Robert D Clark
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Patent number: 7799703Abstract: A processing method includes a gas having a Si—CH3 bond supplied into a processing chamber after a target substrate to be processed is loaded into the processing chamber; and a silylation process performed on the target substrate. The internal pressure of the chamber by the supply of the gas having the Si—CH3 bond and the gas supply time are set to be within ranges where the silylation process can be performed while the internal pressure of the chamber is decreased to reach an eligible pressure level where the wafer can be unloaded after the internal pressure of the chamber is increased up to a preset pressure by the supply of the gas.Type: GrantFiled: February 4, 2008Date of Patent: September 21, 2010Assignee: Tokyo Electron LimitedInventors: Kazuhiro Kubota, Naotsugu Hoshi, Yuki Chiba, Ryuichi Asako
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Patent number: 7790634Abstract: Methods of making a silicon oxide layer on a substrate are described. The methods may include forming the silicon oxide layer on the substrate in a reaction chamber by reacting an atomic oxygen precursor and a silicon precursor and depositing reaction products on the substrate. The atomic oxygen precursor is generated outside the reaction chamber. The methods also include heating the silicon oxide layer at a temperature of about 600° C. or less, and exposing the silicon oxide layer to an induced coupled plasma. Additional methods are described where the deposited silicon oxide layer is cured by exposing the layer to ultra-violet light, and also exposing the layer to an induced coupled plasma.Type: GrantFiled: May 25, 2007Date of Patent: September 7, 2010Assignee: Applied Materials, IncInventors: Jeffrey C. Munro, Srinivas D. Nemani
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Patent number: 7763501Abstract: A method for forming an electronic device, comprising: forming a first conductive or semiconductive layer; forming a sequence of at least on insulating layer and at least one semiconducting layer over the first conductive or semiconductive layer; locally depositing solvents at a localized region of the insulating layer so as to dissolve the sequence of insulating and semiconducting layers in the region to leave a void extending through the sequence of layer; and depositing conductive or semiconductive material in the void.Type: GrantFiled: August 28, 2006Date of Patent: July 27, 2010Assignee: Plastic Logic LimitedInventors: Henning Sirringhaus, Richard Henry Friend, Takeo Kawase
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Publication number: 20100081293Abstract: A method for depositing a silicon nitride based dielectric layer is provided. The method includes introducing a silicon precursor and a radical nitrogen precursor to a deposition chamber. The silicon precursor has a N—Si—H bond, N—Si—Si bond and/or Si—Si—H bond. The radical nitrogen precursor is substantially free from included oxygen. The radical nitrogen precursor is generated outside the deposition chamber. The silicon precursor and the radical nitrogen precursor interact to form the silicon nitride based dielectric layer.Type: ApplicationFiled: October 1, 2008Publication date: April 1, 2010Applicant: Applied Materials, Inc.Inventors: ABHIJIT BASU MALLICK, Srinivas D. Nemani
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Patent number: 7662730Abstract: A method for fabricating an ultra-high tensile-stressed nitride film is disclosed. A PECVD process is first performed to deposit a transitional silicon nitride film over a substrate. The transitional silicon nitride film has a first concentration of hydrogen atoms. The transitional silicon nitride film is subjected to UV curing process for reducing the first concentration of hydrogen atoms to a second concentration of hydrogen atoms.Type: GrantFiled: November 24, 2005Date of Patent: February 16, 2010Assignee: United Microelectronics Corp.Inventors: Neng-Kuo Chen, Teng-Chun Tsai, Chien-Chung Huang, Tsai-Fu Chen, Wen-Han Hung
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Patent number: 7541234Abstract: Integrated circuit transistors may be fabricated by simultaneously removing a photoresist layer on a first active area of an integrated circuit substrate and a carbon-containing layer on a second active area of the integrated circuit substrate, to expose a nitride stress-generating layer on the second active area. A single mask may be used to define the second active area for removal of the photoresist layer on the first active area and for implanting source/drain regions into the second active area.Type: GrantFiled: November 3, 2005Date of Patent: June 2, 2009Assignees: Samsung Electronics Co., Ltd., Chartered Semiconductor Manufacturing Ltd., Infineon Technologies AGInventors: Chong Kwang Chang, Haoren Zhuang, Matthias Lipinski, Shailendra Mishra, O Sung Kwon, Tjin Tjin Tjoa, Young Gun Ko
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Patent number: 7521377Abstract: A method of fabricating a dielectric material that has an ultra low dielectric constant (or ultra low k) using at least one organosilicon precursor is described. The organosilicon precursor employed in the present invention includes a molecule containing both an Si—O structure and a sacrificial organic group, as a leaving group. The use of an organosilicon precursor containing a molecular scale sacrificial leaving group enables control of the pore size at the nanometer scale, control of the compositional and structural uniformity and simplifies the manufacturing process. Moreover, fabrication of a dielectric film from a single precursor enables better control of the final porosity in the film and a narrower pore size distribution resulting in better mechanical properties at the same value of dielectric constant.Type: GrantFiled: January 11, 2006Date of Patent: April 21, 2009Assignee: International Business Machines CorporationInventors: Stephen M. Gates, Alfred Grill, Robert D. Miller, Deborah A. Neumayer, Son Nguyen
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Patent number: 7473655Abstract: Embodiments of the invention generally provide a method for depositing silicon-containing films. In one embodiment, a method for depositing silicon-containing material film on a substrate includes flowing a nitrogen and carbon containing chemical into a deposition chamber, flowing a silicon-containing source chemical having silicon-nitrogen bonds into the processing chamber, and heating the substrate disposed in the chamber to a temperature less than about 550 degrees Celsius. In another embodiment, the silicon containing chemical is trisilylamine and the nitrogen and carbon containing chemical is (CH3)3—N.Type: GrantFiled: June 17, 2005Date of Patent: January 6, 2009Assignee: Applied Materials, Inc.Inventors: Yaxin Wang, Yuji Maeda, Thomas C. Mele, Sean M. Seutter, Sanjeev Tandon, R. Suryanarayanan Iyer
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Patent number: 7473637Abstract: The use of atomic layer deposition (ALD) to form a conductive titanium nitride layer produces a reliable structure for use in a variety of electronic devices. The structure is formed by depositing titanium nitride by atomic layer deposition onto a substrate surface using a titanium-containing precursor chemical such as TDEAT, followed by a mixture of ammonia and carbon monoxide or carbon monoxide alone, and repeating to form a sequentially deposited TiN structure. Such a TiN layer may be used as a diffusion barrier underneath another conductor such as aluminum or copper, or as an electro-migration preventing layer on top of an aluminum conductor. ALD deposited TiN layers have low resistivity, smooth topology, high deposition rates, and excellent step coverage and electrical continuity.Type: GrantFiled: July 20, 2005Date of Patent: January 6, 2009Assignee: Micron Technology, Inc.Inventors: Brenda D Kraus, Eugene P. Marsh
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Patent number: 7446063Abstract: A method of forming structures comprises depositing silicon nitride films simultaneously on a plurality of substrates at a first temperature, and heating the silicon nitride films at a temperature greater than the first temperature.Type: GrantFiled: February 24, 2006Date of Patent: November 4, 2008Assignee: Cypress Semiconductor Corp.Inventors: Sagy Levy, Mehran Sedigh
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Patent number: 7432215Abstract: A semiconductor device manufacturing method comprises a first step of forming, by a thermal chemical vapor deposition method, a silicon nitride film on an object disposed in a reaction container, with bis tertiary butyl amino silane and NH3 flowing into the reaction container, and a second step of removing silicon nitride formed in the reaction container, with NF3 gas flowing into the reaction container.Type: GrantFiled: June 12, 2007Date of Patent: October 7, 2008Assignee: Kokusai Electric Co., Ltd.Inventors: Norikazu Mizuno, Kiyohiko Maeda
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Publication number: 20080242110Abstract: A process for the formation of a capping layer on a conducting interconnect for a semiconductor device is provided, the process comprising the steps of: (a) providing one or more conductors in a dielectric layer, and (b) depositing a capping layer on an upper surface of at least some of the one or more conductors, characterised in that the process further includes: (c) the step of, prior to depositing the capping layer, reacting the dielectric layer with an organic compound in a liquid phase, the said organic compound having the following general formula: (I) where X is a functional group, R is an organic group or a organosiloxane group, Y1 is either a functional group or an organic group or organosiloxane group, and Y2 is either a functional group or an organic group or organosiloxane group, and where the functional group(s) is/are independently selected from the following: NH2, a secondary amine, a tertiary amine, acetamide, trifluoroacetamide, imidazole, urea, OH, an alkyoxy, acryloxy, acetate, SH, an alkyType: ApplicationFiled: September 1, 2005Publication date: October 2, 2008Applicant: NXP B.V.Inventors: Janos Farkas, Lynne Michaelson, Srdjan Kordic
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Patent number: 7416997Abstract: A method of fabricating a semiconductor device having a silicon nitride layer substantially free of impurities includes forming a silicon nitride layer on a semiconductor substrate and annealing the semiconductor substrate having the silicon nitride layer in an atmosphere of ammonia (NH3) gas to remove impurities from the silicon nitride layer. The silicon nitride layer may be formed using BTBAS as a silicon precursor.Type: GrantFiled: November 17, 2005Date of Patent: August 26, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Kyong-Min Kim, Sang-Kyu Park, Sang-Woon Kim, Jae-Hwan Kim
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Patent number: 7402533Abstract: A method for forming a semiconductor device comprises forming a dielectric layer over a semiconductor wafer substrate assembly having closely spaced regions, such as a memory transistor array, and widely spaced regions, such as a periphery. Under conditions specified, the dielectric layer forms to have a first thickness over the closely spaced regions and a second thickness over the widely spaced regions. The second thickness is much thinner than the first thickness and dielectric over the widely spaced regions may be etched away with a blanket etch which leaves the majority of the dielectric layer over the closely spaced regions.Type: GrantFiled: August 31, 2006Date of Patent: July 22, 2008Assignee: Micron Technology, Inc.Inventor: Christopher W Hill
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Patent number: 7387943Abstract: A method for forming a thermal oxide layer on the surface of a semiconductor substrate exposed during a semiconductor fabricating process. The thermal oxide layer is to be thin to minimize silicon substrate defects caused by volume expansion. A chemical vapor deposition (CVD) layer is then formed on the thin thermal oxide layer, creating a required thickness. The thin thermal oxide layer and the CVD material layer are formed in the same CVD apparatus. As a result, a process can be simplified and a particle-leading pollution can be prevented.Type: GrantFiled: February 25, 2002Date of Patent: June 17, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Do-Hyung Kim, Sung-Eui Kim
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Patent number: 7387971Abstract: A fabricating method for a flat panel display device having a thin film pattern over a substrate is disclosed. The fabricating method includes depositing a hydrophilic resin over a substrate and patterning the hydrophilic resin to form hydrophilic resin patterns over areas outside where thin film patterns are to be formed over the substrate. The fabricating method also includes depositing a hydrophobic nano powder thin film material over the substrate and between the hydrophilic resin patterns and removing the hydrophilic resin patterns to form hydrophobic nano powder thin film patterns over the substrate. Moreover, the fabricating method includes treating the hydrophobic nano powder thin film patterns to form the thin film pattern.Type: GrantFiled: October 28, 2005Date of Patent: June 17, 2008Assignee: LG.Philips LCD Co., Ltd.Inventors: Gee Sung Chae, Mi Kyung Park
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Patent number: 7365029Abstract: Embodiments of the invention generally provide a method for depositing a film containing silicon (Si) and nitrogen (N). In one embodiment, the method includes heating a substrate disposed in a processing chamber to a temperature less than about 650 degrees Celsius, flowing a nitrogen-containing gas into the processing chamber, flowing a silicon-containing gas into the processing chamber, and depositing a SiN-containing layer on a substrate. The silicon-containing gas is at least one of a gas identified as NR2—Si(R?2)—Si(R?2)—NR2 (amino(di)silanes), R3—Si—N?N?N (silyl azides), R?3—Si—NR—NR2 (silyl hydrazines) or 1,3,4,5,7,8-hexamethytetrasiliazane, wherein R and R? comprise at least one functional group selected from the group of a halogen, an organic group having one or more double bonds, an organic group having one or more triple bonds, an aliphatic alkyl group, a cyclical alkyl group, an aromatic group, an organosilicon group, an alkyamino group, or a cyclic group containing N or Si.Type: GrantFiled: June 14, 2005Date of Patent: April 29, 2008Assignee: Applied Materials, Inc.Inventors: R. Suryanarayanan Iyer, Sean M. Seutter, Sanjeev Tandon, Errol Antonio C. Sanchez, Shulin Wang
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Patent number: 7238629Abstract: The present invention relates to a deposition method of a low dielectric constant insulating film, which comprises the steps of generating a first deposition gas containing at least one silicon source selecting from the group consisting of silicon containing organic compound having siloxane bond and silicon containing organic compound having CH3 group, and an oxidizing agent consisting of oxygen containing organic compound having alkoxyl group (OR: O is oxygen and R is CH3 or C2H5), and applying electric power to the first deposition gas to generate plasma and then causing reaction to form a low dielectric constant insulating film on a substrate.Type: GrantFiled: June 15, 2004Date of Patent: July 3, 2007Assignee: Semiconductor Process Laboratory Co., Ltd.Inventors: Yoshimi Shioya, Kazuo Maeda
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Patent number: 7208427Abstract: Metalorganic precursors of the formula: (R1R2N)a?bMXb wherein: M is the precursor metal center, selected from the group of Ta, Ti, W, Nb, Si, Al and B; a is a number equal to the valence of M; 1?b?(a?1); R1 and R2 can be the same as or different from one another, and are each independently selected from the group of H, C1–C4 alkyl, C3–C6 cycloalkyl, and R03Si, where each R0 can be the same or different and each R0 is independently selected from H and C1–C4 alkyl; and X is selected from the group of chlorine, fluorine, bromine and iodine. Precursors of such formula are useful for chemical vapor deposition (MOCVD) of conductive barrier materials in the manufacture of microelectronic device structures, e.g., by atomic layer chemical vapor deposition on a substrate bearing nitrogen-containing surface functionality. Further described is a method of forming Si3N4 on a substrate at low temperature, e.g., using atomic layer chemical vapor deposition (ALCVD).Type: GrantFiled: August 18, 2003Date of Patent: April 24, 2007Assignee: Advanced Technology Materials, Inc.Inventors: Jeffrey F. Roeder, Chongying Xu, Bryan C. Hendrix, Thomas H. Baum
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Patent number: 7138068Abstract: A method is disclosed for fabricating a patterned embedded capacitance layer. The method includes fabricating (1305, 1310) a ceramic oxide layer (510) overlying a conductive metal layer (515) overlying a printed circuit substrate (505), perforating (1320) the ceramic oxide layer within a region (705), and removing (1325) the ceramic oxide layer and the conductive metal layer in the region by chemical etching of the conductive metal layer. The ceramic oxide layer may be less than 1 micron thick.Type: GrantFiled: March 21, 2005Date of Patent: November 21, 2006Assignee: Motorola, Inc.Inventors: Gregory J. Dunn, Robert T. Croswell, Jaroslaw A. Magera, Jovica Savic, Aroon V. Tungare
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Patent number: 7129187Abstract: A method for low-temperature plasma-enhanced chemical vapor deposition of a silicon-nitrogen-containing film on a substrate. The method includes providing a substrate in a process chamber, exciting a reactant gas in a remote plasma source, thereafter mixing the excited reactant gas with a silazane precursor gas, and depositing a silicon-nitrogen-containing film on the substrate from the excited gas mixture in a chemical vapor deposition process. In one embodiment of the invention, the reactant gas can contain a nitrogen-containing gas to deposit a SiCNH film. In another embodiment of the invention, the reactant gas can contain an oxygen-containing gas to deposit a SiCNOH film.Type: GrantFiled: July 14, 2004Date of Patent: October 31, 2006Assignee: Tokyo Electron LimitedInventor: Raymond Joe
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Patent number: 7101814Abstract: A method for forming a semiconductor device comprises forming a dielectric layer over a semiconductor wafer substrate assembly having closely-spaced regions, such as a memory transistor array, and widely-spaced regions, such as a periphery. Under conditions specified, the dielectric layer forms to have a first thickness over the closely-spaced regions and a second thickness over the widely-spaced regions. The second thickness is much thinner than the first thickness and dielectric over the widely-spaced regions may be etched away with a blanket etch which leaves the majority of the dielectric layer over the closely-spaced regions.Type: GrantFiled: August 13, 2004Date of Patent: September 5, 2006Assignee: Micron Technology, Inc.Inventor: Christopher W. Hill