And Cadmium Sulfide Compound Semiconductive Component Patents (Class 438/86)
  • Patent number: 8335652
    Abstract: A self-improving identification method classifies specimens based on class identifiers. The system stores specimen profiles in a database that is updated with additional specimen profiles and with follow-up data that corrects classification of specimens that were initially incorrectly classified. Algorithms use the updated database to discover new class identifiers, modify thresholds of known class identifiers, and drop unnecessary class identifiers to improve classification of specimens.
    Type: Grant
    Filed: June 21, 2005
    Date of Patent: December 18, 2012
    Assignee: Yougene Corp.
    Inventors: Orhan Soykan, Daisy Phan Cross
  • Publication number: 20120315721
    Abstract: Methods of manufacturing a solar cell module are provided. The method may include forming lower electrodes on a substrate, forming a light absorption layer on the lower electrodes and the substrate, patterning the light absorption layer to form a trench exposing the lower electrodes, and forming window electrodes using a conductive film. The conductive film extends from a top surface of the light absorption layer to a bottom of the trench along one-sidewall of the trench and is divided at another-sidewall of the trench.
    Type: Application
    Filed: May 18, 2012
    Publication date: December 13, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventor: Rae-Man PARK
  • Patent number: 8314327
    Abstract: Novel structures of photovoltaic cells (also treated as solar cells) are provided. The cells are based on nanometer-scaled wires, tubes, and/or rods, which are made of electronic materials covering semiconductors, insulators or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells will have enormous applications in space, commercial, residential, and industrial applications.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: November 20, 2012
    Assignee: Banpil Photonics, Inc.
    Inventor: Achyut Kumar Dutta
  • Patent number: 8309843
    Abstract: Novel structures of photovoltaic cells (also treated as solar cells) are provided. The Cells are based on the nanometer-scaled wire, tubes, and/or rods, which are made of the electronics materials covering semiconductors, insulator or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells can have also high radiation tolerant capability. These cells will have enormous applications such as in space, in commercial, residential and industrial applications.
    Type: Grant
    Filed: August 18, 2005
    Date of Patent: November 13, 2012
    Assignee: Banpil Photonics, Inc.
    Inventors: Nobuhiko P. Kobayashi, Achyut K. Dutta
  • Patent number: 8252619
    Abstract: Systems and processes for treatment of a cadmium telluride thin film photovoltaic device are generally provided. The systems can include a treatment system and a conveyor system. The treatment system includes a preheating section, a treatment chamber, and an anneal oven that are integrally interconnected within the treatment system. The conveyor system is operably disposed within the treatment system and configured for transporting substrates in a serial arrangement into and through the preheat section, into and through the treatment chamber, and into and through the anneal oven at a controlled speed. The treatment chamber is configured for applying a material to a thin film on a surface of the substrate and the anneal oven is configured to heat the substrate to an annealing temperature as the substrates are continuously conveyed by the conveyor system through the treatment chamber.
    Type: Grant
    Filed: April 23, 2010
    Date of Patent: August 28, 2012
    Assignee: PrimeStar Solar, Inc.
    Inventors: Cory Allen Schaeffer, Brian Robert Murphy
  • Patent number: 8252618
    Abstract: Methods for manufacturing a cadmium telluride based thin film photovoltaic device are generally disclosed. A resistive transparent layer can be sputtered on a transparent conductive oxide layer from a metal alloy target in a sputtering atmosphere of argon and oxygen that includes argon from about 5% to about 40%. A cadmium sulfide layer can then be formed on the resistive transparent layer. A cadmium telluride layer can be formed on the cadmium sulfide layer; and a back contact layer can be formed on the cadmium telluride layer. The sputtering can be accomplished within a sputtering chamber.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: August 28, 2012
    Assignee: Primestar Solar, Inc.
    Inventor: Patrick Lynch O'Keefe
  • Patent number: 8247686
    Abstract: Thin film photovoltaic devices are provided that generally include a transparent conductive oxide layer on the glass, a multi-layer n-type stack on the transparent conductive oxide layer, and an absorber layer (e.g., a cadmium telluride layer) on the multi-layer n-type stack. The multi-layer n-type stack generally includes a first layer (e.g., a cadmium sulfide layer) and a second layer (e.g., a mixed phase layer). The multi-layer n-type stack can, in certain embodiments, include additional layers (e.g., a third layer, a fourth layer, etc.). Methods are also generally provided for manufacturing such thin film photovoltaic devices.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: August 21, 2012
    Assignee: PrimeStar Solar, Inc.
    Inventors: Scott Daniel Feldman-Peabody, Robert Dwayne Gossman
  • Patent number: 8236601
    Abstract: Methods for forming a TCO layer on a substrate are generally provided and include sputtering a TCO layer on a substrate from a target including cadmium stannate. A cap material (e.g., including cadmium) is deposited onto an outer surface of an indirect anneal system, and the TCO layer can be annealed at an anneal temperature while in contact with or within about 10 cm of the cap material. An anneal oven is also generally provided and includes an indirect anneal system defining a deposition surface and an anneal surface such that a cap material deposited on the anneal surface of the indirect anneal system is positioned to be in contact with or within about 10 cm of a thin film on the substrate. A cap material source can be positioned to deposit the cap material onto the deposition surface such that the anneal surface comprises the cap material.
    Type: Grant
    Filed: July 2, 2010
    Date of Patent: August 7, 2012
    Assignee: PrimeStar Solar, Inc.
    Inventors: Scott Daniel Feldman-Peabody, Russell Weldon Black
  • Patent number: 8193442
    Abstract: CIGS absorber layers fabricated using coated semiconducting nanoparticles and/or quantum dots are disclosed. Core nanoparticles and/or quantum dots containing one or more elements from group IB and/or IIIA and/or VIA may be coated with one or more layers containing elements group IB, IIIA or VIA. Using nanoparticles with a defined surface area, a layer thickness could be tuned to give the proper stoichiometric ratio, and/or crystal phase, and/or size, and/or shape. The coated nanoparticles could then be placed in a dispersant for use as an ink, paste, or paint. By appropriate coating of the core nanoparticles, the resulting coated nanoparticles can have the desired elements intermixed within the size scale of the nanoparticle, while the phase can be controlled by tuning the stochiometry, and the stoichiometry of the coated nanoparticle may be tuned by controlling the thickness of the coating(s).
    Type: Grant
    Filed: December 11, 2007
    Date of Patent: June 5, 2012
    Assignee: Nanosolar, Inc.
    Inventors: Brian M. Sager, Dong Yu, Matthew R. Robinson
  • Patent number: 8187912
    Abstract: Thin film photovoltaic devices are generally provided. The device can include a transparent conductive oxide layer on a glass substrate, an n-type thin film layer on the transparent conductive layer, and a p-type thin film layer on the n-type layer. The n-type thin film layer and the p-type thin film layer form a p-n junction. An anisotropic conductive layer is applied on the p-type thin film layer, and includes a polymeric binder and a plurality of conductive particles. A metal contact layer can then be positioned on the anisotropic conductive layer.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: May 29, 2012
    Assignee: PrimeStar Solar, Inc.
    Inventors: Tammy Jane Lucas, Robert Dwayne Gossman, Scott Daniel Feldman-Peabody
  • Publication number: 20120125423
    Abstract: A photovoltaic element for photovoltaic applications includes a transparent substrate having a first side and a second side. A transparent electrically conductive oxide is disposed over the first side of the transparent substrate. Similarly, a hydrophilic oxide coating is disposed over and contacts the transparent electrically conductive oxide. Finally, a removable protective coating is disposed over the hydrophilic oxide coating.
    Type: Application
    Filed: May 20, 2011
    Publication date: May 24, 2012
    Applicant: CARDINAL CG COMPANY
    Inventor: Annette J. Krisko
  • Patent number: 8181343
    Abstract: Methods of making a sealed crimp connection attaching a terminal to a wire conductor are provided. A layer of fluid conformal coating is applied to overlie a terminal and underlie at least a lead of the wire conductor upon at least the lead being received into the terminal. The terminal, the fluid layer, and at least the lead of the wire conductor are crimped to form the crimp connection. Fluid conformal coating is displaced where an abutting surface of the terminal makes contact with at least the lead of the wire conductor. The fluid conformal coating is cured to a non-fluid state. The fluid conformal coating may be formed of an acrylated urethane material that may provide an increased pull force and a low crimp resistance in the crimp connection. The crimp connection may be constructed using a manufacturing process on an automated assembly line.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: May 22, 2012
    Assignee: Delphi Technologies, Inc.
    Inventors: Francis D. Martauz, Kurt P. Seifert
  • Patent number: 8183141
    Abstract: Provided are a semiconductor device and a method of forming the same. The method may include forming a metal oxide layer on a substrate and forming a sacrificial oxide layer on the metal oxide layer. An annealing process is performed on the substrate. A formation-free energy of the sacrificial oxide layer is greater than a formation-free energy of the metal oxide layer at a process temperature of the annealing process.
    Type: Grant
    Filed: October 19, 2009
    Date of Patent: May 22, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sangjin Hyun, Siyoung Choi, Yugyun Shin, Kang-Ill Seo, Hagju Cho, Hoonjoo Na, Hyosan Lee, Jun-Woong Park, Hye-Lan Lee, Hyung-Seok Hong
  • Patent number: 8173482
    Abstract: Methods for protecting a cadmium sulfide layer on a substrate are provided. The method can include sputtering a cadmium sulfide layer onto a substrate from a cadmium sulfide target at a sputtering pressure (e.g., about 10 mTorr to about 150 mTorr), and sputtering a cap layer directly on the cadmium sulfide layer. The cap layer can be sputtered directly onto the cadmium sulfide layer without breaking vacuum of the sputtering pressure. Methods are also provided for manufacturing a cadmium telluride based thin film photovoltaic device through depositing a cadmium sulfide layer on a substrate, depositing a cap layer directly on the cadmium sulfide layer, heating the substrate to sublimate at least a portion of the cap layer from the cadmium sulfide layer, and then depositing a cadmium telluride layer on the cadmium sulfide layer. An intermediate substrate for forming a cadmium telluride based thin-film photovoltaic device is also provided.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: May 8, 2012
    Assignee: PrimeStar Solar, Inc.
    Inventors: Jennifer Ann Drayton, Richard Ernest Demaray
  • Publication number: 20120100664
    Abstract: A Kesterite film is vacuum deposited and annealed on a substrate. Deposition is conducted at low temperature to provide good composition control and efficient use of metals. Annealing is conducted at a high temperature for a short period of time. Thermal evaporation, E-beam evaporation or sputtering in a high vacuum environment may be employed as part of a deposition process.
    Type: Application
    Filed: October 26, 2010
    Publication date: April 26, 2012
    Applicant: International Business Machines Corporation
    Inventors: Supratik Guha, Kejia Wang
  • Patent number: 8163592
    Abstract: A method of manufacturing a thin film transistor capable of simplifying the steps is provided. The method of manufacturing a thin film transistor includes the steps of: forming a gate electrode and a gate insulating film sequentially on a substrate; forming an oxide semiconductor film in a shape including a planned channel formation region, a planned source electrode formation region, and a planned drain electrode formation region on the gate insulating film so that the whole oxide semiconductor film has the same carrier density as a carrier density of the planned channel formation region; forming a mask inhibiting heat transmission on the planned channel formation region; and heating the oxide semiconductor film in the air and thereby obtaining a higher carrier density of a region of the oxide semiconductor film not covered with the mask than the carrier density of the planned channel formation region.
    Type: Grant
    Filed: December 10, 2009
    Date of Patent: April 24, 2012
    Assignee: Sony Corporation
    Inventors: Shina Kirita, Toshitaka Kawashima
  • Patent number: 8119513
    Abstract: A method for making a cadmium sulfide layer is provided. The method includes a number of steps including providing a substrate and disposing a layer containing cadmium on the substrate followed by sulfurization of the cadmium-containing layer.
    Type: Grant
    Filed: November 22, 2010
    Date of Patent: February 21, 2012
    Assignee: General Electric Company
    Inventors: Bastiaan Arie Korevaar, Scott Feldman-Peabody, Robert Dwayne Gossman
  • Publication number: 20110312122
    Abstract: A method for forming a thin film photovoltaic device. The method includes providing a transparent substrate including a surface region. A first electrode layer is formed overlying the surface region. A copper layer is formed overlying the first electrode layer and an indium layer overlying the copper layer to form a multi-layered structure. The method subjects at least the multi-layered structure to a thermal treatment process in an environment containing a sulfur bearing species and form a copper indium disulfide material. The copper indium disulfide material includes a thickness of substantially copper sulfide material. The thickness of the copper sulfide material is removed to expose a surface region having a copper poor surface characterized by a copper to indium atomic ratio of less than about 0.95:1. The method subjects the copper poor surface to a metal cation species to convert the copper poor surface from an n-type semiconductor characteristic to a p-type semiconductor characteristic.
    Type: Application
    Filed: August 31, 2011
    Publication date: December 22, 2011
    Applicant: Stion Corporation
    Inventor: Howard W.H. Lee
  • Publication number: 20110287576
    Abstract: A method for forming a thin film photovoltaic device. The method includes providing a transparent substrate comprising a surface region. A first electrode layer is formed overlying the surface region. A copper layer is formed overlying the first electrode layer and an indium layer is formed overlying the copper layer to form a multi-layered structure. The method subject at least the multi-layered structure to a thermal treatment process in an environment containing a sulfur bearing species to form a bulk copper indium disulfide material. The bulk copper indium disulfide material includes one or more portions of copper indium disulfide material characterized by a copper-to-indium atomic ratio of less than about 0.95:1 and a copper poor surface comprising a copper to indium atomic ratio of less than about 0.95:1.
    Type: Application
    Filed: August 2, 2011
    Publication date: November 24, 2011
    Applicant: Stion Corporation
    Inventor: Howard W.H. Lee
  • Publication number: 20110287574
    Abstract: A method for forming a thin film photovoltaic device is provided. The method includes providing a transparent substrate comprising a surface region. A first electrode layer is formed overlying the surface region. A chalcopyrite material is formed overlying the first electrode layer. In a specific embodiment, the chalcopyrite material comprises a copper poor copper indium disulfide region. The copper poor copper indium disulfide region having an atomic ratio of Cu:In of about 0.95 and less. The method includes compensating the copper poor copper indium disulfide region using a sodium species to cause the chalcopyrite material to change from an n-type characteristic to a p-type characteristic. The method includes forming a window layer overlying the chalcopyrite material and forming a second electrode layer overlying the window layer.
    Type: Application
    Filed: August 2, 2011
    Publication date: November 24, 2011
    Applicant: Stion Corporation
    Inventor: Howard W.H. Lee
  • Publication number: 20110287575
    Abstract: A method for forming a thin film photovoltaic device. The method includes providing a transparent substrate comprising a surface region, forming a first electrode layer overlying the surface region, forming a copper layer overlying the first electrode layer and forming an indium layer overlying the copper layer to form a multi-layered structure. The multi-layered structure is subjected to a thermal treatment process in an environment containing a sulfur bearing species to forming a copper indium disulfide material. The copper indium disulfide material comprising a copper-to-indium atomic ratio ranging from about 1.2:1 to about 2:1 and a thickness of substantially copper sulfide material having a copper sulfide surface region. The thickness of the copper sulfide material is selectively removed to expose a surface region having a copper poor surface comprising a copper to indium atomic ratio of less than about 0.95:1.
    Type: Application
    Filed: August 2, 2011
    Publication date: November 24, 2011
    Applicant: Stion Corporation
    Inventor: Howard W.H. Lee
  • Publication number: 20110189813
    Abstract: A method for fabricating a copper/indium/gallium/selenium solar cell by a wet process under non-vacuum condition is provided.
    Type: Application
    Filed: January 29, 2010
    Publication date: August 4, 2011
    Applicant: JENN FENG NEW ENERGY CO., LTD.
    Inventor: Chuan-Lung Chuang
  • Patent number: 7968792
    Abstract: A quantum dot (QD) sensitized wide bandgap (WBG) semiconductor heterojunction photovoltaic (PV) device comprises an electron conductive layer; an active photovoltaic (PV) layer adjacent the electron conductive layer; a hole conductive layer adjacent the active PV layer; and an electrode layer adjacent the hole conductive layer. The active PV layer comprises a wide bandgap (WBG) semiconductor material with Eg?2.0 eV, in the form of a 2-dimensional matrix defining at least two open spaces, and a narrower bandgap semiconductor material with Eg<2.0 eV, in the form of quantum dots (QD's) filling each open space defined by the matrix of WBG semiconductor material and establishing a heterojunction therewith. The active PV layer is preferably fabricated by a co-sputter deposition process, and the QD's constitute from about 40 to about 90 vol. % of the active PV layer.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: June 28, 2011
    Assignee: Seagate Technology LLC
    Inventors: Samuel D. Harkness, IV, Hans J. Richter
  • Patent number: 7923281
    Abstract: A deposition method and a system are provided to deposit a CdS buffer layer on a surface of a solar cell absorber layer of a flexible workpiece from a process solution including all chemical components of the CdS buffer layer material. CdS is deposited from the deposition solution while the flexible workpiece is heated and elastically shaped by a heated shaping plate to retain the process solution on the solar cell absorber layer. The flexible workpiece is elastically shaped by pulling a back surface of the flexible workpiece into a cavity area in the heated shaping plate using an attractive force.
    Type: Grant
    Filed: May 12, 2009
    Date of Patent: April 12, 2011
    Assignee: SoloPower, Inc.
    Inventors: Bulent M. Basol, Serkan Erdemli, Jalal Ashjaee
  • Publication number: 20100307561
    Abstract: A photovoltaic device can include a second metal layer adjacent to a first layer, where the first layer is positioned adjacent to a substrate, and where the second metal layer includes a dopant; and a copper-indium-gallium diselenide (CIGS) layer adjacent to the second metal layer.
    Type: Application
    Filed: June 3, 2010
    Publication date: December 9, 2010
    Applicant: First Solar, Inc.
    Inventors: Benyamin Buller, Long Cheng, Akhlesh Gupta, Anke Abken
  • Patent number: 7829356
    Abstract: A method and apparatus for improving a thin film scribing procedure is presented. Embodiments of the invention include a method and apparatus for determining a scribe setting for removal of an absorber layer of a photovoltaic device that improves contact resistance between a back contact layer and a front contact layer of the device.
    Type: Grant
    Filed: September 17, 2008
    Date of Patent: November 9, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Fang Mei, David Tanner, Tzay-Fa Su
  • Patent number: 7767501
    Abstract: The abrupt metal-insulator transition device includes: an abrupt metal insulator transition material layer including an energy gap of less than or equal to 2 eV and holes within a hole level; and two electrodes contacting the abrupt metal-insulator transition material layer. Here, each of the two electrodes is formed by thermally treating a stack layer of a first layer formed on the abrupt metal-insulator transition material layer and comprising Ni or Cr, a second layer formed on the first layer and comprising In, a third layer formed on the second layer and comprising Mo or W, and a fourth layer formed on the third layer and comprising Au.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: August 3, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Doo-Hyeb Youn, Hyun-Tak Kim, Byung-Gyu Chae, Sung-Lyul Maeng, Kwang-Yong Kang
  • Patent number: 7713773
    Abstract: The present invention provides methods and apparatus for deposition of contact layers for Group IBIIIAVIA solar cells using electrodeposition and/or electroless deposition approaches, and solar cells that result therefrom. In one aspect of the invention, the solar cell that results includes a substrate, a stacked contact layer that includes a bottom film coated on a surface of the substrate and a top film formed by electroplating over the bottom film, wherein the top film comprises at least one of Ru, Ir and Os. A Group IBIIIAVIA compound film formed over the top film. In another aspect of the invention, there is provided a method of depositing a stacked layer of a plurality of films in a plurality of sequentially disposed depositing units onto a continuously moving roll-to-roll sheet, preferably using electroplating of a stacked contact layer.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: May 11, 2010
    Assignee: SoloPower, Inc.
    Inventors: Serdar Aksu, Bulent M. Basol
  • Publication number: 20080128022
    Abstract: A photovoltaic device can include a protective layer including a tin oxide over a transparent conducting layer to stabilize the transparent conducting layer.
    Type: Application
    Filed: November 8, 2007
    Publication date: June 5, 2008
    Applicant: First Solar, Inc.
    Inventors: Dale Roberts, Upali Jayamaha
  • Patent number: 7163835
    Abstract: A method is described for producing thin semiconductor films on a substrate by contacting a substrate with a solution containing a metal salt, a source of a Group VIa element, and chelating agent, and a noble metal in its elemental form. The resulting semiconductor films are useful for electronic and photovoltaic applications.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: January 16, 2007
    Assignee: E. I. du Pont de Nemours and Company
    Inventor: Jeffrey Scott Meth
  • Patent number: 7129058
    Abstract: The method of the production of a nanoparticle of the present invention includes a step of forming a nanoparticle of a group II–group VI compound semiconductor in the cavity part of a protein, in a solution containing the protein having a cavity part therein represented by apoferritin, the group II element ion represented by Cd and Zn, and the group VI element ion represented by S and Se. Preferably, the solution further includes an ammonium ion, and the supply of the group VI element ion (X2?) into the solution is conducted by adding H2NCXNH2 to the solution. According to the aforementioned method, semiconductor nanoparticles having a uniform particle size can be produced.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: October 31, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Ichiro Yamashita
  • Patent number: 7041530
    Abstract: A method of the production of a nanoparticle dispersed composite material capable of controlling a particle size and a three dimensional arrangement of the nanoparticles is provided. The method of the production of a nanoparticle dispersed composite material of the present invention includes a step (a) of arranging a plurality of core fine particle-protein complexes having a core fine particle, which comprises an inorganic material, internally included within a protein on the top surface of a substrate, a step (b) of removing the protein, a step (c) of conducting ion implantation from the top surface of the substrate, and a step (d) of forming nanoparticles including the ion implanted by the ion implantation as a raw material, inside of the substrate.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: May 9, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Nunoshita, Ichiro Yamashita, Shigeo Yoshii
  • Patent number: 6933553
    Abstract: Provided is a field effect transistor. The field effect transistor includes an insulating vanadium dioxide (VO2) thin film used as a channel material, a source electrode and a drain electrode disposed on the insulating VO2 thin film to be spaced apart from each other by a channel length, a dielectric layer disposed on the source electrode, the drain electrode, and the insulating VO2 thin film, and a gate electrode for applying a predetermined voltage to the dielectric layer.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: August 23, 2005
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hyun Tak Kim, Kwang Yong Kang, Doo Hyeb Youn, Byung Gyu Chae
  • Patent number: 6913943
    Abstract: This invention is a layered thin film semiconductor device comprising a first transparent layer; a thin, second transparent layer having a conductivity less than the first transparent layer; an n-type layer; and a p-type layer comprising one or more IIB and VIA elements. This invention is also a method for making such semiconductor device. The thin film semiconductor devices of this invention are useful for making photovoltaic devices.
    Type: Grant
    Filed: May 7, 2002
    Date of Patent: July 5, 2005
    Assignee: BP Corporation North America Inc.
    Inventors: Daniel W. Cunningham, Marc P. Rubcich
  • Patent number: 6908782
    Abstract: A p-type transparent conducting oxide film is provided which is consisting essentially of, the transparent conducting oxide and a molecular doping source, the oxide and doping source grown under conditions sufficient to deliver the doping source intact onto the oxide.
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: June 21, 2005
    Assignee: Midwest Research Instittue
    Inventors: Yanfa Yan, Shengbai Zhang
  • Patent number: 6890777
    Abstract: An electronic device comprising a population of quantum dots embedded in a host matrix and a primary light source which causes the dots to emit secondary light of a selected color, and a method of making such a device. The size distribution of the quantum dots is chosen to allow light of a particular color to be emitted therefrom. The light emitted from the device may be of either a pure (monochromatic) color, or a mixed (polychromatic) color, and may consist solely of light emitted from the dots themselves, or of a mixture of light emitted from the dots and light emitted from the primary source. The dots desirably are composed of an undoped semiconductor such as CdSe, and may optionally be overcoated to increase photoluminescence.
    Type: Grant
    Filed: December 26, 2002
    Date of Patent: May 10, 2005
    Assignees: Massachusetts Institute of Technology, Hewlett-Packard Company
    Inventors: Moungi G. Bawendi, Jason Heine, Klavs F. Jensen, Jeffrey N. Miller, Ronald L. Moon
  • Patent number: 6855556
    Abstract: The invention is directed to compositions of mutated binding proteins containing reporter groups, analyte biosensor devices derived there from, and their use as analyte biosensor both in vitro and in vivo.
    Type: Grant
    Filed: January 4, 2002
    Date of Patent: February 15, 2005
    Assignee: Becton, Dickinson and Company
    Inventors: Terry J. Amiss, Colleen M. Nycz, J. Bruce Pitner, Douglas B. Sherman, David J. Wright
  • Patent number: 6696700
    Abstract: This invention provides a transparent Cu—Al—O semi-conducting film having a p-type conductivity greater than 0.95×10−1 S·cm−1. This invention also relates to a process for preparing a Cu—Al—O film having p-type conductivity, comprising: a) controllably vaporizing organo-copper and organo-aluminum precursors and carrying the vapors into a chemical vapor deposition chamber with an inert gas flow; b)reacting and depositing the vapors on a substrate, preferably a light-transmitting substrate, through a chemical vapor deposition process.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: February 24, 2004
    Assignee: National University of Singapore
    Inventors: Hao Gong, Yue Wang, Lei Huang
  • Patent number: 6664565
    Abstract: A ZnO crystal growing method having the steps of: growing a low temperature growth ZnO layer on a sapphire substrate at a temperature lower than a single crystal ZnO growth temperature; thermally processing the low temperature growth ZnO layer at a temperature near to a growth temperature of a high temperature growth single crystal ZnO layer higher than the growth temperature low temperature growth ZnO layer; and growing a high temperature growth single crystal ZnO layer on the low temperature growth ZnO layer at a temperature higher than the growth temperature of the of the low temperature growth ZnO layer. ZnO crystal of good quality with a reduced number of crystal defects can be grown on a sapphire substrate.
    Type: Grant
    Filed: August 25, 2000
    Date of Patent: December 16, 2003
    Assignees: Stanley Electric Co., Ltd.
    Inventors: Michihiro Sano, Takafumi Yao
  • Publication number: 20030180983
    Abstract: A method for manufacturing a thin film photovoltaic module comprising series connected cells, the cells comprising a front contact, a back contact and a photovoltaically active region positioned between the front and back contacts, the series connected cell being formed by scribing a front contact layer, a photovoltaically active layer and a back contact layer on a substrate, the method comprising laser scribing at least one of the front contact layer, the photovoltaically active layer or the back contact layer to form laser scribes using a laser beam scanned rapidly over the layer.
    Type: Application
    Filed: January 3, 2003
    Publication date: September 25, 2003
    Inventors: Robert S. Oswald, Shengzhong Liu
  • Patent number: 6548751
    Abstract: A thin-film flexible solar cell built on a plastic substrate comprises a cadmium telluride p-type layer and a cadmium sulfide n-type layer sputter deposited onto a plastic substrate at a temperature sufficiently low to avoid damaging or melting the plastic and to minimize crystallization of the cadmium telluride. A transparent conductive oxide layer overlaid by a bus bar network is deposited over the n-type layer. A back contact layer of conductive metal is deposited underneath the p-type layer and completes the current collection circuit. The semiconductor layers may be amorphous or polycrystalline in structure.
    Type: Grant
    Filed: June 25, 2001
    Date of Patent: April 15, 2003
    Assignee: SolarFlex Technologies, Inc.
    Inventors: Lawrence H. Sverdrup, Jr., Norman F. Dessel, Adrian Pelkus
  • Patent number: 6503839
    Abstract: A system for performing chemical mechanical polishing wherein a dopant is added to the slurry during a chemical mechanical planarization so as to enhance end point determination. In one embodiment, the CMP system includes a laser end point detection system that provides a signal indicative of the intensity of light being reflected off of the surface that is being removed by CMP. The slurry that is used in the CMP process is doped with a surfactant such that false peaks in intensity of the reflected signal is reduced so that the end point intensity peak resulting from the laser reflecting off of an underlying surface is more definite.
    Type: Grant
    Filed: July 3, 2001
    Date of Patent: January 7, 2003
    Assignee: Micron Technology, Inc.
    Inventors: David B. Gonzales, Aaron T. Bartlett
  • Publication number: 20020190251
    Abstract: Amorphous metal oxide thin film is produced by removing through oxygen plasma treatment the organic component from an organics/metal oxide composite thin film having thoroughly dispersed therein such organic component at molecular scale. This ensures production of amorphous metal oxide thin film with low density and excellent thickness precision.
    Type: Application
    Filed: March 13, 2002
    Publication date: December 19, 2002
    Inventors: Toyoki Kunitake, Izumi Ichinose, Shigenori Fujikawa, Jianguo Huang
  • Publication number: 20020167005
    Abstract: The present invention provides semiconductor structures and methods for forming semiconductor structures which include monocrystalline oxide films exhibiting both high dielectric constants and low leakage current densities. In accordance with various aspects of the invention, a semiconductor structure includes a monocrystalline semiconductor substrate and one or more stoichiometrically graduated monocrystalline oxide layers. The stoichiometrically graduated monocrystalline oxide layer may include a perovskite material, such as an alkaline-earth metal titanate. Semiconductor devices fabricated in accordance with aspects of the present invention exhibit a high dielectric constant as well as a reduced leakage current density.
    Type: Application
    Filed: May 11, 2001
    Publication date: November 14, 2002
    Applicant: Motorola, Inc
    Inventors: Zhiyi Yu, Ravindranath Droopad, Corey Overgaard
  • Publication number: 20020153524
    Abstract: A high quality semiconductor structure includes a monocrystalline substrate and a perovskite stack overlying the substrate. The perovskite stack may be formed of a first accommodating layer formed of a first perovskite oxide material having a first lattice constant. A second accommodating layer is formed on the first accommodating layer. The second accommodating layer is formed of a second perovskite oxide material having a second lattice constant which is different from the first lattice constant of the first accommodating layer. A monocrystalline material layer is formed overlying the second accommodating layer. A strain is effected at the interface between the perovskite stack and the substrate, at the interface between the perovskite stack and the monocrystalline material layer and/or at the interface between the first accommodating layer and the second accommodating layer. The strain reduces defects in the monocrystalline material layer and results in reduced Schottky leakage current.
    Type: Application
    Filed: April 19, 2001
    Publication date: October 24, 2002
    Applicant: Motorola Inc.
    Inventors: Zhiyi Yu, Ravindranath Droopad, William J. Ooms
  • Publication number: 20020079588
    Abstract: A method for manufacturing a semiconductor device comprises the steps of providing a semiconductor substrate, forming an interlayer insulating layer on the semiconductor substrate, forming a contact hole in the interlayer insulating layer, forming a plug recessed inside of the contact hole, forming an ohmic contact layer on the plug, depositing a La layer or a LaN layer on the ohmic contact layer, performing a nitridation process by a plasma treatment process to form a LaN diffusion barrier layer on the ohmic contact layer and sequentially forming a bottom electrode, a BLT ((BixLay)Ti3O12) dielectric layer and a top electrode on the entire structure.
    Type: Application
    Filed: December 26, 2001
    Publication date: June 27, 2002
    Inventors: Nam-Kyeong Kim, Seung-Jin Yeom
  • Patent number: 6368892
    Abstract: Efficient broader spectrum monolithic solar cells are produced by coupling a CIS or CIGS polycrystalline semiconductor to an amorphous silicon semiconductor. Coupling can be accomplished with a n-type conductor, such as cadmium sulfide or microcrystalline n-duped amorphous silicon. Cadmium sulfide can be deposited on the CIS or CIGS polycrystalline semiconductor by solution growth, sputtering or evaporation. A transparent conductive oxide can be deposited on the cadmium sulfide by low pressure chemical vapor deposition. The microcrystalline n-doped amorphous silicon and the amorphous silicon semiconductor can be deposited by enhanced plasma chemical vapor deposition. The amorphous silicon can comprise: hydrogenated amorphous silicon, hydrogenated amorphous silicon carbon, or hydrogenated amorphous silicon germanium. Triple junction solar cells can be produced with an amorphous silicon front cell, an amorphous silicon germanium middle cell, and a CIS or CIGS polycrystalline back cell, on a substrate.
    Type: Grant
    Filed: June 29, 2000
    Date of Patent: April 9, 2002
    Assignee: BP Corporation North America Inc.
    Inventor: Rajeewa R. Arya
  • Patent number: 6307148
    Abstract: An indium layer and a copper layer, and whenever necessary, a gallium layer or a gallium-alloy layer, are laminated on an electrode film formed on one of the surfaces of a substrate to form a metallic film. The metallic film is then subjected to sulfurization treatment or selenization treatment to form a p-type semiconductor layer made of “CuInS2 or CuInSe2” or “Cu(In, Ga)S2 or Cu(In, Ga)Se2”. This p-type semiconductor layer is subjected to KCN treatment, for removing impurities such as copper sulfide, copper selenide, etc., by a KCN solution, and an n-type semiconductor layer is formed on this p-type semiconductor layer to form a solar cell. In this instance, the indium layer is formed under heating, or is heat-treated by heat-treatment while the surface of the indium layer is exposed.
    Type: Grant
    Filed: March 27, 2000
    Date of Patent: October 23, 2001
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kenji Takeuchi, Yoshio Onuma, Sumihiro Ichikawa
  • Patent number: 6287879
    Abstract: A system for performing chemical mechanical polishing wherein a dopant is added to the slurry during a chemical mechanical planarization so as to enhance end point determination. In one embodiment the CMP system includes a laser end point detection system that provides a signal indicative of the intensity of light being reflected off of the surface that is being removed by CMP. The slurry that is used in the CMP process is doped with a surfactant such that false peaks in intensity of the reflected signal is reduced so that the end point intensity peak resulting from the laser reflecting off of an underlying surface is more definite.
    Type: Grant
    Filed: August 11, 1999
    Date of Patent: September 11, 2001
    Assignee: Micron Technology, Inc.
    Inventors: David B. Gonzales, Aaron T. Bartlett
  • Publication number: 20010004901
    Abstract: A dye-sensitizing solar cell comprising: a first substrate whose surface is at least conductive; a second substrate on which a conductive layer is formed, the second substrate being transparent, the first and second substrates being spaced by a distance with the conductive surfaces of the first and second substrates opposite to each other; a semiconductor layer having a dye adsorbed thereon, the semiconductor layer being formed on one of the conductive surfaces; a glass frit for sealing peripheral edges of the first and second substrates; and a redox electrolyte which is filled between the first and second substrates.
    Type: Application
    Filed: December 27, 2000
    Publication date: June 28, 2001
    Inventors: Ryosuke Yamanaka, Liyuan Han