Abstract: The present disclosure relates to a solid-state imaging device, a method for manufacturing the same, and an electronic apparatus capable of improving sensitivity while suppressing degradation of color mixture. The solid-state imaging device includes an anti-reflection portion having a moth-eye structure provided on a boundary surface on a light-receiving surface side of a photoelectric conversion region of each pixel arranged two-dimensionally, and an inter-pixel light-blocking portion provided below the boundary surface of the anti-reflection portion to block incident light. In addition, the photoelectric conversion region is a semiconductor region, and the inter-pixel light-blocking portion has a trench structure obtained by digging the semiconductor region in a depth direction at a pixel boundary. The techniques according to the present disclosure can be applied to, for example, a solid-state imaging device of a rear surface irradiation type.

Abstract: A method for forming a thin film having durability at a low cost is provided. A film formation apparatus 1 is used in the film formation method. The apparatus 1 comprises a vacuum container 11 in which a substrate 100 is placed at a lower part, a vacuum pump 15 for exhaust inside the container 11, a storage container 23 for storing a coating agent 21 provided outside the container 11, and a nozzle having an ejection part 19 capable of ejecting the coating agent 21 at its one end. A solution including two or more kinds of materials is used as the coating agent 21. The solution is ejected to the substrate in an atmosphere at a pressure set based on vapor pressures of respective materials composing the solution.

Abstract: Disclosed are a silicon wafer having a complex structure, a method of fabricating the same, and a solar cell using the same, wherein the silicon wafer is configured such that an oriented silicon wafer has a pyramid pattern formed through wet etching and additionally has nanowires formed in the direction in which silicon crystals are oriented on the pyramid pattern, and is further doped with POCl3.

Abstract: Provided is a method of manufacturing a patterned substrate. The method may be applied to a process of manufacturing a device such as an electronic device or integrated circuit, or another use, for example, to manufacture an integrated optical system, a guidance and detection pattern of a magnetic domain memory, a flat panel display, a LCD, a thin film magnetic head or an organic light emitting diode, and used to construct a pattern on a surface to be used to manufacture a discrete tract medium such as an integrated circuit, a bit-patterned medium and/or a magnetic storage device such as a hard drive.

Abstract: Provided is a method of manufacturing a patterned substrate. The method may be applied to a process of manufacturing a device such as an electronic device or integrated circuit, or another use, for example, to manufacture an integrated optical system, a guidance and detection pattern of a magnetic domain memory, a flat panel display, a LCD, a thin film magnetic head or an organic light emitting diode, and used to construct a pattern on a surface to be used to manufacture a discrete tract medium such as an integrated circuit, a bit-patterned medium and/or a magnetic storage device such as a hard drive.

Abstract: A solar cell structure may provide a front surface that may include a front passivation layer and front anti-reflective layer. The solar cell structure may provide both contacts on a rear surface. In some cases, the rear surface may optionally provide passivation, doped, and/or transparent conductive oxide layers. The rear surface also provides a multilayer foil assembly (MFA). The MFA provides a first metal foil in electrical communication with doped regions of the rear surface of the substrate, such as base or emitter regions. The MFA may also provide a second metal foil that is spaced apart from the first metal foil by a dielectric layer. The first metal foil and/or the dielectric layer may include openings through the entirety of these layers, and these openings may be utilized to form laser fired contacts electrically coupled to the second metal foil, which is electrically isolated from the first metal foil.

Abstract: A method for manufacturing a photovoltaic device includes a step of depositing one of an amorphous layer of ZnTe and a multilayer stack of Zn and Te adjacent a semiconductor layer. The one of the amorphous layer and the multilayer stack is then subjected to an energy impulse at a temperature equal to or greater than its critical temperature. The energy impulse results in an explosive crystallization to form a polycrystalline layer of ZnTe from the one of the amorphous layer and the multilayer stack.

Abstract: A solar cell structure with a microsphere-roughened antireflection structure comprises a P-type metal contact electrode, a P-type semiconductor layer, a P-type monocrystalline substrate, an N-type semiconductor layer, an N-type metal contact electrode, and a microsphere-roughened antireflection layer. The N-type semiconductor layer and the P-type semiconductor layer are respectively arranged on an upper surface and a lower surface of the P-type monocrystalline substrate. The P-type metal contact electrode is arranged below the P-type semiconductor layer. The N-type metal contact electrode has a specified pattern and is connected with the N-type semiconductor layer. The microsphere-roughened antireflection layer is arranged on an upper surface of the N-type semiconductor layer without covering the N-type metal contact electrode. The microsphere-roughened antireflection layer reduces the reflection of sunlight and increases the transmittance of sunlight to enhance the efficiency of solar cells.

Abstract: A method of manufacturing a polycrystalline silicon film includes: depositing a catalyst layer including nickel and depositing nickel nanoparticles on a substrate; exposing the catalyst layer and the nanoparticles to at least silane gas; and heat treating the substrate coated with the catalyst layer and the nanoparticles during at least part of the exposing to silane gas in growing a silicon based film on the substrate.

Abstract: A thin film deposition apparatus that includes a thin film deposition assembly incorporating: a deposition source that discharges a deposition material; a deposition source nozzle unit that is disposed at a side of the deposition source and includes a plurality of deposition source nozzles arranged in a first direction; a patterning slit sheet that is disposed opposite to the deposition source nozzle unit and includes a plurality of patterning slits arranged in the first direction; and a barrier plate assembly including a plurality of barrier plates that are disposed between the deposition source nozzle unit and the patterning slit sheet in the first direction, and partition a space between the deposition source nozzle unit and the patterning slit sheet into a plurality of sub-deposition spaces, wherein each of the barrier plates is separate from the patterning slit sheet.

Abstract: A manufacturing method of an organic light emitting diode (OLED) display includes manufacturing a mother substrate including a plurality of panels formed with a plurality of anodes for each pixel and a test pad connected to each anode of the panel. The method further includes loading the mother substrate into a plasma chamber and applying a plasma voltage to the test pad of the mother substrate to perform a plasma surface treatment process. The test pad is applied with a different plasma voltage for each pixel.

Abstract: The presented principles describe an apparatus and method of making the same, the apparatus being a semiconductor circuit device, having shallow trench isolation features bounding an active area and a periphery area on a semiconductor substrate to electrically isolate structures in the active area from structures in the periphery area. The shallow trench isolation feature bounding the active area is shallower than the shallow trench isolation feature bounding the periphery area, with the periphery area shallow trench isolation structure being formed through two or more etching steps.

Abstract: The present invention relates to cost effective production methods of high efficiency silicon based back-contacted back-junction solar panels and solar panels thereof having a multiplicity of alternating rectangular emitter- and base regions on the back-side of each cell, each with rectangular metallic electric finger conductor above and running in parallel with the corresponding emitter- and base region, a first insulation layer in-between the wafer and finger conductors, and a second insulation layer in between the finger conductors and cell interconnections.

Abstract: A method of manufacturing a solar cell having increased light efficiency due to increased gallium distribution on a surface of a light absorption layer, the method including forming a first electrode on a substrate, forming a precursor that includes at least one of copper, gallium, and indium on the first electrode, forming a preliminary light absorption layer by providing selenium to the precursor, forming the preliminary light absorption layer further including performing a heat treatment, and forming a liquid state CuSe compound, forming a light absorption layer by providing a compound including at least one of gallium and indium to the preliminary light absorption layer, and forming a second electrode on the light absorption layer.

Abstract: A photoelectrode for a photoelectrochemical cell, a method of manufacturing the same, and a photoelectrochemical cell including the same, the photoelectrode including TiO2 nanotubes, and a TiO2 layer coated on the TiO2 nanotubes.

Abstract: A solar cell includes a semiconductor base, a first doped semiconductor layer, an insulating layer, a second doped semiconductor layer and a first electrode layer. The semiconductor base has a first doped type. The first doped semiconductor layer, disposed on the semiconductor base, has a doped contact region. The insulating layer is disposed on the first doped semiconductor layer, exposing the doped contact region. The second doped semiconductor layer is disposed on the insulating layer and the doped contact region. The first doped semiconductor layer, the doped contact region and the second doped semiconductor layer have a second doped type, and a dopant concentration of the second doped semiconductor layer is between that of the first doped semiconductor layer and that of the doped contact region. The first electrode layer is disposed corresponding to the doped contact region.

Abstract: Provided is a polymer solar cell. The polymer solar cell includes a photoactive layer having a network-structured electron donor layer and a silica thin film layer surrounding the electron donor layer. By mixing of electron donor polymers, electron acceptor polymers, and block copolymers, the electron donor polymers form polymer grains through a self-assembly process. In addition, during a heat treatment process, silica precursors included in the block copolymers cross-link to each other to form the silica thin film. Electrons generated in the electron donor layer tunnel through the silica thin film, and holes are blocked by the silica thin film. Accordingly, electron-hole recombination in the electron acceptor layer is prevented.

Abstract: Embodiments of the invention contemplate formation of a high efficiency solar cell utilizing a laser patterning process to form openings in a passivation layer while maintaining good film properties of the passivation layer on a surface of a solar cell substrate. In one embodiment, a method of forming an opening in a passivation layer on a back surface of a solar cell substrate includes transferring a substrate having a passivation layer formed on a back surface of a substrate into a laser patterning apparatus, the substrate having a first type of doping atom on the back surface of the substrate and a second type of doping atom on a front surface of the substrate, providing laser radiation generated by the laser patterning apparatus from the front surface transmitting through the substrate to the passivation layer disposed on the back surface of the substrate, and forming openings in the passivation layer.

Abstract: A method for making light emitting diode is provided. The method includes following steps. A substrate is provided. A first semiconductor layer is grown on a surface of the substrate. A patterned mask layer is located on a surface of the first semiconductor layer, and the patterned mask layer includes a number of bar-shaped protruding structures, a slot is defined between each two adjacent protruding structures to expose a portion of the first semiconductor layer. The exposed first semiconductor layer is etched to form a protruding pair. A number of three-dimensional nano-structures are formed by removing the patterned mask layer. An active layer and a second semiconductor layers are grown on the number of three-dimensional nano-structures in that order. A first electrode is electrically connected with the first semiconductor layer. A second electrode is electrically connected with the second semiconductor layer.

Abstract: A semiconductor device is provided, which comprises a first electrode, crystalline semiconductor particles, a semiconductor layer, and a second electrode. The crystalline semiconductor particles of which adjacent particles are fusion-bonded, the crystalline semiconductor particles have a first conductivity type, and the semiconductor layer has a second conductivity type which is different from the first conductivity type.

Abstract: A method for processing a thin film photovoltaic module. The method includes providing a plurality of substrates, each of the substrates having a first electrode layer and an overlying absorber layer composed of copper indium gallium selenide (CIGS) or copper indium selenide (CIS) material. The absorber material comprises a plurality of sodium bearing species. The method maintains the plurality of substrates in a controlled environment after formation of at least the absorber layer through one or more processes up to a lamination process. The controlled environment has a relative humidity of less than 10% and a temperature ranging from about 10 degrees Celsius to about 40 degrees Celsius. The method subjects the plurality of substrates to a liquid comprising water at a temperature from about 10 degrees Celsius to about 80 degrees Celsius to process the plurality of substrates after formation of the absorber layer.

Abstract: A method of making a semiconductor light-emitting device including (A) a light-emitting portion by laminating in sequence a first compound semiconductor layer, an active layer, and a second compound semiconductor layer; (B) a first electrode electrically connected to the first compound semiconductor layer; (C) a transparent conductive material layer on the second compound semiconductor layer; (D) an insulating layer on a transparent conductive material layer; and (E) a second reflective electrode that on the transparent conductive material layer and on the insulating layer in a continuous manner, wherein, that the areas of the active layer, the transparent conductive material layer, the insulating layer, and the second electrode S1, S2, S3, and S4, respectively are related as S1?S2<S3 and S2<S4.

Abstract: A method includes performing a grinding on a backside of a semiconductor substrate. An image sensor is disposed on a front side of the semiconductor substrate. An impurity is doped into a surface layer of the backside of the semiconductor substrate to form a doped layer. A multi-cycle laser anneal is performed on the doped layer.

Abstract: A method for forming a thin film photovoltaic device may include providing a transparent substrate and forming a multi layered structure including at least a thin layer of indium material, copper material, and another layer of indium. A heat treatment may be performed that consumes substantially all of the thin layer of indium material into a portion of a copper indium disulfide alloy material. The method causes formation of a copper sulfide material overlying the copper indium disulfide alloy material during at least the thermal treatment process.

Abstract: A photovoltaic cell is made by coating a metal foil substrate with cadmium telluride powder, moving the powder coated foil across a cold plate or series of cooled rollers to prevent the substrate from melting, while melting the cadmium telluride powder by passing the powder coated foil under a microwave energy source. This forms a thin film of cadmium telluride on the foil. The cadmium telluride coated foil is then coated with cadmium sulfide powder, which is melted by passing the powder coated foil under a microwave energy source, thereby creating a P-N junction, and the cadmium sulfide layer is coated with indium, which is fused to the cadmium sulfide layer by microwave heating.

Abstract: Discussed are an ink containing nanoparticles for formation of thin film of a solar cell and its preparation method, CIGS thin film solar cell having at least one light absorption layer formed by coating or printing the above ink containing nanoparticles on a rear electrode, and a process for manufacturing the same. More particularly, the above absorption layer includes Cu, In, Ga and Se elements as constitutional ingredients thereof and such elements exist in the light absorption layer by coating or printing an ink that contains Cu2Se nanoparticles and (In,Ga)2Se3 nanoparticles on the rear electrode, and heating the treated electrode with the ink. Since Cu(In,Ga)Se2 (CIGS) thin film is formed using the ink containing nanoparticles, a simple process is used without requirement of vacuum processing or complex equipment and particle size of the thin film, Ga doping concentration, etc., can be easily regulated.

Abstract: Disclosed herein is a light-emitting element including: a first conductivity type semiconductor layer; a light-emitting functional layer formed on the first conductivity type semiconductor layer; a second conductivity type semiconductor layer formed on the light-emitting functional layer; a first conductivity type electrode which has continuity with the exposed portion of the first conductivity type semiconductor layer; a second conductivity type electrode which has continuity with the second conductivity type semiconductor layer; an insulating layer which lies between the light-emitting functional layer, second conductivity type semiconductor layer and second conductivity type electrode on one part and the first conductivity type electrode on the other part; and an annex insulating layer annexed to the insulating layer to form a virtual diode having rectifying action in the opposite direction to that of a diode made up of the second conductivity type semiconductor layer, light-emitting functional layer and f

Abstract: Provided herein are methods of incorporating additives into thin-film solar cell substrates and back contacts. In certain embodiments, sodium is incorporated into a substrate or a back contact of a thin-film photovoltaic stack where it can diffuse into a CIGS or other absorber layer to improve efficiency and/or growth of the layer. The methods involve laser treating the substrate or back contact in the presence of a sodium (or sodium-containing) solid or vapor to thereby incorporate sodium into the surface of the substrate or back contact. In certain embodiments, the surface is simultaneously smoothed.

Abstract: A method of manufacturing a photoelectric device, the method including: forming a first semiconductor layer on a semiconductor substrate through a first ion implantation; forming a second semiconductor layer having an inverted conductive type on a part of the first semiconductor layer through a second ion implantation; and performing thermal processing to restore lattice damage of the semiconductor substrate and activate a dopant into which ion implanted. According to one or more embodiments of the present invention, a photoelectric device having a reduction in the number of processes for manufacturing the photoelectric device and improved output characteristics is provided.

Abstract: A material is manufactured from a single piece of semiconductor material. The material manufactured includes a top layer of a semiconductor compound and a bottom layer of a semiconductor bulk. The material may also have an intrinsic semiconductor layer. The material is created from a transformative process on the single-piece semiconductor material caused by heating a semiconductor material having an impurity under particular conditions. The material manufactured exhibits photovoltaic properties because the layers formed during the transformative process create a p-i-n, a p-n, or an n-n junction having a band-gap difference between the n-type layers.

Abstract: A material is manufactured from a single piece of semiconductor material. The semiconductor material can be an n-type semiconductor. Such a manufactured material may have a top layer with a crystalline structure, transitioning into a transition layer, further transitioning into an intermediate layer, and further transitioning to the bulk substrate layer. The orientation of the crystalline pores of the crystalline structure align in layers of the material. The transition layer or intermediate layer includes a material that is substantially equivalent to intrinsic semiconductor. Also described is a method for manufacturing a material from a single piece of semiconductor material by exposing a top surface to an energy source until the transformation of the top surface occurs, while the bulk of the material remains unaltered. The material may exhibit photovoltaic properties.

Abstract: A fragile layer is formed in a region at a depth of less than 1000 nm from one surface of a single crystal semiconductor substrate, and a first impurity semiconductor layer and a first electrode are formed at the one surface side. After bonding the first electrode and a supporting substrate, the single crystal semiconductor substrate is separated using the fragile layer or the vicinity as a separation plane, thereby forming a first single crystal semiconductor layer over the supporting substrate. An amorphous semiconductor layer is formed on the first single crystal semiconductor layer, and a second single crystal semiconductor layer is formed by heat treatment for solid phase growth of the amorphous semiconductor layer. A second impurity semiconductor layer having a conductivity type opposite to that of the first impurity semiconductor layer and a second electrode are formed over the second single crystal semiconductor layer.

Abstract: The present invention discloses a micro/nanostructure PN junction diode array thin-film solar cell and a method for fabricating the same, wherein a microstructure or sub-microstructure PN junction diode array, such as a nanowire array or a nanocolumns array, is transferred from a source-material wafer to two pieces of transparent substrates, which are respectively corresponding to two electric conduction types, to fabricate a thin-film solar cell. In the present invention, the micro/nanostructure PN junction diode array has advantages of a fine-quality crystalline semiconductor, and the semiconductor substrate can be reused to save a lot of semiconductor material. Besides, the present invention can make the best of sunlight energy via stacking up the solar cells made of different types of semiconductor materials to absorb different wavebands of the sunlight spectrum.

Abstract: A method for producing an electrically conducting metal contact on a semiconductor component having a coating on the surface of a semiconductor substrate. In order to keep transfer resistances low while maintaining good mechanical strength, the invention proposes applying a particle-containing fluid onto the coating, where the particles contain at least metal particles and glass frits, curing the fluid while simultaneously forming metal areas in the substrate through heat treatment, removing the cured fluid and the areas of the coating covered by the fluid, and depositing, for the purposes of forming the contact without using intermediate layers, electrically conducting material from a solution onto areas of the semiconductor component in which the coating is removed while at the same time conductively connecting the metal areas present in said areas on the substrate.

Abstract: A method includes performing a grinding on a backside of a semiconductor substrate. An image sensor is disposed on a front side of the semiconductor substrate. An impurity is doped into a surface layer of the backside of the semiconductor substrate to form a doped layer. A multi-cycle laser anneal is performed on the doped layer.

Abstract: A back contact back junction thin-film solar cell is formed on a thin-film semiconductor solar cell. Preferably the thin film semiconductor material comprises crystalline silicon. Emitter regions, selective emitter regions, and a back surface field are formed through ion implantation and annealing processes.

Abstract: Various laser processing schemes are disclosed for producing various types of hetero-junction and homo-junction solar cells. The methods include base and emitter contact opening, selective doping, metal ablation, annealing to improve passivation, and selective emitter doping via laser heating of aluminum. Also, laser processing schemes are disclosed that are suitable for selective amorphous silicon ablation and selective doping for hetero-junction solar cells. Laser ablation techniques are disclosed that leave the underlying silicon substantially undamaged. These laser processing techniques may be applied to semiconductor substrates, including crystalline silicon substrates, and further including crystalline silicon substrates which are manufactured either through wire saw wafering methods or via epitaxial deposition processes, or other cleavage techniques such as ion implantation and heating, that are either planar or textured/three-dimensional.

Abstract: A method for manufacturing a photoelectric conversion device including a forming a semiconductor film by a plasma CVD method. The semiconductor film is an amorphous film of SiGe-based compound or a microcrystalline film of SiGe-based compound. The plasma CVD controls bandgap in thickness direction of the semiconductor film by varying the ON or OFF time of electric power applied to generate a plasma and intermittently supplying the power. The ON time and OFF time of the power fall in a range where the duty ratio ON time/(ON time+OFF time)×100(%) is 10% or more and 50% or less.

Abstract: Various laser processing schemes are disclosed for producing various types of hetero-junction emitter and homo-junction emitter solar cells. The methods include base and emitter contact opening, selective doping, metal ablation, annealing to improve passivation, and selective emitter doping via laser heating of aluminum. Also, laser processing schemes are disclosed that are suitable for selective amorphous silicon ablation and selective doping for hetero-junction solar cells. Laser ablation techniques are disclosed that leave the underlying silicon substantially undamaged. These laser processing techniques may be applied to semiconductor substrates, including crystalline silicon substrates, and further including crystalline silicon substrates which are manufactured either through wire saw wafering methods or via epitaxial deposition processes, or other cleavage techniques such as ion implantation and heating, that are either planar or textured/three-dimensional.

Abstract: A method of manufacturing a crystalline silicon solar cell, subsequently including: providing a crystalline silicon substrate having a first side and a second side opposite the first side; pre-diffusing Phosphorus into a first side of the substrate to render a Phosphorus diffused layer having an initial depth; blocking the first side of the substrate; exposing a second side of the substrate to a Boron diffusion source; heating the substrate for a certain period of time and to a certain temperature so as to diffuse Boron into the second side of the substrate and to simultaneously diffuse the Phosphorus further into the substrate.

Abstract: An organic light emitting display apparatus and a method of manufacturing the same. The display apparatus includes first, second, and third sub-pixels formed on a substrate. The first sub-pixel includes a first pixel electrode, a first transmissive conductive layer formed on the first pixel electrode, a second transmissive conductive layer formed on the first transmissive conductive layer, a first organic light emitting layer formed on the second transmissive conductive layer, and a counter electrode formed on the first organic light emitting layer. The second sub-pixel includes a second pixel electrode, the first transmissive conductive layer formed on the second pixel electrode, a first protector covering an edge of the first transmissive conductive layer, a second organic light emitting layer electrically connected to the first transmissive conductive layer, and the counter electrode formed on the second organic light emitting layer.

Abstract: A semiconductor device includes: a first semiconductor layer; a first electrode provided on a first surface side of the first semiconductor layer; a first insulating layer; and a second semiconductor layer. The first insulating layer is provided between the first semiconductor layer and the first electrode and configured to constrict current flowing between the first semiconductor layer and the first electrode. The second semiconductor layer has a first conductivity type and is provided at least on a path of the current constricted by the first insulating layer. The second semiconductor layer is in contact with the first electrode. The second semiconductor layer contains first impurities at a concentration higher than a concentration of impurities contained in the first semiconductor layer.

Abstract: The present invention is to provide a method of creating a PIN silicon thin film comprising the steps of providing a molten P-type, Intrinsic and N-type semiconductor material. Next, it is performing a down draw process or a casting process of the molten P-type. Intrinsic and N-type semiconductor material. Then, it is selectively performing a dual-side rolling process to create a P-type, Intrinsic and N-type semiconductor ribbon. Subsequently, it is performing a step of joining the P-type, Intrinsic and N-type semiconductor ribbon to form a PIN semiconductor ribbon. Finally, it is performing a roll press process or a pressing process to the PIN semiconductor ribbon to create the PIN semiconductor thin film.

Abstract: Provided is a method of manufacturing a photovoltaic device using a Joule heating-induced crystallization method. The method includes: forming a first conductive pattern on a substrate; forming a photoelectric conversion layer on the substrate having the first conductive pattern; and crystallizing at least part of the photoelectric conversion layer by applying an electric field to the photoelectric conversion layer, wherein the photoelectric conversion layer includes a first amorphous semiconductor layer containing first impurities, a second intrinsic, amorphous semiconductor layer, and a third amorphous semiconductor layer containing second impurities.

Abstract: A method for providing a semiconductor material for photovoltaic devices, the method includes providing a sample of iron disilicide comprising approximately 90 percent or greater of a beta phase entity. The sample of iron disilicide is characterized by a substantially uniform first particle size ranging from about 1 micron to about 10 microns. The method includes combining the sample of iron disilicide and a binding material to form a mixture of material. The method includes providing a substrate member including a surface region and deposits the mixture of material overlying the surface region of the substrate. In a specific embodiment, the mixture of material is subjected to a post-deposition process such as a curing process to form a thickness of material comprising the sample of iron disilicide overlying the substrate member. In a specific embodiment, the thickness of material is characterized by a thickness of about the first particle size.

Abstract: A nanopatterned surface is prepared by forming a block copolymer film on a miscut crystalline substrate, annealing the block copolymer film, then reconstructing the surface of the annealed block copolymer film. The method creates a well-ordered array of voids in the block copolymer film that is maintained over a large area. The nanopatterned block copolymer films can be used in a variety of different applications, including the fabrication of high density data storage media.

Abstract: Disclosed are aluminum paste compositions, processes to form solar cells using the aluminum paste compositions, and the solar cells so-produced. The aluminum paste compositions comprise 0.03% to 9%, by weight of crystalline calcium oxide; 27% to 89.9%, by weight of an aluminum powder; and 10% to 70%, by weight of an organic vehicle, wherein the amounts in % by weight are based on the total weight of the aluminum paste composition.

Abstract: A surface region of a semiconductor material on a surface of a semiconductor device is doped during its manufacture, by coating the surface region of the semiconductor material with a dielectric material surface layer and locally heating the surface of the semiconductor material in an area to be doped to locally melt the semiconductor material with the melting being performed in the presence of a dopant source. The heating is performed in a controlled manner such that a region of the surface of the semiconductor material in the area to be doped is maintained in a molten state without refreezing for a period of time greater than one microsecond and the dopant from the dopant source is absorbed into the molten semiconductor. The semiconductor device includes a semiconductor material structure in which a junction is formed and may incorporate a multi-layer anti-reflection coating.

Abstract: The invention relates to methods of making unsupported articles of semiconducting material using thermally active molds having an external surface temperature, Tsurface, and a core temperature, Tcore, whererin Tsurface>Tcore.

Abstract: A method for forming an impurity layer, includes forming a resist material 16 on a surface portion of a semiconductor substrate 15; exposing the resist material using a grating mask 10 comprising a light transmission region 11 including a plurality of unit light transmission regions 14 being arranged two-dimensionally, each being composed of a plurality of minute partial sections 13A to 13D having different transmittance; forming a resist layer 18 on the surface of the semiconductor substrate 15 by developing the exposed resist material, the resist layer including a thin film region 17 having a film thickness corresponding to the transmittance of the light transmission region; implanting ions to the semiconductor substrate 15 via the thin film region; and diffusing ion groups 21A?, 21B?, 21C?, and 21D? that are implanted at the same depth such that the ion groups are coupled in a lateral direction.