Emissive Type Patents (Class 445/50)
  • Patent number: 6800011
    Abstract: A flash discharge tube includes a pin-shaped cathode. The pin-shaped cathode has an electrode core of tungsten having a first end portion. A lead of nickel has a second end portion connected with the first end portion. In the electrode producing method, the electrode core and the lead are retained by use of respectively first and second chuck mechanisms with the first and second end portions opposed to one another. The first and second end portions are pushed on one another by moving at least one of the first and second chuck mechanisms. While the first and second end portions are pushed on one another, the first and second chuck mechanisms are supplied with electric current, so as to weld the electrode core and the lead together therewith by resistance welding.
    Type: Grant
    Filed: July 3, 2002
    Date of Patent: October 5, 2004
    Assignee: Fuji Photo Film Co., Ltd.
    Inventors: Kenichi Watanabe, Tsutomu Tobita, Nobuyuki Iwazaki, Masayoshi Muramatsu
  • Publication number: 20040189174
    Abstract: A method of removing, or otherwise rendering non-conductive, unwanted carbon nanotubes (132) from an electronic device (100) includes exposing at least a portion of the device to light emitted by one or more of light sources (202) that emit light. Those regions of the device that have wanted carbon nanotubes formed thereon can be selectively masked, by various methods, from the emitted light.
    Type: Application
    Filed: March 28, 2003
    Publication date: September 30, 2004
    Inventors: Kenneth A. Dean, Bernard F. Coll, Scott V. Johnson
  • Publication number: 20040192151
    Abstract: In a method for manufacturing carbon fibers by means of a thermal CVD method through catalysts, the method capable of obtaining a uniform film thickness regardless of a growth position and a growth area on a substrate is provided. The substrate on which a catalyst layer is formed is disposed in a reaction container. An atmosphere in the reaction container is set to be a reduced pressure atmosphere including a carbon containing gas having a partial pressure of 10 Pa or less, and the substrate is heated in the atmosphere to grow carbon fibers on the catalyst layer.
    Type: Application
    Filed: March 18, 2004
    Publication date: September 30, 2004
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Takeo Tsukamoto, Shinichi Kawate, Kazunari Oyama, Takahiro Sato, Shin Kitamura, Kazuya Miyazaki, Takashi Iwaki, Akira Shimazu
  • Patent number: 6796870
    Abstract: A field emission type cold cathode device comprises a substrate, and a metal plating layer formed on the substrate, the metal plating layer contains at least one carbon structure selected from a group of fullerenes and carbon nanotubes, the carbon structure is stuck out from the metal plating layer and a part of the carbon structure is buried in the metal plating layer.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: September 28, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masayuki Nakamoto
  • Patent number: 6798126
    Abstract: An electron emitter is produced by applying a work function lowering material that does not require an extensive heating step before the material will function to lower the work function. By eliminating the extensive heating step, a small radius, highly tapered emitter tip will retain its shape to consistently produce a high angular intensity at a reasonable output power level.
    Type: Grant
    Filed: May 3, 2002
    Date of Patent: September 28, 2004
    Assignee: FEI Company
    Inventors: Gregory A. Schwind, David S. Jun, Gerald G. Magera
  • Publication number: 20040183422
    Abstract: To provide an antistatic film that requires low power consumption and provides satisfactory electric contact, as a measure for preventing an insulating substrate surface having an electronic device formed thereon from being charged. The electronic device includes: an insulating substrate; a conductor; and a resistance film connected with the conductor, the conductor and the resistance film being formed on the insulating substrate, characterized in that the resistance film has a larger thickness in a connection region with the conductor than a thickness in portions other than the connection region.
    Type: Application
    Filed: December 22, 2003
    Publication date: September 23, 2004
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Kazuo Kuroda, Noriaki Ohguri, Toshifumi Yoshioka, Takeo Tsukamoto, Yoshio Suzuki
  • Publication number: 20040178713
    Abstract: Disclosed is an emitter composition of a field emission cell that is printed on a cathode substrate of a display to be applied to an electron emission source, including a carbon nanotube, a binder, glass frit, a dispersing agent and an organic solvent, characterized by further having 0.1-20 w % of diamond. Further, a manufacturing method of the emitter composition and a field emission cell using the emitter composition are also provided. In the current invention, since the field emission cell has the carbon nanotube and the diamond distributed simultaneously therein, it has a relatively high current density even at the same driving voltage, thereby improving emitting properties. In addition, the field emission cell is advantageous in terms of superior printability and stable field emission, while reducing various expenses required to operate and repair constitutive parts thereof.
    Type: Application
    Filed: March 30, 2004
    Publication date: September 16, 2004
    Inventors: Yang Woon Na, Gwang Bae Kim
  • Patent number: 6790114
    Abstract: Field emitter display (FED) assemblies and methods of forming field emitter display (FED) assemblies are described. In one embodiment, a substrate is provided having a column line formed and supported thereby. A plurality of field emitter tip regions are formed and disposed in operable proximity to the column line. At least some of the regions define different pixels of the display. A continuous resistor is interposed between the column line and at least two different pixels. In another embodiment, a column line is formed and supported by a substrate. A plurality of field emitter tip regions are formed and disposed in operable proximity to the column line. The regions define different pixels of the display. A single current-limiting resistor is operably coupled with the column line and at least two different pixels. In yet another embodiment, a series of column lines are formed over a substrate.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: September 14, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Ammar Derraa
  • Publication number: 20040166763
    Abstract: A sensor chip and a lens mount accommodating therein the sensor chip are mounted on a surface of a wiring substrate and a lens holder accommodating a lens therein is coupled with the lens mount. On a rear surface of the wiring substrate, a logic chip, a memory chip and a passive component are mounted and they are sealed with a seal resin. An electrode pad of the sensor chip is electrically connected to an electrode on the surface of the wiring substrate via a bonding wire but a stud bump is also formed on the electrode at the surface of the wiring substrate and this stud bump is connected with the bonding wire. On the surface of the wiring substrate, a flexible substrate is bonded with an anisotropic conductive film and a bonding material. When a camera module is to be manufactured, the surface side of the wiring substrate is assembled after the rear surface side of the wiring substrate is assembled.
    Type: Application
    Filed: August 29, 2003
    Publication date: August 26, 2004
    Inventors: Kenji Hanada, Masaki Nakanishi, Tomoo Matsuzawa, Koji Shida, Kazutoshi Takashima
  • Patent number: 6780075
    Abstract: A method of fabricating a nano-tube that enables shortly cutting off the nano-tube without deteriorating the same and that when the nano-tube is used as the emitter can provide an improved flat-ability of the surface of the emitter, a method of manufacturing a field-emission type cold cathode that can provide an improved flat-ability of the surface of the emitter and that resultantly can cause an emission of a uniform, stable high-emission electric current, and a method of manufacturing a display device that includes a method of fabricating a nano-tube and/or a method of manufacturing a field-emission type cold cathode. The method of fabricating a nano-tube according to the present invention includes the step of radiating ions into a nano-tube and the step of oxidizing the nano-tube.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: August 24, 2004
    Assignee: NEC Corporation
    Inventors: Akihiko Okamoto, Fuminori Itoh
  • Patent number: 6781319
    Abstract: A field emissive display (40) having an anode plate (10) coupled to a cathode plate (20) and a method for manufacturing the field emissive display (40). A substrate (21) of the cathode plate (20) is manufactured or selected such that its coefficient of thermal expansion substantially matches that of the anode plate (10), i.e., the coefficients of thermal expansion of the cathode plate (20) and the anode plate (10) are within ten percent of each other. The cathode plate (20) is coupled to the anode plate (10) by means of a frit structure (41) whose coefficient of thermal expansion preferably substantially matches that of the cathode plate (20) and the anode plate (10). A control circuit can be mounted to the bottom surface of the field emissive display (40).
    Type: Grant
    Filed: April 11, 2003
    Date of Patent: August 24, 2004
    Assignee: Motorola, Inc.
    Inventors: Joyce K. Yamamoto, Emmett M. Howard, Lawrence N. Dworsky
  • Patent number: 6771011
    Abstract: Electron emission structures formed using standard semiconductor processes on a substrate first prepared with a topographical feature are disclosed. At least one layer of a first material is concurrently deposited on the substrate and etched from the substrate to form an atomically sharp feature. An at least one layer of a second material is deposited over the atomically sharp feature. A conductive layer is deposited over the at least one layer of the second material. A selected area of material is removed from the conductive layer and the at least one layer of second material to expose the atomically sharp feature. Finally, electrical connectivity is provided to elements of the electron emission structure.
    Type: Grant
    Filed: March 7, 2003
    Date of Patent: August 3, 2004
    Assignee: Intel Corporation
    Inventors: Michael A. Maxim, Oleh Karpenko, Farshid Adibi-rizi, Brett E. Huff
  • Patent number: 6764366
    Abstract: An electrode structure for a display that includes lower electrodes and upper electrodes. In one embodiment, lower and upper electrodes are formed of either an aluminum alloy or a silver alloy. In another embodiment, upper and lower electrodes are formed using a metal alloy layer over which a cladding layer is deposited. A silicon nitride passivation layer is used to protect the upper electrodes from damage in subsequent process steps. Various other materials and structures are also disclosed that protect the upper electrodes from damage in subsequent process steps.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: July 20, 2004
    Assignees: Candescent Intellectual Property Services, Inc., Candescent Technologies Corporation
    Inventors: Jueng Gil Lee, Christopher J. Spindt, Johan Knall, Matthew A. Bonn, Kishore K. Chakravorty
  • Patent number: 6764368
    Abstract: The invention consists of a flat panel display device that combines the simplicity of manufacture of a TFEL display with the phosphor stimulation capabilities of an FED. A phosphor such a ZnS:Mn can act as both an EL phosphor and as a cathodoluminescent phosphor. The phosphor is deposited on a porous silicon underlayer that contains a labyrinth of fissures, voids, hillocks, and microscopically rough surfaces. At the phosphor-porous silicon interface, the labyrinthine surface possesses hundreds to thousands of electric field line compression points that can be characterized by an average field enhancement. When this underlayer is the cathode, high energy electrons are injected into the phosphor producing substantial light emission even at low applied fields. Additionally, the surrounding silicon is available to integrate drive circuitry and provide a TFT at each pixel, if needed.
    Type: Grant
    Filed: April 16, 2003
    Date of Patent: July 20, 2004
    Assignee: University of North Carolina at Charlotte
    Inventors: Mohamed Ali Hasan, Deirdre Heyde Elqaq
  • Patent number: 6759799
    Abstract: The oxide cathode comprises a support and an oxide layer on the latter. It furthermore includes particles of a conducting material having a first end incorporated in the support and a second end lodged in the oxide layer, so as to constitute conducting bridges passing through an interface layer forming between the support and the oxide layer. The invention also relates to a process for manufacturing such a cathode. The conducting particles make it possible to improve the electrical conductivity of the cathode, both within the oxide layer and within the interface layer.
    Type: Grant
    Filed: July 30, 2002
    Date of Patent: July 6, 2004
    Assignee: Thomson Licensing S. A.
    Inventor: Jean-Luc Ricaud
  • Publication number: 20040124756
    Abstract: A field emission device is provided. The field emission device includes a substrate, a cathode electrode formed on the substrate, a gate insulating layer which is formed on the cathode electrode and has a through hole corresponding to part of the cathode electrode, a gate electrode which has a gate hole corresponding to the through hole and is formed on the gate insulating layer, and an emitter formed on the gate electrode exposed to the bottom of the through hole. The emitter has a stack structure formed of a resistive material layer and an electron emission material layer containing a fine electron emission source formed on the resistive material layer.
    Type: Application
    Filed: December 16, 2003
    Publication date: July 1, 2004
    Applicant: SAMSUNG SDI CO., LTD.
    Inventors: Jeong-Hee Lee, Hang-Woo Lee, Shang-Hyeun Park, You-Jong Kim
  • Publication number: 20040116034
    Abstract: A method of manufacturing an electronic device in which a substrate with a pair of electrodes is provided and a carbon nanotube is formed or arranged to electrically connect the electrodes.
    Type: Application
    Filed: November 14, 2003
    Publication date: June 17, 2004
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Tohru Den, Tatsuya Iwasaki
  • Patent number: 6750606
    Abstract: A flat panel display and manufacturing method therefor is provided having a baseplate hermetically sealed to a faceplate. A first electrode and a resistive layer are formed on the baseplate. An insulating layer is deposited on the resistive layer. A second electrode is formed over the insulating layer. A passivation layer is deposited over the insulating layer and a gate is formed over the passivation layer. Openings are concurrently formed in the gate and insulation layer and used to form an emitter cavity. A conductive glue is deposited to form a gate-to-electrode contact for connecting the gate and the second electrode. An emitter is formed in the emitter cavity and emitter material outside of the emitter cavity is removed.
    Type: Grant
    Filed: September 5, 2001
    Date of Patent: June 15, 2004
    Assignees: Sony Corporation, Sony Electronics, Inc.
    Inventor: Hidenori Kenmotsu
  • Publication number: 20040104660
    Abstract: A fabrication method for an emitter includes the steps of forming on a glass substrate (10) a CNT film (12) which contains a plurality of carbon nanotubes (CNTs) (12a) and constitutes an emitter electrode (12b), forming a gate electrode (16) via an insulating film (13) on the CNT film (12), forming a plurality of gate openings (17) in the gate electrode (16) and the insulating film (13), and aligning upright the CNTs (12a) in the gate opening (17). The upright alignment generates a stable uniform emission current and provides excellent emission characteristics.
    Type: Application
    Filed: December 22, 2003
    Publication date: June 3, 2004
    Inventors: Akihiko Okamoto, Kazuo Konuma, Yoshinori Tomihari, Fuminori Ito, Yuko Okada
  • Patent number: 6735830
    Abstract: The invention relates to apparatus for generating ions in a gaseous medium, the apparatus comprising one or more needles (40) each presenting a shank (40.1) and an emitter end (40.2), a sheath (42) of composite material comprising glass fiber reinforced unsaturated polyester surrounding the shank (40.1) of each needle, and means (44, 46, 80) for applying a voltage between two portions of the shank of each needle.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: May 18, 2004
    Assignee: Genie ET Environnement
    Inventor: Joël Merciel
  • Publication number: 20040092197
    Abstract: An organic light-emitting panel, a process for packaging an organic light-emitting panel and a coating apparatus applied thereto are described. A patterned desiccant with large surface area is formed on a cover plate by an ink-jet printing process. The process for packaging an organic light-emitting panel and the coating process are applied for reducing crosslinking time of the desiccant, increasing the surface area of the desiccant and enhancing the moisture absorption ability of the desiccant.
    Type: Application
    Filed: October 24, 2003
    Publication date: May 13, 2004
    Inventors: Mao-Kuo Wei, Yuang-Wei Lai
  • Patent number: 6733355
    Abstract: The present invention provides a method for manufacturing a triode field emission display (FED) that can accommodate a large screen size and that has holes that are minutely and uniformly formed.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: May 11, 2004
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Seong-Yeon Hwang, Sang-Jin Lee, Jong-Min Kim
  • Patent number: 6733354
    Abstract: The disclosed method for forming a field emission display includes forming a cathode and an anode, forming a plurality of photoresist posts over the cathode, and coating the posts with a coating material. The coating material forms sidewalls around the posts. The photoresist posts may then be removed from within the sidewalls. The anode may then be fitted onto the sidewalls so that the sidewalls function as spacers in the field emission display.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: May 11, 2004
    Assignee: Micron Technology, Inc.
    Inventors: David A. Cathey, James J. Alwan
  • Publication number: 20040087240
    Abstract: An emitter includes an electron supply and a tunneling layer disposed on the electron supply. A cathode layer is disposed on the tunneling layer. A conductive electrode has multiple layers of conductive material. The multiple layers include a protective layer disposed on the cathode layer. The conductive electrode has been etched to define an opening thereby exposing a portion of the cathode layer.
    Type: Application
    Filed: October 15, 2003
    Publication date: May 6, 2004
    Inventors: Zhizhang Chen, Paul J. Benning, Sriram Ramamoorthi, Thomas Novet
  • Publication number: 20040087239
    Abstract: A manufacturing method of forming at low costs a surface conduction electron-emitting device by which microminiaturization can be easily realized and electron-emitting characteristics which are uniform over a large area can be obtained is provided. A resin pattern with ion-exchange performance is formed on a substrate, a solution containing a metal component is absorbed to the resin pattern portion by using a deionization reaction, thereafter, the resin pattern is baked to thereby form an electroconductive thin film, and a forming operation is executed to the obtained electroconductive thin film, thereby manufacturing the surface conduction electron-emitting device.
    Type: Application
    Filed: October 16, 2003
    Publication date: May 6, 2004
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Taku Shimoda, Masahiro Terada, Shosei Mori
  • Patent number: 6729928
    Abstract: A method and structure are provided for simultaneously fabricating polysilicon cones for a field emitter and a porous insulating oxide layer for supporting a gate material. The porous insulating oxide is fabricated by first making the polysilicon porous in the field regions by an anodic etch and then oxidation. This is a fully self-aligned process and only one masking is used. Shaping of the gate material in close proximity to the top of the cone is achieved by a lift-off technique and requires no special deposition techniques like depositions at a grazing incidence to improve the emitter.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: May 4, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Leonard Forbes, Kie Y. Ahn
  • Publication number: 20040080261
    Abstract: An image display apparatus includes an envelope which has a front substrate and a rear substrate opposed to each other and individually having peripheral edge portions sealed together. A sealed portion is sealed by a sealing member. the sealing member has electrical conductivity and melts when supplied with current. After the sealing member in the sealed portion is supplied with current and melted during manufacture, the current supply is stopped to cool and solidify the sealing member, whereupon the respective peripheral edge portions of the front substrate and the rear substrate are selected together.
    Type: Application
    Filed: October 23, 2003
    Publication date: April 29, 2004
    Inventors: Masahiro Yokota, Takashi Enomoto, Takashi Nishimura, Akiyoshi Yamada, Shouichi Yokoyama
  • Publication number: 20040075379
    Abstract: The invention comprises a method of fabricating a vacuum microtube device comprising the steps of forming a cathode layer comprising an array of electron emitters, forming a gate layer comprising an array of openings for passing electrons from the electron emitters, and forming an anode layer for receiving electrons from the emitters. The cathode gate layer and the anode layer are vertically aligned and bonded together with intervening spacers on a silicon substrate so that electrons from respective emitters pass through respective gate openings to the anode. The use of substrate area is highly efficient and electrode spacing can be precisely controlled. An optional electron multiplying structure providing secondary electron emission material can be disposed between the gate layer and the anode in the path of emitted electrons.
    Type: Application
    Filed: August 23, 2003
    Publication date: April 22, 2004
    Inventor: Sungho Jin
  • Publication number: 20040077249
    Abstract: Evaporation and condensation of carbon is effected by arc discharge between an anode formed of a carbon electrode and a cathode disposed facing the carbon electrode 2 in an inert gas atmosphere, and at the same time, the generated carbon nanotubes are dispersed into an inert gas and transported along with the inert gas through a transporting tube, and a jet of the inert gas containing the carbon nanotubes is emitted from a nozzle, thereby forming carbon nanotubes on a target substrate. This provides a carbon nanotube manufacturing method wherein carbon nanotubes are generated with a simple process, and the CNT patterning process is simplified by forming a carbon nanotube film on a substrate, thereby reducing costs.
    Type: Application
    Filed: October 2, 2003
    Publication date: April 22, 2004
    Inventors: Yasuyuki Saito, Junri Ishikura
  • Patent number: 6722935
    Abstract: In a flat-panel display structure having a spacer with laterally segmented face electrodes, one embodiment of the present invention defines the length of the laterally segmented face electrode sections to minimize zero current shift variation in electron trajectories. Advantageously, the present embodiment of the invention prevents image quality degradation. In one embodiment, values for variation in the uniformity of and dicing tolerance are combined to calculate a design optimum for the length of laterally segmented face electrodes. Zero current shift variation from fluctuations in wall resistance falls off with the length of laterally segmented face electrodes. Zero current shift due to first order angular alignment during dicing varies linearly with the dashed electrode length. In one embodiment of the present invention, an optimal value is calculated by combining these effects to minimize zero current shift. Advantageously, in one embodiment, the electrode segments are individually testable.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: April 20, 2004
    Assignee: Candescent Intellectual Property Services, Inc.
    Inventors: James C. Dunphy, Christopher J. Spindt
  • Patent number: 6722936
    Abstract: The invention relates to a method for producing a field emission display (FED) that includes a first substrate with electrodes of an anode structure and a luminescent material that at least partly covers these electrodes. The electrodes of a cathode structure are affixed on a second substrate and include field emitters. The anode structure and the cathode structure are aligned with one another and interconnected in spaced-apart disposition in a gas-tight manner along their lateral edges, except for a gas inlet opening and a gas outlet opening. The field emitters are deposited by heating only the electrodes of the cathode structure while flowing a carrier gas through the gas inlet opening and the gas outlet opening.
    Type: Grant
    Filed: April 11, 2002
    Date of Patent: April 20, 2004
    Assignee: Electrovac, Fabrikation elektrotechnischer Spezialartikel Gesellschaft m.b.H.
    Inventor: Ernst Hammel
  • Patent number: 6719602
    Abstract: A nanotube length control method involving a nanotube and a discharge needle so that the nanotube with its base end portion fastened to a holder and its tip end portion caused to protrude is set so as for its tip end to face the tip end of the discharge needle. A voltage is applied across the nanotube and the discharge needle so that an electrical discharge is caused to occur between the tip end of the nanotube and the tip end of the discharge needle, thus cutting down the tip end of the nanotube by this discharge, and it is possible to control the length of the tip end portion of the nanotube.
    Type: Grant
    Filed: May 24, 2002
    Date of Patent: April 13, 2004
    Assignees: Daiken Chemical Co., Ltd.
    Inventors: Yoshikazu Nakayama, Seiji Akita, Akio Harada
  • Patent number: 6713312
    Abstract: A method for fabricating field emitters from a conductive or semiconductive substrate. A layer of low work function material may be formed on the substrate. Emission tips that include such a low work function material may have improved performance. An etch mask appropriate for forming emission tips is patterned at desired locations over the substrate and any low work function material thereover. An anisotropic etch of at least the substrate is conducted to form vertical columns therefrom. A sacrificial layer may then be formed over the vertical columns. A facet etch of each vertical column forms an emission tip of the desired shape. If a sacrificial layer was formed over the vertical columns prior to formation of emission tips therefrom, the remaining material of the sacrificial layer may be utilized to facilitate the removal of any redeposition materials formed during the facet etch.
    Type: Grant
    Filed: May 8, 2002
    Date of Patent: March 30, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Guy T. Blalock, Sanh D. Tang, Zhaohui Huang
  • Patent number: 6710539
    Abstract: An improved structure and method are provided to decouple the gate dielectric thickness and the emitter tip to gate layer distance by etching the dielectric using ion bombardment. The ion bombardment, or ion etch, is performed prior to depositing the gate layer. The improved structure and method will allow a smaller distance between the emitter tip and the gate structure without having to decrease the thickness of the gate insulator layer. The smaller emitter tip to gate distance lowers the turn-on voltage which is highly desirable in such areas as beam optics and power dissipation.
    Type: Grant
    Filed: September 2, 1998
    Date of Patent: March 23, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Ji Ung Lee
  • Patent number: 6705914
    Abstract: A high pressure discharge lamp which achieves a long life of at least 3000 hours and in which variations in lamp characteristics are suppressed is disclosed. In the high pressure discharge lamp of the present invention, during manufacturing of an electrode, a covering member 123 having a coil shape and being made of refractory metal is applied on a discharge side end of an electrode rod 122 made of refractory metal so as to cover a circumference of the electrode rod 122 in a vicinity of the discharge side end. The discharge side end 124 on which the covering member 123 is applied is fused into a semi-sphere by intermittently heat fusing the discharge side end according, for instance, to arc discharge or laser irradiation.
    Type: Grant
    Filed: April 17, 2001
    Date of Patent: March 16, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Tsutatani, Yoshiki Kitahara, Toshiyuki Shimizu
  • Patent number: 6705915
    Abstract: A process for assembling a cathode for electron gun comprising a body of emissive material, a cup into which the body of emissive material is inserted, a substantially cylindrical metal skirt, the said process comprising the following successive steps: insertion of the cup into one of the open ends of the metal skirt, welding of the cup to the skirt, crimping of the body/cup/skirt assembly by lateral squeezing at the level of the weld zone in such a way as to cause an indent-like deformation of the lateral face of the body.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: March 16, 2004
    Assignee: Thomson Licensing S.A.
    Inventors: Jean-Luc Ricaud, Jean-Claude Pruvost, Francois Nizery, Jean Remy Adamski
  • Patent number: 6705913
    Abstract: An impregnated cathode whose initial electron emitting performance, lifetime property, and insulating property for an electron gun are excellent and that is suitable for mass production, and a method for manufacturing the same. In the impregnated cathode, the porosity of the sintered body of porous metal is continuously increased as the distance in the depth direction from an electron emitting face is increased. A pellet of sintered body of metal raw material has pores in it. The pores are filled with electron emitting material. The porosity is continuously increased as the distance in the depth direction from an electron emitting face is increased. Thus, since the discontinuity inside the pellet is not formed, a reaction generating free Ba continuously and smoothly proceeds on the entire pellet. In addition, since raw material powder having more than one kind of particle size is not necessary to be used, the manufacturing process can be simplified. Moreover, various functions such as lifetime property, etc.
    Type: Grant
    Filed: January 25, 2001
    Date of Patent: March 16, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Satoru Nakagawa
  • Publication number: 20040048544
    Abstract: An emission structure includes a resistor with at least one emitter tip thereover and at least one substantially vertically oriented conductive element positioned adjacent the resistor. The conductive element may contact the resistor. A method for fabricating the emission structure includes forming at least one conductive line, depositing at least one layer of semiconductive or conductive material over and laterally adjacent the at least one conductive line, and forming a hard mask in recessed areas of the surface of the uppermost material layer. The underlying material layer or layers are patterned through the hard mask, exposing substantially longitudinal center portions of the conductive lines. The remaining semiconductive or conductive material is patterned to form the emitter tip and resistor. At least the substantially central longitudinal portion of the conductive trace is removed to form the conductive element.
    Type: Application
    Filed: September 2, 2003
    Publication date: March 11, 2004
    Inventor: Ammar Derraa
  • Patent number: 6692323
    Abstract: A structure and method are provided to inhibit degradation to the electron beam of a field emitter device by coating the field emitter tip with a substance or a compound. The substance or compound acts in the presence of outgassing to inhibit such degradation. In one embodiment, the substance or compound coating the field emitter tip is stable in the presence of outgassing. In another embodiment, the substance or compound decomposes at least one matter in the outgassing. In yet another embodiment, the substance or compound neutralizes at least one matter in the outgassing. In a further embodiment, the substance or compound brings about a catalysis in the presence of outgassing.
    Type: Grant
    Filed: January 14, 2000
    Date of Patent: February 17, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Behnam Moradi, Tian Zhang, John Lee
  • Patent number: 6692327
    Abstract: An electron emission element includes a substrate, a cathode electrode formed on the substrate, an anode electrode disposed so as to be opposed to the cathode electrode, an electron emission member disposed on the cathode electrode, a control electrode disposed between the cathode electrode and the anode electrode, and an insulating layer. The electron emission member includes a first member having a hole and a second member filling the hole, wherein the second member is more likely to emit electrons than the first member.
    Type: Grant
    Filed: January 11, 2000
    Date of Patent: February 17, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Deguchi, Makoto Kitabatake, Kanji Imai, Tomohiro Sekiguchi, Hideo Kurokawa, Keisuke Koga, Tetsuya Shiratori, Toru Kawase
  • Publication number: 20040027053
    Abstract: Multilayer cathode backplate structures are provided for use with a field emitter in display panels. Processes for making the structures are also disclosed. The backplate structures are made of a plurality of electrodes separated by one or more patterned layers of a dielectric composition, each said patterned layer being formed by firing a thick film dielectric composition which has been patterned by diffusion patterning.
    Type: Application
    Filed: August 7, 2003
    Publication date: February 12, 2004
    Inventor: Daniel Irwin Amey
  • Patent number: 6689282
    Abstract: A method of forming emitter tips for use in a field emission array is disclosed. The tips are formed by utilizing a polymer residue that forms during the dry etch sharpening step to hold the mask caps in place on the emitter tips. The residue polymer continues to support the mask caps as the tips are over-etched, enabling the tips to be etched past sharp without losing their shape and sharpness. The dry etch utilizes an etchant comprised of fluorine and chlorine gases. The mask caps and residue polymer are easily removed after etching by washing the wafers in a wash of deionized water, or Buffered Oxide Etch.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: February 10, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Aaron R. Wilson
  • Publication number: 20040023592
    Abstract: A method for fabricating a field emission structure is disclosed. A first dielectric layer and a second material layer are disposed over a substrate and at least one emitter tip thereon. Planarization of the second layer exposes regions of the first layer that cover the emitter tip, which regions may then be removed through the second layer. Substantially Substantial removal of the second layer reduces any conductive defects that protrude from a surface of the first layer. A third, dielectric layer and fourth, grid layer are then formed. Planarization of the fourth layer forms grid openings and exposes dielectric material of the third layer which overlies the emitter tip. Dielectric material of one or both underlying layers may then be removed to expose the outer surfaces of the emitter tip.
    Type: Application
    Filed: July 8, 2003
    Publication date: February 5, 2004
    Inventor: Ammar Derraa
  • Publication number: 20040017141
    Abstract: This invention provides compositions of matter that contain an electron emitting substance and an expansion material. The expansion material may, for example, be an intercalation compound. When a film is formed from the composition, expansion of the expansion material typically causes rupturing or fracturing of the film. No further treatment of the surface of the film is typically required after expansion of the expansion material to obtain good emission properties. A surface formed from such a fractured film acts as an efficient electron field emitter and thus is useful in vacuum microelectronic devices.
    Type: Application
    Filed: April 23, 2003
    Publication date: January 29, 2004
    Inventors: Lap-Tak Andrew Cheng, David Herbert Roach
  • Patent number: 6682383
    Abstract: A cathode structure for a field emission device, which is an essential component of a field emission device, and a method of fabricating the same are provided. An emitter material for electron emission constituting cathodes is formed in a particulate emitter, the particulate emitter is formed of a material from which electrons can be easily emitted at a low electric field. A significant advantage of the present invention over a conventional art is that the present invention patterns an emitter material to a cathode electrode using a photolithography process or a lift-off process. In the lift-off process, the emitting compound is patterned using a sacrifice layer. Also, in another embodiment of the present invention, there is disclosed a method of easily fabricating cathodes for a triode-type field emission device using a particulate emitter material at a low process temperature.
    Type: Grant
    Filed: May 17, 2001
    Date of Patent: January 27, 2004
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Young-Rae Cho, Jin-Ho Lee, Yoon-Ho Song, Seung-Youl Kang, Moon-Youn Jung, Kyoung-Ik Cho, Do-Hyung Kim, Chi-Sun Hwang
  • Patent number: 6672926
    Abstract: A method of fabricating an emitter of a field emission display. A mixture of metal and silver paste with glass material is screen printed on a substrate as a silver electrode. The metal is selected from a hard solder alloy such as Al/Si alloy containing tin, zinc, aluminum or other low melting point metal. Alternatively, the metal and the silver paste with the glass material are separately screen printed on the substrate. The metal is selected from tin, zinc, aluminum, or an alloy with a low melting point such as aluminum/silicon alloy. A carbon nano-tube layer is formed on the silver electrode by coating the carbon nano-tube material with the electric arc. Alternately a catalyst layer can be formed on the silver electrode prior to the formation of the carbon nano-tube layer. A metal layer such as nickel and copper is formed on the carbon nano-tube layer to prevent the carbon nano-tube layer from absorbing gas.
    Type: Grant
    Filed: December 19, 2001
    Date of Patent: January 6, 2004
    Assignee: Delta Optoelectronics, Inc.
    Inventors: Wen-Tsang Liu, Yui-Shin Fran, Lai-Cheng Chen
  • Patent number: 6660173
    Abstract: A method of forming emitter tips for use in a field emission array is disclosed. The tips are formed by utilizing a polymer residue that forms during the dry etch sharpening step to hold the mask caps in place on the emitter tips. The residue polymer continues to support the mask caps as the tips are over-etched, enabling the tips to be etched past sharp without losing their shape and sharpness. The dry etch utilizes an etchant comprised of fluorine and chlorine gases. The mask caps and residue polymer are easily removed after etching by washing the wafers in a wash of deionized water, or Buffered Oxide Etch.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: December 9, 2003
    Assignee: Micron Technology, Inc.
    Inventor: Aaron R. Wilson
  • Patent number: 6648710
    Abstract: A low temperature process for silicon-based field emitter tip sharpening. A rough silicon-based field emitter tip is exposed to xenon difluoride gas in a process chamber to carry out low-temperature, isotropic etching of the rough silicon-based field emitter tip to produce a final, sharpened field emitter tip.
    Type: Grant
    Filed: June 12, 2001
    Date of Patent: November 18, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Donald J. Milligan, John Stephen Dunfield
  • Patent number: 6648711
    Abstract: A field emitter having a high current density even at a low voltage using a carbon nanotube film, a method of manufacturing the same, and a field emission display device having the field emitter, are provided, The field emitter includes an insulating substrate. a thin film transistor formed on the insulating substrate, the thin film transistor having a semiconductor layer, a source electrode, a drain electrode and a gate electrode, and an electron emitting unit formed of a carbon nanotube film on the drain electrode of the thin film transistor The thin film transistor can be a coplanar-type transistor, a stagger-type transistor, or an inverse stagger-type transistor. The surface of a portion of the drain electrode, which contacts the carbon nanotube film, contains catalytic metal which is transition metal such as nickel or cobalt. Alternatively, the drain electrode itself can be formed of catalytic metal for carbon nanotube growth.
    Type: Grant
    Filed: June 12, 2000
    Date of Patent: November 18, 2003
    Assignee: Iljin Nanotech Co., Ltd.
    Inventors: Jin Jang, Suk-jae Chung, Sung-hoon Lim, Jae-eun Yoo
  • Patent number: 6648712
    Abstract: A triode-type field emission device includes an insulating substrate; a cathode formed on the insulating substrate; a field emitter aligned on the cathode, wherein the field emitter includes a plurality of emitter tips and each emitter tip has the diameter of nanometers; an insulating layer positioned around the field emitter for electrically isolating the field emitter; and a gate electrode formed on the insulating layer, wherein the gate electrode is closed to an upper portion of the field emitter. Therefore, the triode-type field emission device may be operable in a low voltage.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: November 18, 2003
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung-Yool Choi, Mun-Cheol Paek, Kyoung-Ik Cho, Jeen Hur, Gi-Pyung Han