Abstract: A voltage controlled oscillator includes a first inductor; a first variable capacitance unit including a first variable capacitance element having a variable capacitance and a second variable capacitance element having a variable capacitance; a first node configured for application of a first voltage to the first variable capacitance unit; a cross-coupled unit including a first transistor and a second transistor, an output of the first transistor connected to an input of the second transistor; a current source configured to flow a current through the first inductor, the first transistor, and the second transistor; a second variable capacitance unit including a third variable capacitance element having a variable capacitance, and a fourth variable capacitance element having a variable capacitance; and a second node different from the first node configured for application of a second voltage to the second variable capacitance unit.

Abstract: A local oscillator generator (LO generator) may be configured to transmit an LO signal to a mixer. The LO generator may include an input buffer configured to generate a first internal oscillator signal based on the input oscillator signal. The LO generator may include a frequency dividing circuit configured to generate a second internal oscillator signal based on dividing a frequency of the first internal oscillator signal. The LO generator may include an output buffer configured to generate the LO signal based on the second internal oscillator signal. The input buffer and the frequency dividing circuit may each be configured to receive a power voltage independently of the output buffer.

Abstract: A first transistor and a second transistor cascade-connected, a wiring which connects a drain of the first transistor and a gate of the second transistor, a capacitor whose one terminal is connected between the first transistor and the second transistor cascade-connected and whose other terminal is grounded, and a control circuit are included. The control circuit adjusts an inductance value by controlling a capacitance value of the capacitor or gate voltage of the first transistor or the second transistor.

Abstract: A transmission circuit includes a shift circuit, a second shift circuit, and a modulation circuit. The shift circuit is configured to select a shift amount according to shift parameters and to introduce the shift amount in a first direction into in phase and quadrature phase baseband signals. The second circuit is configured to selectively introduce the shift amount in a second direction into local oscillator signals. The modulation circuit is configured to modulate the shifted baseband signals onto the shifted local oscillator signals to generate a composite modulated output signal. Unwanted components of the output signal are shifted away from original or specified limits. Wanted components of the output signal are unshifted.

Abstract: Apparatus and methods for tuning a voltage controlled oscillator (VCO) are provided. In one aspect, a method of auto-tuning in a phase-locked loop includes generating a VCO clock signal using a VCO coupled to a capacitor array, dividing the VCO clock signal to generate a divided clock signal using a prescaler circuit having a selectable division ratio, controlling a value of the selectable division ratio using a first counter and a second counter of a counter module, generating a phase-frequency detector feedback signal based on a division control signal M and the divided clock signal using the counter module, counting a number of cycles of the divided clock signal that occur during a calibration interval using a cycle counter of a digital processing logic circuit, and determining the value of a capacitor array control signal based on the number of cycles counted during the calibration interval.

Abstract: A circuit for a single differential-inductor oscillator with common-mode resonance may include a tank circuit formed by coupling a first inductor with a pair of first capacitors; a cross-coupled transistor pair coupled to the tank circuit; and one or more second capacitors coupled to the tank circuit and the cross-coupled transistors. The single differential-inductor oscillator may be configured such that a common mode (CM) resonance frequency (FCM) associated with the single differential-inductor oscillator is at twice a differential resonance frequency (FD) associated with the single differential-inductor oscillator.

Abstract: A variable capacitance circuit includes: a prescribed node, to which an alternate current signal with a reference potential as a center voltage is applied; a first capacitor connected to the prescribed node; a second capacitor connected between the first capacitor and the reference potential; a third capacitor and a transistor for controlling capacitance, provide between a first node between the second capacitor and the first capacitor, and the reference potential; and a bias circuit which applies a first bias voltage to a second node between the third capacitor and the transistor.

Abstract: A synthetic-frequency RF transmitter is provided for transmitting an electromagnetic signal via an electrically short antenna. The transmitter comprises a reactive energy storage with an effective reactance adapted to form with the antenna a resonance circuit with a resonance frequency and a driver adapted to provide to the resonance circuit an electric transmission signal having an instantaneous frequency that varies in dependence on an information signal. The transmitter is characterized in that the transmitter is adapted to dynamically change the resonance frequency by changing the effective reactance in dependence on the information signal. Thus, the instantaneous pass-band of the resonance circuit may be controlled to substantially always comprise the instantaneous frequency of the electric transmission signal and thus of the electromagnetic signal.

Abstract: A method may include measuring a frequency difference between an actual frequency and an expected frequency associated with a frequency control calibration signal value for each of a plurality of frequency control calibration signal values during a calibration phase. The method may additionally include generating integral non-linearity compensation values based on the frequency differences measured The method may further include generating the applied frequency control signal based on a frequency control calibration signal value received by the digital-to-analog converter during the calibration phase. The method may also include generating a compensated frequency control signal value based on a frequency control signal value received by the integral non-linearity compensation module and an integral non-linearity compensation value associated with the frequency control signal value during an operation phase of the wireless communication element.

Abstract: A communication apparatus having a first and second wireless communications modules is provided. The first wireless communications module includes a receiving unit receiving RF signals from an air interface, a signal processing module performing frequency down conversion on the RF signals to generate baseband signals according to a clock signal, and a processor processing the baseband signals. The processor further detects an ON/OFF status of the second wireless communications module to obtain a detection result and compensates for frequency drift of the clock signal according to the detection result.

Abstract: A frequency synthesizer and a frequency synthesis method thereof are provided. The frequency synthesizer includes a phase-locked loop unit, a voltage-controlled oscillating unit, and a frequency mixing unit. The phase-locked loop unit receives a reference signal and a feedback injection signal and generates a first oscillating signal according to the reference signal and the feedback injection signal. The voltage-controlled oscillating unit receives the feedback injection signal and generates a second oscillating signal according to the feedback injection signal. The frequency mixing unit is coupled to the phase-locked loop unit and the voltage-controlled oscillating unit, receives the first oscillating signal and the second oscillating signal, and mixes the first oscillating signal and the second oscillating signal to generate the feedback injection signal and an output signal.

Abstract: A wireless communications device may include a portable housing and a temperature-compensated clock circuit carried by the portable housing. The device may further include a wireless receiver carried by the portable housing for receiving timing signals, when available, from a wireless network, and a satellite positioning clock circuit carried by the portable housing. A clock correction circuit may be carried by the portable housing for correcting the temperature-compensated clock circuit based upon timing signals from the wireless network when available, and storing historical correction values for corresponding temperatures. The clock correction circuit may also correct the temperature-compensated clock circuit based upon the stored historical correction values when timing signals are unavailable from the wireless network, and correct the satellite positioning clock based upon the temperature-compensated clock circuit.

Abstract: Systems and methods for sharing an oscillator between receivers are disclosed. A representative method (among others) of responding to a change in frequency of a voltage-controlled temperature-compensated oscillator (VCTCXO), includes: determining a new value for VCTCXO frequency; determining a time at which the new value will be applied to the VCTCXO; transmitting the time and the new value to a subsystem that uses a second receiver which shares the VCTCXO with a first receiver; and in the subsystem, updating channel context data to use the time of the change in frequency and the new value.

Abstract: A method and apparatus for compensating an oscillator in a location-enabled wireless device is described. In an example, a mobile device includes a wireless receiver for receiving wireless signals and a GPS receiver for receiving GPS signals. The mobile device also includes an oscillator having an associated temperature model. A frequency error is derived from a wireless signal. The temperature model is adjusted in response to the frequency error and a temperature proximate the oscillator. Frequency error of the oscillator is compensated using the adjusted temperature model. In another example, a frequency error is derived using a second oscillator within the wireless receiver.

Abstract: The transmitter of the transceiver includes: a transmitter-side mixers of a transmitter-side modulator; a transmitter-side voltage-controlled oscillator; and a transmitter-side divider. The divider having a dividing factor of a non-integral number is supplied with an oscillating output of the oscillator. A pair of non-quadrature local signals having a phase difference of 90° plus a predetermined offset angle is produced by the divider and supplied to the mixers. The transmitter includes a phase-shift unit which converts a pair of quadrature transmit signals having a phase difference of about 90° on an analog basis into a pair of non-quadrature shifted transmit signals. Consequently, quadrature modulation is performed by the mixers. Use of a similar configuration enables the reduction in interference of an RF signal with local signals supplied to receiver-side mixers of the receiver.

Abstract: In an oscillating apparatus, a detection unit detects a frequency offset between an input signal and a reference signal. A code generation unit specifies a relationship among a code having a predetermined number of bits, the frequency offset, and a voltage to be applied to a voltage-controlled oscillator by a DAC, in accordance with a frequency offset detection state of the detection unit. The code generation unit also generates a frequency offset correction code having a predetermined number of bits in accordance with the specified relationship. The DAC applies the voltage to the voltage-controlled oscillator, in accordance with the relationship described above and the code generated by the code generation unit. The voltage controlled oscillator outputs an oscillator signal having an oscillation frequency corresponding to the voltage applied by the DAC.

Abstract: An apparatus and method for splitting a wide band input signal and overlaying multiple frequency bands on each path associated with one or more digitizers. All frequencies from the split signal on each path can be fed to a mixer. The local oscillator of each mixer receives a sum of signals, which can each be set to any arbitrary frequency, as long as an associated matrix determinant of coefficients is non-zero. Each oscillator signal is multiplied by a coefficient, which can represent phase and magnitude, prior to summing the oscillator signals together. Each mixer mixes a combined signal with the input, thereby generating a set of multiple overlaid frequency bands. The digitized signals are processed to substantially reconstruct the original input signal. Thus, the wide band input signal is digitized using multiple individual digitizers. In particular, a system can support two wide band signals using four digitizers of narrower bandwidth.

Abstract: In embodiments of the present disclosure, a method may include determining an ambient temperature of an oscillator. The method may also include estimating an approximate frequency of operation of the oscillator. The method may additional include determining a process-based compensation to be applied to a resonator of the oscillator based on the approximate frequency. The method may further include setting a capacitance of a variable capacitor coupled to the resonator in order to compensate for temperature-dependent and process-dependent frequency variation of the oscillator based on the ambient temperature and the process-based compensation.

Abstract: Disclosed herein is a phase-locked circuit including: a phase-locked section including a voltage controlled oscillator having a capacitance bank and changing oscillation frequency according to voltage information, the phase-locked section phase-locking an oscillating signal of the voltage controlled oscillator to a reference signal; and a calibration section having a voltage correcting function for supplying an appropriate calibration voltage to the voltage controlled oscillator in performing frequency calibration for the voltage controlled oscillator; the calibration section including a counter circuit, a first storage circuit and a second storage circuit, a comparator circuit, a control circuit, a voltage generating circuit, and a processing circuit.

Abstract: Methods and systems for a transmitter LOFT cancellation scheme that maintains IQ balance are disclosed. Aspects of one method may include providing current compensation to both differential inputs of a mixer for each of I and Q channels. An initial current compensation of X units may be provided, followed by subsequent compensation as needed. The initial compensation may be provided to each differential input of the mixers used for I and Q channels. The subsequent current compensation for the I channel may be independent of the subsequent current compensation for the Q channel. Subsequent current compensation to a first differential input for a mixer may be increased by Y units while decreasing current compensation to the second differential input of the mixer by Y units. In this manner, the DC common mode level for the mixer may remain the same at the initial DC compensation current of X units for both mixers.

Abstract: The invention provides a dual-mode voltage-controlled oscillator (DMVCO), a frequency synthesizer and a wireless receiving device, and pertains to the technical field of integrated circuit of radio frequency wireless receiver. The DMVCO and the frequency synthesizer can operate in a wideband mode and a quadrature mode. When operating in the quadrature mode, a quadrature signal is provided for a Single Sideband Mixer of the frequency synthesizer by a quadrature coupling of a first voltage-controlled oscillator unit and a second voltage-controlled oscillator unit in the DMVCO in the overlapped frequency band so that the frequency synthesizer can cover a higher output frequency band. Therefore, the tuning range of the DMVCO of the invention is wide, and the frequency synthesizer using the DMVCO is low in power consumption, simple in structure and has good frequency spur performance.

Abstract: A direct-conversion transmitter with resistance to local oscillator pulling effect comprises a local oscillation circuit, a quadrature modulator connected with the local oscillation circuit, a power amplifier connected with the quadrature modulator, a first variable analog delay device connected with the power amplifier, a variable analog attenuator connected with the first variable analog delay device, an inner self-injection loop, and a power combiner connected with the variable analog attenuator and the inner self-injection loop. The local oscillation circuit comprises a two point voltage-controlled oscillator and a phase locked loop connected with the two point voltage-controlled oscillator. The inner self-injection loop comprises a second variable analog delay device, a phase shifter connected with the second variable analog delay device and a variable gain amplifier connected with the phase shifter.

Abstract: An oscillator circuit having a source of an oscillating signal, a tank circuit including an inductor and a capacitor, and a discretely switchable capacitance module configured to control an amount of capacitance in the oscillator circuit. The discretely switchable capacitance module includes, in one embodiment, a capacitor coupled between a first node and a second node, a switch, having a control node, coupled between the second node and a third node; and a DC feed circuit, having a first end coupled to the second node and a second end configured to receive a first or second control signal. The control node of the switch is tied to a predetermined bias voltage. When the first control signal is applied, the capacitor is coupled between the first node and the third node via the switch such that the capacitor is coupled in parallel with the capacitor of the tank circuit, and when the second control signal is applied the capacitor is decoupled from the tank circuit.

Abstract: The transmitter of the transceiver includes: a transmitter-side mixers of a transmitter-side modulator; a transmitter-side voltage-controlled oscillator; and a transmitter-side divider. The divider having a dividing factor of a non-integral number is supplied with an oscillating output of the oscillator. A pair of non-quadrature local signals having a phase difference of 90° plus a predetermined offset angle is produced by the divider and supplied to the mixers. The transmitter includes a phase-shift unit which converts a pair of quadrature transmit signals having a phase difference of about 90° on an analog basis into a pair of non-quadrature shifted transmit signals. Consequently, quadrature modulation is performed by the mixers. Use of a similar configuration enables the reduction in interference of an RF signal with local signals supplied to receiver-side mixers of the receiver.

Abstract: A wireless communications device may include a portable housing and a temperature-compensated clock circuit carried by the portable housing. The device may further include a wireless receiver carried by the portable housing for receiving timing signals, when available, from a wireless network, and a satellite positioning clock circuit carried by the portable housing. A clock correction circuit may be carried by the portable housing for correcting the temperature-compensated clock circuit based upon timing signals from the wireless network when available, and storing historical correction values for corresponding temperatures. The clock correction circuit may also correct the temperature-compensated clock circuit based upon the stored historical correction values when timing signals are unavailable from the wireless network, and correct the satellite positioning clock based upon the temperature-compensated clock circuit.

Abstract: A receiving apparatus includes: a frequency conversion portion that has at least a mixer that down-converts a frequency of a reception radio-frequency signal by mixing the radio-frequency signal and an output from a voltage-controlled oscillator and outputs the down-converted radio-frequency signal; and a resistor element that has a resistance value to set a DC bias voltage of an input transistor in the mixer to which the radio-frequency signal is inputted to a center value of a dynamic range.

Abstract: The present invention relates to a quadrature divider which may be used in a phase locked loop or frequency synthesizer or with a single side band mixer. According to a preferred embodiment the divider takes a quadrature input and has a quadrature output. The divider has four analog mixers 1, 2, 3 and 4. The first two mixers 1, 2 take the in-phase quadrature input, while the second mixers 3, 4 take the quadrature-phase quadrature input. The outputs and feedback loops of the mixers are properly arranged such that the in-phase and quadrature-phase outputs of the divider have a determinisitic phase sequence relationship based on the phase sequence relationship of the corresponding quadrature inputs. Third order harmonics may be minimized or reduced by addition or subtraction of the mixer outputs. As the divider is able to take a quadrature input, there is no need for a dummy divider in the phase locked loop, thus saving space and power.

Abstract: In one implementation an output signal of an oscillator is varied to be within a desired frequency band with respect to a reference signal, the output signal having a plurality of phases. The implementation may include comparing the output signal with the reference signal, counting falling edges about each phase of the number of phases in a predetermined time period and summing to define a count output; comparing the count output with a product of the number of phases of the output signal and the factor to define a comparison, generating a control signal based upon the comparison, and inputting the control signal to the oscillator to alter the output signal thereof.

Abstract: A method and apparatus for providing a dual-loop phase lock loop (PLL) for a radio-frequency (RF) receiver is provided. The dual-loop PLL may include coarse tuning circuitry and fine tuning circuitry. The coarse turning circuitry and fine tuning circuitry may be arranged in parallel. Both of the coarse tuning circuitry and fine tuning circuitry provide respective tuning signals to a voltage-controlled oscillator (e.g., a varactor tuned VCO). The coarse tuning circuitry and the fine tuning circuitry may provide the respective tuning signals simultaneously. In addition, coarse and fine tuning circuitry may be formed monolithically with other elements of the dual-loop PLL so as to provide a highly-integratable having a wide frequency lock range and high sensitivity.

Abstract: According to an example embodiment, an apparatus is provided in a wireless transceiver. The apparatus may include a circuit configured to generate a first frequency signal (e.g., a VCO signal). A local oscillator (LO) generator may be provided that includes a frequency divider to divide the first frequency signal, and an image rejection mixer configured to mix the first frequency signal with an output of the frequency divider to generate an LO signal. In this manner, the LO generator may generate a desired LO signal while substantially rejecting or suppressing an unwanted sideband or image signal, according to an example embodiment.

Abstract: A near field detection device that detects a field near the body when appropriately connected to conductive plates. The near field is generated by an oscillatory voltage device which when in contact with the body permeates all that is in contact with the body. The detector electronics and conductive plates are packaged so that near contact with the body is accommodated. A footwear packaging scheme provides a convenient location to embed the detector invention, though other packaging arrangements and locations on the body are claimed. Auxiliary electronics may be included with the detector and conductive plates to provide additional synergistic functionality to the packaging scheme.

Abstract: A broadband integrated television receiver for receiving a standard antenna or cable input and outputting an analog composite video signal and composite audio signal is disclosed. The receiver employs an up-conversion mixer and a down-conversion mixer in series to produce an IF signal. An IF filter between the mixers performs coarse channel selection. The down-conversion mixer may be an image rejection mixer to provide additional filtering. The received RF television signals are converted to a standard 45.75 MHz IF signal for processing on-chip by additional circuitry.

Abstract: A method and apparatus for automatically correcting the frequency of a local oscillator of a receiver. A primary common pilot channel (CPICH) code sequence is generated by a CPICH code generator based on a reference cell identification signal and a frame start signal. The received despread CPICH code sequence is used to generate an estimated frequency error signal. A control voltage signal is generated by a control voltage generator based on the estimated frequency error signal. The CPICH code generator generates the CPICH code sequence based on signals received from a high speed downlink packet access (HSDPA) serving cell when HSDPA is active, or a timing reference cell when HSDPA is not active. The present invention achieves full maximum ratio combining gain when space time transmit diversity (STTD) is used, even without receiving a transmit diversity indication.

Abstract: A multi-mode PLL frequency synthesizer of a wireless multi-mode transceiver is provided which includes a reference frequency source providing an oscillator signal with a constant reference frequency, a first frequency synthesizer subunit for converting the signal into carrier signals with frequencies in the range of a first frequency band, a second frequency synthesizer subunit for transforming the oscillator signal into carrier signals having frequencies in the range of a second frequency band, and a third frequency synthesizer subunit for converting the oscillator signal into an auxiliary signal with a fixed frequency. The auxiliary signal is used together with the carrier signals of the second frequency band to generate carrier signals with frequencies in the range of a third and fourth frequency band.

Abstract: A method and apparatus for automatic frequency control in a receiver of a wireless device, the method determining a channel estimation for a received signal; calculating a signal to noise ratio for the channel estimation; applying a weighting factor determined based on the calculated signal to noise ratio for the channel estimation to the channel estimation to create a weighted channel estimation; and supplying the weighted channel estimation to a voltage controlled oscillator.

Abstract: The present invention is a method and apparatus that produces an estimate of the local oscillator (LO) frequency error using an external reference signal. The error estimate can be used for LO calibration, correction and other purposes. The present invention does not require the external reference signal to be a precision reference signal, nor does the present invention require that the reference signal be continuously supplied. Further, the present invention can be implemented exclusively in software, and therefore does not add to the size or weight of any device that it is resident in. Thus, the present invention can be added to microcontrollers and various specialized programmable digital ICs that were not initially designed for this task.

Abstract: A highly agile low phase noise frequency synthesizer is provided for rapid generation of frequency specific signals. The frequency synthesizer is capable of rapidly generating signals at different output frequencies while maintaining low cross-coupling. Two or more signal generators utilize a reference frequency to generate two or more signals. These signals are limit processed to reduce cross-coupling prior to being presented to a switch. Responsive to a control signal, the switch outputs one of the signals to a frequency modification device, such as a frequency divider or multiplier. Responsive to a control signal, the frequency modification device scales the frequency of the switch output to convert the frequency of the switch output signal to a desired output frequency. By maintaining sufficient frequency separation between the switch input signals cross-coupling and phase noise is minimized and implementation on an integrated circuit may be achieved.

Abstract: Methods and systems for a transmitter LOFT cancellation scheme that maintains IQ balance are disclosed. Aspects of one method may include providing current compensation to both differential inputs of a mixer for each of I and Q channels. An initial current compensation of X units may be provided, followed by subsequent compensation as needed. The initial compensation may be provided to each differential input of the mixers used for I and Q channels. The subsequent current compensation for the I channel may be independent of the subsequent current compensation for the Q channel. Subsequent current compensation to a first differential input for a mixer may be increased by Y units while decreasing current compensation to the second differential input of the mixer by Y units. In this manner, the DC common mode level for the mixer may remain the same at the initial DC compensation current of X units for both mixers.

Abstract: The phase locked loop (PLL) with adjustable phase shift is described. The PLL includes a voltage controlled oscillator which is capable of generating multiple phase shifted output signals, and multiple phase detectors capable of determining the phase differences between the output signals and a reference clock. The PLL further includes a weighting device capable of weighting the phase differences and generating a control signal for the voltage controlled oscillator.

Abstract: An apparatus, method, and system for voltage controlled oscillator band switching are described. A band switching apparatus may include a reference generation and comparison module, a clock pulse generation module, and a counter and gating module. The reference generation and comparison module may generate a positive signal based on a comparison of a loop filter voltage associated with a voltage controlled oscillator to a maximum tuning voltage and a minimum tuning voltage. The clock pulse generation module may generate a clock pulse in response to the positive signal. The counter and gating module may disable band switching of the voltage controlled oscillator when a lock condition is detected and the loop filter voltage is between the maximum tuning voltage and the minimum tuning voltage. Other embodiments are described and claimed.

Abstract: An FM modulator measuring an f-V characteristic of a voltage controlled oscillator in a reduced time period. In the FM modular a characteristic measurement time control section 110 notifies a correction section 108 of a time at which a measurement of the f-V characteristic of a voltage controlled oscillator 103 is to start and a time at which the measurement of the f-V characteristic of the voltage controlled oscillator 103 is to and while a carrier wave frequency is being changed to a predetermined frequency. Thus, the correction section 108 measures the f-V characteristic of the voltage controlled oscillator 103 in a reduced time period.

Abstract: A radio frequency circuit is generated as an integrated circuit that is arranged to provide transmission, receipt, and storage of data. The data is transmitted and received across a radio frequency band. An antenna is included within the integrated circuit, wherein the antenna is manufactured at the time the integrated circuit is manufactured. A power source is mounted adjacent to the integrated circuit. The integrated circuit and the power source are encapsulated within the same integrated circuit package.

Abstract: A bandpass filtering method in which two frequency transpositions are performed in parallel on an input signal (SE) for filtering using respective first and second upstream mixing signals (SM1, SM2). A common oscillator (LO) is used which is coupled with a first phase shifter (MTM) to produce upstream mixing signals and which is coupled with a second phase shifter (MTV) to produce downstream mixing signals. Phase shifters are used in opposite manner on first and second signals so that each of said first and second signals (VT1, VT2) receives the phase-advanced output signal from one of the two phase shifters and the phase-delayed output signal from the other of the two phase shifters.

Abstract: A broadband integrated receiver for receiving input signals and outputting composite video and audio signals is disclosed. The receiver employs an up-conversion mixer and a down-conversion mixer in series to produce an intermediate signal. An intermediate filter between the mixers performs coarse channel selection. The down-conversion mixer may be an image rejection mixer to provide additional filtering.

Abstract: An LC-VCO includes a multivibrator which outputs a frequency signal, a fine tuning circuit which tunes the frequency signal by a first amount, a coarse tuning circuit which tunes the frequency signal by a second amount, and a control circuit which controls the fine and coarse tuning circuits. The coarse tuning circuit is formed from one or more capacitive arrays and the fine tuning circuit is formed from one or more varactors. The capacitive arrays are preferably controlled by a digital signal, where each bit selectively couples a respective capacitor to the multivibrator. An analog signal controls the value of the varactors. The capacitive arrays and varactors charge and discharge an inducator in the multivibrator to tune the frequency signal. The VCO may be incorporated within a phase-locked loop, where the capacitors may be assigned different weight and/or redundancy values to tune an output frequency signal.

Abstract: A PLL circuit has (i) a counter which divides a frequency of a VCO output whose frequency has been divided by a frequency divider and (ii) a memory which stores plural patterns of set cycles of the counter. The memory reads out one of the set cycles designated by a selection signal inputted through a serial bus (SB) from an outside of the PLL circuit. The set cycle, read out from the memory, which has a large amount of data, is inputted through a parallel bus (PB) into the counter, so that it hardly takes time to set a cycle for the counter. Further, even when the number of bits of the counter increases, the setting time is not lengthened.

Abstract: The phase locked loop (PLL) with adjustable phase shift is described. The PLL includes a voltage controlled oscillator which is capable of generating multiple phase shifted output signals, and multiple phase detectors capable of determining the phase differences between the output signals and a reference clock. The PLL further includes a weighting device capable of weighting the phase differences and generating a control signal for the voltage controlled oscillator.

Abstract: There is provided a frequency transceiver for automatically controlling a TX/RX IF signal in a radar or a communication system, which transmits/receives an RF signal.

Abstract: A spectrum analyzer corrects for internal frequency errors in a reference oscillator using a timing control signal. The reference oscillator provides a reference signal at a reference frequency. An error detection circuit determines an error in the reference frequency using the timing control signal and produces an error correction signal for use by a frequency conversion device in adjusting an output frequency thereof to compensate for the frequency error in the reference frequency.

Abstract: A method for WLAN signal strength determination comprises receiving a WLAN RF signal; converting the WLAN RF signal to a voltage proportional to the signal; comparing the voltage to a first reference voltage; and outputting data corresponding to WLAN RF signal strength if the voltage is greater than the first reference voltage.