Abstract: Systems and methods are disclosed for correcting Local Oscillator (LO) phase misalignment between different Radio Frequency Integrated Circuits (RFIC) of an Advanced Antenna System (AAS).

Abstract: A digital PLL circuitry, according to the present embodiment, includes: a phase difference arithmetic circuitry configured to arithmetically operate and output a phase difference between an input clock signal and an output clock signal; a first control code generation circuitry configured to generate a first control code for controlling an oscillation frequency based on the phase difference and a frequency control input being a control target frequency relating to the output clock signal, and output the first control code; a second control code generation circuitry configured to generate and output a second control code for controlling the oscillation frequency according to a sequence; a selection circuitry configured to select and output one of the first control code and the second control code as a selection control code; and a digitally controlled oscillator configured to output the output clock signal of the oscillation frequency according to the selection control code.

Abstract: A calibration loop method and technical solution capable of finding or searching for an optimum setting, which can be applied to mitigate or minimize clock harmonic interference, for each of different channel frequencies used by a wireless communication device such as Bluetooth device. The optimum setting for example may comprise an optimum setting of a supply voltage level provided from a voltage regulator to a frequency generating circuit such as phase-locked loop (PLL), an optimum setting of a capacitance of an adjustable capacitor circuit such as controllable switching capacitor coupled between the input of a phase frequency detector (PFD) of the PLL and the ground, or an optimum setting of a combination of the supply voltage level with capacitance of the controllable switching capacitor.

Abstract: A wireless receiving circuit and a wireless control device. The wireless receiving circuit includes a signal receiving module, a Bluetooth signal processing module, a voltage stabilization module, and an output control module. An output end of the signal receiving module is connected with an input end of the Bluetooth signal processing module, and a voltage end of the Bluetooth signal processing module is connected with an output end of the voltage stabilization module. An output end of the Bluetooth signal processing module is connected with an input end of the output control module. The signal receiving module is to receive an external Bluetooth signal and is to transmit the signal to the Bluetooth signal processing module. The Bluetooth signal processing module is to process the external Bluetooth signal and is to transmit a control signal to the output control module.

Abstract: A peak detector including an input circuit with five same-sized transistors, in which four of the input transistors are coupled in parallel between a control node and a bias node and receive a corresponding one of two in-phase signals and two quadrature signals. The fifth transistor is coupled between a current node and the bias node and has its control terminal coupled to an output node. A bias circuit establishes a predetermined bias current that flows through the five input transistors. A current mirror mirrors the current through the fifth transistor from the current terminal into the four parallel-coupled input transistors via the control node. An output circuit charges a peak capacitor based on voltage developed at the control terminal of the fifth transistor. The peak detector is low power and compact and detects the actual peak of the input signal with greater accuracy compared to a conventional peak detector.

Abstract: The embodiments of the present disclosure provide a power sharing method and a base station, wherein the method comprises the following steps of: according to a power demand of the communication systems of at least one mode among communication systems of different modes sharing a same power amplifier, determining whether to perform power sharing among communication systems of different modes (101); if it is determined to perform power sharing among communication systems of different modes, adjusting an available power of communication systems of one or more modes therein (102). According to the embodiments of the present disclosure, when it is determined to perform the power sharing according to the power demands, power sharing is performed among communication systems of different modes, thereby realizing dynamic and flexible power sharing among communication systems of at least two modes.

Abstract: A sliding intermediate frequency (IF) receiver and a sliding IF reception method are provided. A first local oscillation signal and a second local oscillation signal may be generated, based on a division ratio of a frequency of the first local oscillation signal to a frequency of the second local oscillation signal that is determined in advance so that an amount of power to be consumed or an error rate of the sliding IF receiver is optimized. A received input signal may be converted to a first IF signal, based on the first local oscillation signal, and the first IF signal may be converted to a second IF signal, based on the second local oscillation signal.

Abstract: A Multi-tuner reception system includes at least a first tuner and a second tuner. The first tuner is adapted to translate a frequency of a first received signal into a first translated frequency. The first tuner includes a first local oscillator operating at a first local oscillator frequency. The second tuner is adapted to translate a frequency of a second received signal into a second translated frequency. The second tuner includes a second local oscillator operating at a second local oscillator frequency. The second local oscillator frequency is equal to a sum of the first local oscillator frequency and a continually time variable offset frequency.

Abstract: A radio communications device includes a location finder for determining the device's location based on satellite signals, a crystal oscillator whose output frequency acts as a controlling reference for the location finder and a processor for intermittently correcting the crystal oscillator such that the output frequency experiences jumps. The location finder is arranged to take account of the jumps in the determination of the device's location.

Abstract: The invention relates to an IF receiver that is able to solve the image band problem and, in particular, to reject any interfering signals so as to ensure correct demodulation of a received useful signal without having to interrupt the reception service. The receiver comprises a monitoring branch configured to monitor interference experienced at a plurality of intermediate frequencies usable in reception and select the intermediate reception frequency from the intermediate frequencies usable in reception on the basis of the interference monitoring carried out. Moreover, the monitoring unit is configured to carry out real-time monitoring of interference experienced at the currently used intermediate reception frequency and also at the other intermediate frequencies usable in reception and change, in real time, the used intermediate reception frequency on the basis of the real-time interference monitoring.

Abstract: A disclosed method tunes a signal from a channelized spectrum having a predetermined channel spacing. A signal of interest having a predetermined maximum bandwidth is mixed with a local oscillator signal, which has a frequency that is an integer multiple of the channel spacing or one-half of a channel spacing displaced from an integer multiple of the channel spacing. The local oscillator signal is selected to frequency translate the signal of interest to within a near-baseband passband whose lower edge is spaced from DC by at least about the maximum bandwidth of the signal of interest. Problems associated with 1/f noise, DC offsets, and self-mixing products are avoided or substantially diminished. Other methods and systems are also disclosed.

Abstract: A method of determining at a receiver whether a received signal comprises a pure tone signal component. The method comprises: measuring a received signal over a measurement period; calculating, using maximum likelihood hypothesis testing, a likelihood ratio value for the measured signal and, determining, based on said likelihood ratio value, whether the measured signal comprises a pure tone signal component. The likelihood ratio value is a value indicative of the ratio of a likelihood LFSC that the measured signal comprises a pure tone signal component, and a likelihood LnoFSC that the measured signal does not comprise the pure tone signal component.

Abstract: An integrated circuit (10) has an internal RC-oscillator (20) for providing an internal clock signal (CLI) having an adjustable oscillator frequency. The integrated circuit (10) further comprises terminals (101, 102) for connecting an external LC tank (30) having a resonance frequency and a calibration circuit (40) which is configured to adjust the oscillator frequency based on the resonance frequency of the LC tank (30) connected during operation of the integrated circuit (10). An internal auxiliary oscillator (46) is connected to the terminals (101, 102) in a switchable fashion and is configured to generate an auxiliary clock signal (CLA) based on the resonance frequency. The calibration circuit (40) comprises a frequency comparator (47) which is configured to determine a trimming word (TRW) based on a frequency comparison of the internal clock signal (CLI) and the auxiliary clock signal (CLA). The LC tank (30) to be connected is an antenna for receiving a radio signal.

Abstract: Some embodiments of the present disclosure relate to multiband receivers that include at least one divider unit having a divisor that is other-than-two. For example, in some embodiments the divisor is an odd integer (e.g., three). Such divisors allow oscillators for respective receiver subunits in a multi-band receiver to have frequencies that are sufficiently different from one another so as to limit cross-talk interference there between, even when the receiver subunits are concurrently receiving data on adjacent channels. To facilitate this other-than-two divisor, a phase error compensation block is often used to compensate for the effects of using the other-than-two divisor.

Abstract: Disclosed is a method of adjusting the receive frequency of a radio frequency (RF) receiver die (4), the RF receiver die (4) comprising a mixer (8) with an associated local oscillator (10) and a first low-noise amplifier (6) arranged to operate over a first frequency range, the method comprising affixing a second low-noise amplifier (40) arranged to operate over a second frequency range to the RF receiver die (4).

Abstract: The present invention relates to a method for characterizing at a given frequency reflected waves of a frequency translating device having at least two ports, whereby information is available on the phase of a local oscillator driving the frequency translating device.

Abstract: A method includes receiving a request to tune to a first desired television channel of a cable spectrum provided in a radio frequency (RF) signal received in a multi-tuner circuit configured to receive and process the entire cable spectrum, determining a channel of the channels including the first desired television channel, disabling the channels other than the determined channel, and processing the RF signal in the determined channel.

Abstract: Compressing a variable phase component of a received modulated signal with a second harmonic injection locking oscillator, and generating a delayed phase-compressed signal with a fundamental injection locking oscillator, and combining the phase-compressed signal and the delayed phase-compressed signal to obtain an estimated derivative of the variable phase component, and further processing the estimated derivative to recover data contained within the received modulated signal.

Abstract: In one embodiment the present invention includes a method of generating an oscillating signal at different frequencies. The method comprises configuring a digitally controlled oscillator (DCO). The DCO is configured to generate the oscillating signal at a first frequency, and the DCO is configured to generate the oscillating signal at a second frequency. Additionally, the DCO is configured to transition from the first frequency to the second frequency during a transition time period. During the transition time period, the DCO activates the second frequency and deactivates the first frequency during a plurality of time intervals. The time intervals for activating the second frequency and deactivating the first frequency successively increase from the beginning of the transition time period to the end of the transition time period.

Abstract: The invention relates to a radio-frequency circuit comprising: —a control unit; and —a phase-locked loop; wherein the control unit is arranged to determine an offset between an actual value of a reference frequency at the input to the loop on the basis of a measurement of the signal output from the filter of the loop, and a theoretical value of said frequency known to the control unit, via a relation known to the control unit, and to control a correction of said offset.

Abstract: Described herein is a wireless transceiver and related method that enables ultra low power transmission and reception of wireless communications. In an example embodiment of the wireless transceiver, the wireless transceiver receives a first-reference signal having a first-reference frequency. The wireless transceiver then uses the first-reference signal to injection lock a local oscillator, which provides a set of oscillation signals each having an oscillation frequency that is equal to the first-reference frequency, and each having equally spaced phases. Then the wireless transceiver combines the set of oscillation signals into an output signal having an output frequency that is one of (i) a multiple of the first-reference frequency (in accordance with a transmitter implementation) or (ii) a difference of (a) a second-reference frequency of a second-reference signal and (b) a multiple of the first-reference frequency (in accordance with a receiver implementation).

Abstract: Embodiments of the present disclosure provide power-efficient time division duplexing (TDD) mode configurations of frequency division duplexing (FDD) transceivers. Embodiments avoid time slotted operation of the receive and transmit synthesizers, thereby avoiding undesired operation under transient conditions, frequent calibration, and reduced power supply efficiency. In embodiments, a single synthesizer is used to enable TDD operation, thereby reducing power consumption and calibration requirements by approximately 50%. The single synthesizer may be maintained ON at all times, thus allowing the power supply's switching regulator to operate with substantially constant load conditions.

Abstract: A method and apparatus for non-linear frequency control tracking of a control loop of a voltage controlled oscillator (VCO) in a wireless mobile device receiver is provided. A channel metric based on one or more channel quality indicators associated with a received radio frequency channel is determined and a state metric associated with the current operating state of the control loop are determined. One or more state metric threshold value associated with the determined channel metric, providing hysteresis between operating states, are determined wherein each state metric threshold value is associated with a transition to a possible operating state of the control loop. The control loop transitions from the current operating state to the operating state associated with an exceeded state metric threshold value. Coefficients are provided to an adaptive loop filter of the control loop, wherein the coefficients are associated with the transitioned operating state.

Abstract: A variable capacitance circuit includes: a prescribed node, to which an alternate current signal with a reference potential as a center voltage is applied; a first capacitor connected to the prescribed node; a second capacitor connected between the first capacitor and the reference potential; a third capacitor and a transistor for controlling capacitance, provide between a first node between the second capacitor and the first capacitor, and the reference potential; and a bias circuit which applies a first bias voltage to a second node between the third capacitor and the transistor.

Abstract: A system and a method in which a first frequency correction is determined for a frequency of a local oscillator with respect to a frequency of a first time slot of a received signal. The first frequency correction is applied to adjust the frequency of the local oscillator. A second frequency correction is determined for the frequency of the local oscillator with respect to a frequency of a second time slot of the received signal. The second frequency correction is applied to adjust the frequency of the local oscillator. A third frequency correction is determined for the frequency of the local oscillator with respect to a frequency of a third time slot and a fourth time slot of the received signal, and the third frequency correction is applied to adjust the frequency of the local oscillator.

Abstract: A reception device and corresponding method for maintaining a high dynamic range of an AD converter circuit and preventing excessive input to the AD converter circuit is disclosed. For example, a reception device includes a variable gain amplifier circuit that amplifies an input analog signal with a gain controlled by a predetermined control signal, an analog-to-digital converter circuit an overload detector circuit with the same frequency characteristic as the analog-to-digital converter circuit. The overload detector circuit outputs a signal according to a comparison between a level of a signal input to the analog-to-digital converter circuit and a predetermined threshold. The signal that lowers the gain of the variable gain amplifier circuit more greatly is selected out of the signal from the overload detector circuit and another signal, and the gain of the variable gain amplifier circuit is controlled on the basis of the selected signal.

Abstract: This invention compensates for the unintentional magnetic coupling between a first and second inductor of two different closely spaced inductors separated by a conversion circuit. A cancellation circuit formed from transistors senses the magnetic coupling in the first inductor and feeds a current opposite to the induced magnetic coupling captured by the second inductor such that the coupled magnetic coupling can be compensated and allows the first and second inductors to behave independently with regards to the coupled magnetic coupling between the first and second inductors. This allows the distance between the first and second inductors to be minimized which saves silicon area. In addition, the performance is improved since the overall capacitance in both circuits can be decreased. This cancellation technique to reduce the magnetic coupling between two closed placed inductively loaded circuits allows the design of a more compact and faster performing circuit.

Abstract: An apparatus for handling a received signal comprises a reception device, a mixer unit and a compensating unit. The reception unit can receive a received signal. The received signal has at least one signal component at a first frequency. Furthermore, the mixer unit can combine the received signal and a compensating signal using at least one active element in order to obtain a compensated received signal. In addition, the mixer unit can produce a mixer output signal on the basis of the compensated received signal and a local oscillator signal. In this case, the mixer output signal has a signal component, corresponding to the at least one signal component of the received signal, at a second frequency. The first frequency is higher than the second frequency.

Abstract: Methods and circuits can down convert at least a first RF signal on a first path in a first frequency band to provide a first IF signal. A second RF signal on second path in a second frequency band can be down converted to provide a second IF signal. The first IF signal and the second IF signal are interspersed in the frequency domain, and the first frequency band is different from the second frequency band. A combiner can combine at least part of the first IF signal and the second IF signal to provide a combined signal on an output signal path for reception by a digital processing circuit. The first IF signal or second IF signal can be a Zero IF (ZIF), very low IF (VLIF), or Low IF (LIF) signal.

Abstract: A radio frequency (RF) receiver with frequency planning includes an analog receiver, a digital processor, and a clock synthesizer. The analog receiver has an input for receiving an RF input signal, and an output for providing a digital intermediate frequency (IF) signal. The digital processor has a first input for receiving the digital IF signal, a second input for receiving a clock signal, a signal output for providing an IF output signal, and a control output for providing a clock control signal. The clock synthesizer has an input for receiving the clock control signal, and an output for providing the clock signal, and is controllable to adjust a frequency of the clock signal to a selected one of a predetermined number of frequencies within a predetermined frequency range in response to the clock control signal.

Abstract: A method may include measuring a frequency difference between an actual frequency and an expected frequency associated with a frequency control calibration signal value for each of a plurality of frequency control calibration signal values during a calibration phase. The method may additionally include generating integral non-linearity compensation values based on the frequency differences measured The method may further include generating the applied frequency control signal based on a frequency control calibration signal value received by the digital-to-analog converter during the calibration phase. The method may also include generating a compensated frequency control signal value based on a frequency control signal value received by the integral non-linearity compensation module and an integral non-linearity compensation value associated with the frequency control signal value during an operation phase of the wireless communication element.

Abstract: Described herein is a wireless transceiver and related method that enables ultra low power transmission and reception of wireless communications. In an example embodiment of the wireless transceiver, the wireless transceiver receives a first-reference signal having a first-reference frequency. The wireless transceiver then uses the first-reference signal to injection lock a local oscillator, which provides a set of oscillation signals each having an oscillation frequency that is equal to the first-reference frequency, and each having equally spaced phases. Then the wireless transceiver combines the set of oscillation signals into an output signal having an output frequency that is one of (i) a multiple of the first-reference frequency (in accordance with a transmitter implementation) or (ii) a difference of (a) a second-reference frequency of a second-reference signal and (b) a multiple of the first-reference frequency (in accordance with a receiver implementation).

Abstract: Compressing a variable phase component of a received modulated signal with a second harmonic injection locking oscillator, and generating a delayed phase-compressed signal with a fundamental injection locking oscillator, and combining the phase-compressed signal and the delayed phase-compressed signal to obtain an estimated derivative of the variable phase component, and further processing the estimated derivative to recover data contained within the received modulated signal.

Abstract: A frequency synthesizer includes a controlled oscillator configured to extend a temperature range and phase noise of the synthesizer without compromising the frequency coverage of the synthesizer. The frequency synthesizer also includes bias generation circuitry that sets a bias current of a charge pump to reduce bandwidth variations of the synthesizer. The frequency synthesizer further includes switching circuitry to dynamically turn a charge pump on and off to reduce effects of current leakage in the charge pump.

Abstract: A communication apparatus having a first and second wireless communications modules is provided. The first wireless communications module includes a receiving unit receiving RF signals from an air interface, a signal processing module performing frequency down conversion on the RF signals to generate baseband signals according to a clock signal, and a processor processing the baseband signals. The processor further detects an ON/OFF status of the second wireless communications module to obtain a detection result and compensates for frequency drift of the clock signal according to the detection result.

Abstract: Embodiments for processing signals are disclosed. In one embodiment, a method includes receiving signals from at least two non-contiguous channels, where the at least two non-contiguous channels are within a predetermined bandwidth, and where each of the at least two non-contiguous channels has a center frequency. The method also includes utilizing an average of the center frequencies of the at least two non-contiguous channels to down convert the at least two non-contiguous channels to a combined intermediate frequency (IF) channel that has a center frequency that is an average of a difference between the center frequencies of the at least two non-contiguous channels. The method also includes down converting the combined IF channel to a combined channel at a baseband frequency. The method also includes recovering the at least two non-contiguous channels from the combined channel at a baseband frequency utilizing an upper sideband and lower sideband recovery mechanism.

Abstract: A frequency offset of a received signal comprising a number of subsequently received data symbols is estimated. A first estimate is determined from a calculated change in phase of the received signal between two received symbols having a first time distance between them. At least one further estimate is determined from a calculated change in phase of the received signal between two received symbols having a different time distance. A frequency periodicity is determined for each estimate from the distance between the two received symbols from which the estimate was determined. A set of integer values is determined for each estimate so that frequency values calculated for each estimate as the frequency periodicity multiplied by the integer value added to the estimate are at least approximately equal to each other, and a corrected estimate of the frequency offset is determined from the integer values.

Abstract: Systems and methods that employ receiver circuitry to provide frequency display signals to a digital display without the presence or use of any external timing reference. One or more properties of a controllable local oscillator of a receiver circuit may be heavily or extensively characterized by measuring the local oscillator frequency under a variety of temperature and process conditions, and minimum to maximum frequencies. Measured local oscillator characterization information may be stored in memory, and may be accessed and used during normal operation to control the controllable local oscillator to produce a desired oscillator frequency for tuning the receiver circuitry to a desired radio frequency and for producing digital frequency display signals that are representative of the tuned radio frequency.

Abstract: In accordance with an example embodiment of the present invention, an apparatus comprises a first multiplier configured to convert a first frequency signal into a second frequency signal based at least in part on a first complex-valued local oscillator signal, a pair of low-pass filters configured to filter the second frequency signal, and a second multiplier configured to convert the filtered second frequency signal into a third frequency signal based at least in part on a second complex-valued local oscillator signal wherein the first frequency signal and the third frequency signal share the same frequency position and the pair of low-pass filters is configured based on an indication of allocated transmitted channels.

Abstract: A system includes a first clock module, a global positioning system (GPS) module, a phase-locked loop (PLL) module, a cellular transceiver, and a baseband module. The first clock module generates a first clock reference. The GPS module operates in response to the first clock reference. The WLAN module operates in response to the first clock reference. The PLL module generates a second clock reference by performing automatic frequency correction (AFC) on the first clock reference in response to an AFC signal. The cellular transceiver receives radio frequency signals from a wireless medium and generates baseband signals in response to the received radio frequency signals. The baseband module receives the baseband signals, operates in response to a selected one of the first clock reference and the second clock reference, and generates the AFC signal in response to the baseband signals.

Abstract: A portable wideband harmonic signal generator includes circuitry for generating a signal having a selected fundamental frequency, for producing a signal having a harmonic series of the selected fundamental frequency, for transferring the signal having the harmonic series using a balanced impedance output, and for directionally transmitting transferred signal having the harmonic series using a directional antenna having a characteristic impedance that is matched to the balanced impedance output. There is thus provided a compact, efficient transmitter and antenna assembly for transmitting a wideband signal.

Abstract: An electronic device capable of performing automatic frequency control (AFC) to maintain frequency and timing without good received bursts, in which an oscillation unit and a baseband processing unit are provided. Wherein, the baseband processing unit computes a compensation adjustment according to a prediction model and stored information regarding a previous digital value adjustment when detecting that the baseband processing unit is incapable of controlling the oscillation unit according to received bursts from the remote communication unit, and adjusts the oscillation unit according to the determined compensation adjustment.

Abstract: Digital spur reduction in which spurs are kept outside selected channels of interest, with illustrative embodiments relating to an integrated radiofrequency transceiver circuit having digital and analogue components, the circuit having a radiofrequency signal receiver with a local oscillator signal generator configured to provide a local oscillator signal at a frequency fLO and a mixer configured to combine an input radiofrequency signal with the local oscillator signal to produce an intermediate frequency signal; and a clock signal generator configured to generate a digital clock signal at a frequency fDIG for operation of the digital components, where the local oscillator signal and/or a reference signal from which the local oscillator signal is derived are generated such that digital spurs lie outside a band selected by the receiver.

Abstract: A digital delta sigma modulator includes an input integration stage, a resonating stage, a quantizer, and a plurality of feedback paths operably coupled to the quantizer, the input integration stage, and the resonating stage. The input integration stage is operably coupled to integrate a digital input signal to produce an integrated digital signal, wherein the input integration stage has a pole at substantially zero Hertz. The resonating stage is operably coupled to resonate the integrated digital signal to produce a resonating digital signal, wherein the resonating stage has poles at a frequency above zero Hertz. The quantizer stage is operably coupled to produce a quantized signal from the resonating digital signal.

Abstract: A circuit includes, in part, a receiver, a received signal strength indicator (RSSI), and an oscillator. The receiver receives an incoming signal and an oscillating signal. The RSSI is responsive to the receiver and generates an output signal representative of the strength of the incoming signal. The oscillator receives different biasing conditions in response to different outputs of the RSSI. The oscillator generates the oscillating signal received by the receiver. The oscillator receives a first biasing condition when the incoming signal is detected as having a strength lower than or equal to a predetermined threshold value and a second biasing condition when the incoming signal is detected as having a strength higher than the predetermined threshold value. The first biasing condition may be defined by a first current, and the second biasing condition may be defined by a sum of the first current and a second current.

Abstract: A frequency synthesizer includes a phase-locked loop circuit having an output. A frequency divider is connected to the output of the phase-locked loop circuit for receiving the signal therefrom and dividing the frequency of the signal. A tunable bandpass filter is connected to the frequency divider and is tuned for selecting a harmonic frequency to obtain a fractional frequency division for a signal output from the phase-locked loop circuit.

Abstract: Aspects of a method and system for reducing the complexity of multi-frequency hypothesis testing using an iterative approach may include estimating a frequency offset of a received signal via a plurality of iterative frequency offset hypotheses tests. The iterative frequency offset hypotheses may be adjusted for each iteration. A correlation may be done between a primary synchronization signal (PSS), and one or more frequency offset versions of a received signal to control the adjustment of the iterative frequency offset hypotheses. A frequency of the received local oscillator signal may be adjusted based on the estimated frequency offset. One or more frequency offset version of the received signal may be generated via one or more multiplication, and the multiplication may be achieved via a multiplication signal corresponding to one or more frequency offsets. The frequency offset of the received signal may be estimated via the correlation.

Abstract: A clock generator for a mobile device, capable of operating in one of a full-power mode and a low-power mode according to a standby signal to generate a high-frequency clock signal and a low-frequency clock signal is disclosed. The clock generator includes a crystal oscillator, for generating an oscillation signal of a specific frequency according to the power mode of the clock generator; a frequency division block, for dividing the oscillation signal by a specific divisor according to the power mode of the clock generator to generate the low-frequency clock signal; and a buffer block, for amplifying the oscillation signal to generate the high-frequency clock signal; wherein during each power mode, a frequency of the low-frequency clock signal is substantially the same.

Abstract: A wireless communication unit has two or more communication modes including one or more mobile phone mode, in which mobile phone mode the wireless communication unit is able to transmit or receive wireless signals via an antenna from and/or to a mobile phone network in accordance with a communication protocol. The unit includes a baseband module and a radiofrequency module. A radiofrequency interface of the baseband module is connected to the radiofrequency module, for receiving and/or transmitting baseband signals from and/or to the radiofrequency module. The radiofrequency module includes a baseband interface, for receiving and/or transmitting the baseband signals to the baseband module and an antenna interface (AI) connectable to an antenna for receiving and/or transmitting radiofrequency signals from and/or to the antenna. A clock system is connected to the radiofrequency interface and the baseband interface.

Abstract: A receiving apparatus includes: a local oscillator to output first- and second-local-oscillator signals whose phases are orthogonal to each other; a mixer to output first- and second-intermediate-frequency signals; a first filter to allow a component from a desired signal to pass therethrough, and eliminate a component from an image signal having a frequency symmetrical with that of the desired signal, in the first- and second-intermediate-frequency signals; a second filter to allow a component from the image signal to pass therethrough, and eliminate a component from the desired signal, in the first- and second-intermediate-frequency signals; a comparator to compare levels between output signals of the first and second filters; and a control unit to switch a frequency of the first- and second-local-oscillator signals to a difference frequency between a frequency of the desired signal and the intermediate frequency or a sum frequency thereof, according to a comparison result of the comparator.