Abstract: In described examples, a method of operating a transceiver with a transmitter and a receiver includes generating a frequency reference. In the transmitter: A phase locked loop (PLL) generates a first voltage controlled oscillator (VCO) control voltage responsive to the frequency reference. A VCO in the transmitter generates a transmitter VCO signal responsive to the first VCO control voltage, and the PLL is locked to the transmitter VCO signal. In the receiver: A signal is received. A receiver VCO generates a receiver VCO signal responsive to the first or a second VCO control voltage. The receiver VCO signal is multiplied by the received signal to generate an I component, and by the received signal phase shifted by 90° to generate a Q component. The second VCO control signal is generated responsive to the I component and the Q component.

Abstract: An object detection apparatus 1000 includes a plurality of transmitting units 1101 configured to emit a transmission signal, a receiving unit 1102 configured to mix the reception signal with a transmission signal to generate an IF signal, a spectrum calculation unit 1103 configured to calculate a spectrum that indicates a distribution of positions of the object, a section determination unit 1104 configured to determine sections for which a reflectance of the object is to be calculated, a reflectance distribution calculation unit 1105 configured to calculate, for each pair of a transmitting unit and the receiving unit, a reflectance of the object for each section, and calculate a product of the reflectance distributions over the sections, the reflectance distributions being calculated for the respective pairs, and an image generation unit 1106 configured to generate an image using a product of the reflectance distributions calculated for the respective pairs.

Abstract: In wireless communication networks using carrier aggregation, a user equipment (UE) may monitor a downlink radio link quality of secondary cells for an event indicating failure of the communication link with the secondary cell. When a failure event is detected, the UE declares a failure state on the secondary cell. In response to the failure state, the UE may adjust operations related to the secondary component carrier in order to save power and resources.

Abstract: An apparatus, method and package for electronic tamper detection. In one example, an apparatus, device or package for electronic tamper detection includes: a first inductor positioned at a first distance from a first conductive surface; a first oscillator generating a first frequency in dependence upon the first inductor; and a comparator setting a tamper detected status if the generated first frequency is not within an error tolerance to a pre-stored first frequency. One example of a method for fabricating an electronic tamper detection apparatus, device, or package is also provided.

Abstract: An integrated circuit (10) has an internal RC-oscillator (20) for providing an internal clock signal (CLI) having an adjustable oscillator frequency. The integrated circuit (10) further comprises terminals (101, 102) for connecting an external LC tank (30) having a resonance frequency and a calibration circuit (40) which is configured to adjust the oscillator frequency based on the resonance frequency of the LC tank (30) connected during operation of the integrated circuit (10). An internal auxiliary oscillator (46) is connected to the terminals (101, 102) in a switchable fashion and is configured to generate an auxiliary clock signal (CLA) based on the resonance frequency. The calibration circuit (40) comprises a frequency comparator (47) which is configured to determine a trimming word (TRW) based on a frequency comparison of the internal clock signal (CLI) and the auxiliary clock signal (CLA). The LC tank (30) to be connected is an antenna for receiving a radio signal.

Abstract: A method includes transmitting, by a first node, a first carrier signal and receiving, from a second node, which receives the first carrier signal, a second carrier signal. The first node measures first and second values of a first phase, the first value assigned to a first frequency of the second carrier signal and the second value assigned to a second frequency of the second carrier signal. The first and second frequencies have a frequency difference. A third value of a second phase is assigned to a third frequency of the first carrier signal, and a fourth value of the second phase is assigned to a fourth frequency of the first carrier signal. The third and fourth frequencies have the frequency difference. A distance between the first and second nodes is determined from the frequency difference from the first and second values and from the third and fourth values.

Abstract: The disclosed signal generator circuit has a four-phase signal generator circuit generating four-phase signals with a first frequency; an eight-phase signal generator circuit performing ½ frequency division of the four-phase signals to generate eight-phase signals with a second frequency; a first to a fourth harmonic rejection mixer circuits multiplying a first four-phase signal and a second four-phase signal of the four-phase signals by a first to a third eight-phase signals and a third to a fifth eight-phase signals of the eight-phase signals with mutually different combinations; a subtractor subtracting between outputs of the first and the fourth harmonic rejection mixer circuits to generate a first output signal with a third frequency; and an adder adding between outputs of the second and the third harmonic rejection mixer circuits to generate a second output signal with a third frequency whose phase is different from the first output signal by ?/2.

Abstract: Selectable sizes for a local oscillator (LO) buffer and mixer are disclosed. In an exemplary embodiment, LO buffer and/or mixer size may be increased when a receiver or transmitter operates in a high gain mode, while LO buffer and/or mixer size may be decreased when the receiver or transmitter operates in a low gain mode. In an exemplary embodiment, LO buffer and mixer sizes are increased and decreased in lock step. Circuit topologies and control schemes for specific exemplary embodiments of LO buffers and mixers having adjustable size are disclosed.

Abstract: Compressing a variable phase component of a received modulated signal with a second harmonic injection locking oscillator, and generating a delayed phase-compressed signal with a fundamental injection locking oscillator, and combining the phase-compressed signal and the delayed phase-compressed signal to obtain an estimated derivative of the variable phase component, and further processing the estimated derivative to recover data contained within the received modulated signal.

Abstract: Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.

Abstract: A method and apparatus for non-linear frequency control tracking of a control loop of a voltage controlled oscillator (VCO) in a wireless mobile device receiver is provided. A channel metric based on one or more channel quality indicators associated with a received radio frequency channel is determined and a state metric associated with the current operating state of the control loop are determined. One or more state metric threshold value associated with the determined channel metric, providing hysteresis between operating states, are determined wherein each state metric threshold value is associated with a transition to a possible operating state of the control loop. The control loop transitions from the current operating state to the operating state associated with an exceeded state metric threshold value. Coefficients are provided to an adaptive loop filter of the control loop, wherein the coefficients are associated with the transitioned operating state.

Abstract: A variable capacitance circuit includes: a prescribed node, to which an alternate current signal with a reference potential as a center voltage is applied; a first capacitor connected to the prescribed node; a second capacitor connected between the first capacitor and the reference potential; a third capacitor and a transistor for controlling capacitance, provide between a first node between the second capacitor and the first capacitor, and the reference potential; and a bias circuit which applies a first bias voltage to a second node between the third capacitor and the transistor.

Abstract: A control device of a receiving device includes an interference wave detector that detects an interference wave within an intermediate frequency band in a signal converted by a mixer that converts a reception signal of a radio frequency band with a certain radio frequency as a center into an intermediate signal of the intermediate frequency band based on a signal of a local oscillation frequency different from the radio frequency. The control device further includes a frequency controller that changes the local oscillation frequency so that the intermediate frequency band gets away from a band of the interference wave when the interference wave is detected.

Abstract: Methods and systems for processing a signal with a corresponding noise profile are disclosed. Aspects of the method may comprise analyzing spectral content of the noise profile. At least one noise harmonic within the signal may be filtered based on said analyzed spectral content. The filtered signal may be amplified. The noise profile may comprise a phase noise profile. The signal may comprise at least one of a sinusoidal signal and a noise signal. At least one filter coefficient that is used to filter the at least one noise harmonic may be determined. The filtering may comprise low pass filtering. The signal may be modulated prior to filtering. The amplifying may comprise buffering. A non-linearity characteristic of the signal may be determined and a noise harmonic may be low-pass filtered within the signal based on the determined non-linearity characteristic.

Abstract: A wireless communications system includes a clock module, a communications module, a receiver module, and a baseband module. The clock module is configured to generate a first clock reference. The communications module is configured to operate in response to the first clock reference and independent of a corrected clock reference. The corrected clock reference is generated by performing automatic frequency correction on the first clock reference according to an automatic frequency correction signal. The receiver module is configured to (i) receive radio frequency signals from a wireless medium, and (ii) in response to the corrected clock reference, generate baseband signals based on the received radio frequency signals. The baseband module is configured to (i) receive the baseband signals, and (ii) in response to a selected one of the first clock reference and the corrected clock reference, generate the automatic frequency correction signal based on the baseband signals.

Abstract: Described herein is a wireless transceiver and related method that enables ultra low power transmission and reception of wireless communications. In an example embodiment of the wireless transceiver, the wireless transceiver receives a first-reference signal having a first-reference frequency. The wireless transceiver then uses the first-reference signal to injection lock a local oscillator, which provides a set of oscillation signals each having an oscillation frequency that is equal to the first-reference frequency, and each having equally spaced phases. Then the wireless transceiver combines the set of oscillation signals into an output signal having an output frequency that is one of (i) a multiple of the first-reference frequency (in accordance with a transmitter implementation) or (ii) a difference of (a) a second-reference frequency of a second-reference signal and (b) a multiple of the first-reference frequency (in accordance with a receiver implementation).

Abstract: Compressing a variable phase component of a received modulated signal with a second harmonic injection locking oscillator, and generating a delayed phase-compressed signal with a fundamental injection locking oscillator, and combining the phase-compressed signal and the delayed phase-compressed signal to obtain an estimated derivative of the variable phase component, and further processing the estimated derivative to recover data contained within the received modulated signal.

Abstract: The invention relates to a superheterodyne receiver, comprising: a sampling mixer being configured to sample an analog radio frequency signal using a certain sampling rate (fs) to obtain a discrete-time sampled signal, and to shift the discrete-time sampled signal towards a first intermediate frequency (|fRF?fLO|) to obtain an intermediate discrete-time signal sampled at the fs; a discrete-time filter being configured to filter the intermediate discrete-time signal at the fs to obtain a filtered signal; and a discrete-time mixer being configured to shift the filtered signal towards a second intermediate frequency (fIF).

Abstract: A method includes obtaining an input signal and demodulating phase contamination in the input signal to generate a baseband signal. The method also includes modulating the input signal based on the baseband signal to generate an output signal, where the output signal has less phase contamination than the input signal. The phase contamination could be demodulated using a phase demodulator or a frequency modulation (FM) detector. A portion of the input signal could be down-converted to a lower frequency, and the phase contamination in the down-converted portion of the input signal could be demodulated. Additional phase contamination in the output signal can be demodulated and used to regulate a level of the baseband signal used during modulation of the input signal. The output signal could have less phase noise or period jitter than the input signal.

Abstract: A frequency conversion system includes a mixer, which is coupled to mix an input signal with a Local Oscillator (LO) signal, so as to produce an output signal. Control circuitry is configured to adjust an actual level of the LO signal provided to the mixer, so as to maintain the actual level substantially constant. A nulling signal generator is coupled to inject a nulling signal into the input signal prior to mixing with the LO signal adjusted by the control circuitry.

Abstract: In accordance with an example embodiment of the present invention, an apparatus comprises a first multiplier configured to convert a first frequency signal into a second frequency signal based at least in part on a first complex-valued local oscillator signal, a pair of low-pass filters configured to filter the second frequency signal, and a second multiplier configured to convert the filtered second frequency signal into a third frequency signal based at least in part on a second complex-valued local oscillator signal wherein the first frequency signal and the third frequency signal share the same frequency position and the pair of low-pass filters is configured based on an indication of allocated transmitted channels.

Abstract: Shockline-based samplers of a vector-network analyzer (VNA) have enhanced dynamic range by using a dynamic bias network applied to the non-linear transmission lines (NLTLs) or shocklines. The bias voltage applied to the NLTL provides direct control over the falling-edge shockline compression, and thus the insertion loss and overall RF bandwidth of the sampler. Alternating between a forward bias voltage to turn off a shockline sampler when it is not needed and thereby reducing spurious generation and improving isolation can be alternatively applied with a reverse bias voltage to turn on the shockline sampler in a normal operation mode. By measuring the shockline output and providing feedback in the reverse-bias mode, the bias voltage can be dynamically adjusted to significantly increase the performance of the NLTL based sampler. In the presence of a strong positive bias voltage, the incoming LO and its harmonics experience large ohmic losses thus preventing gating pulses from forming in the shockline.

Abstract: A method for processing a signal with a corresponding noise profile includes analyzing spectral content of the noise profile, filtering at least one noise harmonic within the signal based on the analyzed spectral content, and limiting the filtered signal. The noise profile may include a phase noise profile. The signal may include a sinusoidal signal and/or a noise signal. At least one filter coefficient that is used to filter the at least one noise harmonic may be determined. The filtering may include low pass filtering. The limiting may include hard-limiting of the filtered signal. A phase difference between the limited signal and a reference signal may be detected.

Abstract: A system includes a first clock module, a global positioning system (GPS) module, a phase-locked loop (PLL) module, a cellular transceiver, and a baseband module. The first clock module generates a first clock reference. The GPS module operates in response to the first clock reference. The WLAN module operates in response to the first clock reference. The PLL module generates a second clock reference by performing automatic frequency correction (AFC) on the first clock reference in response to an AFC signal. The cellular transceiver receives radio frequency signals from a wireless medium and generates baseband signals in response to the received radio frequency signals. The baseband module receives the baseband signals, operates in response to a selected one of the first clock reference and the second clock reference, and generates the AFC signal in response to the baseband signals.

Abstract: A communications device, such as a GNSS receiver comprises an oscillator, having a temperature-dependent frequency characteristic, for generating signals at a nominal frequency; receiver circuitry, for receiving transmitted wireless signals using the signals generated by the oscillator; at least one temperature sensor, having a known positional relationship to the oscillator; an estimation device, for estimating a frequency of the signals generated by the oscillator, based on a measurement from the temperature sensor, and based on the temperature-dependent frequency characteristic of the oscillator; and at least one heat source. A change in the temperature of the oscillator is predicted, based on a state of the heat source, and further based on a model of the thermal properties of the communications device, and hence a change in the frequency of the signals generated by the oscillator is predicted, based on the temperature-dependent frequency characteristic of the oscillator.

Abstract: An electronic device capable of performing automatic frequency control (AFC) to maintain frequency and timing without good received bursts, in which an oscillation unit and a baseband processing unit are provided. Wherein, the baseband processing unit computes a compensation adjustment according to a prediction model and stored information regarding a previous digital value adjustment when detecting that the baseband processing unit is incapable of controlling the oscillation unit according to received bursts from the remote communication unit, and adjusts the oscillation unit according to the determined compensation adjustment.

Abstract: Digital spur reduction in which spurs are kept outside selected channels of interest, with illustrative embodiments relating to an integrated radiofrequency transceiver circuit having digital and analogue components, the circuit having a radiofrequency signal receiver with a local oscillator signal generator configured to provide a local oscillator signal at a frequency fLO and a mixer configured to combine an input radiofrequency signal with the local oscillator signal to produce an intermediate frequency signal; and a clock signal generator configured to generate a digital clock signal at a frequency fDIG for operation of the digital components, where the local oscillator signal and/or a reference signal from which the local oscillator signal is derived are generated such that digital spurs lie outside a band selected by the receiver.

Abstract: The present invention relates to a circuit arrangement (300) for generating non-overlapping and immune-to-1/f-noise signals as has been described. A break-before-make (BBM) circuit ensures that the differential I/Q signals (LO—0, LO—90, LO—180, LO—270), driving the transistors (M11, M12, M21, M22) of mixers (16A, 16B) in an RF receiver (200), are non-over-lapping for having at any time only one of these transistors turned on. The duty cycle of each driving signal is measured, and the difference (?) in the duty cycle corresponding to two subsequent LO phases is determined through a respective differential amplifier (38A-38D). Each differential amplifier is configured to have a current output (LT—0, LT—90, LT—180, LT—270), which is then fed back to the input of the input buffer (30A-30D) corresponding to the first LO phase in order to adjust its logic threshold (LT) level and make the difference (?) equal to zero.

Abstract: A digital delta sigma modulator includes an input integration stage, a resonating stage, a quantizer, and a plurality of feedback paths operably coupled to the quantizer, the input integration stage, and the resonating stage. The input integration stage is operably coupled to integrate a digital input signal to produce an integrated digital signal, wherein the input integration stage has a pole at substantially zero Hertz. The resonating stage is operably coupled to resonate the integrated digital signal to produce a resonating digital signal, wherein the resonating stage has poles at a frequency above zero Hertz. The quantizer stage is operably coupled to produce a quantized signal from the resonating digital signal.

Abstract: A system and method for distance measurement between two nodes of a radio network is provided. A first unmodulated carrier signal is transmitted by the first node and received by the second node. A second unmodulated carrier signal is transmitted by the second node and received by the first node. A first value and a second value of a first phase are measured by the first node, whereby the first value of the first phase is assigned to a first frequency of the received second carrier signal and the second value the first phase is assigned to a second frequency of the received second carrier signal, whereby the first frequency and the second frequency have a frequency difference.

Abstract: The invention relates to a digital signal generator for providing one or more phases of a local oscillator signal for use in digital to analogue converters and harmonic rejection mixers. Embodiments disclosed include a local oscillator signal generator (200) for a mixer of a radiofrequency receiver, the signal generator (200) comprising a bit sequence generator (201) having a plurality of parallel output lines (203), a digital signal generator (202) having a serial output line (204) and a plurality of input lines connected to respective output lines (203) of the bit sequence generator (201) and a clock signal input line (205), wherein the digital signal generator (202) is configured to provide an output bit sequence on the serial output line (204) at a rate given by a clock signal provided on the clock signal input line (205) and a sequence given by a sequence of bits from the bit sequence generator (201) on the plurality of input lines (203).

Abstract: A semiconductor device comprises synthesized frequency generation logic arranged to receive a reference signal, and to provide an output frequency signal. The synthesized frequency generation logic comprises divider logic arranged to receive the reference signal and to generate a divided signal comprising a frequency with a period equal to N times that of the reference signal. The synthesized frequency generation logic is further arranged to generate the synthesized frequency signal comprising a frequency with a period equal to 1/M that of the divided signal. The synthesized frequency generation logic comprises or is operably coupled to decision logic module and comprises or is operably coupled to a switching logic module such that the decision logic module is arranged to determine whether a near-integer spur arises in using the synthesized frequency signal, and configures the switching logic module to select the synthesized frequency signal in response thereto.

Abstract: A frequency synthesizer includes: a first oscillator (1) controlled by a first control device, the first oscillator having a high quality factor that is greater than 300 and produces a first clock signal (2) RF having a fixed frequency, the first control device (30) controlling the frequency of the first controlled oscillator (1) on the basis of a first reference frequency; a second oscillator (3) controlled by a second control device and producing a second clock signal (4); the second control device (31) controlling the frequency of the second controlled oscillator (3) on the basis of a second reference frequency; and an integer frequency divider (5) dividing the frequency of the second clock signal (4) by a variable integer factor N1 and producing a third clock signal (6), the frequency of which is continuously variable by modifying the factor N1 and the control of the second oscillator.

Abstract: A radio-frequency (RF) receiver device for a wireless communication system includes a first filter for filtering out a first RF signal within a first frequency band, a first frequency converter for using a first oscillating signal to convert the first RF signal of the first frequency band to generate a second RF signal, a second filter for filtering out a second RF signal within a second frequency band, a second frequency converter for using a second oscillating signal to convert the second RF signal of the second frequency band to generate a third RF signal, a third filter for filtering out a third RF signal within a third frequency band, and a controller for controlling the first frequency converter and the second frequency converter.

Abstract: Electronic devices contain radio-frequency receivers such as direct conversion receivers. A receiver may receive radio-frequency antenna signals from an antenna in an electronic device. The receiver may include notch filters that attenuate signals in the center of the communications channel that is being received by the receiver. An electronic device may include a clock source. The clock source may be used to clock electrical components in the electronic device. During operation, the clock source may produce radio-frequency interference signals at an associated interferer frequency. The potential for the interference signals to disrupt operation of the receiver can be reduced by configuring the electronic device so that the interferer frequency is aligned with the center of the communications channel. The clock source may be adjusted dynamically to accommodate changes in the communications channel.

Abstract: A synthesizer includes a synthesizer unit for generating a local oscillation signal based on a reference oscillation signal output from a reference oscillation unit including a MEMS resonator, a frequency fluctuation detector for detecting a frequency fluctuation of the MEMS resonator, and a frequency adjuster for adjusting a frequency of the local oscillation signal based on the frequency fluctuation detected by the frequency fluctuation detector. This synthesizer can output a signal with a stable frequency, even when an MEMS resonator demonstrating a large fluctuation in an oscillation frequency to temperatures is used.

Abstract: Techniques for decimating a first periodic signal to generate a second periodic signal. In an exemplary embodiment, the first periodic signal is divided by a configurable integer ratio divider, and the output of the divider is delayed by a configurable fractional delay. The configurable fractional delay may be noise-shaped using, e.g., sigma-delta modulation techniques to spread the quantization noise of the fractional delay over a wide bandwidth. In an exemplary embodiment, the first and second periodic signals may be used to generate the transmit (TX) and receive (RX) local oscillator (LO) signals for a communications transceiver from a single phase-locked loop (PLL) output.

Abstract: A method of mitigating interference in a mobile wireless communication device by adaptively adjusting transmit power levels of a wireless cellular transceiver. A receive signal quality for a wireless non-cellular transceiver that includes interference from signals transmitted by the wireless cellular transceiver is estimated. The wireless non-cellular and wireless cellular transceivers are co-located in the mobile wireless communication device, and both transceivers are active. An actual transmit power of the wireless cellular transceiver is adjusted based on the estimated receive signal quality to a level less than a requested transmit power. The estimation of the receive signal quality and the adjusting of the actual transmit power is periodically repeated. The estimation accounts for operational properties of the wireless cellular and non-cellular transceivers as well as operational characteristics of wireless connections through the transceivers.

Abstract: A modulation circuit for use in a radiofrequency transmitter includes a local oscillator circuit configured to generate one or more local oscillator signals at a desired frequency and with a duty cycle at or about twenty-five percent, and a modulator configured to generate one or more modulated signals responsive to the one or more local oscillator signals and one or more baseband information signals. In at least one embodiment, the modulation circuit includes a modulator comprising a combined mixing and transconductance circuit that includes a transistor circuit for each baseband information signal serving as a modulation input to the modulator. Each transistor circuit comprises a first transistor driven by the baseband information signal and coupling a modulator output node to a corresponding transconductance element, and a second transistor driven by one of the one or more local oscillator signals and coupling the corresponding transconductance element to a signal ground node.

Abstract: Embodiments related to analog front-ends for wireless and wired are described and depicted.

Abstract: Disclosed is an RF transceiver in which transmission and reception are simultaneously performed, wherein a magnitude of a transmission leakage signal mixed into a receiving signal is measured, the maximum and minimum scopes on I/Q vector phase-plane in which an offset vector exists is set using the measured magnitude of the transmission leakage signal, the offset vector offsetting the transmission leakage signal as much as possible, a detection area in which the offset vector exists is determined in the set scope, and the offset vector is detected.

Abstract: A radio-frequency (RF) apparatus, which may reside in a receiver or transceiver, includes receive-path circuitry. The receive-path circuitry includes a poly-phase filter and a harmonic filter. The poly-phase filter accepts an input signal and generates two output signals. One output signal of the poly-phase filter constitutes an in-phase (I) signal. The other output signal of the poly-phase filter constitutes a quadrature (Q) signal. The a harmonic filter couples to the poly-phase filter. The harmonic filter accepts as input signals the in-phase and quadrature output signals of the poly-phase filter.

Abstract: A system includes a first clock module, a global positioning system (GPS) module, a phase-locked loop (PLL) module, a cellular transceiver, and a baseband module. The first clock module generates a first clock reference. The GPS module operates in response to the first clock reference. The WLAN module operates in response to the first clock reference. The PLL module generates a second clock reference by performing automatic frequency correction (AFC) on the first clock reference in response to an AFC signal. The cellular transceiver receives radio frequency signals from a wireless medium and generates baseband signals in response to the received radio frequency signals. The baseband module receives the baseband signals, operates in response to a selected one of the first clock reference and the second clock reference, and generates the AFC signal in response to the baseband signals.

Abstract: A first programmable frequency oscillator, which includes a first ramp comparator and programmable signal generation circuitry is disclosed. The programmable signal generation circuitry provides a ramping signal, which has a first frequency, based on a desired first frequency. The first ramp comparator receives the ramping signal and provides a first ramp comparator output signal based on the ramping signal. The first ramp comparator output signal is fed back to the programmable signal generation circuitry, such that the ramping signal is based on the desired first frequency and the first ramp comparator output signal. However, the first ramp comparator has a first propagation delay, which introduces a frequency error into the programmable frequency oscillator. Therefore, the first frequency is not proportional to one or more slopes of the ramping signal. As a result, the programmable signal generation circuitry compensates for the frequency error based on the desired first frequency.

Abstract: A method and apparatus for non-linear frequency control tracking of a control loop of a voltage controlled oscillator (VCO) in a wireless mobile device receiver is provided. A channel metric based on one or more channel quality indicators associated with a received radio frequency channel is determined and a state metric associated with the current operating state of the control loop are determined. One or more state metric threshold value associated with the determined channel metric, providing hysteresis between operating states, are determined wherein each state metric threshold value is associated with a transition to a possible operating state of the control loop. The control loop transitions from the current operating state to the operating state associated with an exceeded state metric threshold value. Coefficients are provided to an adaptive loop filter of the control loop, wherein the coefficients coefficient are associated with the transitioned operating state.

Abstract: A polar receiver using injection-locking technique includes an antenna, a first filter, a first voltage-controlled oscillator, a first mixer, a frequency discriminator, a second filter, a third filter, a first analog-digital converter, a second analog-digital converter and a digital signal processing unit. Mentioned polar receiver enables to separate an envelope signal and a frequency-modulated signal from a radio frequency signal received from the antenna via the injection locking technique of the first voltage-controlled oscillator and the frequency discriminator. The envelope component and the frequency-modulated component can be digitally processed by the digital signal processing unit to accomplish polar demodulation.

Abstract: In an oscillating apparatus, a detection unit detects a frequency offset between an input signal and a reference signal. A code generation unit specifies a relationship among a code having a predetermined number of bits, the frequency offset, and a voltage to be applied to a voltage-controlled oscillator by a DAC, in accordance with a frequency offset detection state of the detection unit. The code generation unit also generates a frequency offset correction code having a predetermined number of bits in accordance with the specified relationship. The DAC applies the voltage to the voltage-controlled oscillator, in accordance with the relationship described above and the code generated by the code generation unit. The voltage controlled oscillator outputs an oscillator signal having an oscillation frequency corresponding to the voltage applied by the DAC.

Abstract: A communications subsystem for a wireless device for correcting errors in a reference frequency signal. The communications subsystem comprises a frequency generator for generating the reference frequency signal and a closed loop reference frequency correction module that generates a reference frequency adjustment signal for correcting the reference frequency signal when the communications subsystem operates in closed loop mode. The subsystem further includes an open loop frequency correction means that that samples values of the reference frequency adjustment signal during the closed loop mode and generates a frequency correction signal for correcting the reference frequency signal when the communications subsystem operates in a mode other than closed loop mode.

Abstract: A receiver uses a local oscillator to receive data transmitted via a combination of radio frequency signals using carrier aggregation. Each radio frequency signal occupies a respective radio frequency band and the radio frequency hands are arranged in two groups, a first group and a second group, separated in frequency by a first frequency region, each of the groups including one or more radio frequency bands and the first group occupying a wider frequency region than the second group. The radio frequency signals are processed using the local oscillator by setting the local oscillator, during the processing, to a frequency that is offset from the centre of a band defined by outer edges of the frequency regions occupied by the two groups.

Abstract: Disclosed are a wireless communication system, method, and site controller for mitigating at least one of a transmission timing synchronization loss and a receiving timing synchronization loss at a base station. The method includes determining, at a first base station, a loss of a timing reference the timing reference is used by the first base station for timing synchronization of at least one of a transmission and reception of wireless data. The timing synchronization is predefined and common between at least the first base station and a second base station. The method further includes adjusting, in response to the determining, at least one of a transmit guard time and a receive guard time by at least one symbol time.