Abstract: A wireless receiver includes a down converter module operable to deliver a signal having a signal bandwidth that changes over time, a dynamically controllable filter module having a filter bandwidth and fed by said down converter module, and a measurement module operable to at least approximately measure the signal bandwidth, said dynamically controllable filter module responsive to said measurement module to dynamically adjust the filter bandwidth to more nearly match the signal bandwidth as it changes over time, whereby output from said filter module is noise-reduced. Other wireless receivers, electronic circuits, and processes for their operation are disclosed.

Abstract: Embodiments may relate to a communications module comprising with a dispersion compensation module communicatively coupled between a baseband module and a radio frequency (RF) module. The dispersion compensation module may be configured to process a data signal at an intermediate frequency that is between a baseband frequency and a RF frequency. Other embodiments may be described or claimed.

Abstract: According to one embodiment, a transformer-based in-phase and quadrature (IQ) includes a differential balun having a first inductor and a second inductor. The first inductor has a first input terminal and a first output terminal. The second inductor has a second input terminal and a second output terminal. Additionally, the IQ generator circuit includes a third inductor magnetically coupled with the first inductor. The third inductor has a first isolation terminal and a third output terminal. The IQ generator circuit also includes a fourth inductor magnetically coupled with the second inductor. The fourth inductor has a second isolation terminal and a fourth output terminal. The IQ generator circuit additionally includes a first transistor coupled to the first input terminal of the first inductor. Further, the generator circuit includes a second transistor coupled to the second input terminal of the second inductor.

Abstract: The disclosed principles provide for an RF front-end design capable of up-converting, down-converting, and conditioning broadband signals for wireless transmission with an instantaneous bandwidth of up to 3.5 GHz within the frequency range of 2-12 GHz. In addition, embodiments of the disclosed principles provide flexibility that enables RF front-ends designed as disclosed herein to be applied to many different applications including covert communications, drone communications, high data rate communications, signals intelligence, direction finding, multi-function apertures, radars and emulators, and electronic warfare. Embodiments and their related advantages and improvements of RF front-ends designed in accordance with the disclosed principles are discussed herein.

Abstract: A method of signal communication is disclosed comprising providing source data having a predetermined signal power; mapping the source data onto a first modulation scheme to obtain a first set of complex symbols; mapping the source data onto at least one further modulation scheme to obtain at least one further set of complex symbols; combining the first set of complex symbols and the at least one further set of complex signals to form a modulated signal to be forwarded along a communications channel. Beneficially, the predetermined signal power of the source data is split between the first modulation scheme and the at least one further modulation scheme.

Abstract: A transmitter-receiver isolation circuit includes a transmitter port to receive a transmit signal, an antenna port for coupling to an antenna, and a receiver port to receive a receive signal. The circuit further includes: a first signal path between the transmitter and antenna ports configured to impart a first phase shift to a first transmit portion of the transmit signal; a second signal path between the transmitter and antenna ports configured to impart approximately the first phase shift to a second transmit portion of the transmit signal; a first leakage path between the transmitter and receiver ports configured to impart a second phase shift to a first leakage portion of the transmit signal; a second leakage path between the transmitter and receiver ports configured to impart to a second leakage portion of the transmit signal a third phase shift that is approximately opposite to the second phase shift.

Abstract: A magnetic resonance imaging (MRI) system (100, 400, 500) includes a wireless RF station (20, 320, 420, 520, 620) which is associated with one or more RF coils which sense the magnetic resonance (MR) signal emitted from a subject under MRI examination. The wireless RF station communicates digital data representing the sensed MR signal to an MRI controller (124) for further processing, which may include display. An internal clock (2202, 3202) in the wireless RF station is precisely synchronized with the MRI controller clock (108, 2101, 3101), with carrier phase synchronization and code phase tracking of a predefined code sequence such as a pseudo random number (PRN) sequence.

Abstract: Systems and methods enable wireless devices to measure interference and allow coexistence by preventing transmission on bands that are currently in use by other devices.

Abstract: Electronic devices, local oscillator circuits, and methods for operating local oscillators are disclosed herein. In one embodiment, a local oscillator circuit includes a first transistor and a second transistor individually having a base, a collector, and an emitter and a transformer having a first transformer inductor magnetically coupled to a second transformer inductor. The first transformer inductor couples the collector of the first transistor to the base of the second transistor. The second transformer inductor couples the collector of the second transistor to the base of the first transistor.

Abstract: A patterned shield structure applied to an integrated circuit (IC) is disposed between an inductor and a substrate of the integrated circuit. The patterned shield structure includes a center structure unit, a first patterned structure unit, and a second patterned structure unit. The center structure unit includes a first sub-center structure unit and a second sub-center structure unit. The second sub-center structure unit and the first sub-center structure unit are symmetrically disposed with respect to a middle of the center structure unit. The first patterned structure unit is disposed on one side of the center structure unit. The second patterned structure unit is disposed on another side of the center structure unit. The second patterned structure unit and the first patterned structure unit are symmetrically disposed with respect to the center structure unit.

Abstract: A mobile communications radio receiver for multiple radio network operation includes an RF unit for generating a first down-converted signal from a radio signal received from a first radio network and a second down-converted signal from a radio signal received from a second radio network. Further, it includes a first receiver comprising a paging indicator channel demodulator for demodulating a paging indicator channel of the first radio network based on the first down-converted signal, and a second receiver including a pilot channel demodulator for demodulating a pilot channel of the second radio network based on the second down-converted signal. A first data connection is configured to couple paging information contained in the second down-converted signal to an input of the paging indicator channel demodulator of the first receiver.

Abstract: A magnetic sensor includes a magnetization fixed layer, a magnetic field detecting layer, and an intermediate layer. The magnetization fixed layer is formed into a thin-film shape, and a magnetization direction of the magnetization fixed layer is fixed in a direction parallel to an in-plane direction. A magnetization direction of the magnetic field detecting layer changes depending on an external magnetic field. The intermediate layer is disposed between the magnetization fixed layer and the magnetic field detecting layer, and a resistance value of the intermediate layer changes depending on an angle between the magnetization direction of the magnetization fixed layer and the magnetization direction of the magnetic field detecting layer. A magnetization amount per unit area of the magnetic field detecting layer is less than 0.2 [memu/cm2].

Abstract: A wireless receiver includes a receiver mixer having at least two sets of switches connected to selectively pass a portion of a received RF signal to the mixer's output. Different sets of the switches are activated by different phases of a local oscillator to effect passing of different phases of the RF signal to the output. These outputs are combined in various ways to obtain operation of the main receiver and the wake up receiver modes at harmonically related carrier frequencies with as low as possible subharmonic multi-phase clock generation network. This can be used to detect a wake up signal with a very fast response time, minimal area overhead, minimal power usage, and equal loading to the local oscillator network providing the phases to the mixer to maintain excellent phase balance and precise harmonic selectivity.

Abstract: A method for signaling a time and/or clock through a header station generating a transport datastream from video and/or audio data to at least one receiver of the transport datastream calculates the time information (PCRN+1; RTPN+1; TN+1) integrated in a transport data packet of the transport datastream iteratively from the time information (PCRN; RTPN; T1) of the transport data packet last transmitted in the transport datastream with integrated time information, from a transmission time of data bits transmitted since the last transmitted transport data packet with integrated time information in the transport datastream and from a clock (fPCR; fSys). The time information (PCRN+1, PCRN; RTPN+1, RTPN; TN+1, T1) serves in each case for the signaling of times or a clock, and, in each case, contains a pulse number counted up to the transmission time of the respective transport data packet of the clock (fPCR; fSys).

Abstract: Apparatus and methods for analog-to-digital conversion of quadrature receive signals are provided herein. In certain implementations, a transceiver system includes at least a first pair of analog-to-digital converters (ADCs) associated with a first quadrature receiver channel and a second pair of ADCs associated with a second quadrature receiver channel. The first and second pairs of ADCs can provide analog-to-digital conversion of the same receive signal, but can have different noise profiles relative to one another, such as a low pass noise profile and a band pass noise profile. The transceiver system can further include a reconstruction filter for combining the outputs of at least the first and second pairs of ADCs to generate output signals associated with a lower overall noise profile relative to that of either pair of ADCs alone.

Abstract: Described herein are technologies related to an implementation of de-sensitization estimation in a receiver of a portable device.

Abstract: A system for business wireless mobile transactions for electronic hand-held devices including a mobile electronic communication device including a dedicated communication component and a dedicated activatable component; a trigger, a good or service, and an application server; wherein the device and the dedicated communication component are operable for communication with RFID/NFC transceivers when the device is located within a predetermined proximity of a transceiver; and wherein the trigger activates the device to electronically initiate a business transaction for the good or service on the application server when the device detects activation of the dedicated activatable component by the trigger. The system can further include a financial transaction server. Methods of using the system for conducting business or social transactions are also included.

Abstract: According to one exemplary embodiment of the present invention, an apparatus is provided comprising a radio transmitter having an output stage with an adjustable output power level, a measurement circuit configured to measure a radio signal power of the radio transmitter and a control block connected to the measurement circuit wherein the measurement circuit is connected to the output stage of the radio transmitter where the radio signal power is measured; and wherein the control block is configured to adjust the output power level of the radio transmitter based on the measured radio signal power at the radio transmitter output stage.

Abstract: Methods and apparatuses are presented for harmonic reject upconverting a baseband signal using at least one quadrature passive upconversion mixer. In some embodiments, an apparatus may include a first quadrature passive mixer configured to receive a first baseband input and a first LO input, and a second quadrature passive mixer configured to receive a second baseband input and a second LO input. A first output of said first passive mixer may be directly connected to a first output of said second passive mixer and together coupled to a first amplifier input. A second output of said first passive mixer may be directly connected to a second output of said second passive mixer and together coupled to a second amplifier input. The transmitter may be configured to output an upconverted signal with at least one rejected harmonic spurious mixing product based on the first and second amplifier inputs.

Abstract: A circuit includes first and second transconductance stages that generate first and second currents, respectively, in response to an input signal. A current combiner circuit selectively couples the first current to a first output, selectively couples the second current to the first output, selectively couples the first current to a second output, and selectively couples the second current to the second output. In response to the first current being coupled to both the first and second outputs, the current combiner circuit couples the second current to both the first and second outputs. In response to the first current being decoupled from the second output, the current combiner circuit decouples the second current from both the first and second outputs. In response to the first current being decoupled from the first output, the current combiner circuit decouples the second current from both the first and second outputs.

Abstract: A double balanced image reject mixer (IRM) can be configured to comprise: a common radio frequency (RF) port; four mixer devices, each comprising an intermediate frequency (IF) port, an RF port and an local oscillator (LO) port; and a four-way, in-phase splitter/combiner. The four-way, in-phase splitter/combiner can be connected between the RF common port and the RF port of each of the four mixer devices. A method of performing spurious suppression and image reject mixing in a double balanced IRM, can comprise: directly in-phase combining radio frequency (RF) output signals of four mixer devices located in the double balanced IRM; and phase pairing local oscillator (LO) signals and intermediate frequency (IF) signals such that the combination of the phases of the respective IF and LO signals can result in substantially equal phase RF signals at the RF ports of all four mixer devices.

Abstract: Selectable sizes for a local oscillator (LO) buffer and mixer are disclosed. In an exemplary embodiment, LO buffer and/or mixer size may be increased when a receiver or transmitter operates in a high gain mode, while LO buffer and/or mixer size may be decreased when the receiver or transmitter operates in a low gain mode. In an exemplary embodiment, LO buffer and mixer sizes are increased and decreased in lock step. Circuit topologies and control schemes for specific exemplary embodiments of LO buffers and mixers having adjustable size are disclosed.

Abstract: A system can include an input signal source, a local oscillator (LO), and an intermediate frequency (IF) receiver to receive an input signal from the input signal source and an LO signal from the LO. The IF receiver can include a switch to switch between the first and second inputs to provide an output. The IF receiver can generate a calibration signal from the LO signal.

Abstract: A receiver includes a first amplifier and a second amplifier, a first mixer, a second mixer and a third mixer, a first baseband signal path and a second baseband signal path. A signal output of the first amplifier is coupled to a signal input of the first mixer and a signal input of the second mixer. A signal output of the second amplifier is coupled to a signal input of the third mixer. A signal output of the first mixer and a signal output of the third mixer are coupled to the first baseband signal path. A signal output of the second mixer is coupled to the second baseband signal path.

Abstract: Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.

Abstract: A method and apparatus for non-linear frequency control tracking of a control loop of a voltage controlled oscillator (VCO) in a wireless mobile device receiver is provided. A channel metric based on one or more channel quality indicators associated with a received radio frequency channel is determined and a state metric associated with the current operating state of the control loop are determined. One or more state metric threshold value associated with the determined channel metric, providing hysteresis between operating states, are determined wherein each state metric threshold value is associated with a transition to a possible operating state of the control loop. The control loop transitions from the current operating state to the operating state associated with an exceeded state metric threshold value. Coefficients are provided to an adaptive loop filter of the control loop, wherein the coefficients are associated with the transitioned operating state.

Abstract: A receiver using a harmonic mixer includes a signal receiver for receiving a first signal, a frequency generator for synchronizing a phase of the received first signal, down-converting a frequency size of the synchronized first signal as much as a first size, and outputting the down-converted signal as a second signal; a first harmonic mixer unit for receiving the first signal and the second signal, generating a third signal having a frequency size down-converted as much as a second size, and outputting the third signal. The receiver further includes a second harmonic mixer unit for receiving the third signal and outputting an In-phase signal having a frequency size down-converted as much as a third size, and a third harmonic mixer unit for receiving the third signal and outputting a Quadrature-phase signal having a frequency size down-converted as much as a third size.

Abstract: A method may include measuring a frequency difference between an actual frequency and an expected frequency associated with a frequency control calibration signal value for each of a plurality of frequency control calibration signal values during a calibration phase. The method may additionally include generating integral non-linearity compensation values based on the frequency differences measured The method may further include generating the applied frequency control signal based on a frequency control calibration signal value received by the digital-to-analog converter during the calibration phase. The method may also include generating a compensated frequency control signal value based on a frequency control signal value received by the integral non-linearity compensation module and an integral non-linearity compensation value associated with the frequency control signal value during an operation phase of the wireless communication element.

Abstract: A harmonic rejection mixer includes a first scaling circuit for scaling an RF signal to generate a plurality of scaled RF signals, a first switching stage for sampling the scaled RF signals using a first plurality of switching signals, and a second mixing stage for mixing the sampled RF signals with a second plurality of switching signals to generate a plurality of frequency translated signals having different phases. A combiner adds the frequency translated signals together to generate a first plurality of baseband versions of the RF signal. A first amplifier stage processes the first plurality of baseband versions to generate a second plurality of baseband versions. The mixer further includes a second scaling circuit for scaling the second plurality of baseband versions and a second amplifier stage to generate an in-phase baseband signal and a quadrature baseband signal from the scaled second plurality of baseband versions.

Abstract: A frequency up and down converter, in which, when down converting a high frequency signal into an intermediate frequency signal or up converting an intermediate frequency signal into a high frequency signal by controlling switching elements using a local oscillator signal, a signal with a frequency to be converted is controlled a number of times during one cycle of the local oscillator signal, whereby the local oscillator signal with a frequency lower than an original frequency may be used. Transistors are added in parallel to switching transistors disposed in a frequency down conversion unit or a frequency up conversion unit, and local oscillator signals with predetermined phases and pulse widths are provided to the gates of the transistors such that a high frequency signal or an intermediate frequency signal is transferred to an output terminal at least two times during one cycle of a local oscillator signal.

Abstract: A down-converter for receiving a multiband radio frequency signal (RF) and a local oscillator signal comprises a frequency divider and a heterodyne receive chain. The frequency divider is configured to divide the local oscillator signal and provide different divided local oscillator signals. The heterodyne receive chain comprises a first stage mixer and second stage mixers. The first stage mixer is configured to mix the multiband radio frequency signal and either the local oscillator signal or a divided local oscillator signal to generate a first intermediate frequency signal. Each second stage mixer is configured to mix the first intermediate signal and a divided local oscillator signal to generate second intermediate frequency signals that each represent a band from the multiband radio frequency signal. The frequency divider is configured to provide a different divided local oscillator signal to each of the second stage mixers.

Abstract: The high sensitivity FSK radiofrequency signal receiver includes an antenna for receiving FSK radiofrequency signals, a LNA amplifier receiving signals picked up by the antenna, a local oscillator for supplying oscillating signals, a mixer for mixing the incoming signals with the oscillating signals to produce intermediate signals. The receiver includes a broadband or poly-phase filter for filtering the intermediate signals, and a sampler for supplying sampled intermediate signals to a high sensitivity demodulation stage, which supplies data signals. The receiver includes a processing circuit for performing a discrete Fourier transform of sampled intermediate signals. The selector at the processing circuit output determines the difference between the signal amplitude peak frequency above a determined threshold and the expected frequency of the intermediate signals.

Abstract: To provide a frequency conversion device which uses a magneto-resistive device and thereby can correspond to a Si-based MMIC and a GaAs-based MMIC. A frequency conversion apparatus according to the present invention includes: a frequency conversion device made of a magneto-resistive device including a magnetic free layer, an intermediate layer, and a magnetic pinned layer; a magnetic field applying mechanism for applying a magnetic field to the frequency conversion device; a local oscillator for applying a local oscillation signal to the frequency conversion device; and an input terminal electrically connected to the frequency conversion device, and used to input an external input signal.

Abstract: Techniques for performing analog calibration of a receiver to optimize a second-order input intercept point (IIP2). In an aspect, a signal generator modeling an interferer is coupled to an adjustable input of a receiver, e.g., a gate bias voltage of a mixer. For example, the signal generator output may be a single-tone on-off keying (OOK) modulated signal. The mixer mixes the signal down to baseband, wherein an analog correlator correlates the down-converted signal with the known sequence of bits used to perform the OOK modulation. The analog correlation output is then provided to drive the bias voltage in the mixer, e.g., one or more gate voltages of transistors in the differential mixer, to optimize the overall receiver IIP2. Further aspects of the disclosure provide for calibrating receivers having multiple LNA's, and also dual or diversity receivers having multiple receive paths.

Abstract: A downconverter mixes a first comb spectrum with a local oscillator signal to generate a second comb spectrum in a lower frequency range. The first comb spectrum comprises frequency components separated from each other according to a frequency spacing interval, and the LO signal has a frequency offset relative to the first comb spectrum, where the frequency offset is a rational fraction of the frequency spacing interval. The second comb spectrum comprises lower and upper sideband responses corresponding to respective lower and upper sideband signals of the first comb spectrum. The lower and upper sideband responses in the second comb spectrum can be distinguished from each other based on the frequency offset.

Abstract: A sampling circuit and a receiver are provided having a high flexibility of filter design and excellent characteristics for removing an interfering wave. Provided also are a sampling circuit and a receiver having a low level of the higher harmonic spurious. The sampling circuit includes a charge sampling circuit, which executes sampling of an input signal, and a plurality of charge sharing circuits connected in parallel to the output stage of the charge sampling circuit. The charge sharing circuits include a charge sharing circuit group having transmission functions different from one another, a synthesis circuit, which is arranged at the output side of the charge sharing circuit group and synthesizes the outputs of the charge sharing circuits, and a digital control unit, which outputs a control signal for controlling the operation of the charge sharing circuit group and the synthesis circuit.

Abstract: The present invention relates to a circuit arrangement (300) for generating non-overlapping and immune-to-1/f-noise signals as has been described. A break-before-make (BBM) circuit ensures that the differential I/Q signals (LO—0, LO—90, LO—180, LO—270), driving the transistors (M11, M12, M21, M22) of mixers (16A, 16B) in an RF receiver (200), are non-over-lapping for having at any time only one of these transistors turned on. The duty cycle of each driving signal is measured, and the difference (?) in the duty cycle corresponding to two subsequent LO phases is determined through a respective differential amplifier (38A-38D). Each differential amplifier is configured to have a current output (LT—0, LT—90, LT—180, LT—270), which is then fed back to the input of the input buffer (30A-30D) corresponding to the first LO phase in order to adjust its logic threshold (LT) level and make the difference (?) equal to zero.

Abstract: A radio frequency (RF) receiver, such as a television tuner, includes a harmonic cancellation circuit. The harmonic cancellation circuit includes a primary signal path to generate a first intermediate frequency (IF) signal by mixing an RF signal with a reference signal and a harmonic feedforward signal path to generate a second IF signal representing signal content of the RF signal near an nth-order harmonic of a frequency fLO of the first reference signal, n comprising a positive integer. The harmonic cancellation circuit further includes a summation stage to generate a third IF signal based on a difference between the first IF signal and the second IF signal.

Abstract: A method and apparatus is disclosed to effectively frequency translate a filter characterized as a low quality factor (Q) filter, corresponding to a baseband frequency of approximately zero Hertz or to an intermediate frequency (IF), to a filter characterized as a high Q filter at frequencies greater than the baseband frequency or the IF. A downconversion mixer frequency translates a communication signal to the baseband frequency or the IF using a first local oscillator signal to provide a downconverted communication signal. A filter corresponding to the baseband frequency or the IF filters the downconverted communication signal to provide a filtered communication signal. An upconversion mixer frequency translates a communication signal using a second local oscillator signal. The frequency translation by the upconversion mixer, in effect, translates the filter characterization from the low Q filter to the high Q filter at frequencies greater than the baseband frequency or the IF.

Abstract: A clock generator for a mobile device, capable of operating in one of a full-power mode and a low-power mode according to a standby signal to generate a high-frequency clock signal and a low-frequency clock signal is disclosed. The clock generator includes a crystal oscillator, for generating an oscillation signal of a specific frequency according to the power mode of the clock generator; a frequency division block, for dividing the oscillation signal by a specific divisor according to the power mode of the clock generator to generate the low-frequency clock signal; and a buffer block, for amplifying the oscillation signal to generate the high-frequency clock signal; wherein during each power mode, a frequency of the low-frequency clock signal is substantially the same.

Abstract: The invention relates to a digital signal generator for providing one or more phases of a local oscillator signal for use in digital to analogue converters and harmonic rejection mixers. Embodiments disclosed include a local oscillator signal generator (200) for a mixer of a radiofrequency receiver, the signal generator (200) comprising a bit sequence generator (201) having a plurality of parallel output lines (203), a digital signal generator (202) having a serial output line (204) and a plurality of input lines connected to respective output lines (203) of the bit sequence generator (201) and a clock signal input line (205), wherein the digital signal generator (202) is configured to provide an output bit sequence on the serial output line (204) at a rate given by a clock signal provided on the clock signal input line (205) and a sequence given by a sequence of bits from the bit sequence generator (201) on the plurality of input lines (203).

Abstract: A radio frequency receiver on an integrated circuit (RFIC) includes an oscillator circuit, which generates a radio frequency (RF) oscillatory signal having a predetermined frequency that is outside of an intermediate frequency passband of the RFIC. An amplitude modulator modulates the RF oscillatory signal to produce an amplitude modulated signal which is applied to a mixer that downconverts the amplitude modulated signal. A calibration circuit receives the downconverted signal, including second order modulation (IM2) products, and, responsive to the IM2 products, generates a bias signal that is applied to the mixer to reduce the IM2 products.

Abstract: A wireless communication unit has two or more communication modes including one or more mobile phone mode, in which mobile phone mode the wireless communication unit is able to transmit or receive wireless signals via an antenna from and/or to a mobile phone network in accordance with a communication protocol. The unit includes a baseband module and a radiofrequency module. A radiofrequency interface of the baseband module is connected to the radiofrequency module, for receiving and/or transmitting baseband signals from and/or to the radiofrequency module. The radiofrequency module includes a baseband interface, for receiving and/or transmitting the baseband signals to the baseband module and an antenna interface (AI) connectable to an antenna for receiving and/or transmitting radiofrequency signals from and/or to the antenna. A clock system is connected to the radiofrequency interface and the baseband interface.

Abstract: A mixer-amplifier of an RF signal including at least an amplifier circuit and a mixing circuit controlled at a local oscillator frequency, for amplifying a signal applied on at least one input terminal and converting a first frequency of this signal into a second, lower, frequency, and including a reverse feedback loop switched at the local oscillator frequency.

Abstract: Presented herein are systems, methods, and apparatus for ultra-low power, low noise switched capacitor radio frequency mixer. In one embodiment, there is described a method for mixing a signal. The method comprises mixing with a mixer, a received signal with a mixing signal to generate a mixed signal. The mixing signal comprises an in-phase component and an out-of-phase component and a desired frequency. The mixed signal comprises a mixed in-phase component and a mixed out-of-phase component. The method also comprises mixing one of the mixed in-phase component and the mixed out-of-phase component based on the mixing signal.

Abstract: Electronic devices contain radio-frequency receivers such as direct conversion receivers. A receiver may receive radio-frequency antenna signals from an antenna in an electronic device. The receiver may include notch filters that attenuate signals in the center of the communications channel that is being received by the receiver. An electronic device may include a clock source. The clock source may be used to clock electrical components in the electronic device. During operation, the clock source may produce radio-frequency interference signals at an associated interferer frequency. The potential for the interference signals to disrupt operation of the receiver can be reduced by configuring the electronic device so that the interferer frequency is aligned with the center of the communications channel. The clock source may be adjusted dynamically to accommodate changes in the communications channel.

Abstract: A synthesizer includes a synthesizer unit for generating a local oscillation signal based on a reference oscillation signal output from a reference oscillation unit including a MEMS resonator, a frequency fluctuation detector for detecting a frequency fluctuation of the MEMS resonator, and a frequency adjuster for adjusting a frequency of the local oscillation signal based on the frequency fluctuation detected by the frequency fluctuation detector. This synthesizer can output a signal with a stable frequency, even when an MEMS resonator demonstrating a large fluctuation in an oscillation frequency to temperatures is used.

Abstract: Methods, systems, and apparatuses for down-converting and up-converting an electromagnetic signal. In embodiments, the invention operates by receiving an electromagnetic signal and recursively operating on approximate half cycles of a carrier signal. The recursive operations can be performed at a sub-harmonic rate of the carrier signal. The invention accumulates the results of the recursive operations and uses the accumulated results to form a down-converted signal. In embodiments, up-conversion is accomplished by controlling a switch with an oscillating signal, the frequency of the oscillating signal being selected as a sub-harmonic of the desired output frequency. When the invention is being used in the frequency modulation or phase modulation implementations, the oscillating signal is modulated by an information signal before it causes the switch to gate a bias signal. The output of the switch is filtered, and the desired harmonic is output.

Abstract: According to one embodiment, a coupler apparatus includes a coupling element and a ground plane. The coupling element comprises a conductive material and configured to be subjected to power feeding to a feeding point. The ground plane comprises a conductive material and faces the coupling element. The coupling element has one or more through holes along an alignment direction of the coupling element and the ground plane.

Abstract: Embodiments of integrated circuits for use in a broadband tuner are described. In one embodiment, an integrated circuit includes a clock buffer configured to buffer a received clock signal and generate a buffered clock signal. Additionally, the integrated circuit includes a multiphase local oscillator core coupled to the clock buffer and configured to generate a plurality of oscillator signals in response to the buffered clock signal, each of the plurality of oscillator signals being mutually phase shifted. The integrated circuit may also include a plurality of output buffers, each configured to receive one of the plurality of oscillator signals and to produce an output signal suitable for use in a broadband tuner circuit in response to the one of the plurality of oscillator signals.