Integrated Circuit Production Or Semiconductor Fabrication Patents (Class 700/121)
  • Patent number: 11742189
    Abstract: Multi-zone reactors, systems including a multi-zone reactor, and methods of using the systems and reactors are disclosed. Exemplary multi-zone reactors include a movable susceptor assembly and a moveable plate. The movable susceptor assembly and movable plate can move vertically between reaction zones of a reactor to expose a substrate to multiple processes or reactants.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: August 29, 2023
    Assignee: ASM IP Holding B.V.
    Inventors: Carl Louis White, Mohith Verghese, Eric James Shero, Todd Robert Dunn
  • Patent number: 11740619
    Abstract: Disclosed is a malfunction early-warning method for production logistics delivery equipment. After a sensor obtains past signal data, performing feature extraction and dimensionality reduction so as to obtain a feature vector; using a growing neural gas (GNG) algorithm to divide normal state data into different operation situations so as to obtain several cluster centers, and calculating the Euclidean distance between the feature vector and the cluster centers obtained from current operation data, so as to obtain a similarity trend; constructing a past memory matrix, using an improved particle swarm algorithm to optimize an LS-SVM regression model parameter, and calculating the residual value of the current state. Finally, combining the residual value and the similarity trend to obtain a risk coefficient, assessing the equipment state, and issuing an early warning for an equipment malfunction.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: August 29, 2023
    Assignee: NANJING UNIVERSITY OF AERONAUTICS AND ASTRONAUTICS
    Inventors: Xiaoming Qian, Peihuang Lou, Xinhao Wang
  • Patent number: 11736818
    Abstract: Embodiments disclosed herein include a diagnostic substrate, comprising a baseplate, and a first plurality of image sensors on the baseplate, where the first plurality of image sensors are oriented horizontal to the baseplate. In an embodiment, the diagnostic substrate further comprises a second plurality of image sensors on the baseplate, where the second plurality of image sensors are oriented at a non-orthogonal angle to the baseplate. In an embodiment, the diagnostic substrate further comprises a printed circuit board (PCB) on the baseplate, and a controller on the baseplate, where the controller is communicatively coupled to the first plurality of image sensors and the second plurality of image sensors by the PCB. In an embodiment, the diagnostic substrate further comprises a diffuser lid over the baseplate, the PCB, and the controller.
    Type: Grant
    Filed: February 9, 2022
    Date of Patent: August 22, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Upendra Ummethala, Philip Kraus, Keith Berding, Blake Erickson, Patrick Tae, Devendra Channappa Holeyannavar, Shivaraj Manjunath Nara, Anandakumar Parameshwarappa, Sivasankar Nagarajan, Dhirendra Kumar
  • Patent number: 11734622
    Abstract: A method, apparatus and device for determining production capacity boundaries are provided. In the method, related data for producing a run size of elements by a production device lot by lot is acquired and time intervals between production ending time points of adjacent lots are determined according to the related data; the determined time intervals are sorted to obtain a time interval sequence; distribution features of time intervals at two boundaries are parsed respectively to determine whether a data removing condition is satisfied; if Yes, an outlier is determined according to a mean value of the present time interval sequence, the time interval of the extraction step length where the outlier is located is removed, and whether the data removing condition is satisfied is determined; and if No, production capacity boundaries are determined according to minimum and maximum time intervals of the present time interval sequence and the run size.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: August 22, 2023
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Jianping Wang, Xiao Wang, Jinjin Cao
  • Patent number: 11726409
    Abstract: A substrate processing system includes: a measuring unit provided detachably with respect to a placement portion of a placement stage; a measuring jig for measuring a processing liquid; a liquid processing unit including a supplier which supplies the processing liquid to the measuring jig; a transfer mechanism for transferring the measuring jig between the measuring unit and the liquid processing unit; and a controller. The controller executes: a process of transferring the measuring jig in the measuring unit from the measuring unit to the liquid processing unit; a process of ejecting the processing liquid from the supplier to the measuring jig; a third process of transferring the measuring jig from the liquid processing unit to the measuring unit; and a fourth process of calculating an ejection amount of the processing liquid based on a measurement value in the measuring unit.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: August 15, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yuichiro Kunugimoto, Shota Ueyama, Akihiro Teramoto, Yuta Nishiyama, Shinichi Hatakeyama
  • Patent number: 11718914
    Abstract: An apparatus for controlling precursor flow. The apparatus may include a processor; and a memory unit coupled to the processor, including a flux control routine. The flux control routine may be operative on the processor to monitor the precursor flow and may include a flux calculation processor to determine a precursor flux value based upon a change in detected signal intensity received from a cell of a gas delivery system to deliver a precursor.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: August 8, 2023
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Elaina Babayan, Sarah White, Vijay Venugopal, Jonathan Bakke
  • Patent number: 11720033
    Abstract: A method includes: storing a carrier containing material in a storage; recording environmental data of the storage to a database while the material is in the storage; generating a forecast for the material in the carrier based on the environmental data; receiving a request for the material from a semiconductor fabrication tool; and providing the carrier to the semiconductor fabrication tool based on the forecast.
    Type: Grant
    Filed: September 15, 2021
    Date of Patent: August 8, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Rong-Syuan Fan, Ching-Jung Chang, Chi-Feng Tung, Hsiang-Yin Shen
  • Patent number: 11714097
    Abstract: A system and a method are disclosed for aligning process data to a flow of material in a manufacturing process. That is, the disclosed embodiments enable tracking of material as that material travels (e.g., via a transportation mechanism such as a conveyor belt) between various processing devices in the manufacturing process. Each processing device may include one or more sensors. For example, the disclosed system and method enable tracking the same material over different manufacturing steps.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: August 1, 2023
    Assignee: THINKIQ, INC.
    Inventors: Douglas C. Lawson, Niels Andersen
  • Patent number: 11709420
    Abstract: A design method of a metal mask, a manufacturing method of the metal mask and a computer-readable storage medium are provided. The design method of a metal mask includes: calculating amounts of deformations of the metal mask in two directions perpendicular to each other based on a stretching force of the metal mask in use and deformation properties of the metal mask in the two directions; and compensating the deformations of the metal mask in the two directions by compensation amounts for the deformations, which are identical and opposite to the amounts of the deformations of the metal mask in the two directions, respectively.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: July 25, 2023
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jianpeng Wu, Weiwei Ding, Zhongying Yang, Chang Luo
  • Patent number: 11709432
    Abstract: A method for characterizing post-processing data in terms of individual contributions from processing stations, the post-processing data relating to a manufacturing process for manufacturing integrated circuits on a plurality of substrates using a corresponding processing apparatus for each of a plurality of process steps, at least some of the processing apparatuses each including a plurality of the processing stations, and wherein the combination of processing stations used to process each substrate defines a process thread for the substrate; the method including: obtaining post-processing data associated with processing of the plurality of substrates in a cyclic sequence of processing threads; and determining an individual contribution of a particular processing station by comparing a subset of the post-processing data corresponding to substrates having shared process sub-threads, wherein a process sub-thread describes the process steps of each process thread other than the process step to which the particu
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: July 25, 2023
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Wim Tjibbo Tel, Ekaterina Mikhailovna Viatkina, Tom Van Hemert
  • Patent number: 11703840
    Abstract: A dimension tolerance determining method and a system are disclosed. The method includes: determining initial tolerances of parts in assembled product; generating a plurality of tolerance data sets according to initial tolerances of parts, each tolerance data set containing a calculated part tolerance of each part; inputting the plurality of tolerance data sets into a key parameter generation module to generate a plurality of key parameters corresponding to the assembled product, wherein each key parameter corresponds to one tolerance data set; when the key parameters are located within a design range, calculating a plurality of assembly yield rates based on the tolerance data sets corresponding to the key parameters located within the design range; and selecting the tolerance data set corresponding to one of the assembly yield rates as the tolerances of the parts in the assembled product; wherein the key parameter generation module includes a neural network model.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: July 18, 2023
    Inventor: Jhong-Yi Lin
  • Patent number: 11698877
    Abstract: Embodiments of the present invention provide a connecting apparatus and a system. The connecting apparatus includes N interconnection units, M line processing units, and X switch processing units, where each interconnection unit is connected to at least one switch processing unit, each switch processing unit is connected to only one interconnection unit, each interconnection unit is connected to the M line processing units, each line processing unit is connected to the N interconnection units, M is a positive integer, N is a positive integer, and X is greater than or equal to N. In addition, the embodiments of the present invention further provide another connecting apparatus and system. According to the foregoing technical solutions, a connecting mode between an LPU and an SPU is relatively flexible.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: July 11, 2023
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Chongyang Wang, Jun Zhang
  • Patent number: 11694876
    Abstract: Embodiments of the present disclosure generally relate to a system used in a semiconductor device manufacturing process. More specifically, embodiments provided herein generally include apparatus and methods for synchronizing and controlling the delivery of an RF bias voltage signal and a pulsed voltage waveform to one or more electrodes within a plasma processing chamber. Embodiments of the disclosure include a method and apparatus for synchronizing a pulsed radio frequency (RF) waveform to a pulsed voltage (PV) waveform, such that the pulsed RF waveform is on during a first stage of the PV waveform and off during a second stage. The first stage of the PV waveform includes a sheath collapse stage. The second stage of the PV waveform includes an ion current stage.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: July 4, 2023
    Assignee: Applied Materials, Inc.
    Inventors: James Rogers, Katsumasa Kawasaki
  • Patent number: 11687007
    Abstract: A method for categorizing a substrate subject to a semiconductor manufacturing process including multiple operations, the method including: obtaining values of functional indicators derived from data generated during one or more of the multiple operations on the substrate, the functional indicators characterizing at least one operation; applying a decision model including one or more threshold values to the values of the functional indicators to obtain one or more categorical indicators; and assigning a category to the substrate based on the one or more categorical indicators.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: June 27, 2023
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Arnaud Hubaux, Johan Franciscus Maria Beckers, Dylan John David Davies, Johan Gertrudis Cornelis Kunnen, Willem Richard Pongers, Ajinkya Ravindra Daware, Chung-Hsun Li, Georgios Tsirogiannis, Hendrik Cornelis Anton Borger, Frederik Eduard De Jong, Juan Manuel Gonzalez Huesca, Andriy Hlod, Maxim Pisarenco
  • Patent number: 11682156
    Abstract: A realistic feather growth may be represented between two surface manifolds in a modeling system. To perform the feather growth, a feather groom for a plurality of feathers between an inner shell of a creature and an outer shell of the creature is received. An inner manifold for the inner shell and an outer manifold for the outer shell is determined with a plurality of follicle points and a plurality of tip points. A first surface contour definition for the inner manifold and a second surface contour definition for the outer manifold is determined and used to determine a volumetric vector field between the inner manifold and the outer manifold. Thereafter, the plurality of feathers is generated between the inner manifold and the outer manifold using the follicle points, the tip points, and the volumetric vector fields.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: June 20, 2023
    Assignee: Unity Technologies SF
    Inventor: Christoph Sprenger
  • Patent number: 11676066
    Abstract: Example artificial intelligence systems and methods provide parallel storage of data to primary storage and notification to a model server supported by the primary storage. A primary storage system receives operations on a training data set from a model trainer and sends a model instance of a computational model to a model server. When a new data element is received by a data ingester, the model server is initiated to evaluate the new data element using the model instance while the primary storage system stores the new data element in parallel.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: June 13, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventor: Sanhita Sarkar
  • Patent number: 11675275
    Abstract: A positioning method for particles on a reticle includes: data of positions passed by a target reticle within a preset period of time is determined according to path data of the target reticle that includes particle information of the target reticle at each scan moment; position information of the target reticle when particles are present on a surface of the target reticle is determined according to the data of positions, to obtain target position data of the target reticle; reticle position data of the target reticle within adjacent scan moments is determined according to the target position data, and a particle source position of the particles on the surface of the target reticle is determined from the reticle position data according to position priorities; and a particle position analysis report of the target reticle within the preset period of time is generated according to the particle source position.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: June 13, 2023
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Shuang Xia
  • Patent number: 11669710
    Abstract: Processing raw data stored in an historian device for determining an amount of products passed through a process element in a process control environment is described. A count value is incremented by a counter at a rate at which products pass through the process element. The count value rolls over to zero when the count value reaches a rollover value R. An historian device periodically receives count value data points from the counter. A deadband value D is set in the historian device for distinguishing between rollovers, resets, and reversals. A client device queries the historian device for an amount of products passed through the process element for a timeframe. The historian device selects a set of count value data points from within the queried timeframe. The historian device determines, based on the selected data points and their quality, an amount of products passed through the process element.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: June 6, 2023
    Assignee: AVEVA SOFTWARE, LLC
    Inventors: Vinay T. Kamath, Yevgeny Naryzhny, Alexander Vasilyevich Bolotskikh, Abhijit Manushree, Elliott Middleton, Bala Kamesh Sista
  • Patent number: 11669079
    Abstract: A method of evaluating tool health of a plasma tool is provided. The method includes providing a virtual metrology (VM) model that predicts a wafer characteristic based on parameters measured by module sensors and in-situ sensors of the plasma tool. A classification model is provided that identifies a plurality of failure modes of the plasma tool. An initial test is performed on an incoming wafer to determine whether the incoming wafer meets a preset requirement. The wafer characteristic is predicted using the VM model when the incoming wafer meets the preset requirement. A current failure mode is identified using the classification model when the wafer characteristic predicted by using the VM model is outside a pre-determined range.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: June 6, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Jun Shinagawa, Toshihiro Kitao, Hiroshi Nagahata, Chungjong Lee
  • Patent number: 11663391
    Abstract: Aspects of the invention include systems and methods for implementing a CMOS circuit design that uses a sea-of-gates fill methodology to provide latch-up avoidance. A non-limiting example computer-implemented method includes identifying a fill cell in the circuit design. The fill cell can include a power rail, a ground rail, and a field-effect transistor (FET) electrically coupled to the power rail through a via. The method can include disconnecting the via from the power rail and moving the via to a disconnected node in the fill cell. Moving the via decouples a source or drain of the fill cell from a well of the fill cell, preventing latch-up while maintaining via and metal shape density.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: May 30, 2023
    Assignee: International Business Machines Corporation
    Inventors: David Wolpert, Ryan Michael Kruse, Leon Sigal, Richard Edward Serton, Matthew Stephen Angyal, Terence Hook, Richard Andre Wachnik
  • Patent number: 11657207
    Abstract: A method comprises receiving an integrated circuit (IC) chip design, and generating, by one or more processors, a wafer image and a wafer target from the IC chip design. The method further comprises generating, by the one or more processors, sensitivity information based on a determination that the wafer image and the wafer target converge, and outputting the sensitivity information. The sensitivity information is associated with writing a mask written for the IC chip design.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: May 23, 2023
    Assignee: Synopsys, Inc.
    Inventor: Thomas Cecil
  • Patent number: 11651997
    Abstract: A recognition method of a kerf includes a bonding step of bonding a workpiece to a dicing tape greater in size than the workpiece, a pre-machining imaging step of imaging an optimal region of the dicing tape where the workpiece is not bonded, a kerf forming step of forming a kerf in the optimal region by a cutting machine, a post-machining imaging step of imaging the optimal region with the kerf formed therein, and a recognition step of comparing intensities of light received at each two corresponding pixels in respective images of the optimal region as acquired by the pre-machining imaging step and the post-machining imaging step, subtracting the each two pixels where intensities of received light are the same, and recognizing as the kerf a region formed by the remaining pixels.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: May 16, 2023
    Assignee: DISCO CORPORATION
    Inventor: Satoshi Miyata
  • Patent number: 11645796
    Abstract: An information processing apparatus configured to control display on a user interface includes an acquisition unit configured to acquire recipe data regarding a processing condition of a substrate processing apparatus configured to process a substrate and layout data regarding a layout of a processed portion of the substrate processed by the substrate processing apparatus, and a display control unit configured to perform control to display, on the user interface, information regarding the layout data and information regarding the recipe data related to the layout data, the layout data and the recipe data being acquired by the acquisition unit, in association with each other.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: May 9, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventor: Masahiro Kimura
  • Patent number: 11644816
    Abstract: Real-time intervention of an industrial process can include searching for a batch of candidate configurations for use by the industrial process, the batch of candidate configurations searched for by performing a batch Bayesian optimization (BBO). The batch of candidate configurations is transmitted to the industrial process to use in running the industrial process. A result of the run is received from the industrial process. Using the result in the BBO, a next batch of candidate configurations is searched. Whether a stopping criterion is met is determined, based on the next batch of candidate configurations and by applying a function to a BBO acquisition score. Responsive to determining that the stopping criterion is met, searching for the next batch of candidates is terminated.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: May 9, 2023
    Assignee: International Business Machines Corporation
    Inventors: Edward Oliver Pyzer-Knapp, Clyde Fare
  • Patent number: 11637043
    Abstract: Methods, systems, and non-transitory computer readable medium are described for generating assessment maps for corrective action. A method includes receiving a first vector map including a first set of vectors each indicating a distortion of a particular location of a plurality of locations on a substrate. The method further includes generating a second vector map including a second set of vectors by rotating a position of each vector in the first set of vectors. The method further includes generating a third vector map including a third set of vectors based on vectors in the second set of vectors and corresponding vectors in the first set of vectors. The method further includes generating a fourth vector map by subtracting each vector of the third set of vectors from a corresponding vector in the first set of vectors. The fourth vector map indicates a planar component of the first vector map.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: April 25, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Wenjiao Wang, Joshua Maher, Xinhai Han, Deenesh Padhi, Tza-Jing Gung
  • Patent number: 11635743
    Abstract: A method to set up the parameters of solder paste screen printer while in a new product introduction (NPI). The method includes establishing a solder-printing database of a predetermined product and a database of different specifications of products, and training a first prediction model by reference to a solder paste screen printer (SPSP) and a solder paste inspection (SPI) based on the solder-printing database. A second prediction model is trained by reference to the SPI based on the database of different products. The method further includes predicting parameters for products with different specifications under multiple sets of printing parameters based on the first and second prediction models. An objective function based on the predicted measurements is established, and a specification of a product and a printing expectation parameters are input to the objective function for outputting many sets of printing-suggestion parameters of the new product.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: April 25, 2023
    Assignee: Fulian Precision Electronics (Tianjin) Co., LTD.
    Inventors: Yi-Ru Chen, Han-Ting Hsu, Hsueh-Fang Ai
  • Patent number: 11636243
    Abstract: A method and a system for recording an integrated circuit version are provided. The method is adapted to a register in an integrated circuit, which includes the following steps: recording the integrated circuit version with N bits, in which N is an integer greater than 1; and amending only a bit value of at least one bit selected from the N bits that have not been used for denoting any past integrated circuit version each time when the integrated circuit is revised.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: April 25, 2023
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventor: Chung-Chang Lin
  • Patent number: 11635338
    Abstract: Methods and apparatus for detecting a vacuum leak within a processing chamber are described herein. More specifically, the methods and apparatus relate to the utilization of a spectral measurement device, such as a spectral gauge, to determine the leak rate within a process chamber while the process chamber is held at a leak test pressure. The spectral measurement device determines the rate of increase of one or more gases within the processing chamber and can be used to determine if the processing chamber passes or fails the leak test.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: April 25, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Martin A. Hilkene, Surendra Singh Srivastava
  • Patent number: 11630115
    Abstract: A sample testing system comprising: a transporting apparatus; a testing apparatus for obtain a sample and performing testing on the obtained sample; and a controller. The controller executes operation of: controlling the transporting apparatus so as to transport the sample rack in first direction, such that each sample container held in a sample rack is transported to a obtaining position on which the testing apparatus obtains a sample and then the sample rack is transported toward the second position; changing, when retesting of a sample contained in a sample container is necessary, the transporting direction from the first direction to second direction, and then controlling the transporting apparatus so as to transport the sample container accommodating the sample, for which retesting is necessary, to the obtaining position again. Sample testing method and a computer program product are also disclosed.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: April 18, 2023
    Assignee: SYSMEX CORPORATION
    Inventors: Yuichi Hamada, Daigo Fukuma
  • Patent number: 11625520
    Abstract: A method involving obtaining a resist deformation model for simulating a deformation process of a pattern in resist, the resist deformation model being a fluid dynamics model configured to simulate an intrafluid force acting on the resist, performing, using the resist deformation model, a computer simulation of the deformation process to obtain a deformation of the developed resist pattern for an input pattern to the resist deformation model, and producing electronic data representing the deformation of the developed resist pattern for the input pattern.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: April 11, 2023
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Chrysostomos Batistakis, Scott Anderson Middlebrooks, Sander Frederik Wuister
  • Patent number: 11625010
    Abstract: A process control system for controlling a process including a plurality of sub-processes, the process control system including a plurality of control modules each associated with one of the plurality of sub-processes. At least one of the plurality of control modules includes a model, a communicator, and a controller. The model includes a sub-process model defining a relationship between variables of the associated sub-process, and an inter-sub-process model defining a relationship between a variable of another sub-process and at least one of the variables of the associated sub-process. The communicator communicates with control module associated with the another sub-process to determine an updated value for the variable of the another sub-process. The controller uses the model and the updated value to determine a control signal for adjusting a manipulated variable of the associated sub-process. The process control method is also provided that is performed by the process control system.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: April 11, 2023
    Assignee: SPIRO CONTROL LTD
    Inventors: Patrick John Thorpe, Shabroz Gill
  • Patent number: 11626309
    Abstract: A substrate treating method includes measuring an alignment state of a substrate placed on a hand of a transfer unit that transfers the substrate, transferring the substrate to a substrate alignment unit by the transfer unit when the alignment state of the substrate is faulty, aligning a location of the substrate by the substrate alignment unit, and temporarily correcting the location of the substrate before the substrate is loaded on the substrate alignment unit when it is measured in the measuring of the alignment state that the alignment state of the substrate exceeds a sensor reading range.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: April 11, 2023
    Assignee: SEMES CO., LTD.
    Inventor: Jun Ho You
  • Patent number: 11612981
    Abstract: Provided is a substrate processing apparatus. The substrate processing apparatus comprises a polishing table; a polishing pad disposed on an upper surface of the polishing table; a conditioner including a conditioner head, a disk holder movably coupled to the conditioner head in a vertical direction, and a conditioning disk mounted to the disk holder and in contact with the polishing pad; and a thickness measuring unit of obtaining the thickness of the polishing pad from the relative moving distance of the disk holder with respect to the conditioner head, wherein the information of the relative moving distance is received from sensing unit.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: March 28, 2023
    Assignee: KCTECH CO., LTD.
    Inventor: Huiseong Che
  • Patent number: 11609836
    Abstract: An operation method and an operation device of a failure detection and classification (FDC) model are provided. The operation method of the FDC model includes the following steps. A plurality of raw traces are continuously obtained. If the raw traces have started to be changed from the first waveform to the second waveform, whether at least N pieces in the race traces have been changed to the second waveform is determined. If at least N pieces in the raw traces have been changed to the second waveform, the raw traces which have been changed to the second waveform are automatically segmented to obtain several windows. An algorithm is automatically set for each of the windows. Through each of the algorithms, an indicator of each of the windows is obtained. The FDC model is retrained based on these indicators.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: March 21, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Pei Lin, Ji-Fu Kung, Te-Hsuan Chen, Yi-Lin Hung
  • Patent number: 11609263
    Abstract: A failure pattern obtaining method and apparatus are provided. The method includes that: a chip test result picture for a wafer is obtained, the chip test result picture being marked with a plurality of failure test points; a vector for every two points among all failure test points is calculated; a plurality of failure test points having a same vector are designated as a same group; a plurality of pending failure patterns are separated from each of groups; a failure pattern is obtained based on the plurality of the pending failure patterns.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: March 21, 2023
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Chiasheng Lin
  • Patent number: 11596071
    Abstract: An apparatus for producing a printed circuit board on a substrate, has a table for supporting the substrate, a function head configured to effect printing conductive and non-conductive materials on the substrate, a positioner configured to effect movement of the function head relative to the table, and a controller configured to operate the function head and the positioner to effect the printing of conductive and non-conductive materials on the substrate. The apparatus optionally has a layout translation module configured to convert PCB files or multilayer PCB files to printing data for controlling the function head to print conductive material and nonconductive material onto the substrate. The apparatus has a testing head to verify conductors which operates automatically. The translation module also prints nonconductive material component alignment areas and nonconductive material substrate stiffeners.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: February 28, 2023
    Assignee: BOTFACTORY INC.
    Inventors: Michael Knox, Andrew Ippoliti, Georgios Kyriakou, Carlos Ospina, Nicolas Vansnick
  • Patent number: 11584552
    Abstract: A component mounting system including: a component mounting device group in which a plurality of component mounting devices that mount components supplied to a board transported in from an upstream side by a tape feeder and transport out the board to a downstream side, and cut a carrier tape after supplying the components by a cutter device and discharge scraps of carrier tape, are installed on a floor surface while being arranged in a direction of conveying the board; a main conveyor that is installed along an arrangement direction of the plurality of component mounting devices in a region on the floor surface under the component mounting device group, and transports the scraps of carrier tape discharged from each of the plurality of component mounting devices; and a scraps storage that is installed outside the region and stores the scraps of carrier tape transported by the main conveyor.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: February 21, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hiroki Kobayashi, Naoki Azuma, Chikara Takata, Yuzo Asano, Toru Chikuma, Hiroshi Satoh
  • Patent number: 11587804
    Abstract: A component mounting system for mounting a component on a substrate, the mounting system comprising a component supplying unit configured to supply the component; a substrate holding unit configured to hold the substrate in an orientation such that a mounting face for mounting the component on the substrate is facing vertically downward; a head configured to hold the component from vertically below; and a head drive unit that, by causing vertically upward movement of the head holding the component, causes the head to approach the substrate holding unit to mount the component on the mounting face of the substrate.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: February 21, 2023
    Assignee: BONDTECH CO., LTD.
    Inventor: Akira Yamauchi
  • Patent number: 11573872
    Abstract: In various examples, one or more components or regions of a processing unit—such as a processing core, and/or component thereof—may be tested for faults during deployment in the field. To perform testing while in deployment, the state of a component subject to test may be retrieved and/or stored during the test to maintain state integrity, the component may be clamped to communicatively isolate the component from other components of the processing unit, a test vector may be applied to the component, and the output of the component may be compared against an expected output to determine if any faults are present. The state of the component may be restored after testing, and the clamp removed, thereby returning the component to its operating state without a perceivable detriment to operation of the processing unit in deployment.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: February 7, 2023
    Assignee: NVIDIA Corporation
    Inventors: Jonah Alben, Sachin Idgunji, Jue Wu, Shantanu Sarangi
  • Patent number: 11576045
    Abstract: Systems, methods, devices and software for operating particle sampling devices in a user-restrictive manner include a tag and a particle sampling device. The device includes a tag reader and a processor in communication with the tag reader. The processor: receives device configuration data and reads operational and/or user data from the tag having that data encoded thereon. Based on the data read from the tag, the processor may either grant or deny access to a user for performing device operations. Alternatively, for a headless particle sampling device configured for minimal user interaction during operation, the device is removably attached to a supporting structure proximate the tag positioned in or on the supporting structure. In the headless configuration, the processor reads device configuration parameters including network communication information from the tag following device power up.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: February 7, 2023
    Assignee: PARTICLE MEASURING SYSTEMS, INC.
    Inventors: Matt Michaelis, Daniele Pandolfi, Brett Haley
  • Patent number: 11556119
    Abstract: A method to simulate operations of a manufacture plant comprising a plurality of machines, the method including receiving a capacity function and an elapsed time function associated with a first machine of the plurality of machines, wherein the capacity function and elapsed time function is defined by one or more parameters characterizing the first machine, receiving a record of historical production data associated with the first machine, calculating, based on the capacity function and the record of historical production data, an augmented capacity function and an augmented elapsed time function that is defined by the one or more parameters and a quantity relating to parts waiting for processing (WIP), and simulating the operations of the plant based on the augmented capacity function and augmented elapsed time function.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: January 17, 2023
    Inventor: Weiping Shi
  • Patent number: 11548070
    Abstract: An additive manufacturing system includes an ultrasonic inspection system integrated in such a way as to minimize time needed for an inspection process. The inspection system may have an ultrasonic phased array integrated into a build table for detecting defects in each successive slice of a workpiece and such that each slice may be re-melted if and when defects are detected.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: January 10, 2023
    Assignee: Raytheon Technologies Corporation
    Inventors: Anton I. Lavrentyev, Alexander Staroselsky, Sergey Mironets
  • Patent number: 11549183
    Abstract: Provided are gas distribution apparatus with a showerhead having a front plate and a back plate spaced to form a gas volume, the front plate having an inner surface adjacent the gas volume and an outer surface with a plurality of apertures extending therethrough, the gas volume having a center region and an outer region; a first inlet in fluid communication with the center region of the gas volume, the inlet having an inside and an outside; and a mixer disposed on the inside of the inlet to increase gas flow temperature. Also provided are processing chamber apparatus and methods of depositing a film.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: January 10, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Ashutosh Agarwal, Sanjeev Baluja, Dhritiman Subha Kashyap, Kartik Shah, Yanjun Xia
  • Patent number: 11537904
    Abstract: A framework for assessing technical feasibility of additive manufacturing of an engineering design. This framework needs to be based on preliminary identification of key parameters that influence the decision making process. The parameters may also be customized for a particular application. Each of these parameters can be assigned weightage either relative or arrived at by paired comparison using a pre-determined minimum point method. Each of the attributes are then assigned scores which are then multiplied by the weightages assigned. The summation of all such scores on a weighted average basis indicates the potential for 3D printing of that part or assembly. It offers to select the right part to leverage the benefit of additive manufacturing. It narrows down on the ideal manufacturing process for the qualified parts and proposes to reduce subjectivity by using paired comparison of attributes. It also provides a faster assessment of technical aspects of the design.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: December 27, 2022
    Assignee: TATA CONSULTANCY SERVICES LIMITED
    Inventors: Sukhdev Balaji, Goutham Pathuri, Ankur Krishna, Pramod Ramdas Zagade, Arockiam Daniel
  • Patent number: 11538237
    Abstract: A device trains a classification model with defect classifier training data to generate a trained classification model and processes information indicating priorities and rework efforts for defects, with a Pareto analysis model, to select a set of classes for the defects. The device calculates defect scores for the set of the classes and selects a particular class, from the set of the classes, based on the defect scores. The device processes a historical data set for the particular class to identify a root cause corrective action (RCCA) recommendation and processes information indicating a defect associated with the particular class, with the trained classification model, to generate a predicted RCCA recommendation for the defect. The device processes the predicted RCCA recommendation and the RCCA recommendation, with a linear regression model, to determine an effectiveness score for the predicted RCCA recommendation and retrains the classification model based on the effectiveness score.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: December 27, 2022
    Assignee: Accenture Global Solutions Limited
    Inventors: Vidya Rajagopal, Gaurav Mengi, Marin Grace Mercylawrence, Bijayani Das
  • Patent number: 11531324
    Abstract: The preferred embodiments described below include methods, systems and computer readable media for cross discipline data validation checking in a multidisciplinary system. One or more multidisciplinary validation rules are used to perform cross discipline data validation checking to determine whether multidisciplinary data is consistent across engineering disciplines. The multidisciplinary validation rules define the scope of the validation checking within the engineering application (307) associated each engineering discipline. The results of the validation check are provided to the user.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: December 20, 2022
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Oswin Noetzelmann, Rami Reuveni, Attila Labas, Marine Durel, Daniela Stederoth, Reinhard Simon, Andrew Dylla, Victor Robert Hambridge
  • Patent number: 11520319
    Abstract: In a board production line having multiple work devices arranged to transfer a board from upstream to downstream and perform a predetermined operation on the board, the board production line comprising: a shared folder having storage areas configured to store board-related information, the storage areas being multiply divided according to the number of the work devices, and transferring the board-related information among the storage areas, in conjunction with transferring the board, with a first work device capable of accessing the storage areas among the multiple work devices, and a management proxy section configured to access the shared folder in place of a second work device which cannot access the storage areas, and configured to manage the board-related information so that the board-related information can be transferred among the storage areas.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: December 6, 2022
    Assignee: FUJI CORPORATION
    Inventors: Yoshiharu Tanizawa, Toshiya Suzuki, Masahiro Takeda
  • Patent number: 11520963
    Abstract: A system and method for formulating a sequential equivalency problem for fault (non)propagation with minimal circuit logic duplication by leveraging information about the location and nature of a fault. The system and method further apply formal checking to safety diagnoses and efficiently models simple and complex transient faults.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: December 6, 2022
    Assignee: ONESPIN SOLUTIONS GMBH
    Inventors: Dominik Strasser, Jörg Grosse, Jan Lanik, Raik Brinkmann
  • Patent number: 11507067
    Abstract: A method is disclosed that includes the operations below: determining, by a processing unit, that arrival times of a lot arrived at N process stages are less than processing times of the lot predetermined to be processed at the N process stages, N being a positive integer; comparing, by the processing unit, idle times of multiple tools in the N process stages; and processing the lot with a first tool of the tools at each one of the N process stages, wherein the first tool of the tools has a shortest idle time.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: November 22, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ren-Chyi You, An-Wei Peng, Chang-Zong Liu, Yuang-Tsung Chen
  • Patent number: 11508578
    Abstract: A process for preparing a support comprises the placing of a substrate on a susceptor in a chamber of a deposition system, the susceptor having an exposed surface not covered by the substrate; the flowing of a precursor containing carbon in the chamber at a deposition temperature so as to form at least one layer on an exposed face of the substrate, while at the same time depositing species of carbon and of silicon on the exposed surface of the susceptor. The process also comprises, directly after the removal of the substrate from the chamber, a first etch step consisting of the flowing of an etch gas in the chamber at a first etching temperature not higher than the deposition temperature so as to eliminate at least some of the species of carbon and silicon deposited on the susceptor.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: November 22, 2022
    Assignee: Soitec
    Inventor: Young-Pil Kim