Plural Processors Patents (Class 700/2)
  • Publication number: 20030088319
    Abstract: The invention relates to a supervisory control apparatus in which events that occur in the individual sections of equipment or a system having a hierarchical structure are identified and used for its maintenance and operation. An object of the invention is to increase the efficiency and the flexibility of supervisory control without altering the hardware configuration. For this purpose, the invention provides a supervisory control apparatus in which immediately lower-rank components to which an event that has occurred in each of a plurality of components may spread are registered in advance. A particular status that an event occurred in a higher-rank component has spread to all lower-rank components is individually registered based on an iterative algorithm. An event occurred in a component where such a particular status is registered is negated.
    Type: Application
    Filed: December 5, 2002
    Publication date: May 8, 2003
    Inventor: Yoshihiko Kanai
  • Publication number: 20030083755
    Abstract: The invention concerns a method of processing a request for obtaining multimedia digital data, said request having a number of descriptors characterizing it, characterized in that said method has the following steps:
    Type: Application
    Filed: October 28, 2002
    Publication date: May 1, 2003
    Applicant: Canon Kabushiki Kaisha
    Inventors: Franck Denoual, Gildas Cotten, Lilian Labelle
  • Publication number: 20030083754
    Abstract: A method for communicating process data between a plurality of devices in a process control system, including receiving process data in an equipment interface system data format from an equipment interface system, and selecting a set of the process data received from the equipment interface system for communication to a process data control system. The method also includes configuring the selected set of process data from the equipment interface system data format into an open format for communication to the process data control system, and transmitting the configured process data to the process data control system.
    Type: Application
    Filed: June 5, 2002
    Publication date: May 1, 2003
    Inventors: Ashok R. Tripathi, Muthukumar Ramalingam, David Rukstales
  • Publication number: 20030078678
    Abstract: In an autonomous cooperative control system a job description of job steps is drafted in a scripting language and compared to corresponding machine steps associated with each independently controlled machine also drafted in the same scripting language for simple comparison and generation of sub-bids for further bidding. The machine steps generated for each ACU provides a vocabulary for the job description language which may be further simplified by hiding lower level machine steps in the ACUs to be activated only upon a matching with a job step. The ACUs may select between connected and unconnected messaging based on historical communication patterns to reduce network traffic.
    Type: Application
    Filed: September 12, 2002
    Publication date: April 24, 2003
    Inventors: Francisco Paul Maturana, Sivaram Balasubramanian, Raymond John Staron, Pavel Tichy, Petr Slechta
  • Publication number: 20030074109
    Abstract: Disclosed is an automatic control system using a power line communication method. The automatic control system comprises an operating module having an operating program; a power line communication module connected to the operating module; and an automatic control module connected to the power line communication module through a power line and adapted to control external appliances by means of a control signal supplied thereto from the operating module. The operating module receives and processes a signal from external appliances through the automatic control module, or generate an appliance control signal for transmission to the automatic control module, thereby implementing a low-speed power line communication together with the automatic control module through the power line communication module. The automatic control system may remotely control or monitor various electric appliances through an Internet network using a conventional power line.
    Type: Application
    Filed: May 24, 2002
    Publication date: April 17, 2003
    Inventors: Jong Min Jeong, Young Goo Kang, Chong Soo Kim
  • Publication number: 20030069648
    Abstract: The present invention relates to a system and method for tracking, monitoring, and managing equipment. An embodiment of the system for monitoring and managing equipment comprises: one or more mobile pieces of equipment; one or more fixed pieces of equipment; a central processing system; and one or more means for communicating data between said equipment and said central processing system. The data may be location or status data, in particular real-time data about the equipment.
    Type: Application
    Filed: September 10, 2002
    Publication date: April 10, 2003
    Inventors: Barry Douglas, Dan Pohly
  • Publication number: 20030069649
    Abstract: A triple redundant control device, including, first to third control units, each outputting corresponding one of first to third control signals, and outputting corresponding one of first to third control stop signals when corresponding one of the first to third control units stops, first to third higher value selector switches, each receiving corresponding one of the first to third control signals and corresponding one of the first to third control stop signals, outputting corresponding one of the first to third control signals, and changing output into a signal associated to a value being higher than values of the first to third control signals when the corresponding one of first to third operation stop signal is inputted, a medium value gate receiving signals outputted from the first to third higher value selector switches, selecting and outputting a medium value of values corresponding to the first to third control signals, and a signal selector receiving the first to third control signals and a signal out
    Type: Application
    Filed: September 10, 2002
    Publication date: April 10, 2003
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Masayoshi Tahira
  • Patent number: 6544228
    Abstract: The infusion device comprises a central controller (10) and a plurality of infusion apparatus (12) each connected via a data channel (15) with the controller (10). Each infusion apparatus (12) is provided with a unique identification number. When an infusion apparatus (12) is connected to the controller (10) the identification number is requested and the controller (10) checks whether this identification number has already been allocated. If this is not the case, the controller (10) sends the inverted identification number back to the infusion apparatus (12). The infusion apparatus (12) accepts commands from the controller (10) only if the returned signal corresponds to the identification number.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: April 8, 2003
    Assignee: B. Braun Melsungen AG
    Inventor: Rolf Heitmeier
  • Publication number: 20030065412
    Abstract: A method of executing a plurality of steps that are performed sequentially in temporal order under computer control is provided wherein a central processing computer and a plurality of terminal computers are provided. Each of the plurality of steps is executed by one of the terminal computers. When one of the terminal computers assigned to a single step has completed the work in the step assigned to it and is able to execute the work in the next step, that terminal computer sends a work completion signal to the central processing computer. The central processing computer receives this work completion signal and prepares a work item notice that indicates that the next step can be started, such that the notice can be displayed on the screen of the terminal computer used for the next step. The terminal computer used for the next step allows the work item notice displayed on its display screen to be clicked to start work on the next step assigned to it.
    Type: Application
    Filed: November 12, 2002
    Publication date: April 3, 2003
    Applicant: INCS Inc.
    Inventors: Shinjiro Yamada, Seiki Sato, Katsunori Shimomura, Tomohito Ohmori, Michiyo Kuwabara, Keiji Okamoto, Katsuji Iwasaki, Hidenori Sasaki
  • Publication number: 20030060898
    Abstract: In an ordered semaphore management system a pending state allows threads not competing for a locked semaphore to bypass one or more threads waiting for the same locked semaphore. The number of pending levels determines the number of consecutive threads vying for the same locked semaphore which can be bypassed. When more than one level is provided the pending levels are prioritized in the queued order.
    Type: Application
    Filed: September 19, 2002
    Publication date: March 27, 2003
    Applicant: International Business Machines Corporation
    Inventors: Steven Kenneth Jenkins, Ross Boyd Leavens, Robert Brian Likovich, Wesley Erich Queen, Michael Steven Siegel
  • Patent number: 6532406
    Abstract: A vehicle computer arrangement, particularly for a motor vehicle, a train, an airplane or a ship, which is provided with at least two computers (10, 20) and at least one data bus (60) via which the at least two computers (10, 20) are interconnected, and in which at least one monitoring circuit (40) is arranged between a first computer (10) and a second computer (20) of the at least two computers, the monitoring circuit checking whether a data exchange between the first and the second computer is permitted for data processed or to be processed in the first or the second computer, and blocking the data exchange in the event that it is not permitted for the monitored data.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: March 11, 2003
    Assignee: Robert Bosch GmbH
    Inventors: Rainer Schmedding, Andreas Westendorf, Wolfgang Baierl
  • Publication number: 20030045945
    Abstract: An apparatus for performing multiple and varied processing and sorting procedures on mixed mailpieces of varied sizes in a single pass is provided. The apparatus further provides a user interface so that as few as a single user can perform the multi-task processing and sorting of mixed and non-machineable mailpieces. Also provided are related methods for performing in a single pass with as few as a single operator multiple processing and sorting steps on mixed mailpieces primarily with the purpose of rehabilitating and improving the characteristics of the mailpieces for the purpose of subsequent high speed processing.
    Type: Application
    Filed: July 23, 2002
    Publication date: March 6, 2003
    Inventor: Steven W. Lopez
  • Publication number: 20030036807
    Abstract: A Digital Addressable Lighting Interface (DALI) master and DALI control bus power supply in combination with at least one DALI sub-master are connected to a single DALI control bus. The single DALI control bus may have a plurality of DALI slave devices, e.g., luminaries connected thereto and disbursed throughout a plurality of offices and/or rooms. The DALI master and the at least one DALI sub-master allow local control of the lighting in each office or room while maintaining the simplicity and cost effectiveness of a single DALI control bus system. Collision of commands sent simultaneously by two or more DALI masters may be detected and the corrupted commands retransmitted.
    Type: Application
    Filed: August 14, 2001
    Publication date: February 20, 2003
    Inventor: Ross M. Fosler
  • Publication number: 20030036809
    Abstract: Apparatus, methods, data structures, and systems are provided for subdividing input data associated with a first software program into job quanta, wherein each job quantum is operable to be executed by a separate software program residing on a different processing element from the first software program. The first software program and the separate software program execute substantially in parallel and output data associated with the executions of the programs are assembled into a single coherent presentation or results data. Moreover, the software programs may be threaded or non-threaded.
    Type: Application
    Filed: August 20, 2001
    Publication date: February 20, 2003
    Applicant: Silicon Graphics Inc
    Inventors: Joseph I. Landman, Haruna Nakamura Cofer, Roberto Gomperts, Dmitri Mikhailov
  • Patent number: 6522934
    Abstract: A process control system includes a controller that executes a control routine which performs a series of unit procedures within a process. The control routine is written or created to specify the class of unit to be used for each unit procedure, but not the actual unit itself. At the start of each unit procedure of the control routine, a dynamic unit selection routine selects a particular unit as the unit to be used during operation of that unit procedure. When called, the dynamic unit selection routine determines a set of possible units to be used, determines if each of the set of possible units is suitable for use during that unit procedure of the control routine based on a suitability criterion, prioritizes the units that meet the suitability criterion based on a priority criterion and selects the particular unit from the prioritized list of suitable units in order of priority.
    Type: Grant
    Filed: July 2, 1999
    Date of Patent: February 18, 2003
    Assignee: Fisher-Rosemount Systems, Inc.
    Inventors: William G. Irwin, David L. Deitz
  • Publication number: 20030033030
    Abstract: A method and apparatus for providing an active standby control system comprising the steps of providing a first and second programmable logic controller (PLC), each controller having an operating state. Each controller further including a network module board operably connected to a network; a control unit, a remote I/O head; and, a hot standby module, each hot standby module is operably connected together. Operably connecting each programmable logic controller to a network. Assigning a network address identifier, i.e., Internet Protocol or Media Access Control address, to each programmable logic controller and sensing the operating state of each programmable logic controller. The network address identifier of each programmable logic controller is determined by the operating state of each respective programmable logic controller.
    Type: Application
    Filed: March 2, 2002
    Publication date: February 13, 2003
    Inventors: Ron Naismith, Allan Tanzman, Dean Papadopoulos, Andy Swales, Orlando P. Metcalf
  • Publication number: 20030033024
    Abstract: A medical master/slave manipulator (1) is excellent in operability and capable of reducing burden on the operator. The medical master/salve manipulator (1) includes a master unit (2) provided with an operation control portion, a slave unit (3) provided with a working device, an interlocking mechanism (4) interlocking the slave unit (3) with the master unit (2), an orientation difference measuring means (6) for measuring the orientation difference between the orientation of the master unit (2) and that of the slave unit (3), and a control means (7) for controlling the slave unit (3) to adjust the orientation of the slave unit (3) to that of the master unit (2) so that the orientation difference is reduced to zero in a transient master/slave operation mode in which an operation mode changes from an unrestricted operation mode to a master/slave operation mode.
    Type: Application
    Filed: August 9, 2002
    Publication date: February 13, 2003
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Takamitsu Sunaoshi
  • Patent number: 6516234
    Abstract: An information transmitting system for use in a factory, which is capable of transmitting information among controllers simply without the complicated lead-around of a communication line nor the need of complicated communication protocol. A controller for every molding cell Ai, where i=1,2 . . . max and max is a maximum number of molding cells, a conveyance controller to control an automatic conveyor, a stock cell and a centralized controller are connected to each other via an Ethernet line to provide a common information storage unit, and information is transmitted among the controllers through the common information storage unit. Since there is no need of parallel communication lines between the controllers, an I/O port or a communication line may be prevented from increasing in number and the lead-around of the communication line is prevented from being complicated, resulting in a reduction of cost required for setting up the devices.
    Type: Grant
    Filed: December 3, 1998
    Date of Patent: February 4, 2003
    Assignee: Fanuc Ltd.
    Inventors: Masao Kamiguchi, Osamu Saito, Atsuyuki Kukita
  • Patent number: 6516233
    Abstract: Methods, systems and computer program products for controlling plating pulse rectifiers are provided by identifying one of the plurality of plating pulse rectifiers as a master plating pulse rectifier and identifying at least one of the plurality of plating pulse rectifiers, other than the master plating pulse rectifier, as a slave plating pulse rectifier. A recipe comprising a pulse pattern is downloaded to the master plating pulse rectifier and the slave plating pulse rectifier. A synchronization signal is transmitted from the master plating pulse rectifier upon initiating the pulse pattern of the recipe to the at least one slave plating pulse rectifier so as to cause the slave plating pulse rectifier to initiate the pulse pattern of the downloaded recipe. Plating pulse rectifiers suitable for use as master/slave plating pulse rectifiers and systems incorporating such plating pulse rectifiers are also provided.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: February 4, 2003
    Assignee: Lambda EMI, Inc.
    Inventors: Pradeep M. Bhagwat, Tom Goodman, Vinod Bapat
  • Publication number: 20030023340
    Abstract: A substrate processing system comprises a substrate processing apparatus, an information storage server and a support computer, which are connected to a network respectively. When the substrate processing apparatus causes a failure, an alarm processing part extracts a necessary relevant log file and stores the same in a hard disk of the information storage server. A failure information generation part generates failure information, which in turn is finally stored in the hard disk of the information storage servers as a failure information database. An apparatus information uncasing part renders the relevant log file and the failure information database readable from the support computer located in a remote place. Thus, the relevant log file and the failure information database can be immediately read. In other words, provided is a substrate processing system rendering operation information immediately readable from a remote place when the substrate processing apparatus causes a failure.
    Type: Application
    Filed: July 2, 2002
    Publication date: January 30, 2003
    Inventors: Toru Kitamoto, Kenji Kamei, Hidekazu Inoue, Tetsuya Hamada
  • Publication number: 20030018396
    Abstract: A method to design a controller is provided, considering controller“s versatility to work over any kind of layer 3 or layer 2 communication protocol and under any kind of control application. A programming language running on a system external to the controller considers a high level programming method. At the same time, the corresponding graphic interface needed to monitor a controller or a group of networking controllers is considered as a central program capable of communicating with the controller(s) in order to request for valuable data to monitor the control system and the process being controlled. Defining an object-oriented programming methodology the high level programming language as long as the centralized monitoring graphic interface can be abstract entities from the point of view of the controller(s) and vice versa. In order to abstract the controller from the type of selected communication protocol or control network working on layer 3 or layer 2, a network adapter is defined.
    Type: Application
    Filed: July 18, 2001
    Publication date: January 23, 2003
    Inventors: Antonio Mugica, Carlos Alonso, Oscar Mora, Roger Pinate, Roberto Ponticelli, Jonathan Bartolotta
  • Publication number: 20030018394
    Abstract: A system and method for tuning a turbine comprises a turbine controller coupled to the turbine, a first computer system coupled to the turbine controller and located locally to the turbine, and a second computer system for exchanging data with the first computer system. The second computer system is located remotely from the turbine and exchanges data with the first computer system via a network connection such as the internet, an intranet or a virtual private network (VPN). Data relating to a characteristic such as turbine combustion dynamics and/or emissions is transmitted by the first computer system to the second computer system. The second computer system transmits control data over the network connection to the first computer to tune the turbine.
    Type: Application
    Filed: July 17, 2001
    Publication date: January 23, 2003
    Inventors: John Patrick McCarthy, Andrew Philip Shapiro, George Edward Williams, Eric Gardner Butterfield, Scott Campbell Mattison, Victor Franz Russo, Milton Lewiston Grant
  • Patent number: 6510354
    Abstract: A universal robust filtering process is adapted for eliminating the need of prediscretizing a continuous-time differential model into a discrete-time difference model. It provides a universal robust solution to the most general formulation, in the sense that the system dynamics are described by nonlinear continuous-time differential equations, and the nonlinear measurements are taken at intermittent discrete times randomly spaced. The universal robust filtering process includes the procedures of validating the measurement using fuzzy logic, and incorporating factorized forward filtering and backward smoothing to guarantee numerical stability. It provides users a reliable and convenient solution to extracting internal dynamic system state estimates from noisy measurements, with wider applications, better accuracy, better stability, easier design, and easier implementation.
    Type: Grant
    Filed: April 19, 2000
    Date of Patent: January 21, 2003
    Inventor: Ching-Fang Lin
  • Patent number: 6507760
    Abstract: A method for the dependable operation of a spatially separated input device of a numerical control that includes inputting at an input device so as to generate output signals, supplying the output signals to at least two processors and checking the output signals or signals based on the output signals for conformity in a comparator device. The method further includes transmitting a first shut-off signal to a control unit if there is no conformity.
    Type: Grant
    Filed: June 14, 1999
    Date of Patent: January 14, 2003
    Assignee: Johannes Heidenhain GmbH
    Inventor: Alfons Baumgartner
  • Publication number: 20030009242
    Abstract: A multiple axis modular controller and a method of operating the controller in a system comprising input devices receiving indications of system conditions and output devices performing tasks affecting the system conditions. The controller includes input connectors connectable to the input devices and output connectors connectable to the output devices. A processor executes a series of sequential commands of an application program. A command can be executed in response to completion of one sequential command of the series of sequential commands regardless of a next sequential command in the series of sequential commands or in response to a specified input received at one of the input connectors or in response to a specified output sent to one of the output connectors. The processor does not execute the command, minimizing processor delays.
    Type: Application
    Filed: June 28, 2002
    Publication date: January 9, 2003
    Inventor: Curt Bocchi
  • Publication number: 20030004583
    Abstract: A local synchronization type parallel pulse signal processing circuit has a plurality of neurons connected to each other based on a predetermined rule and disposed in parallel, executing a predetermined arithmetic process with respect to input signals and outputting, a phase synchronization signal generation circuit outputting phase synchronization signals to the predetermined vicinal neurons, and a synchronization detection portion detecting synchronization within an allowable phase difference between the outputs of the predetermined vicinal neurons. The phase synchronization signal generation circuit functions also as a neuron executing the predetermined arithmetic process and outputting in accordance with a result of the synchronization detection by the synchronization detection portion. With this architecture, the synchronization circuit operating stably without any contradiction in a way that brings neither an increase in circuit scale nor an increase in consumption of electric power, is actualized.
    Type: Application
    Filed: May 24, 2002
    Publication date: January 2, 2003
    Inventors: Masakazu Matsugu, Katsuhiko Mori, Osamu Nomura
  • Patent number: 6501996
    Abstract: A process automation system includes terminals for operating and monitoring purposes, automation devices for executing control functions, and a host computer. Communication between the terminals and the automation devices is exclusively established via the host computer. The host computer may be installed remotely, in a computing center.
    Type: Grant
    Filed: June 14, 1999
    Date of Patent: December 31, 2002
    Assignee: Siemens Aktiengesellschaft
    Inventor: Jürgen Bieber
  • Publication number: 20020198606
    Abstract: A data processing system of this invention comprises a first processing unit for performing first data processing, a second processing unit for performing second data processing and a fetch unit for issuing an instruction code fetched from a code memory to the first processing unit if the fetched instruction code is a type 1 instruction code for the first processing unit and issuing the fetched instruction code to the second processing unit if the fetched instruction code is a type 2 instruction code for the second processing unit. In addition, the fetch unit simultaneously issues a type 1 instruction code and a type 2 instruction code to the first and the second processing units respectively if the next instruction code is a different type of instruction code to the fetched instruction code and simultaneous issuing is possible.
    Type: Application
    Filed: June 20, 2002
    Publication date: December 26, 2002
    Inventor: Takeshi Satou
  • Patent number: 6496740
    Abstract: The transfer controller with hub and ports (TCHP) performs the task of communication throughout an entire system in a centralized function. A single hub (435) tied to multiple ports (440, 447, 450, 452) by a central pipeline is the medium for all data communications among DSP clusters (455), external devices, and external memory. A transfer request queue manager (420) receives, prioritizes and queues data transfer requests. Each data port includes an identically configured interior interface (901) connected to the hub (435) and an exterior interface (902) configured for a target external memory/device connected to the port. The interior interfaces of all ports are clocked at a common internal frequency, while the exterior interfaces are clocked at the frequency of the external memory/device connected to the port.
    Type: Grant
    Filed: April 6, 2000
    Date of Patent: December 17, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Iain Robertson, David Hoyle
  • Patent number: 6493593
    Abstract: An electronic control unit includes a first microprocessor monitoring the operation of a second microprocessor and has a monitoring operation blocking unit for preventing the second microprocessor from being reset by the first microprocessor while the second microprocessor is loading from a memory thereof so that even when a control program is loaded into the monitoring microprocessor before one is loaded into the monitored microprocessor, the control program can be loaded with certainty. Each microprocessor executes a control program stored in the memory, and when a predetermined reloading condition has been established, executes a loading process for receiving load data transmitted thereto from outside into the memory.
    Type: Grant
    Filed: March 28, 2000
    Date of Patent: December 10, 2002
    Assignee: Denso Corporation
    Inventors: Takamichi Kamiya, Takehiro Abeta
  • Publication number: 20020183885
    Abstract: A system, method and medium for controlling a wafer processing chamber using two or more processors (within one or more computer processing systems), wherein specified functions are assigned to each processor. Some embodiments contemplate that each processor may reside within its own computer processor system (each computer processor system being in communication with the other), wherein each computer processor system implements specified functions to control and maintain certain parameters involved in the manufacture of the wafer. This allows the present invention to react quickly to maintain rapidly-changing desired conditions within a wafer processing chamber and to maintain a greater degree of uniformity of those conditions throughout the wafer.
    Type: Application
    Filed: July 22, 2002
    Publication date: December 5, 2002
    Applicant: Applied Materials, Inc.
    Inventors: Alexey G. Goder, Mark Yam
  • Publication number: 20020183863
    Abstract: A process device is adapted to couple to a process control loop and communicate on the process control loop. Communication on the process control loop is effected in accordance with an internet protocol. A process communication device is also provided which couples to the process control loop, and an internet. The process communication device provides process control information received from the process control loop, to the internet. Conversely, the process communication device also provides information received from the internet to the process control loop.
    Type: Application
    Filed: March 15, 2002
    Publication date: December 5, 2002
    Inventor: Evren Eryurek
  • Publication number: 20020183870
    Abstract: A setting display apparatus for managing a programmable controller is arranged to enable a display program to be designed easily and efficiently and to reduce the memory capacity for the program. A display program is divided into a frame flow program and a frame forming program, which can be programmed independently each other. The frame forming program has the function of forming a basic frame including information on the size, position, etc., of letters and figures such that importance is attached to the appearance. Addresses of data displayed on the basic frame corresponds to addresses in a reception buffer memory. The frame flow program has the functions of designating addresses in a device memory of the programmable controller as direct addresses of the displayed data and designating a frame change condition and a shift destination frame number. The frame flow program is characterized by its adherence to mechanical control.
    Type: Application
    Filed: November 6, 2001
    Publication date: December 5, 2002
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Ryosuke Misawa, Michiaki Isobe
  • Patent number: 6487464
    Abstract: A processor-based system performs automatic reboot for some initialization failures. The processor-based system runs an operating system. When initialization failures occur, the operating system may reboot the processor-based system and control the direction of a power-on routine. The power-on routine may send a page to a remote processor-based system, enter an emergency mode of operation, update system software, or perform other operations.
    Type: Grant
    Filed: February 25, 2000
    Date of Patent: November 26, 2002
    Assignee: Intel Corporation
    Inventors: Jesus A. Martinez, Manoj B. Agnihotri
  • Patent number: 6487455
    Abstract: An operating system for distributed industrial controllers ensures the completion of enrolled application programs within a predetermined time span as is required for robust industrial control by preallocating dynamic and static hardware resources on a per application basis and in a manner that ensures execution of the application within the necessary time constraints. Portions of the distributed operating system may be distributed at particular hardware resources to provide necessary modeling for those hardware resources in making the commitments to resource bandwidths.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: November 26, 2002
    Assignee: Rockwell Automation Technologies, Inc.
    Inventor: Sivaram Balasubramanian
  • Patent number: 6487454
    Abstract: An array of devices connected to each other, in a grid or other fashion, which are able to adjust their position and/or orientation relative to one another, in order to alter the overall structure that the devices form. Also, a controller that can determine this structure from data provided by the devices, and tell each device what relative position and orientation it should be in so that the overall structure changes to some other desired shape.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: November 26, 2002
    Inventor: Adrian Tymes
  • Patent number: 6484065
    Abstract: An efficient DSP or MPU is combined with efficient DRAM on a single IC die. To optimize the embedded memory, the chip includes wide-band connections to DRAM. Row and column addresses of DRAM can be applied at the same time using wide address busses. Additional metal lines lower the resistance of the word line in the DRAM circuits. For certain process steps, the processor block is masked off and the process steps unique to the fabrication of memory are performed on the memory block, and vice-versa. Process steps which are common to the processor and memory blocks can be performed simultaneously on the processor and memory blocks without masking off either block. Certain process steps can be employed in the fabrication of the one of the two processor and memory blocks in addition to or in lieu of processes normally used in the fabrication of that block. An electronic component (e.g.
    Type: Grant
    Filed: October 5, 1998
    Date of Patent: November 19, 2002
    Assignee: Kawasaki Microelectronics, Inc.
    Inventors: Peter K. Yu, Michael D. Rostoker
  • Publication number: 20020161453
    Abstract: A shared memory network means and method providing nearly instance sharing of data between a plurality of digital processing nodes, thereby allowing an arbitrarily large number of processing nodes to be connected into a single system such as a super computer, and further providing means for assimilation of legacy equipment into system whereby service life of obsolete equipment is extended.
    Type: Application
    Filed: April 19, 2002
    Publication date: October 31, 2002
    Inventor: Michael G. Peltier
  • Publication number: 20020161452
    Abstract: A method and means which allow multiple processors to operate efficiently as a single system while providing some autonomy for individual tasks is disclosed. The current invention further provides an architecture that is virtually infinitely scalable without reaching a limitation in throughput, which is normally associated with multiple processor architectures.
    Type: Application
    Filed: April 19, 2002
    Publication date: October 31, 2002
    Inventor: Michael G. Peltier
  • Patent number: 6473655
    Abstract: A data processing system and method are described for creating a virtual partition within an existing partition within a hard disk drive included within the system. A first master boot record is written which includes a partition. The partition defines a first file system to be utilized by the hard drive. A file is created within the partition. The first master boot record is temporarily overwritten with a second master boot record without altering the first file system. The second master boot record includes a designation of the file as a second partition. The second partition defines a second file system. The second partition is designated as the active partition. The data processing system is booted utilizing the second master boot record. The second partition is a virtual partition within the existing partition.
    Type: Grant
    Filed: May 2, 2000
    Date of Patent: October 29, 2002
    Assignee: International Business Machines Corporation
    Inventors: Christopher Britton Gould, David Rhoades, Walter Leslie Robinson, Gary Anthony Vaiskauckas
  • Publication number: 20020156837
    Abstract: A new industrial control system and method are disclosed allowing for communication between multiple control devices of the system and remote devices via the Internet. The system includes a web access interface that is capable of being coupled to the remote devices via the Internet, and is coupled to the control devices by way of a network. A program executed by the interface receives an Internet signal having socket API data and formatted in accordance with the TCP/IP protocol, and extracts the data from the Internet signal. Another program executed by the interface receives the data and transmits a network signal, which includes the data but is not formatted in accordance with the TCP/IP protocol, to an appropriate one of the control devices, each of which has a respective web server program. The data is processed by the server program at the appropriate control device.
    Type: Application
    Filed: September 27, 2001
    Publication date: October 24, 2002
    Inventors: Brian A. Batke, Gary W. Baczkowski, Kenwood H. Hall
  • Publication number: 20020156838
    Abstract: An industrial control system includes a plurality of control devices providing control signals to direct an industrial process and a web access module including a web server, an Internet interface and a control network interface. Each of the control devices includes web page data concerning a respective web page associated with the respective control device. The Internet interface is couplable to a remote device via the Internet, and the control network interface is coupled to the control devices. The web access module is able to receive requests from the remote device to access the web pages associated with the control devices. In response to the requests, the web access module obtains the web page data concerning the web pages for which access has been requested, processes the data at the server, and sends data signals related to the data onto the Internet to be received by the remote device.
    Type: Application
    Filed: September 28, 2001
    Publication date: October 24, 2002
    Inventors: Brian A. Batke, Gary W. Baczkowski, Kenwood H. Hall
  • Publication number: 20020156538
    Abstract: A data processing system including a control chip, a central processing unit and a printed circuit board is disclosed. The control chip has a substrate stack that includes, from top to bottom, a first signal layer, a first reference layer at a first reference voltage, a second reference layer at a second reference voltage and a second signal layer. The central processing unit has a substrate stack that includes, from top to bottom, a third signal layer, a third reference layer at the first reference voltage, a fourth reference layer at the second reference voltage and a fourth signal layer. The printed circuit board has a stack structure that includes, from top to bottom, a fifth signal layer, a fifth reference layer at the first reference voltage, a sixth reference layer at the second reference voltage and a sixth signal layer. The second signal layer of the control chip and the fourth signal layer of the central processing unit are adjacent to the fifth signal layer.
    Type: Application
    Filed: April 19, 2002
    Publication date: October 24, 2002
    Inventor: Nai-Shung Chang
  • Patent number: 6470222
    Abstract: A distributed intelligence system for controlling a plurality of groups and equipment for use in dentistry is disclosed wherein the system comprises four separate micro controllers; each micro controller contains its own predetermined routines and a first micro controller being located within control circuitry wherein the control circuitry generates control signals for a first group of tools or equipment, a second micro controller being located within foot switches wherein the foot switches generate control signals for a second group of tools or equipment, a third micro controller located within a control console wherein the control console generates control signals for a third group of tools or equipment and a forth micro controller being located within a power supply wherein the power supply generates control signals for a forth group of tools or equipment. The micro controllers are all interconnected by a wire cable and communicate with one another using a serial communication bus protocol.
    Type: Grant
    Filed: July 26, 2000
    Date of Patent: October 22, 2002
    Assignee: Rockford Dental Mfg. Co.
    Inventors: Willard S. Davidson, Cheryl L. Davidson
  • Publication number: 20020151987
    Abstract: The invention is a method and apparatus for interconnecting a plurality of control systems used to planarize wafers in a CMP tool. Example control systems that may be used with the invention are the back-fill pressure of a carrier, carrier down-force, carrier rotation and platen rotation. A controller is used to automate the CMP tool by communicating desired set-points to the various control systems. The instability or fluctuations in control systems caused by a desired change in one or more other control systems are reduced by allowing the affected control systems to receive information regarding the intended actions by the control systems that affect them. In this manner the affected control systems may take proactive steps to reduce fluctuations in their output caused by changes in the other control systems.
    Type: Application
    Filed: April 13, 2001
    Publication date: October 17, 2002
    Inventor: Rafael Mendez
  • Patent number: 6466828
    Abstract: Featured is a device controller in a system having a multiplicity of such controllers and a conveying system and method for controlling a multiplicity of devices using such controllers. Each controller includes a plurality of bi-directional communications ports, a processor that processes information and provides outputs, where at least one output controls the device, and an applications program for execution within the processor that includes instructions and criteria for processing the information and providing the processor outputs. Specifically, the applications program includes instructions and criteria for communicating information between and among controllers; instructions and criteria for processing information received by a controller; and instructions and criteria for modifying the operation of a device responsive to the communicated information. For a conveying system having a multiplicity of conveying sections, a controller is provided for each section.
    Type: Grant
    Filed: September 2, 1999
    Date of Patent: October 15, 2002
    Assignee: Quantum Conveyor Systems, Inc.
    Inventors: Hans J. Lem, Richard J. Bowman
  • Patent number: 6463338
    Abstract: An interface for a network communication card for industrial controllers uses a dual-port memory that may be re-partitioned by values communicated through the dual-port memory itself. A default partitioning and a non re-partitionable common area allow flexible re-partitioning without disrupting the communication necessary for the partition to take place. Negotiation between the controller and network card allow maximum flexibility in re-partitioning while respecting partitioning limits characteristic of the network card and its network.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: October 8, 2002
    Assignee: Rockwell Automation Technologies, Inc.
    Inventor: Kyle E. Neet
  • Patent number: 6463339
    Abstract: A highly reliable industrial controller uses low complexity field programmable gate-arrays (FPGA) in lieu of standard microprocessors where each FPGA is programmed so as to provide for a different internal implementation of the control program as a set of interconnected logical gates. Variations in the outputs of the FPGAs caused by hardware failure may be corrected by choosing the most common output, a default output or a default value. Errors may be detected though conventional hardware error detection methods or by a direct comparison of the outputs which under normal conditions should match each other.
    Type: Grant
    Filed: September 27, 1999
    Date of Patent: October 8, 2002
    Assignee: Rockwell Automation Technologies, Inc.
    Inventor: David A. Vasko
  • Publication number: 20020143409
    Abstract: A flash programmable microprocessor-based control module is operated in a manner to protect the integrity of event data stored in the programmable memory of the module while permitting authorized manufacturing and field alteration of the programmable memory with a Download and Execute routine. The Download and Execute routine is resident in a designated sector of the module's read-only memory, and download access to the module's random access memory after module manufacture has been completed is denied. During manufacture of the module, and during field programming of the controller prior to the writing of event data, the programmable memory may be externally altered by an authorized service tool by transferring the Download and Execute routine from read-only memory to random access memory for execution by the module's microprocessor, and downloading the new data or code over a data link coupling the service tool to the module.
    Type: Application
    Filed: April 2, 2001
    Publication date: October 3, 2002
    Applicant: DELPHI TECHNOLOGIES, INC.
    Inventors: James Frank Patterson, Edward J. Wallner
  • Publication number: 20020143410
    Abstract: A method for controlling a microcomputer is provided. The microcomputer is operable without completely expending power of backup power supply when main power is shutdown. During the power shutdown, the microcomputer is connected to a capacitor as a backup power device which supplies small amount of current for a short period. Thus, the microcomputer can execute software for a given period. By changing an operation mode of the microcomputer from high speed mode to low speed mode, power consumption of the microcomputer can be significantly reduced. The method uses software to suppress power consumption of the microcomputer to the minimum and to measure a duration time of power shutdown.
    Type: Application
    Filed: December 26, 2001
    Publication date: October 3, 2002
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., Ltd.
    Inventors: Llewellyn Yance, Satoshi Endo