Circuit Tuning (e.g., Potentiometer, Amplifier) Patents (Class 702/107)
  • Patent number: 11961577
    Abstract: Analog-to-digital converters (ADCs) of an integrated circuit includes a first set of ADCs and second set of ADCs in which the ADCs of the first set are of a different type than the ADCs of the second set. On-chip testing of the ADCs includes calibrating an N-bit differential digital-to-analog converter (DAC) and storing a pair of calibration codes for each of 2N possible DAC input codes for the DAC in an on-chip memory. The first set of ADCs is tested using the pairs of calibration codes stored in the on-chip memory and a full N-bit resolution of the DAC. Subsequently, the second set of ADCs is tested using pairs of calibration codes corresponding to a reduced M-bit resolution of the DAC, in which M is less than N. During the testing of the second set of ADCs, a portion of the calibration codes stored in the on-chip memory is overwritten.
    Type: Grant
    Filed: July 5, 2022
    Date of Patent: April 16, 2024
    Assignee: NXP USA, Inc.
    Inventors: Kumar Abhishek, Xiankun Jin, Mark Lehmann
  • Patent number: 11621145
    Abstract: Two types of operational parameters are used in a particle beam microscope. First parameters influence the image quality, and have settings that are alterable by a user in view of obtaining a better image quality. Second parameters characterize the mode of operation, and the image quality becomes poorer when these change. A mode of operation of the particle beam microscope includes: registering of settings of the first parameters and the second parameters, which the user undertakes in a period of time; analysing a plurality of recorded settings of the first parameters and of the second parameters; determining settings of the first parameters which are advantageous in view of the image quality on the basis of the current settings of the second parameters; and setting the determined advantageous settings of the first parameters.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: April 4, 2023
    Assignee: Carl Zeiss Microscopy GmbH
    Inventor: Björn Gamm
  • Patent number: 11309004
    Abstract: Aspects of a storage device including a controller, a calibration resistor and a die having an output driver and a calibration circuit are provided, which allow for an output impedance of the output driver to be calibrated to a lower impedance than a minimum required for reading data across PVT variations of the die at maximum loading of the controller. To check whether slow corners may operate using the lower impedance, the controller determines whether the output impedance of the output driver can be calibrated to the lower impedance at a maximum temperature and minimum voltage applied to the die, or whether a calibration code generated from the calibration circuit exceeds a threshold at a nominal temperature and voltage applied to the die. Thus, slow corners are screened out from lower impedance use, while faster devices are designed with a smaller calibration resistance to benefit from increased memory and speed.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: April 19, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Ankur Agrawal, Simarpreet Kaur
  • Patent number: 11074150
    Abstract: A chip health monitor includes a processor configured to operate as a state machine based on instructions stored in a storage device. The state machine is configured to exercise a signal path in a chip in response to a condition and determine presence of an error in the signal path based on results from the exercise. The state machine is configured to compensate for the error by changing at least one operational parameter of the chip.
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: July 27, 2021
    Assignee: NXP B.V.
    Inventor: Jurgen Geerlings
  • Patent number: 10958311
    Abstract: A system for identifying a location of a device includes a first antenna mounted to a plug. The first antenna surrounds one or more prongs of the plug, and the plug has a memory that stores a device ID. A second antenna receives the device ID from the first antenna when the plug is coupled to a power outlet. A controller uses a communication module to wirelessly transfer the device ID and a power outlet ID to a computer server. The computer server uses the device ID and the power outlet ID to determine the location of the device within a building.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: March 23, 2021
    Assignee: Hill-Rom Services, Inc.
    Inventors: Brandon Ayers, Collin Davidson, Stephen Embree, Kenzi L. Mudge, Britten Pipher, Timothy Receveur
  • Patent number: 10924113
    Abstract: A data storage device includes a controller and a memory. The controller includes a host interface and a memory interface. The controller receives inputs from the host, internal storage device inputs, device lifetime calculations, temperature readings and voltage readings. The controller then dynamically adjusts the frequency and voltage for the memory interface based upon the inputs received. As such, the memory interface operates are optimum conditions.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: February 16, 2021
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Yonatan Tzafrir, Mordekhay Zehavi, Eyal Widder
  • Patent number: 10839889
    Abstract: Apparatuses and methods for providing clocks to data paths are disclosed. An example apparatus includes a first circuit in a data path, a second circuit in the data path, and a multiplexer. The first circuit is configured to provide data based on a first clock and the second circuit is configured to receive the data and provide the data based on a second clock. The multiplexer is configured to provide a third clock as the second clock for some test operations and further configured to provide the first clock as the second clock for other test operations. A timing of the first clock is adjusted for the first circuit during the test operations.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: November 17, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Hyunui Lee, Chiaki Dono, Chikara Kondo
  • Patent number: 10477333
    Abstract: A system capable of synchronizing audio by determining a playback delay between when an audio sample is sent to and then output from a speaker. The system may generate a test signal configured to reach a saturation threshold and may send the test signal at a first time, followed by blank audio samples, from a first processor to a second processor to be output by the speaker. The second processor may detect that an audio sample exceeds a saturation threshold at a second time, generate a timestamp and send the timestamp to the first processor. The first processor may determine a playback delay between the first time and the second time and may also determine a number of blank audio samples sent between the first time and the second time. Using the playback delay and the number of blank audio samples, the system may generate audio using precise timing.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: November 12, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Michael Alan Pogue, Hanoch Freund
  • Patent number: 10359158
    Abstract: A lighting selection system and method obtain individualized characteristic data for each of plural light emitting devices, determine a difference between a value of the characteristic data and a designated target value for each of the light emitting devices, and group the light emitting devices into different groups based on the differences between the values of the characteristic data and the designated target value. The differences of the light emitting devices in a common group of the groups are closer together than the differences of the light emitting devices in other groups of the groups. The system and method also may select at least one of the groups of the light emitting devices for inclusion in a light device.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: July 23, 2019
    Assignee: CURRENT LIGHTING SOLUTIONS, LLC
    Inventors: Ashfaqul I. Chowdhury, Kevin Jeffrey Benner
  • Patent number: 10289422
    Abstract: A device includes a first processor and a second processor, the first processor being able to execute a boot loader. The device implements a phase of boot-securing in the event of an electrical anomaly occurring while the boot loader is being updated, the phase of boot-securing being implemented by way of an emergency power supply source acting as a relay for a main power supply, the phase of boot-securing including the following steps: stopping the current updating of the boot loader; and invalidating the boot loader. The device implements a phase of delayed booting of the second processor, enabling to boot the device in a boot loader update mode if the stored boot loader is invalid.
    Type: Grant
    Filed: September 9, 2014
    Date of Patent: May 14, 2019
    Assignee: SAGEMCOM BROADBAND SAS
    Inventor: Nicolas Dangy-Caye
  • Patent number: 10209281
    Abstract: Methods, systems, and apparatus, including computer programs encoded on storage devices, for detecting the power status of an electrical device. In one aspect, an apparatus includes a device that comprises a radio transmitter and a sensor configured to detect the power status of the device. The power status may include information that is indicative of whether the device is powered on or off. The apparatus may also include a processor and a data storage device storing a device identifier associated with the device, and instructions that are operable, when executed by a processor, to cause the processor to perform operations. The operations may include receiving data indicating the power status of the device detected by the sensor, receiving a request for the power status of the device, and transmitting, using the radio transmitter, the device identifier associated with the device and the power status associated with the device.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: February 19, 2019
    Assignee: Google LLC
    Inventor: Matt Dibb
  • Patent number: 10191092
    Abstract: A method for determining an electric voltage u(t) and/or an electric current i(t) of an HF signal in an electrical cable on a calibration plane by measuring in the time domain. Using a directional coupler, a first portion v3(t) of a first HF signal is decoupled, fed to a time domain measuring device, and a second portion v4(t) of a second HF signal is decoupled. The signal portions v3(t), v4(t) are converted into the frequency domain, then absolute wave frequencies in the frequency domain are determined and converted into the electric voltage u(t) and/or the electric current i(t). In a previous calibration step, the calibration parameters are determined, and the absolute wave frequencies on the calibration plane are determined using the calibration parameters (e00,r(?3, ?4), e01,r(?3, ?4), e10,r(?3, ?4), e11,r(?3, ?4)), wherein ?3, ?4 are the reflection factors of the inputs of the time domain measuring device.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: January 29, 2019
    Assignee: Rosenberger Hochfrequenztechnik GmbH & Co. KG
    Inventor: Christian Zietz
  • Patent number: 10019387
    Abstract: An apparatus and method for encoding data are disclosed that may allow for performing periodic calibration operations on a communication link. A controller may determine multiple possible values for a reference voltage used with the communication link based on an initial value. Calibration operations may be performed using each possible value, and the results of the operations scored based on the width of data eyes measured during the calibration operations. The controller may then select a new value for the reference voltage from the multiple possible values dependent upon the scores of each of the multiple possible values.
    Type: Grant
    Filed: April 1, 2015
    Date of Patent: July 10, 2018
    Assignee: Apple Inc.
    Inventors: Robert E. Jeter, Brijesh Tripathi, Kiran Kattel, Rakesh L. Notani, Fabien S. Faure, Sukalpa Biswas, Kai Lun Hsiung, Neeraj Parik, Venkata Ramana Malladi, Shiva Kumar, Chaitanya Polapragada, Allen Kim
  • Patent number: 9927859
    Abstract: Interconnect frequency control technologies of adjusting an operating frequency of a communication interconnect between an integrated circuit comprising multiple functional hardware units are described. A power management unit (PMU) is configured to collect workload data from the functional hardware units and determine a workload metric from the workload data. The PMU adjusts an operating frequency of the communication interconnect in view of the workload metric.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: March 27, 2018
    Assignee: Intel Corporation
    Inventors: Nir Rosenzweig, Evgeny Bolotin, Guy Satat, Hisham Abu Salah
  • Patent number: 9910124
    Abstract: The disclosure relates to an apparatus and a method for vector scattering parameter (s-parameter) measurements, and more particularly, to an apparatus and a method for providing a simple, low cost solution for tests requiring vector s-parameter measurements. The apparatus includes a source which provides an input signal, a divider which splits the input signal to a reference signal and a testing signal, a phase shifter which shifts the reference signal by a first phase and outputs a phase shifted signal, a device under test (DUT) which shifts the testing signal by a second phase and outputs a DUT shifted signal, a combiner which combines the phase shifted signal and the DUT shifted signal into a combined signal, and a detector which detects a product of the phase shifted signal and the DUT shifted signal.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: March 6, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Adem G. Aydin, Hanyi Ding
  • Patent number: 9870015
    Abstract: An energy control device adjusts an amount of energy consumed by mechanical equipment placed at a property. The energy control device includes a first control unit and a second control unit. The first control unit executes a first adjustment control during a prescribed adjustment period. The first adjustment control adjusts an amount of energy consumed by the mechanical equipment in order to respond to a prescribed event. The second control unit executes a second adjustment control separate from the first adjustment control during a non-adjustment period after the adjustment period.
    Type: Grant
    Filed: October 17, 2012
    Date of Patent: January 16, 2018
    Assignee: Daikin Industries, Ltd.
    Inventors: Nanae Kinugasa, Seiji Kawai, Tomoyoshi Ashikaga, Tasuku Nangou
  • Patent number: 9871517
    Abstract: A method for determining a resistance calibration direction in ZQ calibration of a memory device includes: repeatedly comparing a reference voltage with an target voltage by a comparator to obtain an odd plurality of comparison outputs, each of the comparison outputs being one of a high-level state and a low-level state; determining a majority of the comparison outputs for their states by a ZQ calibration controller; and determining a resistance calibration direction according to the majority by the ZQ calibration controller so that the ZQ calibration controller generates a calibration code based on the resistance calibration direction and applies the calibration code to a resistance calibration unit to adjust the target voltage via the resistance calibration unit.
    Type: Grant
    Filed: August 17, 2016
    Date of Patent: January 16, 2018
    Assignee: Elite Semiconductor Memory Technology Inc.
    Inventors: Yu-Hsuan Cheng, Jian-Sing Liou
  • Patent number: 9824728
    Abstract: A method for performing memory interface calibration in an electronic device, an associated apparatus, and an associated memory controller are provided, where the method includes: controlling a signal on a digital terminal of the memory controller to switch between a plurality of levels, wherein the digital terminal is coupled to a memory of the electronic device; and based on at least one detection result obtained from detecting the signal, calibrating a logical state of the signal to correspond to a level of the plurality of levels. More particularly, the memory controller may include a plurality of command terminals, a plurality of data terminals, and at least one clock terminal, which are used for coupling the memory controller to the memory. For example, the digital terminal may be a command terminal or a data terminal.
    Type: Grant
    Filed: June 2, 2014
    Date of Patent: November 21, 2017
    Assignee: MediaTek Inc.
    Inventors: Shang-Pin Chen, Bo-Wei Hsieh
  • Patent number: 9684629
    Abstract: A calibratable communications link includes multiple parallel lines. Calibration is performed at dynamically variable and/or interruptible intervals determined by an automated mechanism. Calibration is preferably initiated responsive to a command generated by an executable software process, which initiates calibration responsive to detection of a probable impending need as indicated by, e.g., temperature change, calibrated parameter drift, error rate, etc. Calibration is also preferably initiated according to probable minimal disruption of device function, as indicated by low activity level. Furthermore, in one aspect calibration may be temporarily suspended to transmit data and then resumed.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: June 20, 2017
    Assignee: International Business Machines Corporation
    Inventors: Timothy O. Dickson, Daniel M. Dreps, Frank D. Ferraiolo, Douglas J. Joseph
  • Patent number: 9652357
    Abstract: Application performance data and machine health are collected by a system. The system correlates the two data types to provide context as to how machine health affects the performance of an application. Performance data for an application, for example an application executing as part of a distributed business transaction, and health data for a machine which hosts the application are collected. The performance data and machine health data may be correlated for a particular period of time. The correlation may then be reported to a user. By viewing the correlation, a user may see when machine health was good and bad, and may identify the effects of the machine health on the performance of an application.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: May 16, 2017
    Assignee: AppDynamics, Inc.
    Inventors: Amod Gupta, Ryan Ericson
  • Patent number: 9411750
    Abstract: A calibratable communications link includes multiple parallel lines. Calibration is performed at dynamically variable and/or interruptible intervals determined by an automated mechanism. Calibration is preferably initiated responsive to a command generated by an executable software process, which initiates calibration responsive to detection of a probable impending need as indicated by, e.g., temperature change, calibrated parameter drift, error rate, etc. Calibration is also preferably initiated according to probable minimal disruption of device function, as indicated by low activity level. Furthermore, in one aspect calibration may be temporarily suspended to transmit data and then resumed.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: August 9, 2016
    Assignee: International Business Machines Corporation
    Inventors: Timothy O. Dickson, Daniel M. Dreps, Frank D. Ferraiolo, Douglas J. Joseph
  • Patent number: 9298557
    Abstract: A method of booting a system with a non-volatile memory device includes at least the following steps: when the system is powered on, reading a status flag of at least a memory block of the non-volatile memory device, wherein the status flag indicates whether an erase operation applied to the memory block is successfully completed; selectively performing a leakage calibration process upon the memory block according to the status flag; and booting the system according to a boot code stored in the non-volatile memory device.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: March 29, 2016
    Assignee: Elite Semiconductor Memory Technology Inc.
    Inventors: Chung-Shan Kuo, Chih-Hao Chen
  • Patent number: 9190248
    Abstract: A system for processing a substrate includes a plasma chamber to generate a plasma therein. The system also includes a process chamber to house the substrate, where the process chamber is adjacent the plasma chamber. The system also includes a rotatable extraction electrode disposed between the plasma chamber and substrate, where the rotatable extraction electrode is configured to extract an ion beam from the plasma, and configured to scan the ion beam over the substrate without movement of the substrate by rotation about an extraction electrode axis.
    Type: Grant
    Filed: September 7, 2013
    Date of Patent: November 17, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventor: James P. Buonodono
  • Patent number: 9136095
    Abstract: There is provided a method for controlling a plasma processing apparatus that eliminates a preliminary study on a resonance point while maintaining a low contamination and a high uniformity even in multi-step etching. In a method for controlling a plasma processing apparatus including the step of adjusting a radio frequency bias current carried to a counter antenna electrode, the method includes the steps of: setting a reactance of a variable element to an initial value; detecting a bias current carried to the counter antenna electrode; searching for a maximum value of the detected electric current; and adjusting a value of the reactance of the variable element from the maximum value to the set value and then fixing the value.
    Type: Grant
    Filed: February 11, 2014
    Date of Patent: September 15, 2015
    Assignee: Hitachi High-Technologies Coporation
    Inventors: Masahito Mori, Akira Hirata, Koichi Yamamoto, Takao Arase
  • Patent number: 9116187
    Abstract: A system has an extended dynamic range for measuring distortion in an output signal of a device under test (DUT), the output signal having at least a first fundamental signal. The system includes a first combiner and a test receiver. The first combiner is configured to inject a first cancellation signal generated by a first signal source into the output signal from the DUT, at least one of a first magnitude and a first phase of the first cancellation signal being adjustable for suppressing the first fundamental signal. The test receiver is configured to receive and measure the output signal having the suppressed first fundamental signal.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: August 25, 2015
    Assignee: Keysight Technologies, Inc.
    Inventors: Andrew M. Owen, Robert E. Shoulders
  • Patent number: 9104533
    Abstract: A voltage and timing calibration method used in a memory system. A memory controller adjusts timing and voltages of the controller and voltages of a memory buffer according to data returned by the buffer based on timing and voltages at a memory controller side of the buffer, to calibrate timing and voltages between the controller and controller side. According to data read by the buffer from a memory chip unit on the basis of timing and voltages at a memory chip side of the buffer, the controller adjusts the timing and voltage at the chip side and the voltage of the chip unit; or the buffer adjusts the timing and voltage at the chip side and the voltage of the chip unit, to calibrate the timing and voltage between the chip side and chip unit. Therefore, hardware resources of the buffer can be saved and the circuit can be simplified.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: August 11, 2015
    Assignee: MONTAGE TECHNOLOGY (SHANGHAI) CO., LTD.
    Inventors: Chunyi Li, Qingjiang Ma
  • Patent number: 9083348
    Abstract: Aspects of the disclosure provide a method for tuning delay. The method includes driving, during a calibration stage, at least one test signal from an integrated circuit onto a plurality of outside transmission lines that are coupled to the integrated circuit, measuring a timing of the at least one test signal transmitted and reflected over the plurality of outside transmission lines, and selectively delaying, using units disposed within the integrated circuit, signals subsequently transmitted over the plurality of outside transmission lines based on the timing of the at least one test signal, in order to align transmission times of the subsequently transmitted signals.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: July 14, 2015
    Assignee: Marvel Israel (M.I.S.L) Ltd.
    Inventors: Dan Azeroual, Meir Hasko
  • Patent number: 9075543
    Abstract: A method for calibrating a memory interface circuit is described wherein prior to a calibration operation at least a portion of application information contained in a memory circuit is moved or copied to an alternate location to preserve that information. At the completion of the calibration operation, the information is restored to the same location of the memory circuit. Thus, the calibration operation can be performed from time to time during normal operation of a system containing the memory circuit. Non-limiting examples of calibration operations are described including operations where a capture clock for a memory read circuit is calibrated, and operations where CAS latency compensation is calibrated for a DDR memory interface.
    Type: Grant
    Filed: January 10, 2014
    Date of Patent: July 7, 2015
    Assignee: UNIQUIFY, INCORPORATED
    Inventors: Jung Lee, Mahesh Goplan
  • Patent number: 9072159
    Abstract: When RF power is supplied from an RF generator to a load via a power supply unit, (a) the internal impedance of the RF generator is made lower than the characteristic impedance of the power supply unit, and (b) the load-end voltage is increased by selecting the electrical length LE of the power supply unit, which connects between the RF generator and the load to supply RF power, so that the electrical length LE has a predetermined relation with the fundamental wavelength ? of the RF AC. More specifically, the electrical length LE of the power supply unit is selected in such a way that, when the load end, which is the input end of the load, is in an open state, the electrical length LE is (2n?1)·(?/4)?k·??LE?(2n?1)·(?/4)+k·? (n is an integer, k is {??2·cos?1(1/K)}/(4?)) with respect to the fundamental wavelength ? of the RF AC.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: June 30, 2015
    Assignee: KYOSAN ELECTRIC MFG. CO., LTD.
    Inventors: Itsuo Yuzurihara, Satoshi Aikawa, Hiroshi Kunitama
  • Patent number: 9070537
    Abstract: In an RF power supply for supplying RF power to a plasma load, reflected wave power control is performed in which the reflected wave power of an RF generator is detected and the RF generator is controlled. For a short-time variation in reflected wave power, control is performed based on a peak value variation in the detection value of reflected wave power. For a long-time variation in reflected wave power, control is performed based on a variation in a smoothed value obtained by smoothing detection values of reflected wave power. A reflected wave power control loop system includes a reflected wave power peak value dropping loop system and an arc blocking system that perform control based on a peak variation in reflected wave power and a reflected wave power amount dropping loop system that performs control based on a smoothed power amount of reflected wave power.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: June 30, 2015
    Assignee: KYOSAN ELECTRIC MFG. CO., LTD.
    Inventors: Itsuo Yuzurihara, Satoshi Aikawa, Hiroshi Kunitama
  • Patent number: 9005261
    Abstract: A therapeutic laser with a source of pulsed electromagnetic radiation, a control device for controlling the intensity and/or the duration of the therapeutic laser applied to the tissue, and a detection device for detecting optoacoustic signals triggered by irradiating the living tissue with the pulsed electromagnetic radiation. The therapeutic laser is characterized by an evaluation device that acts on the control device and is used for calculating a degree of quality B(t) from the optoacoustic signals detected by the detection device for individual laser pulses applied to a predetermined laser spot and determining a fit function f(t) at a predetermined point in time ?t1, the fit function f(t) approximating the mean curve of B(t) for 0?t??t1. The intensity and/or the irradiation time of the therapeutic laser is defined by the parameters for the predetermined laser spot, the parameters being determined for the fit function f(t).
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: April 14, 2015
    Assignee: Medizinisches Laserzentrum Luebech GmbH
    Inventor: Ralf Brinkmann
  • Patent number: 9000776
    Abstract: A method for estimating the characteristic impedance of a structure comprising the following steps: providing a current probe comprising a magnetic core having an aperture therein and a primary winding wrapped around the core; measuring, with a calibrated vector network analyzer (VNA), the impedance (Zop) of the current probe while in an open configuration wherein nothing but air occupies the aperture and the current probe is isolated from a ground; measuring, with the VNA, the impedance (Zsh) of the current probe while in a short configuration, wherein the current probe is electrically shorted; measuring, with the VNA, the impedance (Zin) of the current probe while the current probe is mounted to the structure such that the structure extends through the aperture; and calculating an estimated characteristic impedance (Z?mast) of the structure according to the following equation: Z?mast=(Zin?Zsh)(Zop?Zsh)/(Zop?Zin).
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: April 7, 2015
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Daniel W. Tam, Randall A. Reeves, John H. Meloling
  • Patent number: 8983789
    Abstract: A bias calibration circuit includes a first current source that can provide a majority biasing current, sufficient to provide most but not all of a desired bias voltage across a sensor. A second current source can provide a remaining amount of biasing current (minority biasing current) to provide a bias voltage across the sensor. In some embodiments, the current sources are programmable and codes are determined for programming the first and second current sources. The codes can be stored in a memory.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: March 17, 2015
    Assignee: Marvell International Ltd.
    Inventor: Thart Fah Voo
  • Publication number: 20150032404
    Abstract: The invention relates to methods and devices for determining the temperature calibration characteristic curve of a semiconductor component (3) appertaining to power electronics. They are distinguished, in particular, by the fact that the temperature calibration characteristic curve can be determined in a simple and economically advantageous manner. For this purpose, the power connections of the semiconductor component (3) are interconnected—with a first current source (1) for a load current,—with a second current source (2) for a measurement Current—with a voltmeter (v) for measuring the voltage dropped across either the power connections or auxiliary connections connected to the power connections.
    Type: Application
    Filed: March 16, 2013
    Publication date: January 29, 2015
    Applicant: Siemens Aktiengesellschaft
    Inventors: Marco Bohlländer, Christian Herold, Sebastian Hiller
  • Publication number: 20150032403
    Abstract: Methods and systems for compensating for temperature variation in the performance of electronic circuits and systems are disclosed. In some embodiments, the systems are configured to store compensation parameters determined in calibration, where the compensation parameters are used by the systems to modify performance. In some embodiments, the systems are part of an automatic test equipment (ATE) system.
    Type: Application
    Filed: August 6, 2013
    Publication date: January 29, 2015
    Applicant: ANALOG TEST ENGINES, INC.
    Inventor: Jeffrey Allen King
  • Patent number: 8942941
    Abstract: An apparatus for modifying an output signal indicative of a downhole parameter that may include a carrier conveyable in a wellbore; a negative error compensator; and an output signal device. The negative error compensator may be configured to modify the output of the device to increase or decrease a characteristic of the output signal from the output signal device. Also, a method for modifying an output signal indicative of a downhole parameter that may include modifying a characteristic of an output signal produced by a output signal device in a wellbore using a negative error compensator.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: January 27, 2015
    Assignee: Baker Hughes Incorporated
    Inventors: Stanislav W. Forgang, Luis M. Pelegri
  • Patent number: 8935128
    Abstract: The interference-compensated sensor for detecting an object located in a detection area in a contactless manner, particularly a rain sensor, is provided with a first and a second measuring channel each having a control device and an output, wherein both measuring channels are substantially identical. The sensor further comprises a main subtractor having an output for outputting the difference of the signals at the outputs of the measuring channels. The sensor is provided with a controller unit having an input that is connected to the output of the main subtractor and with an output for outputting a controller signal, by means of which the two measuring channels can be controlled in such a way that the signal at the output of the main subtractor can be controlled to zero. By means of the magnitude of the signal at the output of the controller, it can be determined if an object is located in the detection area.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: January 13, 2015
    Assignees: Mechaless Systems GmbH, ELMOS Semiconductor AG
    Inventors: Rolf Melcher, Erhard Musch, Erhard Schweninger, Roberto Zawacki
  • Patent number: 8930158
    Abstract: A method and apparatus for identifying a load powered by an intelligent AC outlet, sub outlet and socket via an AC plug including an attached or otherwise associated RFID tag selected from a group of RFID tags structured to fit a given standard AC plug size and shape for attachment to said plug about the plug power pins opposite and facing an RFID antenna included in said intelligent outlet. The tags can be pre-coded or individually coded to identify the load powered via said plug.
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: January 6, 2015
    Assignee: Elbex Video Ltd.
    Inventor: David Elberbaum
  • Patent number: 8930168
    Abstract: An embodiment of an electronic device having a plurality of trimmable operative parameters is provided. The electronic device includes a trimming circuit for applying a plurality of trimming actions to each parameter for causing a corresponding correction of the parameter, for at least one reference parameter, a measuring circuit for measuring the reference parameter responsive to the application of at least part of the trimming actions, and for forcing the application of the selected trimming action for the reference parameter. For each non-reference parameter different from the at least one reference parameter, the electronic device includes a selection circuit for selecting one of the trimming actions for the non-reference parameter corresponding to the selected trimming action for the at least one reference parameter, and a biasing circuit for forcing the application of the selected trimming action for each non-reference parameter.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: January 6, 2015
    Assignee: SK Hynix Inc.
    Inventors: Donghyun Seo, Kijun Nam, Seokseong Yoon
  • Patent number: 8890086
    Abstract: An ion detection system for detecting ions whose velocity varies during an operating cycle. The ion detection system includes a dynode electron multiplier (e.g., a microchannel plate (MCP)) having a bias voltage input, and a bias voltage source to apply a bias voltage to the bias voltage input of the dynode electron multiplier. With a fixed bias voltage applied to its bias voltage input, the dynode electron multiplier has a gain dependent on the velocity of ions incident thereon. The bias voltage applied by the bias voltage source to the bias voltage input of the dynode electron multiplier varies during the operating cycle to reduce the dependence of the gain of the dynode electron multiplier on the velocity of the ions incident thereon.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: November 18, 2014
    Assignee: Agilent Technologies, Inc.
    Inventors: Noah Goldberg, James L. Bertsch, David Deford
  • Patent number: 8875491
    Abstract: An exhaust gas aftertreatment system and method are provided. The system comprises a controller, a pump, and a volume quantity dispensing unit. The volume quantity dispensing unit comprises a pressure transducer comprising an electric pressure sensor, at least one fine atomizing nozzle for apportioning the aqueous solution directly into an exhaust gas flow, and at least one means for changing a pressure value. The means changes the pressure value in such a way that a pressure output signal from the pressure transducer to the controller is modified from an actual pressure value sensed by the pressure sensor. A first signal provided by the controller to the pump and a second signal provided by the controller to the volume quantity dispensing unit are adapted based on the output signal from the pressure transducer and a further signal indicative of an operating state of the internal combustion engine.
    Type: Grant
    Filed: August 17, 2012
    Date of Patent: November 4, 2014
    Assignee: Cummins Ltd.
    Inventors: Friedrich Zapf, Thorsten Pelz, Heico Stegmann
  • Patent number: 8874302
    Abstract: Exemplary embodiments of an improved scanning tool with a module reprogramming capability are disclosed. In various embodiments, the improved scanning tool uses sophisticated identification software to identify automotive functional modules to identify the modules' part-numbers and resident software revisions. The appropriate update software can then be uploaded and programmed onto the modules of interest with minimal delay and human interaction.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: October 28, 2014
    Assignee: Bosch Automotive Service Solutions LLC
    Inventors: Hemang Shah, Brant Story, Poojitha Dahanaike
  • Patent number: 8874397
    Abstract: A user obtains a set of modules, inserts them into slots of a chassis, and interconnects the modules to form a modular instrument. A signal path extends through the modules. To support calibration of the signal path, a first of the modules (or the chassis or a calibration module) includes a calibration signal generator. A computer directs the first module to apply the calibration signal from the generator to the signal path, and measures the power (or amplitude) of the output of the signal path. The computer reads a factory-measured value A of the calibration signal amplitude from a memory of the first module (or the chassis or the calibration module). The value A and the measured output power of the signal path are used to determine a gain of the signal path. The system compensates for that gain when the signal path is used to measure live operational signals.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: October 28, 2014
    Assignee: National Instruments Corporation
    Inventors: Tamir E. Moran, Jatinderjit S. Bains, Daniel S. Wertz
  • Publication number: 20140316735
    Abstract: The present invention discloses a protection device and a calibration method thereof. The protection device includes a sensing circuit and a detection circuit. The detection circuit includes: a comparing circuit, a setting circuit and an automatic calibration circuit. The comparing circuit is coupled to the sensing circuit and generates a protection signal according to a sensing signal and an offset setting. The setting circuit is coupled to the comparing circuit and generates the offset setting according to a calibration signal. The automatic calibration circuit is coupled between the comparing circuit and the setting circuit, for generating the calibration signal. The automatic calibration circuit automatically sets a protection threshold and stores the calibration signal which corresponds to the protection threshold.
    Type: Application
    Filed: January 13, 2014
    Publication date: October 23, 2014
    Applicant: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Tong-Cheng Jao, Isaac Y. Chen
  • Patent number: 8868365
    Abstract: A system and a method of generating an external parameter value for a separately excited motor controller are disclosed, the system including: a digital signal processor to convert a received analog electrical signal into a digital signal and to scale the digital signal, so as to generate a parameter value in conformity with a data format of the system; an external parameter generating module to adjust the parameter value with a calibration coefficient to obtain the external parameter value; the calibration coefficient being generated by a calibration coefficient generating module and being pre-stored in a calibration coefficient storing module; and a calibration coefficient generating module to read the parameter value generated by the digital signal processor and obtain an actual measuring value as a reference parameter value, to calculate a difference value between the parameter value from the digital signal processor and the reference parameter value, and to generate the calibration coefficient from a rat
    Type: Grant
    Filed: June 22, 2011
    Date of Patent: October 21, 2014
    Assignee: Liuzhou Wuling Motors Co., Ltd.
    Inventors: Rijun Huang, Yulin Su, Ben Cai, Yanzhang Ye
  • Publication number: 20140257735
    Abstract: A user obtains a set of modules, inserts them into slots of a chassis, and interconnects the modules to form a modular instrument. A signal path extends through the modules. To support calibration of the signal path, a first of the modules (or the chassis or a calibration module) includes a calibration signal generator. A computer directs the first module to apply the calibration signal from the generator to the signal path, and measures the power (or amplitude) of the output of the signal path. The computer reads a factory-measured value A of the calibration signal amplitude from a memory of the first module (or the chassis or the calibration module). The value A and the measured output power of the signal path are used to determine a gain of the signal path. The system compensates for that gain when the signal path is used to measure live operational signals.
    Type: Application
    Filed: May 19, 2014
    Publication date: September 11, 2014
    Applicant: NATIONAL INSTRUMENTS CORPORATION
    Inventors: Tamir E. Moran, Jatinderjit S. Bains, Daniel S. Wertz
  • Patent number: 8832513
    Abstract: A processor link that couples a first processor and a second processor is selected for validation and a plurality of communication parameter settings associated with the first and the second processors is identified. The first and the second processors are successively configured with each of the communication parameter settings. One or more test data pattern(s) are provided from the first processor to the second processor in accordance with the communication parameter setting. Performance measurements associated with the selected processor link and with the communication parameter setting are determined based, at least in part, on the test data pattern as received at the second processor. One of the communication parameter settings that is associated with the highest performance measurements is selected. The selected communication parameter setting is applied to the first and the second processors for subsequent communication between the first and the second processors via the processor link.
    Type: Grant
    Filed: November 20, 2013
    Date of Patent: September 9, 2014
    Assignee: International Business Machines Corporation
    Inventors: Robert W. Berry, Anand Haridass, Prasanna Jayaraman
  • Patent number: 8825431
    Abstract: A fluorescence intensity calculating apparatus, includes: a measuring section configured to receive fluorescences generated from plural fluorescent dyes excited by radiating a light to a microparticle multiply-labeled with the plural fluorescent dyes having fluorescence wavelength bands overlapping one another by photodetectors which correspond to different received light wavelength bands, respectively, and whose number is larger than the number of fluorescent dyes, and obtain measured spectra by collecting detected values from the photodetectors; and a calculating section configured to approximate the measured spectra based on a linear sum of single-dyeing spectra obtained from the microparticle individually labeled with the fluorescent dyes, thereby calculating intensities of the fluorescences generated from the fluorescent dyes, respectively.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: September 2, 2014
    Assignee: Sony Corporation
    Inventors: Yasunobu Kato, Yoshitsugu Sakai
  • Patent number: 8826092
    Abstract: A processor link that couples a first processor and a second processor is selected for validation and a plurality of communication parameter settings associated with the first and the second processors is identified. The first and the second processors are successively configured with each of the communication parameter settings. One or more test data pattern(s) are provided from the first processor to the second processor in accordance with the communication parameter setting. Performance measurements associated with the selected processor link and with the communication parameter setting are determined based, at least in part, on the test data pattern as received at the second processor. One of the communication parameter settings that is associated with the highest performance measurements is selected. The selected communication parameter setting is applied to the first and the second processors for subsequent communication between the first and the second processors via the processor link.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: September 2, 2014
    Assignee: International Business Machines Corporation
    Inventors: Robert W. Berry, Jr., Anand Haridass, Prasanna Jayaraman
  • Patent number: 8798953
    Abstract: A calibration method for radio frequency scattering parameter measurement applying three calibrators and measurement structure thereof, comprising a transmission line segment calibrator, an offset series device calibrator, an offset shunt device calibrator and a tested object measuring instrument, wherein the length of the transmission lines for the offset series device calibrator and the offset shunt device calibrator is equal to the one of the transmission line for the tested object measuring instrument such that the offset series device calibrator, the offset shunt device calibrator and the tested object measuring instrument have the identical error boxes, and after having acquired the scattering parameter matrix of the error box by means of the calibration method, it is possible to connect the tested electronic device onto the tested object measuring instrument and perform operations on uncorrected measurement data thereof thereby obtaining the radio frequency scattering parameter of the tested object.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: August 5, 2014
    Assignee: Yuan Ze University
    Inventor: Chien-Chang Huang