Circuit Tuning (e.g., Potentiometer, Amplifier) Patents (Class 702/107)
  • Patent number: 6351718
    Abstract: A current control apparatus capable of accurately and stably controlling a current which is supplied to an object of control such as a coil of a solenoid even when a control target value varies greatly at a predetermined time interval. In this apparatus, a value (y3) of a current passing through the object of control (33) is detected, and the detected current value (y3) is output at a predetermined time intervals. On the basis of a preceding corrected current value (y4old) and a presently outputted current value (y3), a presently corrected current value (y4) is computed so that this value comes to be intermediate between the preceding corrected current value (y4old) and presently outputted current value (y3), and the resultant current value is output.
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: February 26, 2002
    Assignee: Komatsu Ltd.
    Inventors: Mitsuhiro Shimazu, Shuuki Akushichi
  • Patent number: 6347288
    Abstract: An automatic pole-zero (APZ) adjustment circuit for an ionizing radiation spectroscopy system. An output of a preamplifier is sampled to identify the decay time constant of the preamplifier output. A correction based upon the identified decay time constant is generated by a correction signal generator and applied through either an analog pole-zero adjustment network or a programmable digital shaping filter to accomplish pole-zero correction.
    Type: Grant
    Filed: November 10, 1999
    Date of Patent: February 12, 2002
    Assignee: PerkinElmer Instruments
    Inventors: Rex C. Trammell, Russell D. Bingham, Dale A. Gedcke
  • Patent number: 6345236
    Abstract: A method for detecting installation and/or calibration errors in signal output units of a partial-discharge measurement system, where the signal output units are arranged at various points in an electrical insulation system, includes: Calibrating a selected one of the signal output units by injecting a first calibration pulse between a high-voltage side of the insulation system and ground. Storing calibration data obtained during the step of calibrating. Recording and storing a first set of partial discharge signals and an amplitude of the first calibration pulse via the selected signal output unit. Adopting the stored calibration data for the selected signal output unit, for calibrating the other signal output units. Recording and storing, via the other signal output units, a second set of partial discharge signals and an amplitude of a second calibration pulse. And, comparing the stored partial discharge signals for all the signal output units with one another.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: February 5, 2002
    Assignee: Asea Brown Boveri AG
    Inventors: Tom Bertheau, Jörg Ruhe, Thomas Füglister
  • Publication number: 20020013673
    Abstract: An electrical device has one two-terminal network and a measuring device (4) and a source (3) which are connected to the two-terminal network. The measuring device (4) controls the source (3) via a computing device (5) in such a way that a desired relationship is produced between current and voltage of the two-terminal network.
    Type: Application
    Filed: March 28, 2001
    Publication date: January 31, 2002
    Inventor: Hanspeter Muhlemann
  • Publication number: 20020007252
    Abstract: A method and apparatus for providing controllable compensation factors to a compensated driver circuit which may be used to perform testing of the structural integrity of the compensated driver circuit. One disclosed apparatus includes a compensated driver circuit having a number of subcomponents. At least one compensation factor, which may be provided by a compensation circuit, controls which of the subcomponents to enable. An additional circuit is coupled to provide controllable values for the at least one compensation factor.
    Type: Application
    Filed: June 22, 1999
    Publication date: January 17, 2002
    Inventors: CHRISTOPHER JOHN SINE, ALPER ILKBAHAR, SCOTT W. MURRAY
  • Publication number: 20010049588
    Abstract: A method and apparatus for operating an integrated circuit in an electronic device by controlling the supply voltage to the integrated circuit (IC). A parameter of the IC is measured and used to adjust the supply voltage of the IC. The measured parameter is indicative of the effective channel mobility of the IC. One purpose of adjusting the voltage is to modify the effective channel mobility such that the individual channel currents are substantially constant over a predetermined operating temperature range of the IC. The modification of channel mobility is chosen to set the individual channel currents at levels that either maximizes operating speed, minimizes power consumption, extends the range of operating temperature, or increases the operational reliability of the IC.
    Type: Application
    Filed: July 13, 2001
    Publication date: December 6, 2001
    Inventors: James F. Bausch, Andrew L. Van Brocklin, Chadwick W. Stryker
  • Patent number: 6324482
    Abstract: An object of the present invention is to provide an automatic compensation sensor that can eliminate an exclusive input terminal for the compensation mode signal. To achieve this object, the present invention comprises a sensor body (1), a signal output terminal (5) for outputting signals from the sensor body (1), and a controller for compensating the output signal from this signal output terminal (5).
    Type: Grant
    Filed: April 8, 1999
    Date of Patent: November 27, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiya Nakagaki, Toshiyuki Nozoe, Takahiro Manabe
  • Publication number: 20010044702
    Abstract: A digital device for testing and calibrating the oscillation frequency of an integrated oscillator, integrated in an integrated circuit of a type that includes at least one storage and control section, a plurality of connection pins connected bidirectionally to the storage and control section, and an external generator delivering a reference signal of known duration to at least a first digital input pin of the plurality of connection pins.
    Type: Application
    Filed: April 11, 2001
    Publication date: November 22, 2001
    Inventors: Alessandro Rocchi, Marco Bisio, Guido De Sandre, Giovanni Guaitini, Marco Pasotti, Pier Luigi Rolandi
  • Publication number: 20010032058
    Abstract: Method and Apparatus for Controlling System Parameters A method and an apparatus for controlling system parameters, in particular for controlling the voltage applied to piezoelectric elements (10, 20, 30, 40, 50, 60) within a circuit (A) for charging and discharging piezoelectric elements (10, 20, 30, 40, 50, 60) are described. The method is characterized by modifying at least one control parameter for the control of a system parameter, in particular a target voltage for the voltage applied to a piezoelectric element (10, 20, 30, 40, 50, 60), in view of at least one systematic error occurring during a first control procedure of the system parameter to obtain a corrected control parameter for a second and/or a further control of the system parameter. The apparatus is particularly eligible for use with the inventive method.
    Type: Application
    Filed: April 2, 2001
    Publication date: October 18, 2001
    Inventors: Johannes-Jorg Rueger, Matthias Mrosik, Volker Pitzal, Udo Schulz
  • Patent number: 6304828
    Abstract: The system and method for calibrating a signal detection threshold circuit is used in a radio frequency (RF) receiver, such as a in an early warning radar (EWR) system, in which a signal detection threshold circuit rejects signals below a predetermined threshold setting and prevents noise signals from causing false alarms. The system and method include setting an initial threshold setting and receiving noise signals in one or more channels. A threshold comparison circuit rejects noise signals below the threshold setting, and a pulse repetition frequency (PRF) detection circuit detects noise pulses above the threshold setting and determines the PRF. An automatic threshold determiner and setter determines whether the PRF has reached a predetermined frequency (e.g., 400 kHz) and lowers the threshold setting until the predetermined frequency is reached. When the predetermined frequency is reached the threshold setting is stored as a noise measurement.
    Type: Grant
    Filed: April 2, 1999
    Date of Patent: October 16, 2001
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: David J. Swanick, William P. Huntley
  • Patent number: 6295508
    Abstract: An automatic pole-zero (APZ) adjustment circuit for an ionizing radiation spectroscopy system. An amplitude histogram of an acquired spectrum is obtained. The shape of a selected peak from the amplitude histogram is analyzed for peak shape distortion indicating the existence of undershoot or overshoot. An analog correction signal generated by a pole-zero adjustment network is added to cancel existing undershoot or overshoot, thereby minimizing distortion of the peak shape. In an alternate embodiment, the correction signal is a digital transformation algorithm applied to a programmable digital shaping filter, thereby digitally minimizing distortion of the peak shape.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: September 25, 2001
    Assignee: PerkinElmer Instruments, Inc.
    Inventors: Rex C. Trammell, Russell D. Bingham, Dale A. Gedcke
  • Patent number: 6285960
    Abstract: A system and method are disclosed for calibrating a line card having a gain control circuit and memory device. The gain control circuit is configured to receive an input signal and an adjustment signal and to output an adjusted output signal that is based on the input signal and the adjustment signal. The gain control circuit also is configured to alter the adjustment signal to a nominal adjustment value so that an adjusted amplitude value of the adjusted signal converges with a nominal amplitude value. A first input signal, a first adjustment signal, and a nominal amplitude value are provided to the gain control circuit. A first nominal adjustment value is determined. The first nominal adjustment value is substantially permanently stored within a first address of the memory device with the first address being associated with the first input signal.
    Type: Grant
    Filed: October 7, 1998
    Date of Patent: September 4, 2001
    Assignee: Cisco Technology, Inc.
    Inventors: Joseph C. H. Fung, Mark E. Millet, Charles J. Naegeli, Nan Tu, Guenter Roeck, Yuzon Hao
  • Patent number: 6282409
    Abstract: It is shown a lid (100) at a portable device (150), as well as a portable device (150) having a lid (100), where said portable device (150) contains electrical device circuitry (151) within a device housing (152). The lid (100) comprises electrical lid circuitry (101), mechanical lid connection means (103) for enabling mechanical connection and disconnection to mechanical device connection means (153) of the device (150) that are accessible from without the housing (152). The lid (100) further comprises electrical lid connection means (102) for enabling electrical connection and disconnection to electrical device connection means (154) of the device (150) that are accessible from without the housing (152). The electrical lid circuitry (101) comprises electrical calibration means (104) that enable calibration of the electrical lid circuitry (101) to a predetermined calibration value as sensed at the electrical lid connection means (102).
    Type: Grant
    Filed: December 18, 1998
    Date of Patent: August 28, 2001
    Assignee: Telefonaktiebolaget LM Ericsson
    Inventor: Stig Frohlund
  • Patent number: 6278956
    Abstract: A method for locating a failing latch in a defective shift register having P latches connected in series fabricated in an integrated circuit chip. The chip is depassivated to expose its upper metalized layer, and it is in the chamber of a scanning electron microscope (SEM) having sharp voltage contrast capabilities. Clock signals are generated to properly exercise the shift register. A string of N latches, wherein 1≦N≦P, typically N=P/2 is first selected and the stimuli are applied to the latches to allow the output net of the last latch of the string to toggle at a frequency of about 1 Hz. The SEM beam is focused on the area which encompasses the last latch, so that, if the latch output net blinks on the SEM screen, the string under observation is deemed to be good. Then, another, more extended string is selected and the above procedure is repeated.
    Type: Grant
    Filed: April 13, 1999
    Date of Patent: August 21, 2001
    Assignee: International Business Machines Corporation
    Inventors: Alain Leroux, Dominique Petit, Sylvain Posson
  • Publication number: 20010007091
    Abstract: The integrated circuit (1) is provided with integrated calibrating means in order to be able to calibrate at least one electronic module (9) supplying at its output a reference voltage or a time base signal or a reference frequency signal. Said calibrating means are defined by a microcontroller which receives via an input pad (2) of the integrated circuit (1) an external reference signal (3) which is compared to an internal reference signal of the reference module in order to be able to calibrate in an autonomous manner the integrated reference electronic module (9) as a function of the external reference signal (3). The final calibrating parameters are permanently stored with an associated signature in a memory (10) so that each time that voltage is subsequently applied to the circuit said final calibrating parameters are automatically applied to the corresponding reference module (9).
    Type: Application
    Filed: December 20, 2000
    Publication date: July 5, 2001
    Inventors: Fabrice Walter, Christophe Ratajczak
  • Patent number: 6249753
    Abstract: A sensor system is disclosed. The system comprises a sensor for sensing an input between a first, minimum sensor input value and a second, maximum sensor input value. The sensor generates a sensor output signal relative to the sensor input value. The sensor is subject to offset and gain errors. The system further includes a microprocessor having first and second output signals and a signal conditioner coupled between the sensor and the microprocessor. The signal conditioner generates a first signal conditioner signal when the sensor input value equals the minimum sensor input value and generates a maximum signal conditioner signal when the sensor input value equals the maximum sensor input value. The signal conditioner includes circuitry for minimizing the sensor offset error and circuitry for minimizing the sensor gain error.
    Type: Grant
    Filed: December 29, 1998
    Date of Patent: June 19, 2001
    Assignee: Square D Company
    Inventors: Robert C. Mason, Rodney B. Washington
  • Patent number: 6246965
    Abstract: In a test configuration for a pre-distortion board configured with an analog laser, a test operator adjusts the settings for one or more components (e.g., potentiometers) on the pre-distortion board, e.g., to optimize the linearity of the analog laser, relying on information contained in a graphical display presented on a computer monitor. In one embodiment, a signal generator generates electrical signals, the pre-distortion board distorts the electrical signals, the analog laser converts the distorted electrical signals into optical signals, an optical receiver converts the optical signals back into electrical signals, a band-pass filter filters the converted electrical signals, an RF spectrum analyzer generates amplitude vs. frequency data from the filtered electrical signals, and a computer generates the graphical display from the amplitude vs.
    Type: Grant
    Filed: October 1, 1998
    Date of Patent: June 12, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: Kenneth L. Cockerham, Stephen B. Krasulick, Thomas F. Strelchun, Paul K. Tallat-Kelpsa, Anthony J. Wiencek
  • Patent number: 6246968
    Abstract: In order to enable frequent and easy adjustment of a physical quantity transformed by a sensor into starting values or curves, the following method is applied: a) the modifying unit keeps adjustment data on a temporary memory (55) through the output pin (OUT), and a working unit (54) gives at the output pin (OUT) the starting value and curves as modified; b) once the starting values and curves have found their adjustment position, the adjustment data are stored by the modifying unit (52) in a permanent memory (53).
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: June 12, 2001
    Assignee: AB Eletronik GmbH
    Inventors: Klaus Wilczek, Volker Topp
  • Patent number: 6198292
    Abstract: A test unit for measuring crosstalk in twisted pair cable. The test unit has an output signal balance (OSB) circuit that compensates for parasitic capacitance at its output terminals. The OSB circuit has a voltage controlled capacitance connected in circuit with each output terminal to control the effective capacitance between the output terminals and ground. The bias voltage for the variable capacitances is calibrated by a method in which the voltage for one of the variable capacitors is held constant while the voltage for the other capacitor is varied in voltage levels. A test signal frequency sweep is applied to the test unit output terminals. First and second voltage values are obtained and a final bias voltage value is calculated from using these two values.
    Type: Grant
    Filed: July 20, 1999
    Date of Patent: March 6, 2001
    Assignee: Agilent Technologies, Inc.
    Inventors: James W Kirk, Ron Cook, Michael J Haley, Fanny I Mlinarsky
  • Patent number: 6188970
    Abstract: In a method for calibrating or aligning a multistage selective amplifier including an oscillator circuit and at least one tuning circuit, the tuning voltages respectively necessary for aligning the respective tuning circuits to the required receiving frequency are calculated directly from a mathematical relationship between the respective tuning voltage and the oscillator voltage. In order to achieve this, a characteristic multiplicative coefficient and a characteristic additive factor for each tuning circuit are stored in a memory upon manufacturing or switching on the device. In order to select a desired receiving frequency, the respective stored values as well as an oscillator voltage are provided to an amplification circuit, which correspondingly amplifies the oscillator voltage by the multiplicative coefficient and the additive factor and then provides the resulting output value as a tuning voltage to the respective tuning circuit.
    Type: Grant
    Filed: September 17, 1998
    Date of Patent: February 13, 2001
    Assignees: Temic Semiconductor GmbH, Becker GmbH
    Inventors: Karl Anton Becker, Stefan Brinkhaus, Armin Ganz, Bernd Memmler, Hans-Eberhardt Kroebel
  • Patent number: 6178388
    Abstract: A method and apparatus for calibrating a resistive ladder switching matrix coupled to a keypad in a portable electronic device having a housing with a cover that may be positioned in an open state or a closed state. A first contact of a calibration element is coupled to a reference voltage and a second contact of the calibration element is coupled to ground by moving the cover from the open state to the closed state. When the first contact of the calibration element is coupled to the reference voltage and the second contact of the calibration element is coupled to ground, a calibration resistance across the calibration element is determined. The calibration resistance may correspond to an input impedance of the resistive ladder switching matrix when no buttons associated with the keypad are depressed. Signals from the resistive ladder switching network are calibrated when the cover is in the closed state in accordance with the calibration resistance.
    Type: Grant
    Filed: November 13, 1998
    Date of Patent: January 23, 2001
    Assignee: Qualcomm Incorporated
    Inventor: Daniel D. Claxton
  • Patent number: 6131073
    Abstract: A power voltage of a power source circuit is produced by amplifying a threshold voltage difference of an operational amplifier by an amplification factor corresponding to a dividing ratio of a resistance dividing circuit. The power source circuit is integrated on a CMOS substrate together with a computer block. A plurality of analog switches are associated with the resistance dividing circuit to stabilize the power voltage of the power source circuit. One of these switches is selectively closed to change the dividing ratio of the resistance dividing circuit in accordance with actuation data stored in a control register.
    Type: Grant
    Filed: June 6, 1997
    Date of Patent: October 10, 2000
    Assignee: DENSO Corporation
    Inventors: Yoshimitsu Honda, Hideaki Ishihara, Haruyasu Sakishita, Kouichi Maeda
  • Patent number: 6131074
    Abstract: A calibration apparatus for a programmable comparator is provided which does not need circuits for offset adjustment and gain adjustment or high precision parts makes possible inexpensive construction of the apparatus itself, and at the same has a wide adjustment range and can carry out high precision calibration. The programmable comparator compares the analog voltage value corresponding to a supplied digital code and the voltage value corresponding to the electric current value of an electric current supplied by a predetermined power supply point, and outputs the result. In the calibration apparatus, the power supply means supplies to a power supply point an electric current having an electric current value indicated, and an electric current detection means converts the electric current value of the electric current flowing through the power supply point to a voltage value, and this value is output to the programmable comparator.
    Type: Grant
    Filed: July 28, 1998
    Date of Patent: October 10, 2000
    Assignee: Ando Electric Co., Ltd.
    Inventor: Teruyoshi Kawai
  • Patent number: 6018702
    Abstract: A filter calibration system uses the reflection characteristics of a tuned filter, such as a YIG-tuned filter (YTF), to establish a correspondence between a control signal applied to the filter and the passband center frequency of the filter. This correspondence enables tuning characteristic of a YTF stored during a baseline characterization of a spectrum analyzer to be corrected to compensate for temperature changes and changes in operating parameters of the spectrum analyzer. The filter calibration system uses components within the spectrum analyzer to perform the calibration so that the manufacturing cost of the spectrum analyzer is not increased. The spectrum analyzer's local oscillator provides a stimulus signal that is applied to the YTF. A mixer within the spectrum analyzer detects reflections of the stimulus signal by the YTF while control signals applied to the YTF are varied to correspondingly adjust the passband center frequency of the YTF.
    Type: Grant
    Filed: June 22, 1998
    Date of Patent: January 25, 2000
    Assignee: Hewlett-Packard Company
    Inventor: David A. Luiz
  • Patent number: 5978745
    Abstract: A system and method for automatically-calibrating display monitor beam currents. A device selects a target beam current within a display monitor. A current sampler measures a present beam current within the display monitor. A beam current controller increases a gain of an amplifier within the monitor by a delta value if the present beam current is less than the target beam current, and decreases the gain of the amplifier by the delta value if the present beam current is greater than the target beam current. A first step in the method selects a target beam current. A second step measures a present beam current generated by an amplifier. A third step increases a gain of the amplifier by a delta value if the present beam current is less than the target beam current. A fourth step decreases the gain of the amplifier by the delta value if the present beam current is greater than the target beam current. A fifth step sets a multiplier to a predetermined value.
    Type: Grant
    Filed: January 23, 1998
    Date of Patent: November 2, 1999
    Assignee: Apple Computer, Inc.
    Inventor: Jesse Devine
  • Patent number: 5974362
    Abstract: A signal generator comprises a number of independent signal sources each of which can be controlled to generate predetermined frequencies and modulation. The outputs of these signal sources can be made available separately at output ports or can be combined within the signal generator to provide a combined output signal. The output signals are sensed at the output ports, and are calibrated against a stored correction tabulation to ensure that they have the correct signal level at the output ports. Such a signal generator is useful for the measurement and testing of complex electrical and electronic products.
    Type: Grant
    Filed: November 14, 1996
    Date of Patent: October 26, 1999
    Assignee: Marconi Instruments Limited
    Inventor: David P Owen
  • Patent number: 5940782
    Abstract: A method of calibrating a linear driver system including a linear driver circuit, logic means connected to an input line of the linear driver circuit, and information storage means associated with the logic means, involves testing the linear driver circuit once assembled. A predetermined test load and a test electrical energy source are connected to the linear driver circuit. A first input test voltage is applied to the input line of the linear driver circuit and a corresponding first current level through the test load is measured. A second input test voltage is applied to the input line of the linear driver circuit and a corresponding second current level through the test load is measured. The two measured current levels are stored in the information storage means for later retrieval during operation of the linear driver system.
    Type: Grant
    Filed: May 12, 1997
    Date of Patent: August 17, 1999
    Assignee: Caterpillar Inc.
    Inventors: Paul C. Gottshall, Brian G. McGee
  • Patent number: 5933797
    Abstract: A digital signal processor that is used for echo cancellation computations is disclosed, which includes parallel multiplier/adders, an input signal sample memory, and a plurality of accumulators for temporarily storing the results of the computations performed. Consequently, not all of the computational results have to be saved in an external data memory, which minimizes data transfer bottlenecks and significantly increases the computational efficiency of the digital signal processor. The adaptive filter coefficient updates can thereby be computed much faster, and the adaptive filter coefficients can be copied much faster from one filter to the other. The computational complexity of the digital signal processor is significantly less than that of prior digital signal processors.
    Type: Grant
    Filed: February 28, 1997
    Date of Patent: August 3, 1999
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Stefan H.ang.akansson, Claes Hammar, Tonu Trump
  • Patent number: 5897608
    Abstract: A compensating method and apparatus is provided which collectively compensates for variations in a variety of characteristics in respective circuit portions of a signal processing circuit. A correction data generator is provided for generating correction value data for correction to be made for an output signal of the signal processing circuit, in order to compensate for variations in the characteristics of the at least one circuit portion. Also, a compensator is connected to receive an output signal from the signal processing circuit as well as to receive the correction value data from the correction data generating means, for correcting the output signal in accordance with the respective correction value data corresponding to the at least one circuit portion to generate a compensated output signal.
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: April 27, 1999
    Assignee: Leader Electronics, Corp.
    Inventors: Itoshi Yokoyama, Masaaki Nagai, Yoshimichi Sanada
  • Patent number: 5848383
    Abstract: A method and system for calibrating a sensor is disclosed The method and system include receiving data relating to a plurality of temperature parameters and providing polynomial compensation of a temperature coefficient (TC). When providing polynomial compensation of the temperature coefficient, the method and system further include providing a first output and adding a second value to the first output. The first output is a distal temperature multiplied by a first value.
    Type: Grant
    Filed: May 6, 1997
    Date of Patent: December 8, 1998
    Assignee: Integrated Sensor Solutions
    Inventor: Mohammad Yunus