Circuit Tuning (e.g., Potentiometer, Amplifier) Patents (Class 702/107)
-
Publication number: 20030125892Abstract: The invention is directed to various calibration techniques for calibrating an imagining device such as a display device, a printer, or a scanner. The techniques may involve characterizing the imaging device with a device model such that an average error between expected outputs determined from the device model and measured outputs of the imaging device is on the order of an expected error, and adjusting image rendering on the imaging device to achieve a target behavior. The invention can achieve a balance between analytical behavior of the imaging device and measured output. In this manner, adjustments to image rendering may be more likely to improve color accuracy and less likely to overcompensate for errors that are expected.Type: ApplicationFiled: December 31, 2001Publication date: July 3, 2003Inventor: Christopher J. Edge
-
Patent number: 6587804Abstract: A method and apparatus for calibrating a data path of a digital circuit uses an even bit pseudo-random calibration pattern. A portion of the pattern is captured in a capture period and used to predict a next arriving portion of the calibration pattern. The next arriving portion of the calibration pattern is captured and then compared to the predicted pattern in a compare period, and the result of the comparison is used to relatively time data arriving in the data path to a clocking signal which clocks in the data. The time duration of the compare period may be varied to ensure that all possible bits of the calibration pattern are used in the calibration procedure.Type: GrantFiled: August 14, 2000Date of Patent: July 1, 2003Assignee: Micron Technology, Inc.Inventors: Brian Johnson, Brent Keeth
-
Publication number: 20030120449Abstract: Actual measured results, which do not agree with a reference measuring system accurately, are corrected to the same level as results measured by the reference measuring system. An interrelating formula between results measured by an actual measuring system and results measured by a reference measuring system is obtained after measuring electrical characteristics of a correction-data acquisition sample by the reference measuring system and the actual measuring system, respectively. Then, by substituting electrical characteristics of a target electronic component measured by the actual measuring system in the interrelating formula for computation, the electric characteristics of the target electronic component is corrected to electric characteristics assumed to be obtained by the reference measuring system.Type: ApplicationFiled: November 27, 2002Publication date: June 26, 2003Applicant: Murata Manufacturing Co., Ltd.Inventor: Gaku Kamitani
-
Patent number: 6584422Abstract: A method and apparatus are provided for optimizing calibration of a tunable filter over a wide range of frequencies in a data channel of a direct access storage device (DASD). Calibration codes are received for low corner frequency, banding, and high corner frequency. A programmable diode is provided with a DC portion and a tunable digital-to-analog converter (DAC). A calibration control current is generated for calibrating the tunable filter utilizing the programmable diode and the calibration codes. The programmable diode is used to vary the calibration control current to calibrate the tunable filter to a correct low corner frequency and high corner frequency. The programmable diode can be programmed over a large range.Type: GrantFiled: May 24, 2001Date of Patent: June 24, 2003Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Jaydip Bhaumik, Raymond Alan Richetta
-
Patent number: 6581017Abstract: A system and method in which delay strobe variation in a double data rate device is calibrated by first individually calibrating all slave strobe delay devices at system startup. Thereafter, a master strobe delay device is activated periodically to determine an incremental delay adjustment. This incremental delay adjustment is then used to by the slave strobe delay devices to modify the calibration value performed by the slave strobe delay devices upon startup. In this manner, individual on-die variations are compensated for each slave strobe delay device and variations due to voltage and temperature changes are compensated for without effecting the normal operation of the slave strobe devices.Type: GrantFiled: June 28, 2001Date of Patent: June 17, 2003Assignee: Intel CorporationInventor: John F. Zumkehr
-
Patent number: 6574576Abstract: In the present invention, a transmission line length estimation circuit with continuous feedback equalizer is provided. The transmission line length estimation circuit comprises a DC bias circuit and a peak detector circuit to generate a DC voltage according to a different cable length. An equalizer core circuit is for receiving the first signal and generating a second signal. A peak detector circuit is used for the first signal and the second signal. A transmission line length detector circuit is coupled to the peak detector circuit and used for generating a plurality of first parameters for phase shift and amplitude losses according to the different cable length. An internal pattern calibration circuit is multiplexed to the first signal and used for generating a plurality of second parameters for calibration of close loop.Type: GrantFiled: April 3, 2001Date of Patent: June 3, 2003Assignee: Macronix International Co., Ltd.Inventors: Chi-Ming Chen, Pi-Fen Chen
-
Patent number: 6571191Abstract: A system for recalibrating a remote electronic control system, such as an engine control module (ECM), includes a computer maintaining a database of calibration upgrades and a history of recalibrations for specifically identified ECMs. Software routines determine whether the recalibration history includes the latest calibration upgrades, and if not, automatically downloads those upgrades to the ECM. The software also compares an access password for the ECM to entries in a library of acceptable passwords, and if a match therebetween is found access to the ECM is allowed for downloading recalibration information thereto. The system also contemplates a protocol for verifying the integrity of data downloaded from the ECM to the computer. Types of data susceptible to error are identified, and the downloaded information is evaluated to determine if the susceptible types of data are present. If so, and if correctable errors exist, the downloaded trip information is corrected.Type: GrantFiled: October 27, 1998Date of Patent: May 27, 2003Assignee: Cummins, Inc.Inventors: Christopher S. York, Dale E. Thompson, Michele S. Roberts
-
Patent number: 6567762Abstract: An apparatus, method and system extend the dynamic range measurements performed on a device under test. The apparatus and method compensate for the non-ideal characteristics of the measurement system elements. Further, the apparatus, method and system facilitate low-level distortion measurements and improve the accuracy of such measurements using a novel cancellation signal approach. The dynamic range extension apparatus has an input port for accepting an input test signal from a signal source and an output port for delivering an output signal to a measurement processor. The apparatus comprises a signal splitter at its input, a cancellation pathway, a test pathway and a signal combiner at its output. The system comprises a signal source that provides an input signal to the input of the apparatus and a measurement processor at the output of the apparatus. In the dynamic range extension apparatus, method and system, a signal from the input signal source is split by the signal splitter into two signals.Type: GrantFiled: December 22, 2000Date of Patent: May 20, 2003Assignee: Agilent Technologies, Inc.Inventors: Christian A. Bourde, J. Barry Taylor
-
Patent number: 6564158Abstract: Apparatus and method having a probe and readout for taking electromagnetic field measurements by acquiring raw data and linearizing the data either during processing or after processing by using a curve-fitting equation to non-linearly interpolate between calibration data points. A curve-fitting equation of the form V/m=a+bxc is used for selected segments of the data and the invention requires only the retention of numerical values for the coefficients a, b, and c for each data segment. The coefficient values are stored in the probe and used either by the probe or the readout to construct calibrated data in volts per meter (V/m).Type: GrantFiled: August 17, 2000Date of Patent: May 13, 2003Assignee: Holaday Industries, Inc.Inventors: Jay A. Rabel, Steven R. Stadler
-
Publication number: 20030083836Abstract: A tuneable filter, for example an antenna filter in a single chip radio receiver, comprises a frequency selective circuit (12) including passive reactive components. At least some of the reactive components (48 to 52) are arranged as a bank (46 ) which includes switches (53 to 57) for switching at least one of the reactive components in the bank into the frequency selective circuit. A controller controls the switching means to select the or a combination of the reactive components which provides an optimum sensitivity for an input signal at a first frequency. The switch settings required to optimise the sensitivity for other frequencies is determined by measuring the decrease in sensitivity for other switch settings, with the input signal still at the first frequency, and using stored data about the shape of the frequency response of the tuneable filter.Type: ApplicationFiled: October 7, 2002Publication date: May 1, 2003Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.Inventor: Adrian G. Spencer
-
Patent number: 6549867Abstract: A power supply feed-forward compensation technique using power consumption hints. One embodiment includes a power estimator to generate a power consumption hint that indicates a power consumption level of a component. A transfer function compensation circuit generates a power supply adjustment signal as a function of the power consumption hint and a power transfer function to the component.Type: GrantFiled: May 26, 2000Date of Patent: April 15, 2003Assignee: Intel CorporationInventor: Ronald D. Smith
-
Patent number: 6549860Abstract: A method and apparatus for selecting an optimum frequency for driving a transducer in a megasonic cleaning system. The method comprises the steps of selecting a plurality of frequency values that span a frequency range containing an optimum frequency for driving a piezoelectric crystal, determining the reflection coefficient at each frequency value, fitting the data set to a function, obtaining the first derivative equation of the function, finding the roots of the first derivative equation to yield a set of roots, and selecting the optimum frequency from the set of roots. The reflection coefficient is defined as the reflected power divided by the forward power. The apparatus comprises a microprocessor, a frequency generator, a directional coupler/detector and an analog to digital converter circuit.Type: GrantFiled: October 13, 2000Date of Patent: April 15, 2003Assignee: Product Systems IncorporatedInventor: Raymond Y. Lillard
-
Patent number: 6549872Abstract: A first laser beam is transmitted through the actuation of the gun trigger, the trajectory of the virtual projectile is calculated, and the deviations of the trajectory from the target direction at the firing time are determined. The first laser beam is pivoted corresponding to the trajectory deviations, and the transit time of the laser pulses of the first laser beam reflected by the target is measured, and used to determine the target range. For this target range, the trajectory of the fired virtual projectile is calculated, and compared to the time that has passed between the firing time and the reception of the reflected laser pulses. If the two match within a tolerance range, a second laser beam comprising encoded laser pulses is transmitted in the transmission direction of the first laser beam, which is received at the target, where the impact damage is calculated.Type: GrantFiled: July 19, 2001Date of Patent: April 15, 2003Assignee: STN Atlas Electronik GmbHInventors: Karsten Bollweg, Anton Galhuber
-
Patent number: 6549816Abstract: A plumbing control system includes a plurality of plumbing fixtures operated by an electronic control board having a microprocessor. The control board can form a node on a network that monitors and controls the functions of multiple boards throughout a facility from a central computer. Network software running on the central computer communicates with the control boards. The software includes a binding feature that requires reporting of a network operating variable at a first control board to the central computer or a second control board. The network software also has site and device setup forms.Type: GrantFiled: December 21, 2000Date of Patent: April 15, 2003Assignee: Sloan Valve CompanyInventors: Jerome M. Gauthier, Nhon T. Vuong, Mark J. Sippel
-
Patent number: 6546349Abstract: An evolutionary program is used to calibrate a ship degaussing system with respect to one or more parameters relating to the ship's magnetic signature. Pursuant to the computer program, a mathematical vector lists electrical current values which correlate with the degaussing coils. A genetic algorithm is executed through a certain number of generational iterations in order to find a solution vector which will optimize the parameter(s). Every generational population has the same number of vectors. An initial population is randomly engendered, and successive populations are engendered through a biasedly random process wherein each vector has associated therewith a parenthood selection probability which is commensurate with its fitness. The offspring vectors are given birth to via crossover hybridization of parent vectors, and a small fraction of offspring vectors are randomly modified via mutation. The present invention is suitable for accomplishing optimization (e.g.Type: GrantFiled: November 27, 2000Date of Patent: April 8, 2003Assignee: The United States of America as represented by the Secretary of the NavyInventors: Paulo Bertell Tarr, Nevin D. Powell
-
Publication number: 20030065469Abstract: A continuous automatic calibration system and apparatus using a delta-sigma modulation technique. A first time duration is set. The first time duration is a length of time in terms of clock counts for a calibration procedure. Then, a second time duration occurring during the first time duration is measured. The second time duration is a length of time in terms of clock counts that a counter is operational. A multiplying factor is determined by dividing the first time duration by the second time duration.Type: ApplicationFiled: September 28, 2001Publication date: April 3, 2003Inventors: Giorgio Pedrazzini, Chee Keong Chow
-
Publication number: 20030055590Abstract: A high power amplifier operating point determination apparatus and method determines an operating point of a high power amplifier. For the purpose, the apparatus employs a DC voltage converting block in a channel amplifier located at a front-end of the high power amplifier, which couples an output power of the channel amplifier and converts the coupled output power to a DC voltage. Accordingly, in a ground monitoring center, before satellite launching, there are mapped the output power value of the high power amplifier and the DC voltage level of the channel amplifier per each command step assigned to an FGM or an ALC mode. After the satellite launching, it is possible to detect the operating point and the output power level of the high power amplifier based on mapped results by using the DC voltage level as telemetry information.Type: ApplicationFiled: November 7, 2001Publication date: March 20, 2003Inventors: Jong Heung Park, Byoung Hyun Chung, Seung Woo Chung, Seong-Pal Lee
-
Publication number: 20030040880Abstract: Combining signal images includes receiving signal images and performing the following to yield a weighted sum for at least one signal image. A phasor is generated from a signal image in accordance with a correlation reference, and a phase alignment of the signal image is adjusted to yield an adjusted signal image. A signal magnitude estimate is determined in accordance with the phasor, and a weight is determined in accordance with the signal magnitude estimate, where the weight reflects a signal-to-noise ratio of the signal image. The weight is applied to the adjusted signal image to yield a weighted sum for the signal image. The weighted sums are combined to yield a combined signal output.Type: ApplicationFiled: August 15, 2002Publication date: February 27, 2003Applicant: Raytheon CompanyInventor: George P. Bortnyk
-
Patent number: 6522984Abstract: In one preferred embodiment, method and apparatus for instant pole-zero correction for digital radiation spectrometers. In another embodiment, there are provided method and apparatus for instant pole-zero correction for digital radiation spectrometers with automatic attenuator calibration.Type: GrantFiled: June 30, 2000Date of Patent: February 18, 2003Assignee: Canberra Industries, Inc.Inventor: Valentin T. Jordanov
-
Patent number: 6522987Abstract: A channel plan with a corresponding test plan are implemented in connection with a plurality of nodes that communicate signals. The channel plan has one or more predefined specifications for each of one or more signal channels on each of the nodes. The channel plan enables a monitoring system to, among other things, conduct automatic periodic test plans, comprising tests, on the nodes, based upon the predefined data specified in the channel plan. Each test plan prescribes measurement of at least one signal parameter, pertaining to one or more nodes as a whole and/or to one or more channels contained within the nodes. The monitoring system includes a spectrum analyzer, a switch enabling the spectrum analyzer to interface with the nodes, and a controller controlling the switch and the spectrum analyzer. The controller is configured to enable creation of and display the channel plan and test plan, based upon user inputs.Type: GrantFiled: November 30, 1999Date of Patent: February 18, 2003Assignee: Agilent Technologies, Inc.Inventors: Eric N. Flink, Craig Chamberlain, Bill Morgan
-
Publication number: 20030009304Abstract: An output driver impedance calibration circuit which is used to make I/O (input /output) off chip driver characteristics, for a plurality of output driver circuits, alike on the same chip within a tighter tolerance than is otherwise obtainable in the prior art. The output impedance of an input/output driver circuit is calibrated by providing an external target impedance reference (it could be a multiple of the actual target output impedance), multiple devices in the output stage of the I/O driver circuit, a circuit to determine the value of the actual output impedance as compared with its target output impedance and a determination of when to stop the calibration process. With these four elements in a calibration process, the I/O impedance can typically be controlled to a +/−6.6% tolerance or better, and significantly benefits the signal integrity of the overall I/O interface.Type: ApplicationFiled: July 3, 2001Publication date: January 9, 2003Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: William F. Lawson
-
Publication number: 20030004667Abstract: A system and method in which delay strobe variation in a double data rate device is calibrated by first individually calibrating all slave strobe delay devices at system startup. Thereafter, a master strobe delay device is activated periodically to determine an incremental delay adjustment. This incremental delay adjustment is then used to by the slave strobe delay devices to modify the calibration value performed by the slave strobe delay devices upon startup. In this manner, individual on-die variations are compensated for each slave strobe delay device and variations due to voltage and temperature changes are compensated for without effecting the normal operation of the slave strobe devices.Type: ApplicationFiled: June 28, 2001Publication date: January 2, 2003Inventor: John F. Zumkehr
-
Publication number: 20020193958Abstract: The invention discloses a system for improving performance of the RF amplification stage of communication receivers by accounting for the signal environment of the RF amplifier. The linearity, gain and power supply voltage of the RF amplification stage of the communication receiver is adjusted to produce an optimal signal into the succeeding narrow-band amplification stage(s). The adjustment of the RF stage includes mechanisms such as adjusting the RF amplifier power supply level using a DC to DC converter. It also includes allowing distortion in the RF amplification stage if the distortion in the RF amplification stage does not affect the target signal. For example, if there were a strong signal that fell within the same band as the target signal, amplification would be allowed to be so high that it distorted the undesired signals, but not the tined signals.Type: ApplicationFiled: June 15, 2001Publication date: December 19, 2002Inventors: Paul A. Underbrink, Daryush Shamlou, Ricke W. Clark, Joseph H. Colles, Guangming Yin, Patrick D. Ryan, Kelly H. Hale
-
Patent number: 6496785Abstract: A network analyzer includes a raw data measuring portion for measuring an S parameter of a device under test, a measuring-system error-factor measuring portion for obtaining measuring-system error factors occurring in the measurement of the device under test, a parameter conversion factor calculating portion for obtaining a parameter conversion factor indicative of the relationship between impedance and measuring system error-factor-free data obtained by eliminating measuring-system error factors from the S parameter, an extended error-factor calculating portion for obtaining extended error factors by combining the measurement-system error factors and the parameter conversion factor, and a device-under-test calculating portion for obtaining the impedance from the S parameter and the extended error factors. Accordingly, the need for fixtures is eliminated and, further, the extended error factors are obtained in advance.Type: GrantFiled: July 20, 2000Date of Patent: December 17, 2002Assignee: Advantest CorporationInventors: Yoshikazu Nakayama, Norio Arakawa
-
Patent number: 6490535Abstract: A method for calibrating an instrument includes maintaining typical response values at respective frequency locations. The response of the instrument being calibrated is measured at a subset of frequency locations in the typical response. Response values for frequency locations not in the subset are estimated from the typical and measured response values. The instrument is calibrated based on the actual and estimated response values. Apparatus for calibrating an instrument includes a signal generator, coupled to the instrument, which generates a signal having known characteristics. A controller, coupled to the instrument, generates a calibration signal. Controller memory stores typical response values at respective frequency locations, and measures response values at a subset of the frequency locations. Response values for frequency locations not in the subset are estimated from the typical and measured response values. The instrument is calibrated in response to the measured and estimated response values.Type: GrantFiled: April 15, 1999Date of Patent: December 3, 2002Assignee: Tektronix, Inc.Inventor: Victor L. Hansen
-
Publication number: 20020177966Abstract: A method and apparatus are provided for optimizing calibration of a tunable filter over a wide range of frequencies in a data channel of a direct access storage device (DASD). Calibration codes are received for low corner frequency, banding, and high corner frequency. A programmable diode is provided with a DC portion and a tunable digital-to-analog converter (DAC). A calibration control current is generated for calibrating the tunable filter utilizing the programmable diode and the calibration codes. The programmable diode is used to vary the calibration control current to calibrate the tunable filter to a correct low corner frequency and high corner frequency. The programmable diode can be programmed over a large range.Type: ApplicationFiled: May 24, 2001Publication date: November 28, 2002Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jaydip Bhaumik, Raymond Alan Richetta
-
Publication number: 20020173925Abstract: A computer system measures bus signal distortion and then adjusts certain characteristics of the signal transmitted over the bus, or adjusts other characteristics of the bus or the load on the bus so that signal distortion is reduced. Distortion characteristics that may be measured include signal voltage overshoot and undershoot, and data setup and hold times. Characteristics of the signal and the system that may be adjusted include changing the slew rate of the signal, changing the data setup and hold times, and changing the load impedance on the bus.Type: ApplicationFiled: March 29, 2002Publication date: November 21, 2002Applicant: International Business Machines CorporationInventors: Takashi Sugawara, Hirohide Komiyama
-
Publication number: 20020169575Abstract: A method and apparatus to calibrate an LED matrix display such that a driver will provide a proper precharge voltage to LED elements within the display during a scan period. A current is driven through a calibration element, and a voltage reflecting the steady-state element voltage is measured and stored as a calibration value. A processor controls whether to precharge during the calibration cycle, and determines when the calibration cycle is completed. During subsequent normal scans, a driver applies a voltage based on the stored calibration value to rapidly precharge parasitic capacitance associated with a display element to a proper value, and also drives a selected current through the device.Type: ApplicationFiled: May 9, 2001Publication date: November 14, 2002Inventor: James Everitt
-
Publication number: 20020169576Abstract: A system and method are provided for determining a light output of a light emitting diode (LED) in a scanner. The system includes a processor circuit to execute current control logic to obtain an optimum light output from the LED. The current control logic repeatedly applies increasing or decreasing currents to the LED until a saturation point is identified. This may be accomplished, for example, by comparing two measures of the light output of the LED for two different currents applied to the LED. When a difference equaling a predetermined threshold between the two measures is detected, then the saturation point is identified.Type: ApplicationFiled: May 14, 2001Publication date: November 14, 2002Inventors: Nanette C. Jensen, Douglas G. Keithley, Virginia K. Capps, David G. Bohan
-
Patent number: 6480797Abstract: The present invention relates to an electronic control circuit and method for calibrating a transmission shifter and compensating for temperature variations. The electronic control circuit includes a power supply circuit comprising a bias voltage supply and a voltage surge protection circuit; at least one position sensor that receives a surge-protected output bias voltage from the power supply circuit; and a microprocessor that receives one or more position values from the position sensor relating to the physical position of the transmission shifter. The power supply circuit provides a calibration reference signal to said microprocessor. The voltage surge protection circuit protects the calibration reference signal against a surge voltage condition.Type: GrantFiled: November 12, 1999Date of Patent: November 12, 2002Assignee: Eaton CorporationInventors: Todd W. Fritz, Edward F. Handley
-
Patent number: 6480798Abstract: An apparatus and method for independently adjusting or calibrating the characteristics of multiple drivers for output buffer circuits without significantly increasing the associated necessary circuitry is disclosed. A central control logic circuit initiates the calibration process of the drivers. A serial communication link is provided between the control logic and each of the output drivers. The serial link reduces the number of lines that are required to communicate between the central control logic and the multiple output drivers. The output drivers can be calibrated one at a time, and a handoff is made from one driver to the next to start the calibration of the subsequent driver.Type: GrantFiled: October 26, 2001Date of Patent: November 12, 2002Assignee: Micron Technology, Inc.Inventor: Terry R. Lee
-
Publication number: 20020152045Abstract: An embodiment of this invention relates to an intelligent lighting device that can receive signals and change the illumination conditions as a result of the received signals. The lighting device can change hue, saturation, and brightness as a response to received signals. One example of using such a lighting device is to display particular colors as a response to certain events. Among others, embodiments may include vehicle lighting systems, an information cube, a back lighting system for a display panel, and an indicator of a condition of a package.Type: ApplicationFiled: November 20, 2001Publication date: October 17, 2002Inventors: Kevin Dowling, Frederick Morgan, Brian Chemel, Adriana Mincheva, Ihor A. Lys
-
Patent number: 6463395Abstract: A reed relay or other device is connected electrically in series within a signal channel. The signal channel can include a first length of transmission line separated from a second length of transmission line. Both lengths may be of the microstrip type and have a controlled characteristic impedance. A first signal lead of the device electrically connects the lengths of transmission line. A first branch of the first signal lead is connected to the first length of transmission line, and a second branch of the first signal lead is connected to the second length of transmission line. The signal leads are electrically connected to each other at a location adjacent an operative portion of the devices. The series inductance of the first signal lead substantially cancels the shunt capacitance of the reed to substantially maintain the characteristic impedance of the transmission line.Type: GrantFiled: December 10, 1999Date of Patent: October 8, 2002Assignee: Teradyne, Inc.Inventor: Cosmin Iorga
-
Publication number: 20020143485Abstract: In the present invention, a transmission line length estimation circuit with continuous feedback equalizer is provided. The transmission line length estimation circuit comprises a DC bias circuit and a peak detector circuit to generate a DC voltage according to a different cable length. An equalizer core circuit is for receiving the first signal and generating a second signal. A peak detector circuit is used for the first signal and the second signal. A transmission line length detector circuit is coupled to the peak detector circuit and used for generating a plurality of first parameters for phase shift and amplitude losses according to the different cable length. An internal pattern calibration circuit is multiplexed to the first signal and used for generating a plurality of second parameters for calibration of close loop.Type: ApplicationFiled: April 3, 2001Publication date: October 3, 2002Applicant: MACRONIX INTERNATIONAL CO., LTD.Inventors: Chi-Ming Chen, Pi-Fen Chen
-
Publication number: 20020138224Abstract: A method and arrangement of transferring data at high speeds over a parallel data bus provides for calibration of the data without interrupting the data communication. Consistent with one aspect of the present invention, a method of parallel data communication is provided for a circuit arrangement including a parallel arrangement of data paths for passing data in parallel between at least two nodes. The method compares a sequence of data over an additional calibration/spare path relative to a matched sequence of data being passed on one of the multiple paths. In response to detecting skewed data, the transmission time for the subject path is adjusted in response to the comparison. Other example aspects of the invention are directed to procedures for rotating the calibration procedure through each of the data paths while using the spare to maintain communication integrity, and various embodiments for controlling the calibration procedure and for detecting whether the data is skewed.Type: ApplicationFiled: January 19, 2001Publication date: September 26, 2002Inventor: D.C. Sessions
-
Patent number: 6449575Abstract: A method and apparatus for operating an integrated circuit in an electronic device by controlling the supply voltage to the integrated circuit (IC). A parameter of the IC is measured and used to adjust the supply voltage of the IC. The measured parameter is indicative of the effective channel mobility of the IC. One purpose of adjusting the voltage is to modify the effective channel mobility such that the individual channel currents are substantially constant over a predetermined operating temperature range of the IC. The modification of channel mobility is chosen to set the individual channel currents at levels that either maximizes operating speed, minimizes power consumption, extends the range of operating temperature, or increases the operational reliability of the IC.Type: GrantFiled: July 13, 2001Date of Patent: September 10, 2002Assignee: Hewlett-Packard CompanyInventors: James F. Bausch, Andrew L. Van Brocklin, Chadwick W. Stryker
-
Publication number: 20020123853Abstract: Generating and using calibration information includes using a test circuit to generate calibration information that is representative of how changes in at least one variable affect operation of a first element of a controlled circuit and using the calibration information to provide control signals to the first element and to at least one other element of the controlled circuit to adjust operation of the first element and the other element to accommodate changes in the variable.Type: ApplicationFiled: March 2, 2001Publication date: September 5, 2002Inventors: Thomas D. Simon, Rajeevan Amirtharajah
-
Patent number: 6442497Abstract: A method of calibrating a scanner in a digital photofinishing system, including the steps of: providing a calibration strip having a series of calibration patches including a plurality of neutral and colored patches, and including a Dmin patch; providing reference printing density values for each of the patches on the calibration strip; scanning the calibration strip in the scanner to produce scanner densities for each patch; and performing a regression on the scanner densities and the reference printing densities to produce a calibration matrix for converting from scanner density to printing density.Type: GrantFiled: April 14, 2000Date of Patent: August 27, 2002Assignee: Eastman Kodak CompanyInventors: Geoffrey D. Houston, Jacquelyn S. Ellinwood, Samuel Segui
-
Patent number: 6421624Abstract: A multi-port device analysis apparatus is capable of analyzing a multi-port device having three or more with improved efficiency and accuracy.Type: GrantFiled: February 1, 2000Date of Patent: July 16, 2002Assignee: Advantest Corp.Inventors: Yoshikazu Nakayama, Hirotaka Wagata
-
Publication number: 20020087280Abstract: A local driver circuit to drive a logic voltage at an output pad includes an adder having K bits to add a K-bit control value to a local value, the adder producing a K-bit calibrated value. The circuit further includes K field-effect transistors (FETs), the drain of each FET being coupled to the output pad, and logic circuitry to perform a logical-AND function between a data input and the K-bit calibrated value. The logic circuitry providing a K-bit output with each of the K output bits being coupled to the gate of a corresponding one of the FETs. A comparator produces a correction value from a comparison of the logic voltage at the output pad and a reference voltage. A control unit sets a least significant bit (LSB) portion of the local value responsive to the correction value so as to make the logic voltage at the output pad in the reference voltage substantially equal.Type: ApplicationFiled: December 28, 2000Publication date: July 4, 2002Inventors: Hing Thomas Y. To, John T. Maddux, Jonathan H. Liu
-
Publication number: 20020087281Abstract: A system for measuring differences in a physical variable, such as temperature or voltage, by utilizing predictable behavior in the relative time drift of offset curves for various circuit elements, including, for example, two sensors coupled to a difference signal amplifier, an ambient condition amplifier, and an analog to digital converter. In an initial calibration mode, the system records several offset curves, stored in memory, correlating ambient condition measurements to offset measurements acquired from the ambient condition amplifier and the difference signal amplifier. Offset curves recorded in the initial calibration mode, correlating ambient condition measurements to measurements from the difference signal amplifier, include one curve recorded with both inputs of the difference signal amplifier held at equal potential and another curve recorded with both sensors held at the same value of the physical variable, over a given ambient condition range.Type: ApplicationFiled: December 21, 2001Publication date: July 4, 2002Inventor: Edward S. More
-
Publication number: 20020082793Abstract: Phacoemulsification apparatus includes a phacoemulsification handpiece having a needle and an electrical system for ultrasonically vibrating said needle along with a power source for providing pulsed electrical power to the handpiece electrical system. Irrigation fluid is provided to the handpiece needle and aspirating fluid is removed from the handpiece needle. A determination of a voltage current phase relationship of the provided electrical power is made and in response thereto a control system varies a power level duty cycle provided to the handpiece electrical system from the power source and/or modify the aspiration flow rate. In addition, a separate input enables manual control of pulse amplitude. The control system provides a pulsed electrical power of less than 20 millisecond pulse duration.Type: ApplicationFiled: February 26, 2002Publication date: June 27, 2002Inventors: Kenneth E. Kadziauskas, Paul W. Rockley, James W. Staggs
-
Publication number: 20020082792Abstract: An apparatus, method and system extend the dynamic range measurements performed on a device under test. The apparatus and method compensate for the non-ideal characteristics of the measurement system elements. Further, the apparatus, method and system facilitate low-level distortion measurements and improve the accuracy of such measurements using a novel cancellation signal approach. The dynamic range extension apparatus has an input port for accepting an input test signal from a signal source and an output port for delivering an output signal to a measurement processor. The apparatus comprises a signal splitter at its input, a cancellation pathway, a test pathway and a signal combiner at its output. The system comprises a signal source that provides an input signal to the input of the apparatus and a measurement processor at the output of the apparatus. In the dynamic range extension apparatus, method and system, a signal from the input signal source is split by the signal splitter into two signals.Type: ApplicationFiled: December 22, 2000Publication date: June 27, 2002Inventors: Christian A. Bourde, J. Barry Taylor
-
Patent number: 6393371Abstract: A method and apparatus for operating an integrated circuit in an electronic device by controlling the supply voltage to the integrated circuit (IC). A parameter of the IC is measured and used to adjust the supply voltage of the IC. The measured parameter is indicative of the effective channel mobility of the IC. One purpose of adjusting the voltage is to modify the effective channel mobility such that the individual channel currents are substantially constant over a predetermined operating temperature range of the IC. The modification of channel mobility is chosen to set the individual channel currents at levels that either maximizes operating speed, minimizes power consumption, extends the range of operating temperature, or increases the operational reliability of the IC.Type: GrantFiled: April 24, 2001Date of Patent: May 21, 2002Assignee: Hewlett-Packard CompanyInventors: James F. Bausch, Andrew L. Van Brocklin, Chadwick W. Stryker
-
Patent number: 6381551Abstract: The present invention relates to a method for providing an output signal (Ua) having a desired value of a characteristic quantity (Uarms) at the output of a switched-mode power supply unit. At least one low-voltage lamp is connected to the output of the switched-mode power supply unit. A load current (IL) corresponds to the sum of the currents (I1, I2) flowing through all the low-voltage lamps. The input side the switched-mode power supply unit is driven by an input signal (Ue1, Ue2) having at least one variable characteristic quantity (PW), and the switched-mode power supply unit is connected to an operating voltage (UB).Type: GrantFiled: August 24, 1999Date of Patent: April 30, 2002Assignee: Patent-Treuhand-Gesellschaft fuer Elektrische Gluehlampen mbHInventor: Franz Raiser
-
Publication number: 20020049556Abstract: An apparatus and method for independently adjusting or calibrating the characteristics of multiple drivers for output buffer circuits without significantly increasing the associated necessary circuitry is disclosed. A central control logic circuit initiates the calibration process of the drivers. A serial communication link is provided between the control logic and each of the output drivers. The serial link reduces the number of lines that are required to communicate between the central control logic and the multiple output drivers. The output drivers can be calibrated one at a time, and a handoff is made from one driver to the next to start the calibration of the subsequent driver.Type: ApplicationFiled: October 26, 2001Publication date: April 25, 2002Inventor: Terry R. Lee
-
Patent number: 6374192Abstract: A spectroscopy system is provided having an automatic pole-zero error correction circuit. A gated integrator of the system integrates a shaped pulse and trailing edge of the shaped pulse for sampling by an analog-to-digital converter. A pair of samples are converted along the slope of each integrated shaped pulse passing through the system. The two samples are compared on a pulse by pulse basis. An algorithm generates a control word for affecting a change in a pole-zero network coupled along a shaping amplifier of the system. In response to the control word, an MDAC of the pole-zero network affects a change in the system to correct the pole-zero error. When the pole-zero error is eliminated or reaches an acceptable user level, the correction circuitry automatically shuts off.Type: GrantFiled: November 5, 1999Date of Patent: April 16, 2002Assignee: Constellation Technology Corp.Inventors: Richard J. Brogle, Steven W. Pauly
-
Patent number: 6366867Abstract: A method and apparatus for providing controllable compensation factors to a compensated driver circuit which may be used to perform testing of the structural integrity of the compensated driver circuit. One disclosed apparatus includes a compensated driver circuit having a number of subcomponents. At least one compensation factor, which may be provided by a compensation circuit, controls which of the subcomponents to enable. An additional circuit is coupled to provide controllable values for the at least one compensation factor.Type: GrantFiled: June 22, 1999Date of Patent: April 2, 2002Assignee: Intel CorporationInventors: Christopher John Sine, Alper Ilkbahar, Scott W. Murray
-
Publication number: 20020029121Abstract: A method and apparatus for operating an integrated circuit in an electronic device by controlling the supply voltage to the integrated circuit (IC). A parameter of the IC is measured and used to adjust the supply voltage of the IC. The measured parameter is indicative of the effective channel mobility of the IC. One purpose of adjusting the voltage is to modify the effective channel mobility such that the individual channel currents are substantially constant over a predetermined operating temperature range of the IC. The modification of channel mobility is chosen to set the individual channel currents at levels that either maximizes operating speed, minimizes power consumption, extends the range of operating temperature, or increases the operational reliability of the IC.Type: ApplicationFiled: April 24, 2001Publication date: March 7, 2002Inventors: James F. Bausch, Andrew L. Van Brocklin, Chadwick W. Stryker
-
Publication number: 20020029122Abstract: An electric signal current corresponding to the intensity of the incident light is output by a photodiode PD, electric charge is integrated in an integrating circuit 10 according to this electric signal current, and a signal voltage corresponding to this quantity of electric charge thus integrated is output. In a CDS circuit 20, the signal voltage output by the integrating circuit 10 is input to the capacitor C21, and an electric charge corresponding to the amount of change in the input signal voltage is integrated in the capacitor C22 or C23 selected by switches SW21-SW23. In the differential calculating circuit 30, the differential in the electric charges integrated respectively by the capacitors C22 and C23 or the CDS circuit 20 is determined, and a signal voltage corresponding to this differential is output.Type: ApplicationFiled: October 26, 2001Publication date: March 7, 2002Applicant: HAMAMATSU PHOTONICS K.K.Inventor: Seiichiro Mizuno