Including Program Set Up Patents (Class 702/123)
  • Patent number: 6418391
    Abstract: There is disclosed a testing system for performing an operation of an application which controls testing equipment for testing a device under test by displaying images such as icons or buttons on a screen, and selecting these images with use of a pointing device, and a method for controlling the testing system. An icon corresponding to the device under test and an icon corresponding to a test element are displayed, and then connected and displayed. In addition, a test parameter is generated corresponding to each test element, a test is conducted by setting respective test parameters, and obtained test data is displayed.
    Type: Grant
    Filed: October 5, 1998
    Date of Patent: July 9, 2002
    Assignee: Advantest Corporation
    Inventors: Satoshi Umezu, Takahiro Yamaguchi, Jun Miyajima
  • Patent number: 6405150
    Abstract: A system for testing integrated circuit chips is comprised of a pattern generator that is coupled to a memory which stores variable length instructions that specify sets of bit streams for testing the chips. Each variable length instruction includes a code which indicates the number of bit streams in the set. Each bit stream in the set consists of a selectable number of bits which start on a word boundary and vary in increments of one bit. If the code indicates that the number of bit streams in a set is only one, then that one bit stream is stored in consecutive words of the memory. If the code indicates the number bit streams in a set is more than one, then those multiple bit streams are stored in an interleaved fashion in consecutive words in the memory. A respective series of unused bits starts immediately after each bit stream and ends on a word boundary.
    Type: Grant
    Filed: August 31, 1999
    Date of Patent: June 11, 2002
    Assignee: Unisys Corporation
    Inventors: James Vernon Rhodes, Robert David Conklin, Timothy Allen Barr
  • Publication number: 20020065624
    Abstract: A method described is distinguished by the fact that an external test device brings about the execution, in a program-controlled unit, of a program that initiates, performs or supports the testing of the program-controlled unit. As a result, program-controlled units can be rapidly and reliably tested under all circumstances with minimal outlay.
    Type: Application
    Filed: August 24, 2001
    Publication date: May 30, 2002
    Inventors: Ralf Arnold, Thorsten Klose, Ernst-Josef Kock
  • Patent number: 6385552
    Abstract: A method is provided for collecting test measurements for an optical entity. The method includes building an object that includes a test variable and a plurality of independent variables, measuring a test variable value, and revising the object to include the test variable value. The method can also include storing the object.
    Type: Grant
    Filed: August 10, 1999
    Date of Patent: May 7, 2002
    Assignee: Tyco Telecommunications (US) Inc.
    Inventor: Timothy C. Snyder
  • Patent number: 6381552
    Abstract: A method for the test of a testing platform comprises a series of steps performed by a computer. Wherein the computer software structure includes a tested object menu, a plurality of test programs, a test instruction subprogram, a speech instruction subprogram, a driver program database, and a manager for receiving a test results. The method according to the present invention has several stages so that another tested object is further tested, the current test program can be used. Moreover, a speech prompt function is further provided, which may match new computer software construction.
    Type: Grant
    Filed: June 25, 1999
    Date of Patent: April 30, 2002
    Assignee: Institute for Information Industry
    Inventors: Cheetah Lin, Yu-Li Lin, Wen-Hsin Liang
  • Patent number: 6377901
    Abstract: An adaptive delay learning algorithm is presented that reduces the amount of delay before making test measurements in an automated test that requires a delay of any type to be completed before a measurement is made in order to remove the possibility that a tester component lying in the measurement path has not achieved a ready state. In the execution of an automated test, a current delay time is set to an initial delay value. Test execution does not begin until the current delay time elapses. If, upon execution, the test fails, the current delay time is set to a different delay time, and the test is reexecuted only after the updated current delay time has elapsed.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: April 23, 2002
    Assignee: Agilent Technologies, Inc.
    Inventors: Steven K List, David T. Crook
  • Patent number: 6374197
    Abstract: A fuzzy logic based model assessment system assesses models of physical phenomena and in one example, is used for contact tracking. The system uses measurement residual values representing the difference between a measured data sequence corresponding to the physical phenomena and an expected data sequence corresponding to the model to be assessed. The system includes a feature identification module for identifying one or more features or tracking anomalies in the measurement residual values, such as jump and drift, and for generating feature amplitude values and feature amplitude standard deviation values. An anomaly characterization module characterizes the features in one or more membership classes representing the strength of the identified feature and generates class membership intervals representing a range of degrees of membership in each of the classes (e.g., null, weak, moderate or strong).
    Type: Grant
    Filed: May 10, 1999
    Date of Patent: April 16, 2002
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Chidambar Ganesh, Kai F. Gong
  • Publication number: 20020042687
    Abstract: A computer-implemented system, method and medium for assessing the risk of and/or determining the suitability of a system to comply with at least one predefined standard, regulation and/or requirement. In at least some embodiments of the present invention, the method comprises the steps of: 1) automatically or manually gathering information pertaining to the system, 2) selecting one or more requirements with which the system is to comply; 3) testing the system against the requirements; 4) performing risk assessment of the failed test procedures, and 5) generating certification documentation based on an assessment of the first four elements.
    Type: Application
    Filed: April 2, 2001
    Publication date: April 11, 2002
    Inventors: Richard P. Tracy, Hugh Barrett, Lon J. Berman, Gary M. Catlin
  • Publication number: 20020022939
    Abstract: An apparatus enables development and debugging of a control program for controlling a relatively small product having rapid response without using an actual mechanism. A simulation unit simulates an operation of a mechanism, in a simulation cycle shorter than a control cycle, for a time corresponding to the control cycle, and outputs a state variable of the mechanism to a holding circuit. When the state variable is held in the holding circuit, asimulation control unitmakes the simulation unit shift to a response waiting state and makes a control program executing unit calculate a controlled variable. When the controlled variable is held in the holding circuit, the simulation control unit makes the control program execution unit shift to a response waiting state and makes the simulation unit initiate a simulating operation. The apparatus is applied when a control program for every product requiring a precise servo control is developed.
    Type: Application
    Filed: April 16, 2001
    Publication date: February 21, 2002
    Inventors: Yosuke Senta, Yuichi Sato
  • Publication number: 20020002434
    Abstract: This system for characterizing a computer to control a wheel anti-lock device, incorporated in an onboard electronic system (1) for a motor vehicle, using a remote coding device (6), the computer (2) comprising a data processing unit (4) associated with means (5) for storing said computer's operating data, is characterized in that a single logic device for controlling the wheel anti-lock device is loaded into the unit (4), in that the data storage means (5) include several sets of characteristic parameters (V1, V2, Vn) selectable for different vehicles, and in that the remote coding device (6) comprises means (7, 8) for recognizing the vehicle and means (7, 8) for characterizing the computer by associating with the logic device loaded in the unit, the set of parameters corresponding to the recognized vehicle.
    Type: Application
    Filed: April 17, 1998
    Publication date: January 3, 2002
    Inventor: JEAN-MARC DURIEUX
  • Patent number: 6336079
    Abstract: A method and apparatus for controlling a test track system for motor vehicles having at least one test station and a device for carrying out this method (European system), which allows a high utilization of the capacity of the test track system. This can be accomplished, for example, by the fact that the system can automatically make an unambiguous identification of the vehicle and an unambiguous identification of the tester at each testing section. Thus all the information compiled by the test stations is automatically allocated to the current vehicle being tested. This makes it possible for the tester to move the vehicle from one test road to another, for example, without having to initialize the system again at the new test road. The system recognizes automatically that the vehicle is being tested further in the second test road, for example.
    Type: Grant
    Filed: October 13, 1998
    Date of Patent: January 1, 2002
    Assignee: Maha Maschinenbau Haldenwang GmbH & Co. KG
    Inventor: Anton Knestel
  • Publication number: 20010053962
    Abstract: A determining method of movement sequence and a positioning apparatus of the invention are arranged in such a manner that, in order to measure positions of plural marks as being measurement targets provided on a wafer within a shorter time, a group including executable movement sequences is generated out of a group of movement sequence candidates, each indicating a measurement order of these marks, and a movement sequence that accomplishes a movement operation between the marks within the shortest time is obtained from the group thus generated.
    Type: Application
    Filed: July 9, 2001
    Publication date: December 20, 2001
    Inventors: Koji Yoshida, Junya Kiyohara, Isao Ono, Yoshihiro Tatsuzawa, Shigenobu Kobayashi
  • Publication number: 20010053961
    Abstract: A method for downloading and managing a test tool of a test system is proposed, which is applied to the test system having a test service server and a tested machine. A test tool required for performing a test for the tested machine is available as being downloaded from the test service server through a network, which connects the tested machine and the test service server, so as to examine if the tested machine works properly. As such, the test service server acts as a reservoir for the test tools and is used to activate start-up for the test, allowing the tested machine to be initiated with test conditions and user conditions for using the test tool being inputted to the test tool.
    Type: Application
    Filed: June 15, 2001
    Publication date: December 20, 2001
    Inventors: Yi Bo Liu, Tong S. Chen, Kuang Shin Lin
  • Patent number: 6330518
    Abstract: A process for building a platform compliance test for only software components necessary to an application is disclosed. Initially the application is parsed to reveal only component needed for performance of the application, those components names are then checked against components names which are available to the application. A compliance test consisting of compatibility tests associated with the available components is then generated and used to evaluate platforms in which the application is intended to be developed.
    Type: Grant
    Filed: January 29, 1999
    Date of Patent: December 11, 2001
    Assignee: International Business Machines Corporation
    Inventor: James Campbell Colson
  • Patent number: 6327894
    Abstract: A single car tester including a housing having a hanger to mount the housing to a car coupler or ladder of the car. Various configurations of valves and sensors are described to perform a single car test. The controller includes a program for uniquely performing the required tests.
    Type: Grant
    Filed: April 10, 2001
    Date of Patent: December 11, 2001
    Assignee: New York Air Brake Corporation
    Inventor: Lawrence E. Vaughn
  • Patent number: 6327706
    Abstract: A method of installing software on and/or testing software for build-to-order computer system includes reading a plurality of component descriptors from a computer readable file. Each component descriptor describes a respective component of the computer system. A plurality of steps are retrieved from a database, each step being associated with a respective sequence number. The plurality of steps are sequenced in a predetermined order according to the sequence numbers to provide a step sequence. The step sequence includes commands for installing and/or testing software upon the computer system. For each step read from the database, it is determined if that step is incompatible with the presence in the computer system of a component other than that corresponding to the component descriptor associated with the step. If so, the step is discarded or not according to data associated with that step in the database.
    Type: Grant
    Filed: April 8, 1999
    Date of Patent: December 4, 2001
    Assignee: Dell USA, L.P.
    Inventors: Richard D. Amberg, Roger Wong, Michael Lynch
  • Publication number: 20010039486
    Abstract: The CPU of a test apparatus sends, to a subject test board, a test command containing an address in an address space where circuit blocks of the subject test board are mapped and a command code specifying an operation to be performed to the address. Test program executed by the CPU of the subject test board allow the CPU to extract the address and the command code included in the test command from the test apparatus and then to perform the operation specified by the command code to the address.
    Type: Application
    Filed: May 1, 2001
    Publication date: November 8, 2001
    Applicant: ASAHI KOGAKU KOGYO KABUSHIKI KAISHA
    Inventors: Mikio Horie, Ryoichi Nakanishi
  • Patent number: 6301701
    Abstract: A method and computer product for facilitating automatic testing during the development and other life cycle phases of a software application comprised of transactions. A transaction tester evaluates the integrity of a transaction by generating test data from the definition of the transaction under test. Typical values for fields may be included within the transaction definition and reused as typical test values. Test results are generated and compared against known-good values or, alternatively, against expected test results also generated from the transaction definition. Other software components may also be tested including menu structures. A definition of the menu structure is rigorously traversed such that each entry of each menu is thoroughly tested and reported. Results are automatically compared and verified against known good results or test results are automatically reviewed. Both transaction testing and menu testing may be incorporated into regression testing.
    Type: Grant
    Filed: November 10, 1999
    Date of Patent: October 9, 2001
    Assignee: TenFold Corporation
    Inventors: Jeffrey L. Walker, Samer Diab, Adam Slovik
  • Patent number: 6269319
    Abstract: An integration test station for aircraft is provided in which the system is operable with multiple aircraft configurations. The integration test station permits aircraft component designs to be tested and verified in a simulated environment representing integration of the component into the aircraft.
    Type: Grant
    Filed: January 29, 1999
    Date of Patent: July 31, 2001
    Assignee: The McDonnell Douglas Corporation
    Inventors: Jonathan C. Neisch, Donald E. Turner
  • Patent number: 6266436
    Abstract: Controlling processes comprising detecting and measuring a parameter, for example presence and location of an element of a good, with at least two determinations as representations of the target parameter, transmitting signals to the computer, and processing the signals to compare the parameter to acceptable conditions. The detection can include three or more replications, optionally each for at least two parameters, optionally using at least two different methods to analyze the signals. The invention contemplates detecting and analyzing the target parameters using two or more analytical tools within the respective image to detect a given component of the product, namely two or more measurements of the parameter on a single visual image.
    Type: Grant
    Filed: April 9, 1999
    Date of Patent: July 24, 2001
    Assignee: Kimberly-Clark Worldwide, Inc.
    Inventors: Thomas Arthur Bett, Tanakon Ungpiyakul, Shawn Timothy Lemery, Robert Jeffrey Giza, Wayne Allen Bernhardt
  • Patent number: 6175786
    Abstract: A vehicle diagnosing apparatus diagnoses a vehicle by being connected to an electronic control unit which is mounted on the vehicle and by receiving data, via the electronic control unit, from various sensors mounted on the vehicle. The judging result of each judging step of the diagnosing program can be arbitrarily set. The diagnosing program is then performed according to the judging result set for each of the judging steps. While the diagnosing is being performed, there is indicated the screen under performance in which the setting conditions such as judging result, etc. is displayed (S1). With the progress of the performance of the diagnosing program, the order of performance N of the steps is indicated (S7).
    Type: Grant
    Filed: July 22, 1998
    Date of Patent: January 16, 2001
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Keiji Takakura, Hiroyuki Aiba
  • Patent number: 6148277
    Abstract: A test generation method and apparatus for generating an executable testcase from a high-level functional description that is generated from functional description data relating to a target system. Provided is a computer system with a knowledge base stored on an electronic memory storage device. The knowledge base has a set of functional description data that relates to the target system on which a software function is to be tested. Through a user interface, a high-level testcase request is made for a certain function of the target system. A testcase generation program accepts as an input argument the output file and generates an executable testcase based on the set of functional description data maintained in the knowledge base.
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: November 14, 2000
    Assignee: Nortel Networks Corporation
    Inventors: Anand Asava, Chao-Kuang Chen, Shao-Min Juan
  • Patent number: 6141628
    Abstract: A computer-implemented method and a computer-readable program for designing software applications for execution in a programmable logic controller includes determining whether a physical input is analog or discrete, and responsive to the physical input being analog, inputting a set of analog parameters, and responsive to the physical input being discrete, inputting a set of discrete parameters, and storing the parameters in a user parameter data table. The method includes executing a programmable logic controller application responsive to a set of user-defined parameters, including reading an input, and determining whether the input is in fault, and, responsive to the input being in fault, performing an operation from a group of operations consisting of an alarm and a shutdown.
    Type: Grant
    Filed: June 8, 1998
    Date of Patent: October 31, 2000
    Assignee: AMOT Controls Corporation
    Inventors: Stephen J. Worth, Michael J. Silva
  • Patent number: 6133727
    Abstract: A method for verifying correct operation and functional stability of a tester for semiconductor devices is disclosed. In addition, a method for creating a standard device for use with the tester is also disclosed. In creating a standard device according to the present invention, the tester repeatedly tests a candidate device a predefined number of times and evaluates the test results to determine whether the candidate device is suitable for use as a standard device. In verifying the operation and functional stability of a semiconductor device tester, data generated by repeatedly testing a standard device a predefined number of times are compared to recorded reference data of previous tests of the standard device.
    Type: Grant
    Filed: January 5, 1999
    Date of Patent: October 17, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byoung Ok Chun, Byung Rae Cho, Sang Hon Lee, Yun Soon Park
  • Patent number: 6125336
    Abstract: A batch of devices is installed in a handler of a tester. A known qualification test is executed on the batch of devices to determine a first resultant binout. The resultant binout for the batch is stored. Without displacing the devices, a trial qualification test is executed on the batch of devices in the handler of the tester to determine a second resultant binout. The first resultant binout is compared to the second resultant binout for each device of the batch of devices. For example, each device may be categorized as either a correlating part, an upgraded part or a downgraded part.
    Type: Grant
    Filed: February 3, 1998
    Date of Patent: September 26, 2000
    Assignee: Micron Electronics, Inc.
    Inventor: Steven J. Brunelle
  • Patent number: 6125339
    Abstract: A method providing automatic learning belief functions enabling the combination of different, and possibly contradictory information sources. The present invention provides the ability to determine erroneous information sources, inappropriate information combinations, and optimal information granularities, along with enhanced system performance.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: September 26, 2000
    Assignee: Raytheon Company
    Inventors: Kurt Reiser, Yang Chen, Todd L. Baker
  • Patent number: 6122600
    Abstract: A batch of devices is installed in a handler of a tester. A known qualification test is executed on the batch of devices to determine a first resultant binout. The resultant binout for the batch is stored. Without displacing the devices, a trial qualification test is executed on the batch of devices in the handler of the tester to determine a second resultant binout. The first resultant binout is compared to the second resultant binout for each device of the batch of devices. For example, each device may be categorized as either a correlating part, an upgraded part or a downgraded part.
    Type: Grant
    Filed: February 3, 1998
    Date of Patent: September 19, 2000
    Assignee: Micron Electronics, Inc.
    Inventor: Steven J. Brunelle
  • Patent number: 6081771
    Abstract: In a method of checking an apparatus, failure time intervals of sections of an apparatus are divided into a plurality of failure time interval groups, each of which is indicated by a specific failure time interval. A plurality of check programs are classified into a plurality of groups corresponding to the plurality of failure time interval groups based on the failure time interval of the section corresponding to each of the plurality of check programs. A group execution time interval of each of the plurality of groups is determined based on the specific failure time interval. Then, each of the plurality of groups is executed based on the group execution time interval.
    Type: Grant
    Filed: September 8, 1998
    Date of Patent: June 27, 2000
    Assignee: NEC Corporation
    Inventor: Ryo Urabe
  • Patent number: 6078875
    Abstract: The present invention provides automated systems for performing electrostatic discharge (ESD) device efficacy verification and recording the results for an ESD auditing program. Systems of the present invention comprise at least one ESD device testing unit. The testing unit may include sensors and circuits for identifying particular worker who are performing the test. The testing unit includes a testing circuitry for periodic verification of the efficacy of the ESD device. A communication system allows the testing unit to communicate with a central computer which collects, stores and allows the manipulation of the test data. Systems of the present invention are therefore useful in testing the ESD devices, documenting their performance, and controlling access to particular work areas based on testing results.
    Type: Grant
    Filed: August 20, 1997
    Date of Patent: June 20, 2000
    Assignee: Semtronics Corporation
    Inventors: Bradford Tyler Jubin, Michael Albert Sanchez, Albert C. Breidegam, Edwin B. Bradley
  • Patent number: 6061643
    Abstract: A method and computer product for facilitating regression testing during the development and other life cycle phases of a software application comprised of transactions. A regression test is comprised of test cases containing test data describing the target test at a functional or behavioral level. A test operator may perform a manual test and simultaneously record the test. The architecture of the invention monitors the physical activity of the test operator and thereafter transforms the physical event steps into functional or behavioral test data. The test data is in a robust functional description of the transaction such that physical modifications to the transaction during software development preserve the viability of the test data for execution in the modified transaction. A test report may also be generated in response to the execution of a regression test. The test report lists both the test data executed and the response thereto.
    Type: Grant
    Filed: July 7, 1998
    Date of Patent: May 9, 2000
    Assignee: TenFold Corporation
    Inventors: Jeffrey L. Walker, Samer Diab, Adam Slovik
  • Patent number: 6038520
    Abstract: A method and apparatus for testing specific assembled circuits begins by configuring a plurality of applications specific testing entities to test assembled circuits, where the configuring is based on the types of assembled circuits being tested. Next, a specific assembled circuit testing program is provided to the corresponding application specific testing entity based on the type of assembled circuits it is testing. In addition to providing the testing programs to the testing entities, programming instructions are provided to a programmable handler to pick and place the appropriate assembled circuits with the corresponding applications specific testing entities. When the testing of a particular assembled circuit is complete, a test complete indication is provided.
    Type: Grant
    Filed: October 2, 1998
    Date of Patent: March 14, 2000
    Assignee: ATI Technologies, Inc
    Inventors: Roy Schoonover, Albert Man, Sam Ho, Lee Lau
  • Patent number: 6002992
    Abstract: A test system (10) for testing real-time angle/time based control systems includes a digital signal generator (16), a multi-channel pulse analyzer (22), and a test system host (12). The test system host (12) controls the execution of a user generated test script. The script specifies test stimuli, external angle/time event interrupts for use by the digital signal generator (16) to a device under test (DUT) (20), and angle/time triggers used by the analyzer (22) to test the DUT (20). Using the test stimuli and external angle/time event interrupts, the DUT (20) is exercised to determine whether or not the DUT (20) and corresponding control system software operate properly. Output data from the DUT (20) are monitored by the pulse analyzer (22), which records the output data based on information specified in the script. Test results are then retrieved by the test system host (12).
    Type: Grant
    Filed: June 16, 1997
    Date of Patent: December 14, 1999
    Assignee: Motorola Inc
    Inventors: Mike Pauwels, Richard Soja, Chad Peckham
  • Patent number: 5995915
    Abstract: A method and apparatus capable of generating and executing large numbers of functional tests for complex digital electronic systems at low cost are presented. The apparatus includes a test generator which uses a decision tree representation of a verification space, derived from a functional specification of the digital electronic system, to generate functional tests. A decision tree representation of a verification space includes an initial goal node, a leaf goal node, and at least one intermediate goal node interconnected by a plurality of directed decision arcs formed between the initial goal node and the leaf goal node. Goal plans assigned to goal nodes include operations which generate functional tests. Functional tests are generated by recursively "walking" the decision tree, the choices of which goal node to visit next being made at random and according to decision weights assigned to each goal node.
    Type: Grant
    Filed: January 29, 1997
    Date of Patent: November 30, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: David F. Reed, Adnan A. Hamid
  • Patent number: 5987394
    Abstract: An apparatus for preparing a vehicle diagnosing program which diagnoses a vehicle via an electronic control unit mounted on the vehicle automatically prepares diagnosing function programs. Each of the diagnosing function programs is made up of a plurality of diagnosing steps arranged in an appropriate order and is prepared by setting a parameter in each of the diagnosing steps. The vehicle diagnosing program is prepared by selecting and combining the diagnosing function programs in an order of performing the vehicle diagnosing function programs for each kind of electronic control unit.
    Type: Grant
    Filed: February 11, 1998
    Date of Patent: November 16, 1999
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Keiji Takakura, Hiroyuki Aiba
  • Patent number: 5963565
    Abstract: An apparatus to supervise the testing of electronic components includes a computer storing a command file with an electronic component test instruction. A communication link is connected to the computer. An electronic component testing apparatus is connected to the communication link to return electronic component test status information to the computer over the communication link when the electronic component testing apparatus executes a specified operation corresponding to the electronic component test instruction of the command file.
    Type: Grant
    Filed: October 31, 1996
    Date of Patent: October 5, 1999
    Assignee: Altera Corporation
    Inventors: Saiid Rezvani, Bruce Chiu
  • Patent number: 5937368
    Abstract: A method establishes test setpoints for vehicle electrical testing during vehicle manufacture. The method includes implementing test setpoints for a test protocol using software in a system computer, such that the setpoints can be changed by an operator of the system computer. A portable tester adjacent the vehicle generates a query to the system computer, and in response, the setpoints are transferred to the tester. Then, a test protocol is executed by the portable tester to generate test results in accordance with the test setpoints.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: August 10, 1999
    Assignee: Chrysler Corporation
    Inventors: Michael Hall, David A. Arthur
  • Patent number: 5933794
    Abstract: A scalable parallel processing method and apparatus for performing fast multipole method (FMM) scattering calculations. The processing method is preferably implemented on a parallel multi-processor wherein a plurality of processors communicate with each other via a data communications network. The multiple processors work in tandem to solve a particular problem, which in the disclosed embodiment involves simulating an object (or scatterer) mathematically by using the fast multipole method (FMM) to calculate scattering amplitudes. The present invention provides a method and apparatus that organizes and carries out FMM operations in a manner that minimizes or eliminates the effect of time spent on sharing information between processors. According to the present invention, the method, essentially masks certain FMM information sharing tasks by performing them concurrently with other FMM computational tasks.
    Type: Grant
    Filed: February 25, 1997
    Date of Patent: August 3, 1999
    Assignee: Hughes Electronics Corporation
    Inventor: Mark A. Stalzer
  • Patent number: 5920830
    Abstract: Methods and apparatus for generating test vectors for use in testing ASIC designs at both the functional and circuit levels, and for comparing the results of functional level and circuit level tests, employ a set of software tools to facilitate generating test vectors and to compare results of simulation at the functional level with results of simulation at the synthesized circuit level. The software tool set includes a preprocessor program which reads source files and produces skeleton test vector files, a compiler program for compiling the test vector files, and an output comparison program for comparing functional level test results with circuit simulation level test results.
    Type: Grant
    Filed: July 9, 1997
    Date of Patent: July 6, 1999
    Assignee: General Electric Company
    Inventors: William Thomas Hatfield, Abdallah Mahmoud Itani, William Macomber Leue
  • Patent number: 5914874
    Abstract: In a multi-tasking operating system, when an application has terminated, a termination discriminator designating section designates a termination discriminator (termination code) the content of which indicates restartability or non-restartability of the application. When the state of termination of the application has been detected by an application termination detecting section, a termination discriminator determining section receives a termination discriminator and determines the content thereof. When the termination discriminator determining section has determined according to the termination discriminator that the application is restartable, an application start-up section restarts the application.
    Type: Grant
    Filed: October 17, 1995
    Date of Patent: June 22, 1999
    Assignee: Fuji Xerox Co., Ltd.
    Inventor: Arito Nohara
  • Patent number: 5897609
    Abstract: An improved multiple port protocol test apparatus and a method thereof by which it is possible to more easily perform a test with respect to the multiple port protocol, and increase an adaptability and interrelationship with respect to the standard of the system.
    Type: Grant
    Filed: December 20, 1996
    Date of Patent: April 27, 1999
    Assignees: Electronics and Telecommunications Research Institute, Korea Telecommunication Authority
    Inventors: Jin-Young Choi, Weon-Soon Kim
  • Patent number: 5896535
    Abstract: A method, and associated circuitry, for testing operation of computer software of a computer system, such as a telephonic switch system. The computer system may be installed and optionally on-line while the computer software is being tested. Multiple portions of the computer software are executed while the computer software is under test. Selected portions of the computer software are tested in interpreted form. Remaining portions are executed more quickly in compiled form. Therefore, line-by-line execution of only portions of the computer software is required during testing of the entire computer software. The selected portions may be selected, for example, either manually during run-time or automatically based on commands within the code of the computer software. In another embodiment of the invention, the line-by-line interpreted testing of portions of the computer software is conducted with a computerized emulator.
    Type: Grant
    Filed: August 20, 1996
    Date of Patent: April 20, 1999
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventor: Ulf Mikael Ronstrom
  • Patent number: 5847955
    Abstract: A system and method for controlling a computer-based instrumentation system which provides simplified application development and improved performance for instrumentation systems. The present invention provides a system including a software architecture which defines the control and management of an instrumentation system. The present invention includes a base object class, an object manager, session and resource classes, and one or more resource templates. The instrumentation system of the present invention provides a plurality of instrument control resources which are used as building blocks to create instrument drivers and higher level applications. The present invention also uses object oriented technology which allows device resources to be easily combined to create higher level applications. The present invention is independent of I/O interface type, operating system, and programming language while also providing a common look and feel and consistent API to the user.
    Type: Grant
    Filed: June 23, 1997
    Date of Patent: December 8, 1998
    Assignee: National Instruments Corporation
    Inventors: Bob Mitchell, Hugo Andrade, Jogen Pathak, Samson DeKey, Abhay Shah, Todd Brower
  • Patent number: 5828985
    Abstract: A software structure in a semiconductor test system for easily modifying and transferring data for controlling a hardware when the hardware is changed or replaced.
    Type: Grant
    Filed: November 20, 1996
    Date of Patent: October 27, 1998
    Assignee: Advantest Corp.
    Inventors: Robert F. Sauer, Jun Makino, Hiroaki Yamoto
  • Patent number: 5819208
    Abstract: The invention relates to automated testing of equipment items of the electronic, electrical, and optical type over a range of environmental conditions. A testing apparatus operates to vary an operating environment of an item of test equipment between a lower extreme and an upper extreme, and iteratively searches each test parameter for a peak response. The peak response is compared with a response limit specified in a customer specification or an international standard. The apparatus assesses a design robustness of the equipment item by comparing a set of measured responses with a maximum range of responses specified in the customer specification or international standard. The apparatus produces a data output for each performance parameter tested, identifying performance parameters which are outside the customer specification, or which have insufficient design robustness.
    Type: Grant
    Filed: October 29, 1996
    Date of Patent: October 6, 1998
    Assignee: Northern Telecom Limited
    Inventor: Malcolm Edward Carter
  • Patent number: 5799266
    Abstract: A test driver generator is provided for generating test drivers. The test driver generator receives test expressions designating execution sequences of test functions of software interfaces and corresponding attribute value specifications for the designated test functions' parameter attributes. Each test expression designating a number of test functions to be executed in a certain sequence, and each corresponding attribute value specification specifies selected attribute values of the test functions' parameter attributes. For each test expression and corresponding attribute value specifications of a software interface, the test driver generator, in response, generates a test driver that can execute the specified test functions in the designated order with all combinations of the selected attribute values of the test functions' parameter attributes.
    Type: Grant
    Filed: September 19, 1996
    Date of Patent: August 25, 1998
    Assignee: Sun Microsystems, Inc.
    Inventor: Roger Hayes