Abstract: A clock timing signal derived from a clock timing source is converted into samples obtained at a plurality of sample times, each sample representing an amplitude of a clock timing signal at a corresponding sample time. A time-domain histogram of deterministic jitter (DJ) is derived from a plurality of the samples. A set of measurement-based data that is not derived from the samples is also received, from which a time-domain histogram of random jitter (RJ) is derived. A jitter measurement is determined by convolving the time-domain histograms of DJ and RJ. Tangible non-transitory computer-readable storage devices can contain instructions that when carried out on processor(s) carry out the above process An apparatus has a clock sampling unit and a signal analyzer to derive the measure of jitter. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.

Abstract: A first transform unit transforms clock change point information which indicates the change timing of a clock signal into information with respect to the frequency domain thereof so as to generate first clock change point frequency information. A digital filter performs filtering of the first clock change point frequency information so as to generate second clock change point frequency information. A second transform unit inverse-transforms the second clock change point frequency information into information with respect to the time domain so as to generate second clock change point information. A judgment unit evaluates a DUT based upon difference data between the change timing represented by the data change point information and the change timing represented by the second clock change point information in increments of phases.

Abstract: Identifying periodic jitter in a signal includes identifying transition regions of the signal, where the transition regions correspond to regions of the signal where the signal changes between different levels, determining lengths of the transition regions; and performing a statistical analysis that is based on the lengths of the transition regions in order to obtain a value indicative of a level of periodic jitter in the signal.

Abstract: In a particular embodiment, a method is disclosed that estimates a total static noise margin of a bit cell of a memory. The method includes determining a correlation coefficient of a left static noise margin of the bit cell as compared to a right static noise margin of the bit cell and estimating a total static noise margin of the bit cell by evaluating an analytical function based on the correlation coefficient.

Abstract: Provided is a measurement apparatus that measures a signal under measurement, including a strobe timing generator that sequentially generates strobes arranged at substantially equal time intervals; a level comparing section that detects a signal level of the signal under measurement at a timing of each sequentially provided strobe; a capture memory that stores therein a data sequence of the signal levels sequentially detected by the level comparing section; a window function multiplying section that multiplies the data sequence by a window function; a frequency domain converting section that converts the data sequence multiplied by the window function into a spectrum in the frequency domain; and an instantaneous phase noise calculating section that calculates instantaneous phase noise on a time axis of the signal under measurement, based on the spectrum.

Abstract: A synchronized pseudorandom sequence injector is provided for injecting a plurality of pseudorandom signals at selected locations in a power system having a plurality of locations forming a transmission and distribution grid. A synchronization pulse generator generates an accurate reference clocking signal. A pseudorandom clocking and sequence generator receives the clocking signal and generates a string of pseudorandom sequences. A binary drive control creates a tri-state voltage output from a logic level output of the pseudorandom clocking and sequence generator. A signal conditioning interface processes the voltage output to attenuate any protection related carrier signals from a pseudorandom signal injection point at a selected location.

Abstract: A method for determining the place of origin of a passive intermodulation product excites a distributed device under test with two first excitation signals (x1(t),x2(t), each with a single spectral line, of which the frequencies (f1,f2) provide a frequency spacing relative to one another. Following this, the phase (?IM3Meas) of a first passive intermodulation product generated at the place of origin in the distributed device under test from the first excitation signals ((x1(t), x2(t)) by nonlinear distortion is measured, and the delay time of the first passive intermodulation product from the place of origin to the measuring device is calculated from the measured phase (x1(t),x2(t)) and the frequency (2·f1?f2) of the first passive intermodulation product. Finally, the place of origin of the passive intermodulation product is determined from the delay time and the topology of the distributed device under test.

Abstract: A junction-photovoltage method and apparatus for contactless determination of an electrical/physical parameter of a semiconductor structure having at least one p-n junction located at a surface is disclosed. In one aspect, the method includes illuminating the surface with the p-n junction with a light beam of a first wavelength to create excess carriers at the surface. The method also includes modulating the light intensity of the light beam at a single predefined frequency. The method also includes determining a first photo-voltage at a first position inside the illuminated area and a second photo-voltage at at least a second position outside the illuminated area. The method also includes calculating an electrical/physical parameter of the semiconductor structure based on the first and second photo-voltage.

Abstract: Automatic test equipment (ATE) includes: a circuit to split a stimulus signal, which contains both deterministic and random (noise floor) spectra contents, from a device under test (DUT) into a first signal and a second signal; a first channel to receive the first signal, where the first channel adds a first noise floor to the first signal to produce a first channel signal; a second channel to receive the second signal, where the second channel adds a second noise floor to the second signal to produce a second channel signal, the first noise floor, the second noise floor and the DUT noise floor all being mutually uncorrelated; and processing logic to: estimate a first power of the deterministic stimulus signal, and estimate a second total power based on the first channel signal and the second channel signal.

Abstract: A pin placement determining method includes calculating a waveform deterioration amount of wires from a noise amount of the wires and wiring loss of the wires, the wires being coupled to a connector on a printed board, comparing the calculated waveform deterioration amount of the wires to an evaluation criteria, evaluating the wires in which the waveform deterioration amount exceeds the evaluation criteria, and replacing corresponding pins of the connectors to which the wires that have been evaluated as exceeding the evaluation criteria are coupled with replacement pins of connectors that have a low noise amount.

Abstract: A capacitive sensor device and method is configured to respond a stimulus provided in a sensing region with an output signal. A signal generator is configured to apply a carrier signal to the capacitive sensor device. The carrier signal is switched between a plurality of phases at a switching rate, where the switching rate is less than a demodulation filter bandwidth. The result of the carrier phase shifting is that effects of interference in the output signal are frequency shifted away from the effects of user applied stimulus. An interference detection filter is configured to filter from the sensor outputs at least one effect produced by the stimulus. An interference measuring device is configured to determine a level of interference in the at least one interference output. Thus, the system can detect interference in the output of the capacitive sensor device.

Abstract: This invention relates to a method and apparatus of detecting and compensating for DC residual fault currents on electrical systems. In particular, the present invention relates to a method and apparatus which is capable of accurately detecting one or more parameters of the fault current waveform and generating a compensation factor which compensates for specific pulsed DC fault components present. In this way, trip sensitivity is optimized for all types of fault current waveforms. In a preferred embodiment, the present invention operates by detecting one or more parameters of the encoded fault current waveform and generating a measure of symmetry comparing the mean squared values of negative and positive sections of said encoded fault current waveform. In use, various bands of the ratio of the mean squared sum of the positive and negative sections of said encoded fault current waveform are obtained, and a compensation factor is determined from a look-up table stored in a processing means.

Abstract: An oscillograph can identify signals of a serial data bus. The signal identifying method triggers communication channels of the oscillograph, measures a rise time and a fall time for each captured signal, and sets a sender terminal (ST) and a receiver terminal (RT) for each of the captured signals according to the measured results. The signal identifying method determines the ST and RT for each of the captured signals after the oscillograph is triggered. If the determined ST of each of the acquired signals is identical to the set ST and the determined RT of the each of the acquired signals is identical with the set RT, the signal identifying process is completed and a report is generated to record the signal identifying result.

Abstract: A digitizing instrument is used for modifying pattern data and jitter and noise components of a communication signal. In a typical implementation, the midpoints of a rising edge slope and horizontal portion of the communication signal are determined and multiple digital data records are acquired at the midpoints. The data sample records are transformed to frequency components and the random jitter and noise, and periodic jitter and noise components are determined. A correlated pattern data and the jitter and noise components are matrix elements in a simulated signal channel having communication system elements. Each correlated pattern data and jitter and noise component may be modified for each of the communication system element. The selectively modified correlated pattern data and jitter and noise components are combined to produce a modified communication signal that is displayed as a numeric table, eye diagram or bit error rate presentation.

Abstract: A method to estimate a signal to interference plus noise ratio (SINR) based on selection of the samples and corresponding processing system is provided. The method estimates SINR of an incident signal on a time interval. Samples of the incident signal are received during a time interval. Then, the SINR of the received samples is determined using an average calculation and a variance calculation that includes only a selected set of samples from the received samples. Additionally, the average calculation and/or said variance calculation may be performed by using only the selected set of samples.

Abstract: The present invention relates to a method of processing a signal which is received by a receiver, comprising, obtaining an analog signal (yt) based on another signal (xt) and noise; defining a sampling kernel based on the noise; and using the sampling kernel to obtain at least one sample (yn) from the analog signal (yt). The invention also relates to a corresponding apparatus; computer program product; headset; watch, and sensing device.

Abstract: A method and an arrangement for cycle slip detection for timing recovery of a received analog signal including asynchronously sampled digital data are implemented with a timing recovery control loop using a technique known as interpolated timing recovery and improved cycle slip detection as well as improved cycle slip correction based on said cycle slip detection. The method includes using an output signal of the loop filter in the control loop for timing recovery, generating averaged timing error values from said filtered timing error signal and accumulating changes of the averaged timing error values in adjacent blocks of samples which exceed a first threshold. Accumulated averaged timing error changes of adjacent blocks which exceed a second threshold are then declared as cycle slip and the number of cycle slips is determined by a third threshold being a tolerance threshold.

Abstract: A method and associated system for evaluating a high-frequency signal (SNE) at a point of interest on a signal path. The high-frequency signal (SNE) at the point of interest on the signal path is calculated by applying an inverse transfer function (iG) for the signal path to an argument of a remote signal (SFE) measured at a remote pickup point on the signal path, wherein the point of interest and the remote pickup point are two distant points on the signal path, wherein the high-frequency signal (SNE) and the remote signal (SFE) are represented as a respective time domain variable, and wherein said calculating is performed by a time domain evaluation process that operates in test equipment for electrical devices. The calculated high-frequency signal (SNE) is transferred to an output device of the test equipment.

Abstract: An apparatus for computing a coupling noise voltage occurring in a plurality of cells arranged on a plurality of word lines and a plurality of bit lines in a flash memory device includes: a coupling ratio computing unit and a coupling voltage computing unit. The coupling ratio computing unit can compute coupling ratios between a cell and neighboring cells wherein each of the coupling ratios have a value such that the difference between two coupling noise voltage values is minimized. The coupling voltage computing unit computes the coupling noise voltage value occurring in the cell using the computed coupling ratios.

Abstract: A method and a device are provided for crosstalk evaluation of a channel, wherein the channel is represented and/or modeled by a multiple-input-multiple-output (MIMO) system connecting a first network component with at least one second network component. The MIMO system contains first coefficients associated with transmission lines that are in particular associated with crosstalk. The crosstalk contains a near-end crosstalk (NEXT) portion and a far-end crosstalk (FEXT) portion. The first network component sends a signal to one second network component; the far-end crosstalk portion and the near end crosstalk portion are evaluated.

Abstract: In a low voltage differential signal (LVDS) timing test system and method, a clock signal waveform and a data signal waveform are obtained. Clock cycles are selected from the clock signal waveform. Data bits transmitted within the selected clock cycles are identified from the data signal waveform. Accordingly, bit positions of the data bits are determined.

Abstract: An integrated circuit capable of on-chip jitter tolerance measurement includes a jitter generator circuit to produce a controlled amount of jitter that is injected into at least one clock signal, and a receive circuit to sample an input signal according to the at least one clock signal. The sampled data values output from the receiver are used to evaluate the integrated circuit's jitter tolerance.

Abstract: An apparatus configured for built in self test (BIST) jitter measurement is described. The apparatus includes a time-to-voltage converter. The time-to-voltage converter generates a voltage signal proportional to timing jitter present in a clock/data signal input. The apparatus also includes feedback circuitry for the time-to-voltage converter. The feedback circuitry provides a ramp slope for the time-to-voltage converter. The apparatus further includes a calibration controller. The calibration controller provides control signals to the time-to-voltage converter for process-independent calibration. The apparatus also includes a sample-and-hold (S/H) circuit. The S/H circuit provides a set bias voltage to the time-to-voltage converter once calibration is complete.

Abstract: Systems, methods and computer readable storage media for displaying a dense graph and details of a portion of the dense graph on a display are provided. A processor coupled to memory, an input device and a display are provided to perform operations including: locally distorting a portion of the dense graph identified by interaction through the input device, wherein the local distortion includes expanding the portion of the dense graph along a first dimension axis of the graph, compressing at least one adjacent portion of the dense graph adjacent the expanded portion, and maintaining a scale of all of the dense graph in a second dimension orthogonal to the first dimension. The dense graph and expanded and compressed portions are displayed on the display, wherein all of the graph represented by the display signal on the display prior to performing the local distortion operation is displayed after performing the local distortion operation. In at least one embodiment, the system comprises an oscilloscope.

Abstract: An optical system includes an optical module having an optical reception unit that receives input light and output an electric signal related to received input light, and a processing unit having an identification unit that performs identification processing based on a threshold value on the electric signal input via a reception signal path from the optical reception unit. The optical module includes a threshold calculation unit that calculates the threshold value based on the electric signal from the optical reception unit and a signal path characteristic of the reception signal path from the optical reception unit to the identification unit, and the identification unit of the processing unit performs the identification processing based on the threshold value calculated by the threshold calculation unit. Thereby, the threshold value is optimized when the identifier is provided in the unit as a connection destination of the optical module.

Abstract: A system and associated method for evaluating a high-frequency signal at a point of interest on a signal path from a remote signal at a remote pickup point on the signal path. The point of interest is located on a device under test that is coupled to test equipment via the signal path. The high-frequency signal at the point of interest is calculated from the remote signal at the remote pickup point with an inverse transfer function that eliminates degradation effects on the high-frequency signal that is transferred through the signal path. The inverse transfer function may be calculated from measurements acquired in a test signal transfer through a reference path that simulates electrical properties of the signal path, or configured to a predetermined function if electrical properties of the signal path are known.

Abstract: There is provided a deterministic component model identifying apparatus for determining a type of a deterministic component contained in a probability density function supplied thereto.

Abstract: A small form-factor pluggable (SFP) unit having signal diagnostic capabilities comprises one or more diagnostic measurement points. At least one of the one or more diagnostic measurement points provides a signal diagnostic measurement for diagnostic of the SFP unit.

Abstract: Disclosed is a system and related methodology for providing fast low frequency jitter rejection in the measurement of signals under test. A signal under test may be sampled alternately with a reference signal under similar conditions. The resulting sampled signal blocks may then be processed to subtract the known calibrated value of the reference signal from the average signal under test.

Abstract: Delay-fault testing and parametric analysis systems and methods utilizing one or more variable delay time-base generators. In embodiments of the delay-fault testing systems, short-delay logic paths are provided with additional scan-chain memory elements and logic that, in conjunction with the one or more variable-delay time-base generators, provides the effect of over-clocking without the need to over-clock. Related methods provide such effective over-clocking. In embodiments of parametric analysis systems, test point sampling elements and analysis circuitry are clocked as a function of the output of the one or more variable-delay time-base generators to provide various parametric analysis functionality. Related methods address this functionality.

Abstract: A center location of an eye pattern generated by superimposing waveform signal pieces cut out from a waveform signal generated by a simulator is calculated, and an arrangement of a mask as a quality evaluation criterion of the eye pattern on the center location is envisaged to calculate time coordinate values and voltage coordinate values of feature points included in the mask. First feature points not on a time axis is set as processing objects, and a margin in the voltage axis direction is calculated based on the voltage coordinate values of the first feature points and the voltage coordinate values of waveform signal piece parts associated with the first feature points. Second feature points on the time axis is set as processing objects, and a margin in the time axis direction is calculated based on the time coordinate values of the second feature points and the time coordinate values of waveform signal piece parts associated with the second feature points.

Abstract: A method is provided to evaluate crosstalk effect of aggressor switching upon victim net signal transition time within an integrated circuit comprising: combining a first probability density function (PDF) of first aggressor switching time in response to a first input signal to an aggressor net driver and a second aggressor switching time in response to a second input signal to the aggressor net driver; determining a delay change curve that represents a relationship between delay change of arrival time of a victim net signal transition and relative alignment of the aggressor net driver switching time and a victim net driver switching time; and determining a third PDF of delay change of a transition of the victim net signal based upon the combination and the delay change curve.

Abstract: Faults resulting in reception of a still, but unknown, frame are recognized by comparing each received frame of the video signal with its predecessor, incrementing a counter in the event that the difference between the frames falls below a threshold; and generating an alarm signal in the event that the count of the counter exceeds a predetermined count. Other types of fault such as loss of signal (i.e. reception of just noise) are recognized by incrementing the counter whenever the difference exceeds a threshold. Similar results may be obtained by instead the monitoring quantization step size and/or number of transmitted bits of a digitally coded signal, and noting that it falls below, or exceeds, a threshold. A preferred option is to compute a complexity measure, being a monotonically increasing function (e.g the product) of the quantization step size and of the number of coded bits and compare this with the threshold value.

Abstract: A device and method corrects time data based on a clock signal affected by jitter. The error due to jitter in a time measurement of an event in the clock signal is determined at the time of the event or as an average over a number of events. A measurement is made of a time dependent reference variable associated with a long-time constant device, such as a capacitor, which is relatively immune to localized jitter. The measurement may be a reading of the voltage across a charging capacitor. The measured value is compared to an expected value, and the time error is based on the result. The expected value may be stored or calculated from known charging rates of the capacitor. The error due to jitter of a time measurement is approximately linearly proportional to the difference in voltage between the measured and the expected values of the capacitor.

Abstract: A system, method, and apparatus for obtaining a record of logic level transitions within a signal, and for accurately determining a voltage-time pair exhibited by the signal. To achieve these ends, a front-end device may be mated to a real-time sampling system, such as an oscilloscope. The front-end device effectively permits the oscilloscope to observe signals exhibiting greater data rates than otherwise possible without the front-end device.

Abstract: A self correcting device includes a first flip-flop to receive data and coupled to a clock input; one or more delayed flip-flops used to detect delay variations; a multiplexer coupled to the output of the first flip-flop and the delayed flip-flops, a metastability detector and error check controller to control the multiplexer to select one flip-flop output; and an adaptive voltage swing link coupled to the multiplexer output to generate a voltage swing on the link based on a selected clock skew.

Abstract: A state detecting apparatus S for detecting a current operating state of an LM (linear motion) system includes an AE sensor 1 generating a detection signal Sae by detecting an AE wave elastically generated when a plurality of balls contained in the LM system revolve in a circulation portion while spinning themselves; and a signal processing unit 4 generating a parameter indicating an intensity of the AE wave based on only the detection signal Sae corresponding to an operating frequency of the ball, and uses the parameter to determine a lubrication state of the LM system. Thereby, it is possible to provide the state detecting apparatus capable of predicting failure occurrence in the LM system; providing an improved maintenance to a user of the LM system and further longer lifetime thereof; and providing a performance guarantee and an improved quality of a device or equipment manufactured using the LM system.

Abstract: Systems and apparatus related to quantum resonance interferometry for detecting signals are described. A first signal is interferometrically coupled with a first quantum mechanical function to generate a first tunneling rate; a second signal is interferometrically coupled with a second quantum mechanical function to generate a second tunneling rate; the first tunneling rate and the second tunneling rate are interferometrically coupled to generate a third tunneling rate; and upon determining that the third tunneling rate is greater than a threshold, the second signal is identified as corresponding to the first signal.

Abstract: Disclosed is a method of analyzing power supply noise including: extracting power supply and ground information as well as a capacitor and an LSI chip connected to a power supply and ground from electronic circuit design information; creating an analytical model of power supply noise by connecting respective models of the impedance characteristics of the capacitor and LSI chip to mounting positions of a board model; calculating reflected voltage at the LSI chip based on an impedance characteristic between the power supply of the LSI chip and ground; calculating power supply noise from the LSI chip to the electronic circuit board; based on the reflected voltage at the LSI chip.

Abstract: A method and apparatus for identifying an islanding condition. In one embodiment, the method comprises altering a phase error response within a phase locked loop (PLL), and determining whether the islanding condition exists based on the altered phase error response.

Abstract: An intelligent electronic device IED has enhanced power quality and communications capabilities. The IED can perform energy analysis by waveform capture, detect transient on the front-end voltage input channels and provide revenue measurements. The IED splits and distributes the front-end input channels into separate circuits for scaling and processing by dedicated processors for specific applications by the IED. Front-end voltage input channels are split and distributed into separate circuits for transient detection, waveform capture analysis and revenue measurement, respectively. Front-end current channels are split and distributed into separate circuits for waveform capture analysis and revenue measurement, respectively.

Abstract: A method for measuring multimedia communication quality is disclosed. The multimedia video communication quality may be objectively reflected through the embedment and extraction of digital watermark under a precondition that the quality of the multimedia video data is not obviously affected. In the invention, each frame of the multimedia video data is uniformly divided into blocks of equal size and watermark data is embedded in each of the blocks, so that the watermark may be uniformly distributed. The multimedia video data are divided into groups, and the watermark is embedded in a part of the frames with equal interval between the frames in each group to reduce the effect of the watermark on the data. The watermark information is directly embedded in the spatial domain of the original video data.

Abstract: A method of measuring a power quality index. A total current waveform of an ingress from a customer, and a current waveform and a voltage waveform of each of at least one load installed at the customer are measured. A load composition (LC) of the customer using the total current waveform of the ingress and the current waveform of each of the at least one load is computed. A total harmonic distortion (THD) of each of the at least one load using the current waveform and the voltage waveform of each of the at least one load is computed. Thereafter, a distortion power quality index (DPQI) of each of the at least one load using the LC and the THD is computed.

Abstract: Aspects of the present invention are related to systems and methods for removing spikes and/or speckle noise from a digital signal. In some embodiments of the present invention, an input signal is filtered according to a first low pass filter. The low pass filtered signal, also considered a first local-mean signal, is subtracted from the input signal, thereby producing an AC signal. A maximum of a first region associated with the AC signal and a maximum of a second region associated with the AC signal are determined. When the maximum of the first region and the maximum of the second region meet a comparison criterion, coefficients for a second low pass filter are determined. The input signal is filtered according to the second low pass filter, thereby producing a second local-mean signal, and a second AC signal is produced by subtracting, from the input signal, the second local-mean signal.

Abstract: A receiver circuit is described. In the receiver circuit, an analog-to-digital converter (ADC) generates first samples of a data signal based on a first clock signal, and a clock-data-recovery (CDR) error-detection circuit generates second samples of the data signal based on a second clock signal. In addition, the CDR error-detection circuit estimates intersymbol interference (ISI) at a current sample in the second samples from an adjacent, subsequent sample in the second samples. Based on the second samples and the estimated ISI, a CDR circuit generates the first clock signal and the second clock signal, which involves modifying the skews of either or both of these clock signals so that the current sample is associated with a zero crossing of a pulse response of a communication channel from which the data signal was received, thereby reducing or eliminating the ISI from the adjacent, subsequent sample.

Abstract: A signal analyzer includes a divergence detector for detecting periodic interference in a signal, an information detector for detecting a random event in the signal, and output circuitry for providing compensation for the periodic interference and the random event.

Abstract: Provided is an evaluation apparatus that evaluates a characteristic of a propagation apparatus propagating a signal, comprising an output signal measuring section that measures a probability density function expressing a probability density distribution of jitter of an output signal passed by the propagation apparatus; an isolating section that isolates at least one of a random component of a jitter component and a deterministic component of the jitter component in the jitter of the output signal, from the probability density function of the jitter of the output signal; and an evaluating section that evaluates the characteristic of the propagation apparatus based on the jitter component isolated by the isolating section.

Abstract: In a particular embodiment, a method is disclosed that includes receiving data related to a customer premise equipment (CPE) device and determining an impedance mismatch between a transmission line and the CPE device based on the received data. The method further includes initiating removal of a source of the impedance mismatch in response to determining the impedance mismatch.

Abstract: The communication system having a transmitter and a receiver, wherein the transmitter and the receiver are coupled by a clock channel and a data channel, wherein the clock channel is shorter than the data channel and wherein the receiver comprises a delay circuit for extracting a jitter signal from a clock channel signal, delaying the extracted jitter signal, and generating a receiver clock signal for the receiver by the delayed jitter signal.

Abstract: A measurement apparatus that measures, as an error under measurement, at least one of a gain error and a phase error of a quadrature demodulator or a quadrature modulator as a measurement target. The measurement apparatus includes an output control section that causes the measurement target to output a signal, a detecting section that detects a measured signal representing a real component and an imaginary component of the signal output from the measurement target, and a calculating section that calculates, as the gain error or the phase error, a solution for a variable that maximizes a correlation value between the measured signal detected by the detecting section and an ideal signal that includes the error under measurement as the variable and that represents the measured signal that should be output by the measurement target.