Signal Quality (e.g., Timing Jitter, Distortion, Signal-to-noise Ratio) Patents (Class 702/69)
  • Patent number: 8135550
    Abstract: A system for collecting data and monitoring the operation of electrical circuits, such as branch circuits at a substation is provided. The system collects data from a plurality of sensors coupled to a plurality of electrical equipment associated with a circuit. The data from the sensors is collected and used to determine the activation of the electrical equipment, such as a protective relay for example. The data is further transformed to allow assessment of the circuit's performance against desired parameters.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: March 13, 2012
    Assignees: Consolidated Edison Company of New York, Inc., Softstuf, Inc.
    Inventors: Sanjay Bose, Anthony T. Giuliante, Amir Makki, Maria Rothweiler Makki
  • Patent number: 8135564
    Abstract: A signal filtering technique is designed to remove the effects of a periodic, low-frequency noise signal from a signal of interest. A signal waveform is sampled at different points of a number of consecutive periodic noise signal cycles and the collected samples are averaged to produce a corrected signal. The number of consecutive cycles in which samples are taken and averaged is inversely related to the signal amplitude such that as the signal level decreases, the number of cycles examined increases. The technique is particularly applicable to periodic signals associated with the output of Hall effect sensors in an electrical metrology environment. Improved RMS calculations are obtained for filtering low-frequency random noise from Hall sensors by averaging samples at different points of a signal cycle to create a composite desired signal cycle to facilitate other signal calculations.
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: March 13, 2012
    Assignee: Itron, Inc.
    Inventors: Michel Gervais, Michael E. Moore, Isabelle B. Snyder
  • Patent number: 8131285
    Abstract: Disclosed herein is a transmission/reception channel matching apparatus for a mobile communication terminal and a mobile phone test equipment. The transmission/reception channel matching apparatus includes a Printed Circuit Board (PCB), a Dual In-line Package (DIP) switch, and a fastening casing. The PCB includes mobile communication terminal-side terminals to be electrically connected to option pins provided in the serial communication connector of the mobile communication terminal, and transmission and reception terminals corresponding to the transmission and reception channels of the mobile phone test equipment for transmitting a transmission signal to the mobile communication terminal and receiving a reception signal from the mobile communication terminal. The DIP switch is provided with a plurality of switches, is combined with the PCB, and selectively connects the mobile communication terminal-side terminals to the transmission and reception terminals depending on ON/OFF information.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: March 6, 2012
    Assignee: Innowireless Co., Ltd.
    Inventors: Jinsoup Joung, Kyeongmin Ha, Jongmin Kim, Sunglyong Lim
  • Publication number: 20120049947
    Abstract: A method and device for measuring integrated circuit power supply noise and calibration of power supply noise analysis models. The method includes collecting power supply noise monitor data from an integrated circuit having one or more power supply noise monitors connected between a power supply and respective scan cells of a scan chain and one or more functional circuits connected to the scan chain by scanning a power supply noise generation pattern into the scan chain and scanning a resultant pattern out of the scan chain; converting the resultant data into actual values of selected power supply parameters; generating simulated values of the selected power supply parameters using a power supply noise simulation model based on design data of the integrated chip; comparing the actual values of the selected power supply parameters to the simulated values of the selected power supply parameters; and modifying the power supply noise simulation model based on the comparing.
    Type: Application
    Filed: August 24, 2010
    Publication date: March 1, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Igor Arsovski, Bruce Balch, Umberto Garofano, Nazmul Habib
  • Patent number: 8121806
    Abstract: A method of capturing user control inputs for an electronic device comprises sampling an input measurement signal at a capacitive input sensor of the electronic device to capture user control inputs for operating the electronic device. Electromagnetic interference affecting the sampling or the input measurement signal is electronically neutralized.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: February 21, 2012
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Peter H. Mahowald, Robert Elsheimer, Brian J. Misek, Robert M. Thelen, Zachary T. Deitz
  • Patent number: 8121803
    Abstract: A method for calibrating a communication channel coupling first and second components includes transmitting a data signal from the first component to the second component on the communication channel, and sensing a characteristic, such as phase, of the data signal on the second component. Information about the sensed characteristic is fed back to the first component using an auxiliary channel. An adjustable parameter, such as phase, for the transmitter is adjusted on the first component in response to the information. Also, a characteristic of a data signal received from the transmitter on the second component is sensed and used to adjust an adjustable parameter for the receiver on the first component.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: February 21, 2012
    Assignee: Rambus, Inc.
    Inventors: Jun Kim, Wayne S. Richardson, Glenn Chiu
  • Patent number: 8106618
    Abstract: In a method and apparatus for calibrating a position sensor mounted on the shaft of a permanent magnet synchronous motor, to control the position of a rotor of the permanent magnet synchronous motor relative to a magnetic field produced by a stator of the permanent magnet synchronous motor, a DC test current is supplied to stator windings of the permanent magnet synchronous motor to generate a definite magnetic field. The motor speed caused by the DC test current is adjusted to zero by modifying the rotor position; and the position measured by the position sensor at zero motor speed relative to the magnetic field is used to calibrate the position sensor.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: January 31, 2012
    Assignee: Daimler AG
    Inventors: Radomir Fabis, Marcus Heller
  • Patent number: 8103469
    Abstract: A method for predicting a predetermined bit error rate for an actual data transmission from a transmitter to a target receiver over an actual backplane link is disclosed. The method involves defining a simulated backplane corresponding to an actual backplane link intended to be used for data transmission between a transmitter and a target receiver. Once the simulated backplane is defined, a data transmission from the transmitter to the receiver is simulated and captured across the simulated backplane. A waveform simulation of the data transmission over the simulated backplane is then generated. The waveform simulation takes into account characteristics of the simulated backplane and the target receiver. From the waveform simulation, a total jitter for a predetermined bit error rate for the data transmission is extrapolated.
    Type: Grant
    Filed: December 7, 2005
    Date of Patent: January 24, 2012
    Assignee: Altera Corporation
    Inventors: San Wong, Daniel Tun Lai Chow, Geping Liu
  • Patent number: 8094196
    Abstract: A matched state detection unit (33) of a video matching device (100) detects a reference video frame, of the respective video frames of a reference video (1) and degraded video (2B), which is in a matched state in which it is spatially and temporally matched with each degraded video frame. A matching degree derivation unit (34) controls a degradation amount derivation unit (40) to acquire the first degradation amount indicating the degradation amount between a reference video frame and a degraded video frame in the matched state and the second degradation amount indicating the degradation amount between a reference video frame and a degraded video frame in a state shifted from the matched state by a predetermined number of pixels and calculate a matching degree on the basis of the ratio between the first degradation amount and the second degradation amount. A matching information output unit (35) outputs the matching degree between the reference video and the degraded video after matching.
    Type: Grant
    Filed: July 11, 2006
    Date of Patent: January 10, 2012
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Jun Okamoto, Takaaki Kurita
  • Publication number: 20110295536
    Abstract: There is provided a method for analyzing a jitter of a clock flowing in a clock path inside a semiconductor integrated circuit. Elements, which belong to any clock domains except for a selected clock domain among operation scenario information, are brought into a halting state, to create a domain operation scenario. Using the domain operation scenario, a power-supply noise analysis is performed on a clock used in the selected clock domain for a period of one to several cycles, to obtain a domain power-supply noise waveform. The obtained waveform is repeatedly connected, to create a cyclic waveform. Part of the cyclic waveform is halted, to obtain a processed domain power-supply noise waveform. The processed domain power-supply noise waveform obtained with respect to each clock domain is superimposed, to create a power-supply noise waveform. Based on the created waveform, a jitter of the clock flowing in the clock path is calculated.
    Type: Application
    Filed: December 30, 2010
    Publication date: December 1, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tomoyuki YODA, Takuma AOYAMA, Sachio HAYASHI
  • Patent number: 8068538
    Abstract: There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement, having a pulse generator for outputting a pulse signal having a pulse width set in advance corresponding to edges-under-measurement from which the timing jitter is to be measured in the signal-under-measurement, a filter for removing carrier frequency components of the signal-under-measurement from the pulse signal and a jitter calculator for calculating the jitter in the signal-under-measurement based on the signal outputted out of the filter.
    Type: Grant
    Filed: November 4, 2005
    Date of Patent: November 29, 2011
    Assignee: Advantest Corporation
    Inventors: Kiyotaka Ichiyama, Masahiro Ishida, Yasuhide Kuramochi, Takahiro Yamaguchi
  • Patent number: 8068435
    Abstract: A communication system transmitting signals over a network using a transmission waveform in which a plurality of data packets are transmitted in a payload field of a transmission frame, the system includes a transmitter, which has a transmitting portion that sends information including user data in the data packets and a user data rate portion that dynamically changes the data rate of the user data to the highest rate possible for current link conditions by changing the waveform. The communication system also includes a receiver, which has a receiving portion that receives the information data packets and a reconfiguration portion that reconfigures the receiving portion based on the waveform parameters.
    Type: Grant
    Filed: August 3, 2007
    Date of Patent: November 29, 2011
    Assignee: Viasat, Inc.
    Inventors: Anil Agarwal, Mark Miller
  • Patent number: 8065141
    Abstract: A signal processing apparatus includes a decoding unit, an analyzing unit, a synthesizing unit, and a selecting unit. The decoding unit decodes an input encoded audio signal and outputs a playback audio signal. When loss of the encoded audio signal occurs, the analyzing unit analyzes the playback audio signal output before the loss occurs and generates a linear predictive residual signal. The synthesizing unit synthesizes a synthesized audio signal on the basis of the linear predictive residual signal. The selecting unit selects one of the synthesized audio signal and the playback audio signal and outputs the selected audio signal as a continuous output audio signal.
    Type: Grant
    Filed: August 24, 2007
    Date of Patent: November 22, 2011
    Assignee: Sony Corporation
    Inventor: Yuuji Maeda
  • Patent number: 8065100
    Abstract: A system and method for using loop topology identification to investigate a transmission line having a plurality of cable segments. At a measurement plane for each segment, a probing signal is transmitted into the cable. A reflected signal is detected, and an equivalent total input impedance is calculated. The system iteratively calculates the distance between the measurement planes as well as the length, characteristic impedance, and the propagation constant of each segment. A model is used to calculate the respective equivalent input impedance of each segment using the calculated characteristic impedance, propagation constant, and length of the preceding segment. The equivalent total input impedance is then calculated from the iteratively calculated segment values.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: November 22, 2011
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Fredrik Lindqvist, Antoni Fertner, Per Ola Börjesson
  • Patent number: 8060326
    Abstract: Provided is a measurement apparatus including a first timing detecting section that detects first change timings of a signal under measurement, a second timing detecting section that detects second change timings of the signal under measurement, a buffer section that buffers data indicating the first change timings detected by the first timing detecting section and data indicating the second change timings detected by the second timing detecting section, and a calculating section that acquires, from the buffer section, the data indicating the first change timings and the data indicating the second change timings, calculates a temporal relationship between the first change timings and the second change timings, and outputs the temporal relationship.
    Type: Grant
    Filed: January 21, 2009
    Date of Patent: November 15, 2011
    Assignee: Advantest Corporation
    Inventors: Masashi Miyazaki, Hiroshi Ito
  • Patent number: 8055969
    Abstract: A multi-strobe circuit that latches a signal to be tested, an evaluation target, at each edge timing of a multi-strobe signal having a plurality of edges. An oscillator oscillates at a predetermined frequency in synchronization with a reference strobe signal. A latch circuit latches the signal to be tested at an edge timing of an output signal of the oscillator. A gate circuit is provided between a clock terminal of the latch circuit and the oscillator, and makes the output signal of the oscillator pass therethrough for a predetermined period. A clock transfer circuit loads the output signal of the latch circuit at an edge timing of the output signal of the oscillator and performs retiming on the output signal of the latch circuit by using a reference clock.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: November 8, 2011
    Assignee: Advantest Corporation
    Inventor: Noriaki Chiba
  • Patent number: 8046182
    Abstract: An approach is provided for digital triggering a recording of one or several signals sampled at individual sampling instants on a digital oscilloscope. The triggering is carried out when the interval between two recurrent triggering events is less or greater than a time threshold value.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: October 25, 2011
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventors: Markus Freidhof, Johann Huber
  • Publication number: 20110238349
    Abstract: A system and associated method for evaluating a high-frequency signal at a point of interest on a signal path from a remote signal at a remote pickup point on the signal path. The point of interest is located on a device under test that is coupled to test equipment via the signal path. The high-frequency signal at the point of interest is calculated from the remote signal at the remote pickup point with an inverse transfer function that eliminates degradation effects on the high-frequency signal that is transferred through the signal path. The inverse transfer function may be calculated from measurements acquired in a test signal transfer through a reference path that simulates electrical properties of the signal path, or configured to a predetermined function if electrical properties of the signal path are known.
    Type: Application
    Filed: June 13, 2011
    Publication date: September 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joseph Curtis Diepenbrock, Roland Frech
  • Patent number: 8027797
    Abstract: Techniques for inline measurement of a switching history time constant in an integrated circuit device are provided. A series of pulses is launched into a first stage of a delay chain comprising a plurality of delay stages connected in series and having a length greater than a decay length of at least an initial one of the series of pulses, such that the at least initial one of the series of pulses does not appear at a second stage of the delay chain. An amount of time between the launching of the initial one of the series of pulses and the appearance of at least one of the series of pulses at the second stage of the delay chain is determined. The switching history time constant is calculated as a function of a number of stages traversed by the at least one pulse, the determined amount of time, and the decay length of the at least initial one of the series of pulses based at least in part on a switching history of the integrated circuit device.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: September 27, 2011
    Assignee: International Business Machines Corporation
    Inventors: Manjul Bhushan, Mark B. Ketchen, Dale J. Pearson
  • Patent number: 8027796
    Abstract: A method in accordance with the present invention includes the steps of: separating an eddy current signal into an X-axis component and a Y-axis component to obtain signal waveform data of the respective components; excluding predetermined low-frequency components respectively from the respective signal waveform data thus obtained; calculating a noise voltage value V1 defined by the following Equation (1) based upon voltage values X(i) and Y(i) of the signal waveform data of the X-axis component and the Y-axis component from which the low-frequency components have been excluded; and calculating an S/N ratio by dividing a voltage value D of an eddy current signal corresponding to a predetermined artificial flaw by the noise voltage value V1: V ? ? 1 = ? / n · ? i = 1 n ? ( X ? ( i ) 2 + Y ? ( i ) 2 ) 1 / 2 ( 1 ) where n represents the number of samplings of the signal waveform data.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: September 27, 2011
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Shoji Kinomura, Yoshiyuki Nakao, Toshiya Kodai, Shugo Nishiyama
  • Patent number: 8024140
    Abstract: Systems and methods to automatically detect anomalies in waveforms. In addition, the systems and methods alert a human operator of the anomaly and provide suggestions as to the cause of the problem and/or possible solutions to the problem.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: September 20, 2011
    Assignee: Amherst Systems Associates, Inc.
    Inventors: Michael Williams, Thomas Zych
  • Patent number: 8024142
    Abstract: A method and system for analyzing a signal waveform that comprises digitally sampling a signal at a periodic sampling interval, and accumulating a count of samples of the signal at a given logic level relative to a threshold value over a given period. The threshold value is stepped through a series of values while the accumulating of samples is repeated at a series of different clock offsets. The accumulated counts permit a statistical distribution of the signal waveform to be determined. A signal density can also be calculated by determining the difference between the count of adjacent samples at successive threshold values.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: September 20, 2011
    Assignee: PMC-Sierra US, Inc.
    Inventors: Mathieu Gagnon, Jurgen Hissen
  • Patent number: 8004405
    Abstract: It is provided an alarm system for underground boundary intrusion detection, and methods for deployment and operation. The deployment method includes constructing of a computing-and-empowering apparatus, connecting thereof a longitudinally extended power-and-communication cable, connecting addressable junction-units, storing a physical location and an address of each junction-unit in the computing-and-empowering apparatus, connecting each addressable junction-unit to a wired-mole having a wire bundle which initially is contracted there within and measurable physical characteristics, and infiltrating the wired-moles normally into ground to a desired depth. In operation, the sensors frequently measure the physical characteristics of the wired-mole, deliver the measurement of the physical characteristics to the computing-and-empowering apparatus, which stores and analyzes the measurements, comparing past and present measurements.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: August 23, 2011
    Assignee: Nuclear Research Center-Negev
    Inventor: Gyora Gal
  • Patent number: 8006141
    Abstract: A receive test accelerator retrieves an adjusted jitter amount and an adjusted test time in which to test a device. The adjusted jitter amount and the adjusted test time correspond to an adjusted bit error rate that is extrapolated from a baseline bit error rate, which corresponds to a baseline jitter amount. In turn, the receive test accelerator tests the device, at the adjusted test time, using a data stream that is modulated by the adjusted jitter amount.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: August 23, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Samuel G. Stephens, Michael P. Baker
  • Patent number: 8005222
    Abstract: A scrambling initial value is shared without deteriorating transmission efficiency. On the transmission side, a scrambling initial value is created based on a part of a physical layer header not scrambled, a transmission signal sequence scrambled is created by calculating an exclusive-OR operation between a scrambled sequence generated from the scrambling initial value and a transmission data sequence, and is transmitted. On the reception side, the same descrambling initial value as the scrambling initial value is created based on a part of a physical header of a reception frame, and a reception data sequence is descrambled by calculating an exclusive-OR operation between a descrambled sequence generated from this descrambling initial value and a reception signal sequence scrambled.
    Type: Grant
    Filed: July 5, 2004
    Date of Patent: August 23, 2011
    Assignee: Sony Corporation
    Inventors: Osamu Ito, Shigenori Uchida, Tomoya Yamaura
  • Patent number: 8000429
    Abstract: In a jitter correction method and circuit, combination data combined by adding, to referenced data, an end bit of data 1 clock prior to and a head bit of data 1 clock subsequent to the referenced data is sequentially generated. Each bit of the combination data is sequentially referred. When a change between a referenced bit and a bit directly adjoining the referenced bit is detected, and when a number of references reaches a multiplication number of the oversampling and a change between at least three adjoining bits including the referenced bit is not detected, change position display data regarding the directly adjoining bit as a change bit of the referenced data is generated and the number of references is initialized. When the change is not detected and the number of references does not reach the multiplication number, the number of references is incremented.
    Type: Grant
    Filed: September 14, 2006
    Date of Patent: August 16, 2011
    Assignee: Fujitsu Limited
    Inventors: Hideo Abe, Yuji Obana, Hideaki Mochizuki
  • Patent number: 8000916
    Abstract: A system and associated method for evaluating a high-frequency signal at a point of interest on a signal path from a remote signal at a remote pickup point on the signal path. The point of interest is located on a device under test that is coupled to test equipment via the signal path. The high-frequency signal at the point of interest is calculated from the remote signal at the remote pickup point with an inverse transfer function that eliminates degradation effects on the high-frequency signal that is transferred through the signal path. The inverse transfer function may be calculated from measurements acquired in a test signal transfer through a reference path that simulates electrical properties of the signal path, or configured to a predetermined function if electrical properties of the signal path are known.
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: August 16, 2011
    Assignee: International Business Machines Corporation
    Inventors: Joseph Curtis Diepenbrock, Roland Frech
  • Patent number: 8000931
    Abstract: Provided is a deterministic component model determining apparatus that determines a type of a deterministic component included in a probability density function supplied thereto, comprising a standard deviation calculating section that calculates a standard deviation of the probability density function; a spectrum calculating section that calculates a spectrum of the probability density function; a null frequency detecting section that detects a null frequency of the spectrum; a theoretical value calculating section that calculates a theoretical value of a spectrum for each of a plurality of predetermined types of deterministic components, based on the null frequency; a measured value calculating section that calculates a measured value of the spectrum for the deterministic component included in the probability density function, based on the standard deviation and the spectrum; and a model determining section that determines the type of the deterministic component included in the probability density function
    Type: Grant
    Filed: October 23, 2008
    Date of Patent: August 16, 2011
    Assignee: Advantest Corporation
    Inventors: Kiyotaka Ichiyama, Masahiro Ishida, Takahiro Yamaguchi
  • Patent number: 8000914
    Abstract: Systems and methods for electromechanical oscillation monitoring are disclosed herein. In one embodiment, a method for monitoring electromechanical oscillation in a power system includes forming a power density spectrum in frequency domain based on phasor measurements collected from a plurality of locations in the power system and identifying an oscillation in the power density spectrum. The oscillation has a power density larger than other oscillations. The method also includes analyzing the identified oscillation in time domain to determine a damping characteristic of the identified oscillation and indicating that an insufficiently damped oscillation exists in the power system if the determined damping characteristic of the oscillation meets a predetermined condition.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: August 16, 2011
    Assignee: Washington State University
    Inventors: Vaithianathan Venkatasubramanian, Guoping Liu
  • Patent number: 7996168
    Abstract: Disclosed is a method and apparatus for calibrating a time vernier in an automatic test equipment (ATE) system, the method including generating a data signal and a reference signal whose periods differ by a small amount (dt), using precession of the data signal and reference signal to create accurate delay increments, and creating a trigger signal for Bit Error Rate Test (BERT) counting, the trigger signal having a select frequency such than an integer number (N) of triggers are generated with a precession period (TPREC). Upon occurrence of each trigger, a BERT is initiated for measuring data to determine strobe positions with respect to the data signal.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: August 9, 2011
    Assignee: Advantest Corporation
    Inventor: Eric Barr Kushnick
  • Publication number: 20110191047
    Abstract: A method and apparatus are provided for the removal of significant broadband noise from waveforms acquired for time domain network analysis.
    Type: Application
    Filed: September 27, 2010
    Publication date: August 4, 2011
    Applicant: LeCroy Corporation
    Inventors: Peter J. Pupalaikis, Anirudh Sureka, Kaviyesh Doshi
  • Patent number: 7991569
    Abstract: The object of the present invention is to provide an apparatus, a method, a program, and a self-organizing map which are capable of normalizing mobility without using a marker, as well as a substance detection method, a program, a detection rule creating method, and a data structure which use normalized mobility. The mobility normalizing method comprises the steps of determining a plurality of warping functions converting data to be corrected, which is unit time sequence data obtained by measuring mobility, to the respective plurality of reference waveform data sets, and a DTW distance associated with each warping function; evaluating a minimum value of the plurality of DTW distances, and determining the warping function associated with the determined minimum DTW distance; determining a slope and an intercept of a straight line approximating the determined warping function; and correcting the data to be corrected using a linear function specified by the slope and the intercept.
    Type: Grant
    Filed: July 11, 2006
    Date of Patent: August 2, 2011
    Assignee: Kochi University
    Inventor: Hiromi Kataoka
  • Patent number: 7987059
    Abstract: A power system oscillation detection device is provided for use in an electric power system. A plurality of sample signals are acquired from the electrical power system via a plurality of intelligent electronic devices (IEDs) in communication with the power system. The power system oscillation detection device includes a real-time modal analysis module, a real-time mode identification module, and real-time decision and control logic. The real-time modal analysis module calculates modes of at least one of the signals, each mode including mode information. The real-time mode identification module together with the real-time decision and control logic determines, from the mode information, whether there is an undesirable oscillation in the electric power system and activates a remedial action.
    Type: Grant
    Filed: October 8, 2008
    Date of Patent: July 26, 2011
    Assignee: Schweitzer Engineering Laboratories, Inc
    Inventors: Yanfeng Gong, Armando Guzman-Casillas
  • Patent number: 7979220
    Abstract: A system and method for monitoring the power damping compliance of a power generation unit comprises a measurement unit that is configured to be coupled to a power generation unit to identify the voltage, current, and frequency values associated with power output therefrom. A processing system maintaining a model-based filter processes the voltage, current, and, frequency values to estimate the total amount of damping provided by the power generation unit. The estimated total damping is compared to prior historical values maintained in a database using various statistical techniques to determine if a power system stabilizer (PSS) provided by the power generation unit is being operated in a manner complying with predetermined guidelines.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: July 12, 2011
    Assignee: ABB Research Ltd.
    Inventors: Ernst Scholtz, Reynaldo F. Nuqui
  • Patent number: 7978756
    Abstract: Systems and methods for monitoring impulse noise are described. At least one embodiment is a method, which comprises detecting whether impulse noise is present and in response to detecting the presence of impulse noise, performing time domain analysis to determine whether one or more impulse noise sources are present based on minimum interarrival time and maximum impulse length. The method further includes performing frequency domain analysis to estimate frequencies associated with the one or more impulse noise sources and based on the time domain analysis and frequency domain analysis, providing a total number of impulse noise sources and frequencies associated with the impulse noise sources. In this regard, the embodiments described herein provide dual-speed monitoring of impulse noise in the form of short-term and long-term monitoring.
    Type: Grant
    Filed: April 7, 2008
    Date of Patent: July 12, 2011
    Assignee: Ikanos Communications, Inc.
    Inventors: Hemant Samdani, Kunal Raheja, Rahul Garg, Patrick Duvaut, Amitkumar Mahadevan, Robert A. Day, Robin Levonas
  • Patent number: 7974799
    Abstract: A substrate unit and other substrate unit are mounted with integrated circuits and are connected to a backboard via respective connectors. The substrate unit monitors a signal wave passed between the substrate unit and other substrate unit and detects a delay time and a gain of a reflected wave with respect to a signal wave, performs delay adjustment with respect to a cancellation wave based on the detected delay time, performs gain adjustment with respect to the cancellation wave based on the detected gain, and superimposes the processed cancellation wave on the signal wave thereby canceling the reflected wave.
    Type: Grant
    Filed: May 23, 2006
    Date of Patent: July 5, 2011
    Assignee: Fujitsu Limited
    Inventor: Futoshi Izumi
  • Patent number: 7970565
    Abstract: A measurement apparatus that measures a signal under measurement, including a strobe timing generator that sequentially generates strobes arranged at substantially even time intervals, a level comparing section that detects a signal level of the signal under measurement at a timing of each sequentially provided strobe, a capture memory that stores therein a data sequence of the signal levels sequentially detected by the level comparing section, a frequency domain converting section that converts the data sequence into a spectrum in the frequency domain, and a jitter calculating section that calculates jitter of the signal under measurement based on a value obtained by integrating levels of frequency components in a predetermined frequency range of the spectrum.
    Type: Grant
    Filed: August 25, 2008
    Date of Patent: June 28, 2011
    Assignee: Advantest Corporation
    Inventors: Harry Hou, Takahiro Yamaguchi
  • Patent number: 7965899
    Abstract: A method is presented for processing an image of a two-dimensional (2D) matrix symbol having a plurality of data modules and a discontinuous finder pattern, each distorted by “donut effects”. A resulting processed image contains an image of the 2D matrix symbol having a continuous finder pattern suitable for conventional 2D matrix symbol locating techniques, and having a plurality of data modules, each data module having a center more truly representative of intended data, and suitable for conventional 2D matrix symbol sampling and decoding. The method includes sharpening the distorted image of the 2D matrix symbol to increase a difference between low frequency and high frequency image feature magnitudes, thereby providing a sharpened image, and smoothing the sharpened image using a moving window over the sharpened image so as to provide a smoothed image, the moving window and a module of the 2D matrix code being of substantially similar size.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: June 21, 2011
    Assignee: Gognex Technology and Investment Corporation
    Inventors: Sateesha Nadabar, Xiangyun Ye
  • Patent number: 7965649
    Abstract: A method for subcarrier quality estimation in a wireless network is disclosed. The method comprises analyzing characteristics of at least some of the subcarriers of a first signal, creating feedback data based on the analyzed characteristics, wherein the quantity of the feedback data is less than the quantity of all of a plurality of measured signal-to-interference and noise power ratio (SINR) values of each subcarrier of the first signal, and transmitting the feedback data.
    Type: Grant
    Filed: November 4, 2005
    Date of Patent: June 21, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Lai King Tee, Cornelius van Rensburg, Joseph R. Cleveland
  • Patent number: 7965763
    Abstract: In one embodiment, the present invention includes a method for receiving a jitter profile and a step response of a channel coupled between a transmitter and a receiver and a bit pattern to be transmitted, transmitting the bit pattern along the channel from the transmitter to the receiver with the jitter profile and the step response, receiving the bit pattern at the receiver and converting the bit pattern to a data stream by interpolating the step response according to a jitter of a current bit to obtain a jittery step response, superposing the jittery step response onto the data stream, calculating the jitter at each transition bit of the bit pattern by determining a time difference between actual and ideal crossing points, incrementing a jitter distribution function with the jitter, and generating a timing curve for the channel using the jitter distribution function. Other embodiments are described and claimed.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: June 21, 2011
    Assignee: Intel Corporation
    Inventors: Kai Xiao, Beomtaek Lee, Xiaoning Ye, Chung-Chi Huang
  • Patent number: 7957924
    Abstract: A method, circuit, and computer program product for receiving a first intermediate signal that is at least partially based upon a first reference signal. A second intermediate signal is received that is a time-shifted version of the first intermediate signal. An output signal is generated that is based upon the difference between the first intermediate signal and the second intermediate signal. An anticipated differential change in the output signal is determined, the anticipated differential change to occur based upon a transition in the first reference signal. A realized differential change in the output signal is measured, the realized differential change occurring based upon a transition in the first reference signal. The realized differential change in the output signal is compared to the anticipated differential change in the output signal to determine a nonlinearity indicator.
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: June 7, 2011
    Assignee: LTX-Credence Corporation
    Inventors: Richard Liggiero, III, Alan J. Reiss
  • Patent number: 7957923
    Abstract: The device for jitter measurement and a method thereof are provided. The device for jitter measure includes a signal retrieving module, a signal amplifying module, an edge detecting module, and a time-to-digital converting module. The signal retrieving module receives a signal-under-test, and retrieves a first pulse signal having a pulse width equal to a period of the signal-under-test. The signal amplifying module amplifies the pulse width of the first pulse signal and thereby generates a second pulse signal. The edge detecting module detects a rising edge and a falling edge of the second pulse signal, and generates a first indication signal and a second indication signal according to the respective detected results. The time-to-digital converting module converts the pulse width of the second pulse signal existed in time domain to a digital signal according to the first indication signal and the second indication signal.
    Type: Grant
    Filed: May 8, 2008
    Date of Patent: June 7, 2011
    Assignees: Himax Technologies Limited, NCKU Research & Development Foundation
    Inventors: An-Sheng Chao, Soon-Jyh Chang, Chih-Haur Huang, Kuo-Chan Huang, Shih-Ming Luo
  • Publication number: 20110125437
    Abstract: A method for testing an integrated circuit, comprising performing a series of at least three tests, each comprising: selecting two nodes among at least three nodes for taking a clock signal from an integrated circuit, taking two clock signals at the two selected taking nodes during a test duration, detecting and counting events appearing in a jitter signal between the two clock signals taken, during the test duration, and determining from numbers of events counted a test result proportional to a sum of jitter variances of the two clock signals taken, and at the end of the series of tests, determining by a matrix calculation the jitter variance of each clock signal taken.
    Type: Application
    Filed: November 18, 2010
    Publication date: May 26, 2011
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventor: Herve Le-Gall
  • Patent number: 7949499
    Abstract: A signal filtering technique is designed to remove the effects of a periodic, low-frequency noise signal from a signal of interest. A signal waveform is sampled at different points of a number of consecutive periodic noise signal cycles and the collected samples are averaged to produce a corrected signal. The number of consecutive cycles in which samples are taken and averaged is inversely related to the signal amplitude such that as the signal level decreases, the number of cycles examined increases. The technique is particularly applicable to periodic signals associated with the output of Hall effect sensors in an electrical metrology environment. Improved RMS calculations are obtained for filtering low-frequency random noise from Hall sensors by averaging samples at different points of a signal cycle to create a composite desired signal cycle to facilitate other signal calculations.
    Type: Grant
    Filed: June 11, 2007
    Date of Patent: May 24, 2011
    Assignee: Itron, Inc.
    Inventors: Michel Gervais, Michael E. Moore, Isabelle B. Snyder
  • Patent number: 7945404
    Abstract: Provided is a measurement circuit for measuring a jitter of a clock signal. Delay elements delay the clock signal into delayed clock signal. Latches latch the delayed clock signals to indicate whether transition edges of the clock signal is within a window value which is corresponding to delays of the delay elements. Based on the latch result from the latches, a finite state machine generates control signals for controlling the delay elements. If the latch result indicates that the transition edges of the clock signal is not within the window value, the control signals adjust the delays of the delay elements and the window value. The jitter of the clock signal is measured based on the delays of the delay elements and the window value.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: May 17, 2011
    Assignee: Faraday Technology Corp.
    Inventors: Jung-Chi Ho, Sheng-Bin Lin, Yeong-Jar Chang
  • Patent number: 7945405
    Abstract: Provided is a jitter measurement apparatus, including a sampling section that samples a signal under measurement having a cycle T, a waveform reconfiguring section that shapes a reconfigured waveform having the cycle T by rearranging ordinal ranks of sample values sampled by the sampling section, a distribution generating section that generates a timing distribution of edges in the reconfigured waveform, and a statistical value calculating section that calculates a statistical value of the timing distribution. The sampling section may sample the signal under measurement having the cycle T a certain number of times N while the signal under measurement repeats for M cycles, where M and N are coprime.
    Type: Grant
    Filed: May 8, 2008
    Date of Patent: May 17, 2011
    Assignee: Advantest Corporation
    Inventors: Masahiro Ishida, Kiyotaka Ichiyama
  • Patent number: 7945407
    Abstract: Sets of time domain data of respective frequency bands from Fd-1 to Fd-n of a periodic input signal Fs are acquired. Sets of the time domain data of the common frequency band are extracted from the sets of the time domain data of the frequency bands Fd-1 and Fd-2 in the acquired frequency bands. Correlativity between the sets of the time domain data of the common frequency band is determined while shifting time relationship between the sets each other to identify the sets of time domain data having correspondence relationship. The sets of the time domain data having the correspondence relationship in the time domain data of the adjacent frequency band Fd-1 and Fd-2 are converted to the sets of the frequency domain data respectively, and the sets of the frequency domain data are combined to produce one set of combined frequency domain data.
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: May 17, 2011
    Assignee: Tektronix, Inc
    Inventors: Miyake Kenichi, Hiroyuki Yamagaki, Kuniharu Hori
  • Patent number: 7941287
    Abstract: Methodologies are disclosed for analyzing periodic jitter is a signal pattern using a continuous time interval analyzer. Sampled signal patterns may be correlated using time interval error calculations to determine start and stop sequences within sampled blocks of signal data while sampling synchronization may be achieved based on time interval calculations or pattern interval error calculations.
    Type: Grant
    Filed: July 14, 2008
    Date of Patent: May 10, 2011
    Inventor: Sassan Tabatabaei
  • Patent number: 7933726
    Abstract: A system, method, and apparatus for obtaining a record of logic level transitions within a signal, and for accurately determining a voltage-time pair exhibited by the signal. To achieve these ends, a front-end device may be mated to a real-time sampling system, such as an oscilloscope. The front-end device effectively permits the oscilloscope to observe signals exhibiting greater data rates than otherwise possible without the front-end device.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: April 26, 2011
    Assignee: Gigamax Technologies, Inc.
    Inventors: John D. Hamre, Peng Li, Steven Fraasch
  • Patent number: 7933728
    Abstract: Provided is a skew measurement apparatus, including sampling sections that each sample one of a plurality of signals under measurement having a cycle T, a waveform reconfiguring section that shapes a reconfigured waveform having the cycle T by rearranging ordinal ranks of sample values of the signal under measurement sampled by each sampling section, a distribution generating section that generates a timing distribution of edges in the reconfigured waveform of the corresponding signal under measurement, and a skew calculating section that calculates skew between the signals under measurement being compared based on the timing distribution of each signal under measurement.
    Type: Grant
    Filed: May 8, 2008
    Date of Patent: April 26, 2011
    Assignee: Advantest Corporation
    Inventor: Masahiro Ishida