Compatibility Emulation Patents (Class 703/27)
  • Patent number: 10990424
    Abstract: A device configured to emulate a node in a correlithm object processing system includes a memory and a node. The memory stores a node table that links source correlithm objects to target correlithm objects. The node receives an input correlithm object and determines n-dimensional distances between it and the source correlithm objects, and determines that it is not within an n-dimensional distance threshold from any of the source correlithm objects. The node receives a stimulus condition correlithm object in conjunction with receiving the input correlithm object and adds the input correlithm object to the node table as a new source correlithm object in response to determining that it is not within the n-dimensional distance threshold and further in response to receiving the stimulus condition correlithm object. The node then links a new target correlithm object to the new source correlithm object in the node table.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: April 27, 2021
    Assignee: Bank of America Corporation
    Inventor: Patrick N. Lawrence
  • Patent number: 10976959
    Abstract: An optimized solution for accessing virtual machine state while restoration of a respective virtual machine is underway. Specifically, the optimized solution disclosed herein implements a fetching mechanism for retrieving granular virtual machine state over a network and/or from a remote storage system. The fetching mechanism leverages block allocation information in parallel with disk caching to provide instant (or near instant) access to a virtual machine state while also, concurrently, restoring the respective virtual machine.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: April 13, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Aaditya Bansal, Shelesh Chopra, Soumen Acharya, Sunil Yadav
  • Patent number: 10963280
    Abstract: Systems, apparatuses, and methods for implementing hypervisor post-write notification of processor state register modifications. A write to a state register of the processor may be detected during guest execution. In response to detecting the write to the state register, the processor may trigger microcode to perform the write and copy the new value of the register to a memory location prior to exiting the guest. The hypervisor may be notified of the update to the state register after it occurs, and the hypervisor may be prevented from modifying the value of the guest's state register. The hypervisor may terminate the guest if the update to the state register is unacceptable. Alternatively, the hypervisor may recommend an alternate value to the guest. If the guest agrees, the guest may set the state register to the alternate value recommended by the hypervisor when the guest resumes operation.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: March 30, 2021
    Assignee: Advanced Micro Devices, Inc.
    Inventors: David A. Kaplan, Joel Howard Schopp
  • Patent number: 10956497
    Abstract: Disclosed herein are embodiments of systems, methods, and products comprises an analytic server, which uses scalable vector graphic (SVG) format to encapsulate building floorplan and metadata. The analytic server creates a floorplan map in SVG format that includes both a graphic map and a specification file. When a user issues an information request by clicking on one graphical element, the analytic server determines the object identifier of the clicked graphical element, queries the specification file to receive metadata about the clicked graphical element based on the object identifier, and renders a user interface to display the metadata about the graphical element. When the user modifies the graphical element, the analytic server determines new data of the graphical element and updates the corresponding object metadata with the new data in the specification file.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: March 23, 2021
    Assignee: United States Automobile Association (USAA)
    Inventor: Jesse Plymale
  • Patent number: 10949537
    Abstract: Electronic computing devices provide a method to update firmware. The method includes receiving a firmware image at an electronic device, the electronic device having a processor and a memory arranged to store instructions executed by the processor. In the electronic device, a unique device identifier is retrieved and a random number is generated. The generated random number is securely stored. The random number and a representation of the unique device identifier are computationally combined to create a device-binding value, and an address-offset is generated from the device-binding value. The firmware image is stored in the memory at the address-offset.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: March 16, 2021
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Maurizio Gentili, Massimo Panzica
  • Patent number: 10929764
    Abstract: An apparatus includes a state machine engine. The state machine engine may also include an automaton, whereby the automaton is configured to analyze data from a beginning of an input data stream until a point when an end of data signal is seen. The automaton may further be configured to report an event representative of a satisfaction of a Boolean clause of a conjunctive normal form (CNF) Boolean expression representative of a Boolean Satisfiability problem (SAT) by a portion of the input data stream.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: February 23, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Matthew T. Grimm, Jeffery M. Tanner
  • Patent number: 10922375
    Abstract: A client computing device includes an embedded browser that includes first and second browsers, a copy file user interface (UI) control and a processor. The first browser is for a user to identify a file to be copied from a source application, and the second browser is for the user to identify a location of where the file is to be copied within a target application. The processor cooperates with the embedded browser in response to the user selecting the copy file UI control to retrieve the identified file in the source application and copy to the identified location within the target application without requiring further user input.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: February 16, 2021
    Assignee: CITRIX SYSTEMS, INC.
    Inventor: Jeroen Mattijs Van Rotterdam
  • Patent number: 10891133
    Abstract: Code-specific affiliated register prediction. A determination is made as to whether a unit of code is a candidate for affiliated register prediction. The determining employs a code specific indicator specific to the unit of code. Based on determining the unit of code is a candidate for affiliated register prediction, an indication of an affiliated register is loaded into a selected location. Based on the loading, the affiliated register is employed in speculative processing.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: January 12, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 10890939
    Abstract: A method for generating a not-yet (NYET) signal in a recovered reference system for recovering a device reference clock on a device, wherein the NYET signal indicates that the device is not yet ready for transition into a low power mode, in order to improve a quality of a recovered reference clock representative of a host reference clock of a host communicatively coupled to the device, may be provided. The method may include detecting receipt of start-of-frame markers from the host to the device, responsive to detecting receipt of the markers, determining whether a condition for NYET generation is being met, responsive to the condition for NYET generation being met, generating the NYET signal to cause the host to continue generating the markers, and responsive to the condition for NYET generation not being met, causing the device to generate an acknowledge signal for transition of the device into the low power mode.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: January 12, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Bradley Allan Lambert, Bruce E. Duewer, David Hisky, Marc J. Kobayashi, Michael A. Kost
  • Patent number: 10884787
    Abstract: Systems and methods are described for implementing execution guarantees in an on-demand code execution system or other distributed code execution environment, such that the on-demand code execution system attempts to execute code only a desired number of times. The on-demand code execution system can utilize execution identifiers to distinguish between new and duplicative requests, and can decline to allocate computing resources for duplicative requests. The on-demand code execution system can further detect errors during execution, and rollback the execution to undo the execution's effects. The on-demand code execution system can then restart execution until the code has been execute the desired number of times.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: January 5, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: Timothy Allen Wagner, Marc John Brooker, Jonathan Paul Thompson, Ajay Nair
  • Patent number: 10853213
    Abstract: Installation errors for removable hardware components are typically identified only after placing an IHS (Information Handling System) back into service. Upon servicing a removeable hardware component and powering the IHS, a hardware validation request may be issued during booting of the IHS. In certain instances, a technician may trigger a hardware validation request via keyboard inputs during booting. If a hardware validation request is detected, the IHS is diverted from booting to a hardware validation process that identifies the removeable hardware components coupled to the hardware connectors supporting removeable hardware and determines a support level for the removeable hardware components at their installed connector locations. If performance issues are indicated by the support level for the hardware component, a hardware installation recommendation is displayed. The technician may resume booting or perform additional service on the IHS based on the recommendation.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: December 1, 2020
    Assignee: Dell Products, L.P.
    Inventors: Vaideeswaran Ganesan, Suren Kumar
  • Patent number: 10838920
    Abstract: A server executes in a virtual machine and facilitates execution of lightweight plug-in functions that respond to user interface commands from a client device. The functions augment the commands with additional processing even though they may not implement a user interface, they generate data in real time, they access any data repository or data source, can be written in any programming language, and they perceive that they have infinite storage. The client device need not have custom software and implements a traditional file-folder user interface using standard applications. Folders and file contents displayed on the client device need not exist until specifically requested by the user. Plug-in functions have their own root file system but may share a network namespace. Data may be input to a function using a folder name or a micro Web server. Two functions share a database connection to a remote computer.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: November 17, 2020
    Assignee: ESOPTRA NV
    Inventors: Paul Carpentier, Jan Van Riel
  • Patent number: 10824451
    Abstract: Simulation of execution of a processing workload by a target hardware device is provided by providing workload data specifying the processing workload, passing the workload data to both a primary partial simulation and a complementary partial simulation that run in parallel and acquire input data from different levels of abstraction of the target hardware and then simulating execution of the processing workload using a primary partial simulation to generate primary partial result state data and using the complementary partial simulation to generate complementary partial result state data. The target hardware device may be a graphics processing unit and the workload data may specify the processing to be performed in a hardware independent form, such as, for example, OpenGL ES. The host system supporting the simulation may include a graphics processing unit serving to provide the complementary partial simulation due to its own execution of the workload data.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: November 3, 2020
    Assignee: ARM LIMITED
    Inventors: Robert James Catherall, Anthony Neil Berent, Rhys David Copeland, Mark Edgeworth, Jonathan Stephen Black
  • Patent number: 10826970
    Abstract: A system for terminal emulation includes a first processor, a first terminal emulator being addressable by a first identifier, and a first router incorporated into the first terminal emulator. The system also includes a second processor, a second terminal emulator being addressable by a second identifier, and a second router incorporated into the second terminal emulator. A first bidirectional connection exists between the first terminal emulator and the second terminal emulator. A first terminal is addressable by the second terminal emulator via a third identifier over a second bidirectional connection. A second terminal is addressable by the second terminal emulator via a fourth identifier over a third bidirectional connection. The first and second routers facilitate communication between the first terminal emulator and both the first terminal and the second terminal via the first bidirectional connection via the first identifier, the second identifier, the third identifier, and/or the fourth identifier.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: November 3, 2020
    Assignee: TermySequence LLC
    Inventor: Eamon F. Walsh
  • Patent number: 10824524
    Abstract: An information handling system may include one or more processors, a memory system communicatively coupled to the one or more processors, and a program of instructions embodied in non-transitory computer readable media and configured to, when read and executed by the one or more processors, create operating system level-mirroring of address spaces for data associated with one or more processes executing on the one or more processors and dynamically reallocate address spaces used for mirroring of the data for a process of the one or more processes from a first address space to a second address space responsive to a determination that a number of correctable bit errors of a memory page associated with the first address space exceeds a threshold.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: November 3, 2020
    Assignee: Dell Products L.P.
    Inventors: Krishnaprasad Koladi, Wei G. Liu, Gobind Vijayakumar, Murugan Sekar
  • Patent number: 10810306
    Abstract: The present invention is directed to system for and methods of real time observing, monitoring, and detecting anomalies in programs' behavior at instruction level. The hardware assist design in this invention provides fine grained observability, and controllability. Fine grained observability provides unprecedented opportunity for detecting anomaly. Controllability provides a powerful tool for stopping anomaly, repairing the kernel and restoring the state of processing. The performance improvement over pure software approach is estimated to be many orders of magnitudes. This invention is also effective and efficient in detecting mutating computer viruses, where normal, signature based, virus detection is under performing.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: October 20, 2020
    Inventor: Sukarno Mertoguno
  • Patent number: 10795655
    Abstract: A method and system is provided for provisioning software applications on edge devices in an Internet-of-Things (IoT) environment. In an embodiment, a method includes generating a plurality of simulation instances capable of simulating behavior of a software application on one or more edge devices in the IoT environment. Each simulation instance is configured with a unique resource configuration. The method includes processing the software application on each simulation instance using data from a plant. Furthermore, the method includes computing an optimum resource configuration associated with the software application based on processing of the software application on the simulation instances.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: October 6, 2020
    Assignee: Siemens Aktiengesellschaft
    Inventor: Amit Verma
  • Patent number: 10789180
    Abstract: A serial peripheral interface (SPI)-based data transmission method, including sending, by a first device, a first query request to a second device through a universal asynchronous receiver/transmitter (UART) interface, where the first query request queries the second device for an SPI mode supported by the second device, sending, by the first device, in response to the first device determining, according to a first query response returned by the second device, that the second device supports an SPI master mode, an SPI connection establishment request to the second device, where the SPI connection establishment request causes the second device to initiate establishment of an SPI connection to the first device, and performing, by the first device, through the SPI, and after the first device establishes the SPI connection to the second device, at least one of receiving data sent by the second device, or sending data to the second device.
    Type: Grant
    Filed: January 16, 2017
    Date of Patent: September 29, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventor: Shaohua Zhong
  • Patent number: 10733134
    Abstract: In accordance with embodiments of the present disclosure, an information handling system may include a motherboard, a plurality of information handling resources communicatively coupled to the motherboard, a socket communicatively coupled to the motherboard and configured to receive one of a plurality of different types of interposers, wherein each of the plurality of interposers is configured to provide routing of electrical signals between the socket and a respective system on a chip communicatively coupled to such interposer, and a configuration module. The configuration module may be configured to receive identifying information associated with an interposer, of the plurality of interposers, communicatively coupled to the socket and based on the identifying information, configure the plurality of information handling resources for interoperability with a system on a chip communicatively coupled to the interposer.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: August 4, 2020
    Assignee: Dell Products L.P.
    Inventors: Ayedin Nikazm, Ramesh Radhakrishnan
  • Patent number: 10735514
    Abstract: Systems and methods are disclosed for remote configuration of applications on a network-attached storage device (NAS). In certain embodiments, a NAS includes a non-volatile memory module, a network interface, and control circuitry configured to store a mapping of an application identifier and a port for each of the plurality of applications stored in the non-volatile memory. The control circuitry receives, from a client over the network interface, a request to configure a first application of the plurality of applications, the request comprising a first port corresponding to the first application. The control circuitry determines a first embedded web server of the first application based on the mapping and the first port received in the request and transmits the request to the first embedded web server on the first application.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: August 4, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Sapna Murari Todwal, Sailesh Rachabathuni, Cipson Jose Chiriyankandath, Ruslan Azibovich Sharifullin
  • Patent number: 10713099
    Abstract: A data processing system comprising: an operating system providing an application programming interface; an application supported by the operating system and operable to make calls to the application programming interface; an intercept library configured to intercept calls of a predetermined set of call types made by the application to the application programming interface; and a configuration data structure defining at least one action to be performed for each of a plurality of sequences of one or more calls having predefined characteristics, the one or more calls being of the predetermined set of call types; wherein the intercept library is configured to, on intercepting a sequence of one or more calls defined in the configuration data structure, perform the corresponding action(s) defined by the configuration data structure.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: July 14, 2020
    Assignee: XILINX, INC.
    Inventors: Steven L. Pope, David J. Riddoch, Kieran Mansley
  • Patent number: 10691341
    Abstract: One or more embodiments provide techniques for accessing a memory page of a virtual machine for which loading might have been deferred, according to an embodiment of the invention, includes the steps of examining metadata of the memory page and determining that a flag in the metadata for indicating that the contents of the memory page needs to be updated is set, and updating the contents of the memory page.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: June 23, 2020
    Assignee: VMware, Inc.
    Inventors: Yury Baskakov, Alexander Garthwaite, Jesse Pool
  • Patent number: 10691715
    Abstract: Systems and methods for dynamically integrating disparate computer-aided dispatch (CAD) systems are disclosed. The systems and methods provide bi-directional interoperability between disparate CAD systems and maintain stateful ongoing interactions between interconnected CAD systems. Information objects in one CAD system are associated and bound to related objects in other CAD systems through a centralized information hub that transforms data items intelligently to facilitate communication and interaction between the CAD systems connected to the hub. The described systems and methods maintain complete and current perspectives of all relevant information for each CAD system connected to the information hub, thereby eliminating the need for point-to-point intelligence maintained by the CAD systems about the other interconnected CAD systems.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: June 23, 2020
    Assignee: CentralSquare Technologies, LLC
    Inventors: Jonathan K Wesley, Sr., Erik Cooley, Nathan Daniels, John Harding, Andrew Horlacher, Ryan McAlister, Ryan Sealy, Brian Taylor
  • Patent number: 10693946
    Abstract: A service provider may provide a companion computer system associated with a mobile device in order to facilitate operation of the mobile device. The companion computer system and the mobile device may be associated in a database operated by the service provider. Furthermore, the companion computer system may execute a component of an application on behalf of the mobile device, where the mobile device executes another component of the application.
    Type: Grant
    Filed: September 16, 2014
    Date of Patent: June 23, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Marco Argenti, Khawaja Salman Shams
  • Patent number: 10691712
    Abstract: In accordance with an embodiment, described herein is a system and method for merging a mainframe data file to a target table in a database used by a mainframe rehosting platform. A plurality of programs can be generated by the mainframe rehosting platform based on the target table and the mainframe data file. The generated programs can be used to create in the database an empty temporary table that has the same structure as that of the target table, to upload the mainframe data file to the empty temporary table, and to use an existing merge function in the database to merge the temporary table with the target table. When uploading the mainframe data file to the temporary table, records in the mainframe data file can be read and stored into an array, which can be inserted into the temporary table in a single insert operation.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: June 23, 2020
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Weixuan (Wade) Zhang, Weiguo Zhu, Hui Shen
  • Patent number: 10664898
    Abstract: Exemplary systems and methods associated with generating conversations of electronic data exchanges. In particular, in one embodiment, a conversation generator determines whether records are related based on EDI data associated with a transaction, integrates the records based on associations within the EDI data, and generates a conversation that depicts the integrated EDI data associated with the transaction in a conversational format for viewing by a user. In other embodiments, an alert engine determines that there are errors in the conversation, such as missing or inconsistent data, and alerts a user accordingly.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: May 26, 2020
    Assignee: Epicor Software Corporation
    Inventors: Michael Hurley, Christopher Manchen, Michael Snyder, Jr., Ryan Williams, Nathaniel Schaffer, Andrew Murgola, Mark Rousseau
  • Patent number: 10637803
    Abstract: A runtime state of a virtual port associated with a virtual machine (“VM”) is persisted as the VM is migrated from a source host to a destination host. In certain embodiments, a virtual switch forwards network frames between the VM and the physical network interface via the virtual port. During migration of the VM, the runtime state of the virtual port is transferred to the destination host and applied at the second host to a virtual port associated with a second virtual switch at the destination host. The runtime state of the virtual port at the source host is then cleared, and the second virtual switch at the destination host forwards network frames between the migrated VM and the physical network interface of the destination host using the virtual port at the second host.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: April 28, 2020
    Assignee: VMware, Inc.
    Inventors: Andrew W. Lambeth, Shudong Zhou
  • Patent number: 10628281
    Abstract: A method of detecting concurrency vulnerabilities is provided. A method may include instrumenting read and write access for a program to a shared memory. The method may also include identifying, via a greybox fuzzer, a test case for the program. Further, the method may include analyzing, via the greybox fuzzer and based on the test case, two or more branches of the program that include sets of racing pairs to determine if the test case is a priority test case. In response to the test case being a priority test case, the method may include providing the test case from the greybox fuzzer to a concurrency verification module. The method may also include testing, via the concurrency verification module, the test case with one or more scheduling policies to identify one or more concurrency vulnerabilities.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: April 21, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Quoc-Sang Phan, Praveen Murthy
  • Patent number: 10623434
    Abstract: A system is provided with one or more virtual machines and a replayer. The virtual machine(s) are configured to mimic operations of a first device. The replayer is configured to mimic operations of a second device. Herein, the replayer receives a portion of network data under analysis, dynamically modifies the portion of the network data, and transmits the modified portion of the network data to at least one virtual machine of the one or more virtual machines in accordance with a protocol sequence utilized between the first device and the second device.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: April 14, 2020
    Assignee: FireEye, Inc.
    Inventors: Ashar Aziz, Ramesh Radhakrishnan, Osman Ismael
  • Patent number: 10623385
    Abstract: Concepts and technologies of latency sensitive tactile network security interfaces are provided herein. In an embodiment, a method can include identifying, by a tactile network interface controller, encrypted command packets that are being sent as a data stream to a tactile application. The method can include obtaining a command sequence model based on the encrypted command packets being sent to the tactile application, and decrypting at least some of the encrypted command packets based on the command sequence model, where decrypting the encrypted command packets identifies non-sequential command instructions. The method can include determining, based on the command sequence model, that at least some of the non-sequential command instructions do not conform to the command sequence model, and dropping, by the tactile network interface controller, the non-sequential command instructions that do not conform to the command sequence model from the data stream.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: April 14, 2020
    Assignee: AT&T Mobility II LLC
    Inventors: Brian Dominguez, Senthil Ramakrishnan
  • Patent number: 10613990
    Abstract: Aspects of the disclosure provide for host address space identifiers for non-uniform memory access (NUMA) locality in virtual machines. A method of the disclosure includes receiving, by a hypervisor executed by a processing device of a host machine, execution control from a guest managed by the hypervisor, wherein a page fault corresponding to a guest physical address (GPA) triggered an exit to the hypervisor from the guest, identifying a host address space identifier (HASID) from the GPA, determining, in view of the HASID, whether to migrate a memory page associated with the GPA to a destination host non-uniform memory access (NUMA) node corresponding to the HASID, and creating a new page table entry for the GPA in a host page table of the hypervisor.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: April 7, 2020
    Assignee: Red Hat, Inc.
    Inventors: Andrea Arcangeli, Michael Tsirkin
  • Patent number: 10592431
    Abstract: According to examples, an apparatus may include a processor to address a physical memory having memory sections, in which a first set of memory sections may be shared between processes and a second set of memory sections may be specific to an individual process. The apparatus may also include a shared virtual address space register to provide translation for the first set of memory sections shared between processes and a process virtual address space register to provide translation for the second set of memory sections specific to the individual process. The translation for the second set of memory sections may be independent from the translation for the first set of memory sections.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: March 17, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Izzat El Hajj, Alexander Marshall Merritt, Gerd Zellweger, Dejan S. Milojicic, Paolo Faraboschi
  • Patent number: 10579277
    Abstract: Non-disruptive insertion of a storage appliance provides virtualized storage. A first logical device of a data storage system is exposed to a first host and a second host. A data store of the first logical device is uniquely identified using a signature. After inserting the storage appliance between the first host and the data storage system, the first logical device is presented, through the storage appliance, to the first host as a second logical device. After inserting the storage appliance between the second host and the data storage system, the first logical device is presented, through the storage appliance, to the second host as the second logical device. The first and second hosts identify the second logical device and the first logical device as the same logical device using the signature. The data store may be a virtual machine file system data store used by virtual machines on the hosts.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: March 3, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Sadasivam Shanmugam, Srikanth Venkataraman, Rajkumar Manicka, Steven Richard Bromling
  • Patent number: 10572372
    Abstract: A processor-implemented method, system, and/or computer program product determines a testing regime for program code created in a development system. A risk factor of a user of the development system is calculated based on information relating to previous activities of the user. The calculated risk factor, which describes a likelihood of the user damaging the development system, is used to determine a testing regime for testing program code.
    Type: Grant
    Filed: November 11, 2013
    Date of Patent: February 25, 2020
    Assignee: International Business Machines Corporation
    Inventors: Timothy McCormick, Alexander D. S. Mirski-Fitton, Edwin P. J. Moffatt, Ross B. Pavitt
  • Patent number: 10565126
    Abstract: A system, apparatus and method are provided in which a range of virtual memory addresses and a copy of that range are mapped to the same first system address range in a data processing system until an address in the virtual memory address range, or its copy, is written to. The common system address range includes a number of divisions. Responsive to a write request to an address in a division of the common address range, a second system address range is generated. The second system address range is mapped to the same physical addresses as the first system address range, except that the division containing the address to be written to and its corresponding division in the second system address range are mapped to different physical addresses. First layer mapping data may be stored in a range table buffer and updated when the second system address range is generated.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: February 18, 2020
    Assignee: Arm Limited
    Inventors: Jonathan Curtis Beard, Roxana Rusitoru, Curtis Glenn Dunham
  • Patent number: 10564953
    Abstract: According to one embodiment of the present invention, a computer system updates a system including a plurality of sever instances, and includes at least one processor. The computer system determines a level of configuration for each operating server instance. One or more sets of operational features are added to the system based on a comparison between the determined levels of configuration of the operating server instances and minimum levels of configuration associated with the one or more sets of operational features. Server operations are performed and one or more corresponding sets of operational features are applied to the server operations in response to the addition of those corresponding sets of operational features to the system. Embodiments of the present invention further include a method and computer program product for updating a system including a plurality of server instances in substantially the same manner described above.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: February 18, 2020
    Assignee: International Business Machines Corporation
    Inventors: Kevin B. Bates, William J. Carpenter, Michael G. Winter
  • Patent number: 10534588
    Abstract: A method and system including an application server; a framework including a simulator module; a display; a storage device; and a simulator processor in communication with the simulator module and operative to execute processor-executable process steps to cause the system to: receive a metadata file for an application; receive a request from a user interface associated with the application; transmit the request to the simulator module; generate, in response to the received request, one or more simulated data elements at the simulator module based on the metadata and a communication protocol; and display the one or more simulated data elements on the display. Numerous other aspects are provided.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: January 14, 2020
    Assignee: SAP SE
    Inventors: Raphael Dibbern, Olaf Tennie
  • Patent number: 10534609
    Abstract: Code-specific affiliated register prediction. A determination is made as to whether a unit of code is a candidate for affiliated register prediction. The determining employs a code specific indicator specific to the unit of code. Based on determining the unit of code is a candidate for affiliated register prediction, an indication of an affiliated register is loaded into a selected location. Based on the loading, the affiliated register is employed in speculative processing.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: January 14, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 10530802
    Abstract: A method of detecting malicious software (malware) includes receiving a file and storing a memory baseline for a system. The method also includes copying the file to the system, executing the file on the system, terminating operation of the system, and storing a post-execution memory map. The method further includes analyzing the memory baseline and the post-execution memory map and determining that the file includes malware.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: January 7, 2020
    Assignee: VERISIGN, INC.
    Inventors: Ralph Thomas, Bruce Michael Ligh
  • Patent number: 10528868
    Abstract: Within satisfaction problems or any decision or other problem which is reducible to a satisfaction problem, the invention tracks the paths along which implications propagate and identifies conditional contradictions and subsequently moves the contradictions back down the implicational paths toward assumptions or other unreasoned assertions in order to expel the contradictions. The action is completed in less time than is incurred by existing methods and thus provides a performance improvement to the devices, software, or processes which address such problems.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: January 7, 2020
    Inventor: Clayton Gillespie
  • Patent number: 10521254
    Abstract: An information processing system includes: an information processing apparatus including: a shared operation unit that performs verification of operation of inter-model common processing common to multiple models out of processes of an application with a first program for realizing operation common to the models, and sends a result of the operation verification to the application; a processing requesting unit that requests an external device to perform verification of operation of model-dependent processing specific to each model with a second program for realizing operation specific to each model; and an acquiring unit that acquires a result of the verification of operation of model-dependent processing from the external device, and sends the result to the application, and external devices that perform verification of operation of model-dependent processing specific to each model out of the processes of the application with the second program for realizing operation specific to each model.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: December 31, 2019
    Assignee: RICOH COMPANY, LTD.
    Inventor: Hideki Ohhashi
  • Patent number: 10466977
    Abstract: Provided herein are various systems, methods and architectures for enabling a microcontroller manufacturer to provide certain modification and configuration functionality to product vendors, while still maintaining the level of control needed to ensure that a product vendor does not inadvertently (or otherwise) create code that causes the microcontroller to not work properly. In one embodiment, this functionality can be performed through the steps of displaying a set of microcontroller properties that are available for configuration, receiving user information regarding a first value corresponding to a first microcontroller property, determining whether the user information results in a valid microcontroller configuration, and in response to determining that the user information results in a valid microcontroller configuration, generating compiled code for the microcontroller.
    Type: Grant
    Filed: October 11, 2016
    Date of Patent: November 5, 2019
    Assignee: Renesas Electronics America Inc.
    Inventors: Jon Matthew Brabender, John L. Dallaway, Mark Goodchild, James Mark Deadman, Brandon Cranford Hussey, Kristine M. Jassmann
  • Patent number: 10462848
    Abstract: A non-transitory computer readable recording medium storing therein a communication program, the communication program relaying communication from an application operating on a terminal to a communication destination and causing a computer to execute a process, the process including: switching a communication protocol for the communication from a first protocol to a Delay/Disruption Tolerant Networking (DTN) protocol, in accordance with a connection condition with the communication destination for the communication; and notifying the terminal of a failure of a specific communication in cases when the specific communication has been notified to the application as completed and the specific communication in the DTN protocol results in failure.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: October 29, 2019
    Assignee: FUJITSU LIMITED
    Inventor: Shinya Yamamura
  • Patent number: 10452867
    Abstract: A system function invoking method and apparatus, and a terminal are disclosed and are related to the field of computer technologies. The method includes acquiring an installation package of a first application program; granting a first permission of a system to the first application program according to the installation package, where the first permission is used to, when the first application program is in a running state, forbid a second application program from invoking at least one system function; and running the first application program, and forbidding the second application program from invoking the at least one system function. The apparatus includes a first acquiring module, an authorization module, and an invoking module.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: October 22, 2019
    Assignee: HUAWEI DEVICE CO., LTD.
    Inventors: Xi Huang, Huangwei Wu
  • Patent number: 10430216
    Abstract: Assigning virtual machines to physical devices in a cluster, without need for substantial operator decision-making or intervention. An operator console, coupled to the cluster, receives information from those physical devices about resource use by virtual machines. Each physical device reports virtual machines assigned thereto, and their resource usage. The console presents information regarding resource use by virtual machines, and presents a control panel to the operator, allowing manipulation of virtual machines and physical devices: starting or stopping virtual machines, moving virtual machines, adding or removing physical devices. The operator can create a new virtual machine, or can restart a paused or stopped virtual machine.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: October 1, 2019
    Assignee: Scale Computing Inc
    Inventor: Scott Loughmiller
  • Patent number: 10402297
    Abstract: Disclosed are various embodiments for processing file modifications in a networked storage system. A file is stored in a file system. If a modification listener is associated with the file, a notification that the file has been modified is sent to the modification listener. The modification listener can trigger processing of the file by executable code.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: September 3, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Piragash Velummylum, Johanna S. Olson, Korwin J. Smith, James H. Wood
  • Patent number: 10362090
    Abstract: Disclosed is a method and system for automating a process associated with a web based software application. The method comprises capturing one or more activities performed by a user for the process. An activity of the one or more activities corresponds to one or more events. An event of the one or more events indicates a means of interaction of the user with the web based software application. The method further comprises extracting metadata associated with each activity of the one or more activities. The method comprises sensing a response of the web based software application for each activity performed by the user. The method comprises generating a rule for each activity based on the metadata extracted, the one or more events, and the response. The method further comprises configuring a script for the process by combining rules generated for the one or more activities.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: July 23, 2019
    Assignee: Tata Consultancy Services Limited
    Inventors: Ravi Hanmant Mahamuni, Rohit Saxena, Sumesh R. Manjunath
  • Patent number: 10346420
    Abstract: The invention provides for a method of using a database assembly. The database assembly comprises at least three computing system. Each of the at least three computing systems comprises at least one application and a local database system. The database assembly further comprise a database integration system and a network connection between each of the at least three computing systems and the database integration system.
    Type: Grant
    Filed: May 30, 2016
    Date of Patent: July 9, 2019
    Assignee: SAP SE
    Inventor: P. Meenakshi Sundaram
  • Patent number: 10311153
    Abstract: A versioned file system comprising network accessible storage is provided. Aspects of the system include globally locking files or groups of files so as to better control the stored files in the file system and to avoid problems associated with simultaneous remote access or conflicting multiple access requests for the same files. A method for operating, creating and using the global locks is also disclosed. A multiprotocol global lock can be provided for filing nodes that have multiple network protocols for generating local lock requests.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: June 4, 2019
    Assignee: Nasuni Corporation
    Inventors: Robert S. Mason, Jr., David M. Shaw, Kevin W. Baughman, Christopher S. Lacasse, Matthew M. McDonald, Russell A. Neufeld, Akshay K. Saxena
  • Patent number: RE48514
    Abstract: According to one embodiment, a semiconductor device includes a device. The device includes a decoder, a generation circuit, a register, and a modifier. The decoder analyzes a command of a received packet. The generation circuit generates a unique device number in accordance with information in the packet. The register holds the generated unique device number. The modifier updates and outputs the packet. When a packet issued by a host is a command packet, among broadcast packets which return to the host through one or more devices, for determining the unique device number, the command packet includes parameters of an initial value and final value of device number.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: April 13, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Akihisa Fujimoto