Compatibility Emulation Patents (Class 703/27)
  • Publication number: 20150057990
    Abstract: In an information processing device connected to an external device via a network, the external device includes an application platform of an image forming device and the information processing device includes a platform emulator that emulates the application platform. The platform emulator includes an implementing information acquiring part that receives a list of information items of interfaces implemented on the application platform in the external device from the external device and stores the list of information items in a holding part, a determining part that determines, in response to an interface calling request from an application using the platform emulator, whether an interface is implemented in the external device based on the stored list of information items, and an external calling part that transmits, when the interface is implemented, a request of execution of the interface to the external device.
    Type: Application
    Filed: October 31, 2014
    Publication date: February 26, 2015
    Inventors: Xiaofeng HAN, Tsutomu OHISHI
  • Patent number: 8924192
    Abstract: A system and methods emulate an application executing in real time in a mobile device. The mobile device is emulated in real time using a model running on a processor extrinsic to the mobile device. The model is based on characteristics indicative of performance of the mobile device. The application is executed in real time within the model and the application executing in the model is monitored to determine resource utilization information by the application for the mobile device. The resource utilization information for the mobile device is displayed.
    Type: Grant
    Filed: November 9, 2012
    Date of Patent: December 30, 2014
    Assignee: Wapp Tech Corp.
    Inventor: Donavan Paul Poulin
  • Patent number: 8903705
    Abstract: This document describes techniques for allowing a computing device that provides a minimal execution environment to execute legacy applications that rely on rich functionality that the computing device does not natively provide. For instance, a device may initially receive a request to execute an application and may determine whether the application is directly executable. In response to determining that the application is not directly executable, the computing device may determine whether the application specifies another application to provide the functionality. If the application specifies another application to provide this functionality, then the computing device retrieves the specified application and executes the specified application on the client computing device. If the application does not specify such an application, then the computing device may execute a default application for providing the functionality.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: December 2, 2014
    Assignee: Microsoft Corporation
    Inventors: John R. Douceur, Jonathan R. Howell, Arun M. Seehra
  • Patent number: 8880387
    Abstract: An information processing apparatus connected to an emulator to arrange a verification model and a verification target includes a compile unit configured to create a first data transfer unit arranged in a computer to transfer data from the computer to the emulator based on a description of a file function of a verification program and a generation unit configured to generate a second data transfer unit that receives the data from the first data transfer unit and transfers the received data to the verification target based on the description of the file function.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: November 4, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Fumitada Nagashima
  • Publication number: 20140297250
    Abstract: A method and system for providing an emulation of a computer product is described. The method and system involve receiving an emulation request for initiating the emulation; in response to receiving the emulation request, creating an emulation session based at least on the emulation data and creating an emulation session identifier; determining one or more resources required for providing the emulation based on the emulation data and linking resource identifiers for the one or more resources with the emulation session identifier; identifying one or more emulator servers capable of providing the emulation based at least on the one or more resources and linking emulator server identifiers for the one or more emulator servers with the emulation session identifier; defining session data for the emulation session based on the emulation session identifier; and initiating the emulation session based on the session data.
    Type: Application
    Filed: March 28, 2014
    Publication date: October 2, 2014
    Applicant: Sphere 3D Inc.
    Inventors: Giovanni Morelli, JR., Brandon Cowen, Marian Dan, Hussain Damji
  • Publication number: 20140297251
    Abstract: A method and system for emulating a computer product at an emulator server. The method and system involve receiving an emulation request to emulate the computer product; determining emulation properties based on the emulation request; determining whether each resource in the one or more resources is available at the emulator server; in response to determining at least one unavailable resource from the one or more resources, accessing the at least one unavailable resource at a remote emulator server, the remote emulator server being in electronic communication with the emulator server via a virtual external bus interface and the virtual external bus interface being operable to facilitate data communication between two or more different device components, and otherwise, initializing the resource at the emulator server; and initializing the computer product at the emulator server.
    Type: Application
    Filed: March 28, 2014
    Publication date: October 2, 2014
    Applicant: Sphere 3D Inc.
    Inventors: Giovanni Morelli, JR., Brandon Cowen, Marian Dan, Hussain Damji
  • Patent number: 8850229
    Abstract: An apparatus for generating a decryption key for use to decrypt a block of encrypted instruction data being fetched from an instruction cache in a microprocessor at a fetch address includes a first multiplexer that selects a first key value from a plurality of key values based on a first portion of the fetch address. A second multiplexer selects a second key value from the plurality of key values based on the first portion of the fetch address. A rotater rotates the first key value based on a second portion of the fetch address. An arithmetic unit selectively adds or subtracts the rotated first key value to or from the second key value based on a third portion of the fetch address to generate the decryption key.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: September 30, 2014
    Assignee: VIA Technologies, Inc.
    Inventors: G. Glenn Henry, Terry Parks, Brent Bean, Thomas A. Crispin
  • Patent number: 8838819
    Abstract: A method for synchronizing different components of a computer network system using meta-commands embedded in normal network packets. The data communication channel between different components of a computer network system can be used to transport meta-commands piggybacked in normal network packets, without modifying or compromising the validity of the protocol message. Embodiments of the method can be used for embedding test synchronization and control commands into the network packets sent through a device or system under test. The device or system under test can be an edge device, with the data communication channel carrying normal packets containing meta-commands embedded in the packets to synchronize the test control of the test clients and the test servers connected to the edge device.
    Type: Grant
    Filed: April 16, 2010
    Date of Patent: September 16, 2014
    Assignee: Empirix Inc.
    Inventors: Sergey Eidelman, Anne-Marie Turgeon, Tibor Ivanyi, David Hsing-Wang Wong, Anuj Nath
  • Patent number: 8819646
    Abstract: A software unit arrangement method includes developing a standardized software-hardware abstraction software layer in a software unit. The standardized abstraction software layer includes a library of primitives that interface with the source codes of the software unit and with a real or virtual computer hardware unit. The method includes developing a real-hardware or virtual-hardware software layer in the associated computer hardware unit. The real-hardware or virtual-hardware software layer forming the portion of the computer hardware unit that interfaces with the standardized abstraction software layer and that presents real and/or virtual input/output cards performing at least the same functions as the real standard input/output cards of the real computer hardware unit.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: August 26, 2014
    Assignee: Airbus Helicopters
    Inventors: Jean-Luc Baudisson, Jean-Pierre Lebailly
  • Patent number: 8812287
    Abstract: A method and device for preserving the wired-OR nature of the clock signal connection between two devices without a direct analog connection between the lines and in an infinitely scalable fashion. The method includes detecting a logic state at a first connector and a second connector and driving an appropriate connector of the device to an active state in response to determining that a connector is driving an active state. The device includes first and second connectors for communicating logic states and driving active states in response to detected logic states.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: August 19, 2014
    Assignee: International Business Machines Corporation
    Inventor: Daniel J Barus
  • Publication number: 20140180666
    Abstract: Systems and methods allow a user to select one or more applications that are intended to be downloaded to a device (e.g., phone, tablet, PC) and create an emulation environment for testing aspects of the one or more applications prior to download. The emulation environment can be virtual (via emulation or virtual machine) or instrumented by remotely controlling actual hardware. Metrics collected from the emulation environment can include security and usability related aspects of the applications. Interaction between the applications themselves, the applications and other resources, and the user and the applications (e.g., configuration preferences, usage patterns) can be monitored by systems facilitating hosting of the emulation environment. For example, collected metrics can be used to create a measure for security, reputation, user-preference, etc. regarding the applications. Metrics can be shared amongst other potential users to assist in their purchase or usage of the applications.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 26, 2014
    Inventor: Igor Muttik
  • Patent number: 8744832
    Abstract: A hybrid electronic design system and a reconfigurable connection matrix thereof are disclosed. The electronic design system includes a virtual unit, a hybrid unit and a communication channel. The virtual unit further includes a plurality of proxy units, a plurality of virtual components and a driver. The virtual components are connected with the driver via the proxy units. The hybrid unit further includes an emulate unit, a physical unit and a chip level transactor. The chip level transactor is connected with the emulate unit and the physical unit. The communication channel is connected with the driver of the virtual unit and the chip level transactor of the hybrid unit.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: June 3, 2014
    Assignee: Global Unichip Corporation
    Inventor: Peisheng Alan Su
  • Patent number: 8738280
    Abstract: Methods for pedestrian unit (PU) communication activity reduction in pedestrian-to-vehicle communication networks include obtaining safety risk information for a pedestrian at risk for involvement in an accident and using the risk information to adjust a PU communication activity. In some embodiments, the activity reduction is achieved without implementing understanding of surroundings. In other embodiments, the activity reduction is based on risk assessment provided by vehicles. In some embodiments, the activity reduction includes PU transmission reduction. In some embodiments the transmission activity reduction may be followed by reception activity reduction for overall power consumption reduction.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: May 27, 2014
    Assignee: Autotalks Ltd.
    Inventor: Onn Haran
  • Patent number: 8731899
    Abstract: Various embodiments of the present invention are generally directed to an apparatus and method for recovering data from a signal generator using a native communication channel and an emulated communication channel coupled in parallel to the native communication channel.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: May 20, 2014
    Assignee: Seagate Technology LLC
    Inventors: Jay Alan Mahr, Jim Everett Wilson, Todd Charles Thaler
  • Patent number: 8700919
    Abstract: A fetch unit fetches a sequence of blocks of encrypted instructions of an encrypted program from an instruction cache at a corresponding sequence of fetch address values. While fetching each block of the sequence, the fetch unit generates a decryption key as a function of key values and the corresponding fetch address value, and decrypts the encrypted instructions using the generated decryption key by XORing them together. A switch key instruction instructs the microprocessor to update the key values in the fetch unit while the fetch unit is fetching the sequence of blocks. The fetch unit inherently provides an effective decryption key length that depends upon the function and amount of key values used. Including one or more switch key instructions within the encrypted program increases the effective decryption key length up to the encrypted program length.
    Type: Grant
    Filed: April 21, 2011
    Date of Patent: April 15, 2014
    Assignee: VIA Technologies, Inc.
    Inventors: G. Glenn Henry, Terry Parks, Brent Bean, Thomas A. Crispin
  • Publication number: 20140088950
    Abstract: Methods, systems, and computer readable media for providing a unified framework to support diverse data generation engines are provided. One exemplary system includes a protocol emulator that transmits data to a device under test. The protocol emulator sends a request including a data profile identifier to a data generation adapter. The data generation adaptor identifies a data generation engine of a plurality of data generation engines to provide data corresponding to the data profile identifier and requests the data from the identified data generation engine. The data generation engine that receives the request provides the data to the emulator, and the emulator forwards the data to the device under test.
    Type: Application
    Filed: November 6, 2012
    Publication date: March 27, 2014
    Applicant: IXIA
    Inventors: Partha Majumdar, Deep Datta
  • Patent number: 8677327
    Abstract: The present invention provides a service testing method and system using a surrogate. The service testing method comprises steps of: generating, according to service description of a service to be simulated, a service-specific surrogate for said service to be simulated; deploying the generated service-specific surrogate onto a runtime system; specifying a test case by referring to the generated service-specific surrogate, wherein said test case comprises test configuration; and setting, according to the test configuration, a configuration option of the deployed surrogate on the runtime system. In the service testing method and system according to the present invention, parameters of the surrogate are dynamically configured without necessity of rewriting and deployment, thereby reducing the burden of designing and generating Mock objects.
    Type: Grant
    Filed: April 9, 2008
    Date of Patent: March 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: He Yuan Huang, Shih-Gong Li, Zhong Jie Li, Jun Zhu
  • Patent number: 8671285
    Abstract: A fetch unit (a) fetches a block of instruction data from an instruction cache of the microprocessor; (b) performs an XOR on the block with a data entity to generate plain text instruction data; and (c) provides the plain text instruction data to an instruction decode unit. In a first instance the block comprises encrypted instruction data and the data entity is a decryption key. In a second instance the block comprises unencrypted instruction data and the data entity is Boolean zeroes. The time required to perform (a), (b), and (c) is the same in the first and second instances regardless of whether the block is encrypted or unencrypted. A decryption key generator selects first and second keys from a plurality of keys, rotates the first key, and adds/subtracts the rotated first key to/from the second key, all based on portions of the fetch address, to generate the decryption key.
    Type: Grant
    Filed: April 21, 2011
    Date of Patent: March 11, 2014
    Assignee: VIA Technologies, Inc.
    Inventors: G. Glenn Henry, Terry Parks, Brent Bean, Thomas A. Crispin
  • Patent number: 8671270
    Abstract: A computer system including no basic input/output system (BIOS) for operating bootstrap used in initial activation of a legacy operation system is allowed to perform booting of legacy operation system therefor and includes a central processing unit (CPU) and a memory, in which extended firmware and bootstrap program are stored. The extended firmware includes BIOS emulator and a plurality of device drivers. The extended firmware uses the device driver to make the BIOS emulator perform emulation of BIOS operation in response to a BIOS call issued by the bootstrap program.
    Type: Grant
    Filed: January 9, 2009
    Date of Patent: March 11, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Harumi Oigawa, Takashi Shimojo, Akira Takeshita, Takao Totsuka
  • Patent number: 8660833
    Abstract: An apparatus for providing an interactive network simulator may include processing circuitry configured to at least perform receiving an indication of messages or responses exchanged between a testing platform simulating one or more external systems and a system under test, storing data corresponding to the indications received, and providing for a visual display of information related to the indications received to a user interacting with the testing platform. A corresponding method and computer program product are also provided.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: February 25, 2014
    Assignee: McKesson Financial Holdings
    Inventor: Jonathan Pye
  • Patent number: 8656189
    Abstract: Systems and methods are provided for transmitting data for secure storage. For each of two or more data sets, a plurality of shares are generated containing a distribution of data from an encrypted version of the data set. The shares are then stored in a shared memory device, wherein a data set may be reconstructed from a threshold number of the associated plurality of shares using an associated key. Also provided are systems and methods for providing access to secured data. A plurality of shares containing a distribution of data from an encrypted version of a data set are stored in a memory device. A client is provided with a virtual machine that indicates the plurality of shares, and the capability to reconstruct the data set from the plurality of shares using an associated key.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: February 18, 2014
    Assignee: Security First Corp.
    Inventors: Rick L. Orsini, Mark S. O'Hare, Matt Staker
  • Patent number: 8656054
    Abstract: An apparatus, method, and computer program product for message send version management in a distributed computing environment including a plurality of nodes is provided. A message is sent from a first node of the plurality of nodes to at least one additional node of the plurality of nodes. At least one translation vector is constructed to translate between multiple message versions is constructed. The at least one translation vector is send from the first node to the at least one additional node. In one embodiment, the at least one translation vector is attached to the message to generate a packet.
    Type: Grant
    Filed: April 30, 2008
    Date of Patent: February 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Gary Anna, Joseph Whitney Dain
  • Patent number: 8654672
    Abstract: A process for forming a wireless mesh network (WMN) in which client coverage is calculated using a point-to-point propagation loss model and optimal routing and power allocation is determined to quantify the value of network flow. In one embodiment, the process calculates loss based on access point locations, operating characteristics and terrain and environment information. In one embodiment, the network flow and coverage subproblem values are combined via a penalty function. The process creates WMN topologies that maximize client coverage area by choice of access point locations, subject to constraints on network flow and power allocation, number and technical capabilities of access points, background and environmental noise, and radio propagation over terrain.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: February 18, 2014
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Paul J. Nicholas, David L. Alderson, Jr.
  • Publication number: 20140039869
    Abstract: Embodiments include a method for producing a simulator configured to simulate the behaviour of a target physical system, the simulator comprising a simulation model representing the target physical system and a simulation execution environment in which the simulation model is executable; the method comprising: obtaining an initial model configured for execution in a first execution environment and representing the target physical system, the initial model specifying permitted combinations of values from among ranges of possible values for a plurality of independently variable initialising conditions provided by the first execution environment; generating, as the simulation execution environment, a constrained version of the first execution environment which provides only a constrained set of possible values for the plurality of independently variable initialising conditions based on the specified permitted combinations of values; and generating, as the simulation model, a representation of the initial model w
    Type: Application
    Filed: July 29, 2013
    Publication date: February 6, 2014
    Applicant: Fujitsu Limited
    Inventor: Sven van den Berghe
  • Patent number: 8639370
    Abstract: A system includes a computer having a device driver. The device driver includes a detection module to detect an audio input. The device driver includes a selection module to send the audio input to audio hardware after detection of the audio input. The device driver also includes an emulation module to send hardware emulation information to an operating system audio application to replace feedback data received at the device driver from the audio hardware and sent from the device driver to the operating system audio application.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: January 28, 2014
    Assignee: Sigmatel, Inc.
    Inventors: Antonio Torrini, Konstantin Shkolnyy
  • Patent number: 8635057
    Abstract: A computing system in which a software component executing on a platform can reliably and efficiently obtain state information about a component supported by the platform through the use of a shared memory page. State information may be supplied by the platform, but any state translation information needed to map the state information as supplied to a format as used may be provided through the shared page. In a virtualized environment, the state translation information can be used to map the value of a virtual timer counter or other component from a value provided by a virtual processor to a normalized reference time that will yield the same result, regardless of whether the software component is migrated to or from another virtual processor. Use of a shared page avoids the inefficiency of an intercept into a virtualized environment or a system calls in native mode operation.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: January 21, 2014
    Assignee: Microsoft Corporation
    Inventors: Shuvabrata Ganguly, Jason S. Wohlgemuth, Allen Marshall
  • Patent number: 8635388
    Abstract: Aspects of a method and system for an operating system (OS) virtualization-aware network interface card (NIC) are provided. A NIC may provide direct I/O capabilities for each of a plurality of concurrent guest operating systems (GOSs) in a host system. The NIC may comprise a GOS queue for each of the GOSs, where each GOS queue may comprise a transmit (TX) queue, a receive (RX) queue, and an event queue. The NIC may communicate data with a GOS via a corresponding TX queue and RX queue. The NIC may notify a GOS of events such as down link, up link, packet transmission, and packet reception via the corresponding event queue. The NIC may also support unicast, broadcast, and/or multicast communication between GOSs. The NIC may also validate a buffered address when the address corresponds to one of the GOSs operating in the host system.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: January 21, 2014
    Assignee: Broadcom Corporation
    Inventor: Kan Fan
  • Patent number: 8600726
    Abstract: A method of running a target device in a hardware-in-the-loop network simulation via a host computer may include launching a network application on a host computer each having a protocol stack and a network device connected to a simulated network of target devices, interposing, on the host computer, a target device interface and adaptor between the protocol stack and the network device and transferring data and control information between the network application and the target device via the network device, whereby the target device runs on the host computer as if the target device were running directly on a host computer having a network device directly compatible with the target device.
    Type: Grant
    Filed: February 19, 2009
    Date of Patent: December 3, 2013
    Inventors: Maneesh Varshney, Rajive Bagrodia, Sheetalkumar Doshi
  • Patent number: 8594991
    Abstract: A memory mapping system for compactly mapping dissimilar memory systems and methods for manufacturing and using same. The mapping system maps a source memory system into a destination memory system by partitioning the source memory system and disposing memory contents within the partitioned source memory system into the destination memory system. In one embodiment, the mapping system factorizes a source data width of the source memory system in terms of a destination data width of the destination memory system to form at least one data sub-width. A source memory sub-region is defined for each data sub-width. The memory contents associated with each source memory sub-region are disposed within the destination memory system in a side-by-side manner across selected destination memory registers of the destination memory system. The mapping system thereby can compactly map the memory contents into the destination memory system without a loss of valuable memory space.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: November 26, 2013
    Assignee: Cadence Design Systems, Inc.
    Inventor: Alexandre Birguer
  • Patent number: 8554536
    Abstract: A system, method and computer program product are provided for creation of a network training environment that simulates a large network as a training target and using simulation and virtual network technologies together with actual network resources to teach computer network exploitation and computer network attack techniques in training exercises for persons responsible for safeguarding networks and for probing and attacking others' networks. The system, method, and computer program product further support integration of real hosts for more realistic exercises.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: October 8, 2013
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Steven P. Adelman, Thomas R. Lehnert
  • Patent number: 8553717
    Abstract: An information processing device includes a transmission portion that transmits repeatedly, at a specified time interval, one combination packet that is created such that it includes, within a packet that is compatible with one format, a packet that is compatible with another format. It is therefore possible for the information processing device to perform non-contact communication in a plurality of formats without repeatedly transmitting in succession a plurality of copies of the same packet, each copy being compatible with a different format.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: October 8, 2013
    Assignee: FeliCa Networks, Inc.
    Inventors: Yasumasa Nakatsugawa, Atsuo Yoneda, Toyokazu Ota
  • Patent number: 8554540
    Abstract: A topic map based indexing apparatus analyzes community Q/A lists to acquire Q/A analysis information, removes redundant answers depending on the Q/A analysis information, removes insignificant answers based on the degree of reliability, ranks answer lists, and extracts the highest ranking answer as a best answer, to thereby store, in a community Q/A topic map, index information containing the community Q/A lists and the Q/A analysis information. A topic map based searching apparatus analyzes a user question to acquire question analysis information, searches similar questions from community Q/A lists belonging to a specific topic node of a pre-stored community Q/A topic map, ranks the searched similar questions depending on the question analysis information, removes redundant answers among answers to the ranked similar questions, ranks the answers, and extracts the highest ranking answer as a best answer.
    Type: Grant
    Filed: June 15, 2009
    Date of Patent: October 8, 2013
    Assignee: Electronics and Telecommunication Research Institute
    Inventors: Chung Hee Lee, Hyo-Jung Oh, Jeong Heo, Yi Gyu Hwang, Yeo Chan Yoon, Miran Choi, Chang Ki Lee, Soojong Lim, HyunKi Kim, Myung Gil Jang
  • Publication number: 20130262075
    Abstract: A processor emulation device comprising includes an address converter converting a virtual address in a guest environment into a physical address in a host environment, wherein a correspondence between the virtual address and a physical address in the guest environment is different from a correspondence between a virtual address and the physical address in the host environment controlled by a host OS; and an exception handling processing part, in a case where a page attribute obtained in converting the virtual address in the guest environment into the physical address in the guest environment is an attribute specific to the guest environment and absent in the host environment, performing an exception handling process based on the attribute specific to the guest environment.
    Type: Application
    Filed: January 4, 2013
    Publication date: October 3, 2013
    Inventor: Shinya KUWAMURA
  • Patent number: 8515562
    Abstract: A computer based control system including a field network to which field devices equipped with hardware addresses and logical names are to be connected, a control device performing addressing control in relation to the field devices and their logical addresses and a simulation handling device. The simulation handling device has an own logical address, an own hardware address and is capable of obtaining a logical address, as well as possibly a logical name and/or a hardware address of at least one field device involved in the simulation. It notifies the control device that the field device is connected to the field network, detects a control signal directed towards field device addressed using the logical and/or hardware address of this field device and responds to the control signal with simulation results using the same logical and/or hardware address as the source of the response.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: August 20, 2013
    Assignee: ABB Research Ltd.
    Inventor: Kai Hansen
  • Publication number: 20130185048
    Abstract: Methods and systems for providing an emulation session to emulate a computer product for a host device. A method and system involve providing a communication link between the host device and an emulation bridge module provided on an emulation server separate from the host device; providing a host resource library file including a list of the plurality of resources available on the host device to the emulation bridge module; operating the emulation bridge module to determine emulation session resources required to provide the emulation session; selecting at least one of the host device and the emulation server for providing each required emulation session resource in the emulation session resources required to provide the emulation session: and providing the emulation session using the required emulation session resources provided by at least one of the host device and the emulation server.
    Type: Application
    Filed: January 15, 2013
    Publication date: July 18, 2013
    Applicant: Sphere 3D Inc.
    Inventor: Sphere 3D Inc.
  • Patent number: 8484626
    Abstract: A method may include creating an Extensible Markup Language (XML) instruction file based on screen shots of a host system, providing the XML instruction file to a screen scraper program, executing screen scraping operations based on the XML instruction file, and outputting a user interface file based on the screen scraping operations that corresponds to extracted data output from the host system.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: July 9, 2013
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Sreeramamurthy Nagulu, Sijo Kuriakose
  • Patent number: 8473275
    Abstract: A method for emulating and debugging a microcontroller is described. In one embodiment, an event thread is executed on an emulator that operates in lock-step with the microcontroller. Event information is sampled at selected points. Trace information is also recorded at the selected points. As such, the event information and trace information are effectively pre-filtered. Accordingly, it is not incumbent on a designer to read and understand the event and trace information and sort out the information that is of interest. Instead, this task is essentially done automatically, helping the designer and reducing the probability of error. Furthermore, because only selected event and trace information is recorded, the resources of the in-circuit emulator system are not taxed.
    Type: Grant
    Filed: May 22, 2008
    Date of Patent: June 25, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Manfred Bartz, Craig Nemecek, Matt Pleis
  • Patent number: 8447963
    Abstract: A method and system for managing a large number of servers and their server components distributed throughout a heterogeneous computing environment is provided. In one embodiment, an authenticated user, such as a IT system administrator, can securely and simultaneously control and configure multiple servers, supporting different operating systems, through a “virtual server.” A virtual server is an abstract model representing a collection of actual target servers. To represent multiple physical servers as one virtual server, abstract system calls that extend execution of operating-system-specific system calls to multiple servers, regardless of their supported operating systems, are used. A virtual server is implemented by a virtual server client and a collection of virtual server agents associated with a collection of actual servers.
    Type: Grant
    Filed: April 16, 2003
    Date of Patent: May 21, 2013
    Assignee: BladeLogic Inc.
    Inventors: Thomas Martin Kraus, Vijay G. Manwani, Sekhar Muddana
  • Patent number: 8417774
    Abstract: An apparatus, system, and method are disclosed for a baseboard management controller (BMC) which includes an FPGA with a monitor module for monitoring the operations parameters of a host computer device. In addition, the BMC has a host connector that connects the BMC to the system bus of the host computing device, allowing the BMC access to the computing elements on the host. The host connector has reconfigurable pins with connection configuration controlled by the FPGA. In addition, the BMC has a server with a processor and associated non-volatile memory on board. The operating system provides services to the host computing device and its constituent components, as well as allowing advanced networking and interconnectivity with other BMCs in a management network.
    Type: Grant
    Filed: December 6, 2007
    Date of Patent: April 9, 2013
    Assignee: Fusion-IO, Inc.
    Inventors: David Flynn, John Strasser, Jonathan Thatcher
  • Patent number: 8397186
    Abstract: A technique for reliably replaying operations in electronic-design-automation (EDA) software is described. In this technique, the EDA software stores operations performed by a user during a design session, as well as any replay look-ahead instructions, in a log file. When repeating the first operation, the replay look-ahead instruction ensures that the same state is obtained in the EDA environment as was previously obtained. For example, if an interrupt occurred when the first operation was previously performed, the replay look-ahead instruction may specify when the interrupt occurred during the performance of the operation so that the effect of the interrupt may be simulated when replaying the first operation.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: March 12, 2013
    Assignee: Synopsys, Inc.
    Inventor: Jeffrey T. Brubaker
  • Patent number: 8392171
    Abstract: Methods and systems for register mapping in emulation of a target system on a host system are disclosed. Statistics for use of a set of registers of a target system processor are determined. Based on the statistics a first subset of the target system registers, including one or more most commonly used registers is determined. The registers in the first subset are directly mapped to a first group of registers of a host system processor. A second subset of the set of target system registers is dynamically mapped to a second group of registers of the host system processor.
    Type: Grant
    Filed: August 12, 2010
    Date of Patent: March 5, 2013
    Assignee: Sony Computer Entertainment Inc.
    Inventors: Stewart Sargaison, Victor Suba
  • Patent number: 8370819
    Abstract: A mechanism is provided for making information about the virtual disk image file and/or its associated virtual image configuration file more readily available to a user. The virtual disk image file format is expanded to include fields in which information about the data in the file can be stored. Extensible information on file content, compatible HW configurations, compatible host OSes, timeout status, DRM status, patch state, and network topology, tag data for indexing, configuration files, saved state files, operation history data, and the like is stored in a location within a virtual disk image file that can be read without executing the virtual machine. This information can then be used to search the contents of the virtual disk image, to enforce usage policies, to provide extensibility for vendors, and the like.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: February 5, 2013
    Assignee: Microsoft Corporation
    Inventors: Parag Chakraborty, Eric P. Traut
  • Patent number: 8346531
    Abstract: A method for executing non-native binaries on a host computer architecture comprises receiving a guest executable binary encoded on a computer readable medium. The guest executable binary is executable on a first computer architecture. Moreover, the guest executable binary includes a mutex lock encoded instructions for implementing a mutex lock. The guest executable binary is then executed on the host computer architecture by first translating the guest executable binary to a translated executable binary. The encoded instructions for implementing a mutex lock are translated by mapping the mutex lock to an instance of a compound mutex lock data structure. A computer system implementing methods for executing non-native binaries on a host computer architecture is also provided.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: January 1, 2013
    Assignee: Oracle America, Inc.
    Inventors: Abhinav Das, Jiwei Lu, William Y. Chen, Chandramouli Banerjee
  • Patent number: 8332203
    Abstract: A system and methods emulate an application executing in real time in a mobile device. The mobile device is emulated in real time using a model running on a processor extrinsic to the mobile device. The model is based on characteristics indicative of performance of the mobile device. The application is executed in real time within the model and the application executing in the model is monitored to determine resource utilization information by the application for the mobile device. The resource utilization information for the mobile device is displayed.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: December 11, 2012
    Assignee: Wapp Tech Corp.
    Inventor: Donavan Paul Poulin
  • Patent number: 8326448
    Abstract: A method and a device for operating a machine tool are disclosed, wherein a machining operation of the machine tool is controlled by a parts program by storing a simulated configuration of the machine tool in the parts program, determining an actual configuration of the machine tool, comparing the actual configuration with the simulated configuration of the machine tool stored in the parts program, and generating a warning message if the actual configuration is not in conformance with the simulated configuration. This prevents errors in the machining process resulting from a discrepancy between the configuration of the machine tool used in the simulation of the parts program and the configuration of the actual machine tool during the actual machining operation.
    Type: Grant
    Filed: November 10, 2008
    Date of Patent: December 4, 2012
    Assignee: Siemens Aktiengesellschaft
    Inventor: Roland Schneider
  • Patent number: 8290764
    Abstract: A virtualization program for being able to execute a simulation at high speed, allows a native code simulator to have a stack specific to each task that is managed by a multitask OS. Processes of creation, save, restoration and erasure of a context that a target CPU executes by means of a special control register operation is executed by an API provided by the native code simulator. When porting the multitask OS, the source code is altered so as to call the API. A stack specific to a task is assigned at the API and the stack is switched for switching the task to make context switching possible.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: October 16, 2012
    Assignee: Toshiba Solutions Corporation
    Inventors: Shogo Ishii, Koji Yura
  • Patent number: 8291369
    Abstract: A verification support apparatus and method are provided. The verification support apparatus executing a simulation controlling a communication between a first hardware model in communication with a bus model and adapted to the same first specifications as the bus model, and a second hardware model in communication with the bus model and adapted to second specifications differing from those of the bus model, the apparatus includes a reception unit that receives data based on the second specifications from the second hardware model, a conversion unit that, based on the first specifications, converts the data received by the reception unit into data adapted to the first specifications; and a transmission unit that transmits the data converted by the conversion unit, via the bus model, to a hardware model which is a transmission destination.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: October 16, 2012
    Assignee: Fujitsu Limited
    Inventors: Ryosuke Oishi, Atsushi Ike
  • Patent number: 8286148
    Abstract: Software managing long names in an application programming interface receives a request to perform a requested operation on one or more fields, the application comprising a first operation operable to perform the requested operation on at least one field type. The software determines whether the field type of any of the fields is incompatible with the first operation. If the field types of the one or more fields are compatible with the first operation, then the software performs the requested operation on the one or more fields using the first operation. If the software determines that the field type of at least one of the fields is incompatible with the first operation, then it converts the request into a call for a second operation operable to perform the requested operation on the one or more fields and performs the requested operation using the second operation.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: October 9, 2012
    Assignee: CA, Inc.
    Inventor: James Broadhurst
  • Patent number: 8285410
    Abstract: A method for modeling and executing a production rule of a production phase in a discrete manufacturing scenario, whereby the production rule is associated to a process element and contains predefined production steps and predefined dependencies between the production steps, contains the steps of loading a production rule into a production order manager, parsing the production rule, and retrieving the predefined production steps and the predefined dependencies. Optionally user-defined parameters for the predefined production steps and the predefined dependencies are input. A state machine is created and contains the production steps labeled each as a predefined state, and further contains the dependencies labeled each as a predefined transition between two predefined states. The state machine is then forwarded to a process controller.
    Type: Grant
    Filed: May 12, 2009
    Date of Patent: October 9, 2012
    Assignee: Siemens Aktiengesellschaft
    Inventor: Alessandro Raviola
  • Patent number: 8285827
    Abstract: A method, and apparatus for software and resource management with a model-based architecture.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: October 9, 2012
    Assignee: EMC Corporation
    Inventors: David Stephen Reiner, George M. Ericson