Abstract: Examples described herein any include a surgical module for use within the surgical system. The surgical module may include a first port connected to a surgical hub; a second port connected to an additional surgical module; and a controller. The controller may be configured to receive surgical data; determine if the surgical data is a first type of data or a second type of data; and instruct the surgical module to send the surgical data to the first port if the surgical data is the first type of data or to the second port if the surgical data is the second type of data.

Abstract: In current frameworks, replays of events (e.g., data communications) between software entities are non-deterministic and unreproducible. In an embodiment, as events are replayed, software entities, stimulated by those events, are queued according to a queuing strategy and executed from the queue. In an alternative embodiment, as software entities are executed, the events, output by those software entities, are queued according to a queuing strategy and played from the queue.

Abstract: Disclosed herein is hardware for easing the process of changing the execution mode of a virtual machine and its associated resources. By adopting the hardware, it is possible to trigger a change in the execution mode in an automatic way, without software intervention, and without interfering with the execution of other virtual machines. In addition, in case an error has occurred for a virtual machine and it is detected, the hardware can be used to disable the resources associated with that virtual machine and generate notification of the completion this operation to other hardware, which will complete the reset of the virtual machine. By adopting the hardware, the execution mode change is simplified and offers configurability and flexibility for a system running multiple virtual machines.

Abstract: A computer system configured to facilitate communications over a plurality of communication platforms includes a chat monitor configured to monitor communications over a plurality of communication platforms; a parser coupled to the chat monitor and configured to detect whether a communication entered into a communication client corresponds to a communication protocol, the communication protocol including a protocol identifier and a plurality of primary protocol elements including a first user identifier and an instrument identifier; a protocol validator coupled to the parser and configured to validate communications corresponding to the communication protocol; and a database coupled to the protocol validator for storing validated communications. Each communication platform may be associated with a plurality of communication clients, and each communication platform may be configured to transmit communications between communication clients associated with the communication platform.

Abstract: An integrated circuit simulation method is performed by a processor and includes: obtaining a register transfer level (RTL) waveform set obtained by performing an RTL simulation based on a circuit, where the circuit is generated in an RTL design stage and includes a register having an internal net and a data output port, and the RTL waveform set includes a first waveform corresponding to the data output port of the register; obtaining a netlist and delay information obtained by performing a logic synthesis based on the circuit, where the netlist includes a first node and a second node, the first node corresponds to the internal net of the register, and the second node corresponds to the data output port of the register; applying the first waveform to the first node; and triggering the register according to the delay information to obtain a second waveform at the second node.

Abstract: A method for emulation of graphical parameters during a play of a legacy game is described. The method includes receiving a user input from a hand-held controller and determining whether one or more basic blocks of code for servicing the user input are stored in a cache. The method further includes compiling the one or more basic blocks of code from one or more emulated processing unit (PU) code instructions upon determining that the one or more basic blocks are not stored in the cache. The method includes executing the one or more basic blocks of code to generate one or more legacy graphical parameters. The method includes emulating the one or more legacy graphical parameters to generate one or more image frames having one or more updated graphical parameters for display of one or more images of the legacy game on a display device.

Abstract: A system and method for performing a health check for a cell site, the method including: accessing a Cell Site Router (CSR) including vital interfaces at a cell site; gathering a respective value for each of the vital interfaces at the CSR; and generating a health report of the cell site based on gathered values. The vital interfaces include one or more network ports and one or more radio unit interfaces, and the CSR is disposed at a base station.

Abstract: Programmable networking devices configured to perform various packet processing functions for packet filtration, control and user plane separation (CUPS), user plane function (UPF), pipeline processing, etc. IPsec is utilized to secure control and data packets traversing the programmable networking device. Field-programmable gate arrays (FPGAs) are configured with one or more host servers and software-based network interfaces (softMAC).

Abstract: A method, implemented in a router in a Communication Service Provider (CSP) network, includes connecting to a device via at least two connections where a first connection includes a first Wide Area Network (WAN) interface and a second connection includes a second WAN interface; receiving an encapsulated packet from one of the at least two connections where the encapsulated packet is destined for an Internet Protocol version 4 (IPv4) address on the Internet; and creating an IPv4 packet from the encapsulated packet by de-encapsulating the encapsulated packet and including an IPv4 public address in an IPv4 packet, wherein the IPv4 public address is associated with the router.

Abstract: A detection system for a SlimSAS slot and a method thereof are disclosed. In the detection system, a detecting device generates and transmits a detection signal to a TAP controller; the TAP controller converts the received detection signal into a detection signal in JTAG format, and transmits the detection signal in JTAG format to a CPLD chip and a controllable power module chip of a detection card and/or a boundary scan chip of a circuit board; a detection can be performed on the SMBus pins, the differential signal receiving pins, the differential signal transmitting pins, the clock pins, the sideband pins and the ground pins of the SlimSAS connection interface through the boundary scan chip, the HCSL to LVDS module chip, the IIC chip and the CPLD chip. Therefore, the technical effect of improving slot stability and detection coverage of a SlimSAS slot detection can be achieved.

Abstract: A computer system including one or more processors and persistent, word-addressable memory implements a persistent atomic multi-word compare-and-swap operation. On entry, a list of persistent memory locations of words to be updated, respective expected current values contained the persistent memory locations and respective new values to write to the persistent memory locations are provided. The operation atomically performs the process of comparing the existing contents of the persistent memory locations to the respective current values and, should they match, updating the persistent memory locations with the new values and returning a successful status. Should any of the contents of the persistent memory locations not match a respective current value, the operation returns a failed status. The operation is performed such that the system can recover from any failure or interruption by restoring the list of persistent memory locations.

Abstract: Disclosed is a system that comprises a memory device and a processing device, operatively coupled with the memory device, to perform operations that include, receiving a read request to perform a read operation on a block of the memory device; determining whether an entry corresponding to the block is stored in a data structure associated with the memory device; responsive to the entry being stored in the data structure, incrementing a counter associated with the block to track a number of read operations performed on the block of the memory device; resetting a timer associated with the block to an initial value, wherein the timer is to track a period of time that elapses since the read operation was performed on the block of the memory device; determining that the counter and the timer satisfy a first criterion; and responsive to determining that the counter and the timer satisfy the first criterion, removing the entry corresponding to the block from the data structure associated with the memory device.

Abstract: A process includes an application layer of a host of a computer platform using a smart network interface card (NIC) of the computer platform to provide an input/output (I/O) service for the application layer. The I/O service includes a service that is associated with a cloud operator domain; the smart NIC is installed in a connector; and the application layers associated with a cloud tenant domain. The process includes a baseboard management controller of the smart NIC managing the computer platform. Managing the computer platform includes the baseboard management controller managing the host; the baseboard management controller managing components of the smart NIC other than the baseboard management controller; and managing the host includes the baseboard management controller communicating with the host via the connector to control a system power state of the computer platform.

Abstract: An electric power system emulator apparatus includes a plurality of nodes arrayed in first and second dimensions and a plurality of transmission path emulator circuits, respective ones of which are configured to be connected between adjacent ones of the nodes in the first and second dimensions. The apparatus further includes a control circuit configured to control the transmission path emulator circuits to emulate transmission paths of an electric power system. The control circuit may be configured to control the transmission path emulator circuits to emulate transmission lines and/or transformers. The transmission path emulator circuits may include respective power electronics converter circuits. The apparatus may further include source/load emulator circuits configured to be coupled to the nodes.

Abstract: Disclosed are various examples of providing AI accelerator access as a service at the edge. In some embodiments an artificial intelligence (AI) accelerator device identifier is transmitted to register an AI accelerator with the AI broker service. An AI processing request for the AI accelerator is received from a networked computing device. A bus redirect of the AI accelerator to the networked device is enabled. An AI workload is performed controlled by the networked device through the bus redirect.

Abstract: The present disclosure relates to systems, methods, and non-transitory computer readable media for accurately, efficiently, and flexibly establishing compatibility connections between successive digital content editing operations in digital content operation pipelines or sequences. In particular, the disclosed systems can determine operation-specific features for executing digital content editing operations within a sequence. For example, the disclosed systems can determine digital image file types (or other digital content operation features) supported by particular digital content editing operations. Additionally, the disclosed systems can select a supported digital content operation feature for performing a particular operation to pass digital content from the operation to the next operation in a supported format, while also preserving quality and information richness.

Abstract: A security assessment system is configured to provide a duplicated environment which duplicates an assessment target system comprising a plurality of physical components. The security assessment system includes a duplicated environment design circuitry and a duplicated environment construction circuitry. The duplicated environment design circuitry is configured to select a duplication level based on constraints specified by a user in order to design the duplicated environment to produce a designed result indicative of a duplicated environment design. The duplication level is indicative of any one of a simulation sub-module, an emulation sub-module, and a physical sub-module which are for reproducing the physical components of the assessment target system. The duplicated environment construction circuitry is configured to construct the duplicated environment based on the designed result. The duplicated environment includes components which are duplicated by one of the duplication level.

Abstract: A method for communicating with at least one field device via an interface device, wherein each field device is connected to a channel of the interface device, where the method includes receiving a first command associated with a first field device, from an industrial device, communicating with the first field device over a first communication channel for executing the received first command, receiving at least one command associated with the at least one field device, from the industrial device, the at least one commands including at least one command associated with a second field device from the at least one field device, and caching the at least one command in a memory module prior to the execution of the first command.

Abstract: Presented embodiments facilitate efficient and effective flexible implementation of different types of testing procedures in a test system. Presented embodiments facilitate efficient and effective flexible implementation of different types of testing procedures in a test system. In one embodiment, an enhanced auxiliary interface test system comprises a load board, testing electronics, controller, and memory mapped interface. The load board is configured to couple with a plurality of devices under test (DUTs). The testing electronics is configured to test the plurality of DUTs, wherein the testing electronics are coupled to the load board. The controller is configured to direct testing of the DUTs, wherein the controller is coupled to the testing electronics. The memory mapped interface is configured to implement multiple paths to access a central processing unit (CPU) on the controller and enable testing of multiple DUTs in parallel.

Abstract: A network element includes an aggregate gateway function having a control plane and a separate user plane, wherein the network element is configured to: establish a plurality of first packet forwarding control protocol sessions for a plurality of packet data unit sessions between the residential gateway and the network, each of the plurality of first packet forwarding control protocol sessions hosting a set of data packet forwarding rules for a respective packet data unit session among the plurality of packet data unit sessions; and facilitate network access by the residential gateway according to the plurality of first packet forwarding control protocol sessions.

Abstract: A system architecture encoded on a non-transitory computer readable medium, the system architecture includes a first protocol. The first protocol is configured to receive a plurality of outputs from an ICS used in controlling an industrial system. The first protocol is configured to receive a plurality of inputs from a physical module. The physical module includes at least one of a component, a sensor, or the ICS. Additionally, the system architecture includes a second protocol, wherein the second protocol is configured to validate the plurality of inputs from the first protocol. Moreover, the system architectures includes a third protocol, wherein the third protocol is configured to validate the plurality of outputs from the first protocol. Further, the system architecture includes a fourth protocol, wherein the fourth protocol is configured to manage the ICS based on the second protocol and the third protocol.

Abstract: Techniques for discovering a network using a sensor installed in the network, where the network is communicatively coupled to an external network by a router, are presented. The techniques can include: determining, automatically and by the sensor, a network address of the router; detecting, automatically and by the sensor, a network address of a client in the network; assessing, automatically and by the sensor, that the client in the network is actively communicating on the network; communicating, by the sensor, with the network address of the router; and participating, by the sensor, in communications on the network by emulating the network address of the client and by using the network address of the router.

Abstract: Embodiments described herein provide systems and methods that allow for the archiving of computer data and computer files by aggregating archival content on various types of Removable Digital Storage Media. The system that supports the archiving is a triplex data structuring system providing at least three separate data pools working in synchrony for the stability of the data. Various methods are described to write data, to read data, to virtualize the data, to store data chronologically, to aggregate small files, to screen for malware, and to create various modes of redundancy that allow for the reconstruction of the system even after catastrophic failures.

Abstract: A device implementing dynamic controller selection may include a processor configured to generate a connectivity graph based on a scan for accessory devices, the connectivity graph including a connectivity metric value for a discovered accessory device. The processor may be configured to broadcast the connectivity graph and receive another connectivity graph broadcasted by another electronic device that includes another connectivity metric value for the accessory device. The processor may be configured to receive a request to provide an instruction to the accessory device and determine which of the electronic devices will provide the instruction based on the connectivity metric values. The processor may be further configured to, when the electronic device is determined, provide the instruction for transmission to the accessory device, and when the other electronic device is determined, provide, for transmission to the other electronic device, the instruction to be provided to the accessory device.

Abstract: A cyber threat defense system can leverage identifying threats by spotting deviations from normal behavior to create a system-wide inoculation regimen. The cyber threat defense system can have a comparison module to execute a comparison of input data for a network entity to at least one machine-learning model of a generic network entity using a normal behavior benchmark to spot behavior deviating from normal benign behavior. The comparison module can identify whether the network entity is in a breach state. The cyber threat defense system can have a cyber threat module to identify whether the breach state and a chain of relevant behavioral parameters correspond to a cyber threat. The cyber threat defense system can have an inoculation module to send an inoculation notice to warn of a potential cyber threat to a target device.

Abstract: A system comprises a writer to form a plurality of color mits on a base material, wherein at least one of the color mits may represent computer-readable instructions comprising data other than pixel-image data. The plurality of color mits may include a first color mit and a second color mit, wherein the first color mit represents information data, and the second color mit represents that the first color mit contains a particular type of information data. The system also may include a reader to read colors of the plurality of color mits on the base material. The system may comprise a device to map at least one of the color mits to computer-readable instructions. The system may further comprise a processor configured to transmit signals using a colored light.

Abstract: Mapping input locations to enable execution of second executable code using trace data gathered during execution of first executable code. A trace of a prior execution of the first code, and the second code, are accessed. The trace stores data of an input that was consumed by first executable instructions of the first code. It is determined that the stored data of the input is usable as an input to second executable instructions of the second code. A difference in how the first instructions accessed the input during recording, as compared to how the second instructions expect to access input, is identified. Based on the identified difference, a location transformation is determined that would enable the second instructions to access the stored data. Execution of the second instructions is emulated using the stored data, including projecting the location transformation to enable the second instructions to access the stored data.

Abstract: A method of capturing signals during hardware verification of a circuit design utilizes at least one field-programmable gate array (FPGA) and includes selecting, at run time and using one or more pre-compiled macros, a group of signals to be captured during verification of the circuit design and storing values of the group of signals in at least first and second random access memories disposed in the at least one FPGA. The first and second random access memories may be addressable spaces of the same random access memory.

Abstract: A non-transitory computer readable medium stores an application program causing an information processing apparatus to execute a process for printing, an operating system of the information processing apparatus has an automatic function which automatically executes a series of procedures and operations in response to satisfaction of an activation condition, the application program is activated based on a user operation, or activated by the automatic function of the operating system, the information processing apparatus includes a first communication interface. The process includes receiving a selection of data to be printed, acquiring input information in a case where the application program is activated by the automatic function of the operating system, and establishing the first wireless communication with a specific printer using the connection information and outputting the print job to the specific printer using the first wireless communication.

Abstract: A system includes a multidimensional array of homogenous Functional Configurable Units (FCUs), coupled using a multidimensional array of switches, and a parameter store on the device which stores parameters that tag a subarray of FCUs as unusable. Technologies are described which change the pattern of placement of configuration data, in dependence on the tagged subarray, by changing the routing through the array of switches. As a result, a multidimensional array of FCUs having unusable elements can still be used.

Abstract: Systems and methods for predicting whether a nonvolatile memory block is likely capable of being securely erased to be eligible for composing into another composable infrastructure are described. A management module receives a secure-erase command to erase at least one nonvolatile memory block, determines health parameters of the nonvolatile memory block, calculates a failure index based on the health parameters, and, based on the failure index, either securely erases the block of memory or retires the nonvolatile memory block.

Abstract: A hybrid binary executable under both native processes and compatibility (e.g., emulated) processes. When the hybrid binary is loaded by a native process, the process executes a native code stream contained in the binary directly on a processor. When the hybrid binary is loaded by a compatibility process, the process executes an emulation-compatible (EC) code stream directly on a processor. The hybrid binary format supports folding of code between the native code stream and the EC code stream. The hybrid binary comprises a set of memory transformations which are applied to image data obtained from the binary when the hybrid binary executes under the compatibility process.

Abstract: Some embodiments provide a method of providing distributed storage services to a host computer from a network interface card (NIC) of the host computer. At the NIC, the method accesses a set of one or more external storages operating outside of the host computer through a shared port of the NIC that is not only used to access the set of external storages but also for forwarding packets not related to an external storage. In some embodiments, the method accesses the external storage set by using a network fabric storage driver that employs a network fabric storage protocol to access the external storage set. The method presents the external storage as a local storage of the host computer to a set of programs executing on the host computer. In some embodiments, the method presents the local storage by using a storage emulation layer on the NIC to create a local storage construct that presents the set of external storages as a local storage of the host computer.

Abstract: A storage medium storing an application program executable by a computer of an information processing device, an operating system of the information processing device having an automatic function by which, when procedure data indicating: (i) a series of procedures of a plurality of functions and operations; and (ii) an activation condition, is registered therein, the operating system automatically executes the series of procedures in response to the activation condition being satisfied, wherein, when the application program is activated based on the automatic function, the application program causes the computer to: acquire input information which includes activation information for identifying the activation condition; decide print target data based on the acquired activation information acquired; and automatically output a print job based on the decided print target data, the operating system being configured to transmit the input information to the application program at the time of activating the applicat

Abstract: A system and a method for reconstructing an electronic data processing facility is provided. The method includes: accessing information that indicates a predetermined arrangement of hardware components included in the electronic data processing facility; verifying that the hardware components are operational based on the predetermined arrangement; accessing information that indicates a predetermined order of software modules to be installed in the electronic data processing facility; installing the software modules based on the predetermined order; accessing information that indicates a predetermined data set to be stored in a memory of the electronic data processing facility; and verifying that the installed software modules and the stored data set are operational based on a predetermined standard.

Abstract: In a computer-implemented method for modifying a state of a virtual machine, information between two states of a virtual machine is compared, wherein the two states include a current state of the virtual machine and previous state of the virtual machine. The previous state of the virtual machine is included within a snapshot of the virtual machine at the previous state. Information that is different between the two states is identified. The information that is different between the two states is presented, wherein the information that is different is selectable for copying between the two states.

Abstract: A method, a computer program containing instructions, and an apparatus for qualifying a device driver for a device. After a test environment is initiated, a test on the device driver is performed. This involves a device emulator emulating a behavior of the device under stipulated conditions. During the test, the device emulator performs an error injection or a test on at least one rarely occurring case.

Abstract: A method for emulating execution of a file includes emulating execution of the instructions of a file on a virtual processor of an emulator. The execution of the instructions is halted in response to an invocation of an API function. A determination is made whether the invoked API function is present in the updatable modules of the emulator. The updatable modules contain implementation of API functions. In response to determining that the invoked API function is present in the updatable modules, execution of the invoked API function is emulated according to corresponding implementation contained in the updatable modules. Otherwise, result of execution of the invoked API function is generated by executing a corresponding virtual API function on a processor of a computing device.

Abstract: Computerized detection of one or more user interface objects is performed by processing an image file containing one or more user interface objects of a user interface generated by an application program. Sub-control objects can be detected in the image file, where each sub-control object can form a portion of a user interface object that receives user input. Extraneous sub-control objects can be detected. Sub-control objects that overlap with or that are within a predetermined vicinity of an identified set of sub-control objects can be removed. Sub-control objects in the identified set of sub-control objects can be correlated to combine one or more of the sub-control objects in the identified set of sub-control objects to generate control objects that correspond to certain of the user interface objects of the user interface generated by the application program.

Abstract: There is provided an information processing device that operates in a device including a display unit and causes the display unit to display a plurality of specific frame images constituting a moving image having a smaller data size than that of a moving image captured by another device different from the device including the display unit.

Abstract: Adaptive data collections may include various type of data arrays, sets, bags, maps, and other data structures. A simple interface for each adaptive collection may provide access via a unified API to adaptive implementations of the collection. A single adaptive data collection may include multiple, different adaptive implementations. A system configured to implement adaptive data collections may include the ability to adaptively select between various implementations, either manually or automatically, and to map a given workload to differing hardware configurations. Additionally, hardware resource needs of different configurations may be predicted from a small number of workload measurements. Adaptive data collections may provide language interoperability, such as by leveraging runtime compilation to build adaptive data collections and to compile and optimize implementation code and user code together.

Abstract: The present invention relates to a Docker-container-oriented method for isolation of file system resources, which allocates host file system resources according to access requests from containers and checks lock resources corresponding to the access requests. The method creates a plurality of new containers; allocating the host file system resources according to file resource request parameters required by the new containers; and controlling execution of the file system operation according to an amount of the file system resources that have been allocated to the new containers.

Abstract: A system, method, and computer program product are provided for dynamically configuring a virtual environment for identifying unwanted data. In use, a virtual environment located on a first device is dynamically configured based on at least one property of a second device. Further, unwanted data is identified, utilizing the virtual environment.

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to simulate metastability for circuit design verification. An example apparatus includes an input handler to receive circuit design data indicative of a circuit design, a circuit modeler to generate a simulation model based on the circuit design data, a simulator to simulate operation of the circuit design based on the simulation model, a metastability injector to insert metastability logic into the simulation model during the simulation, and a metastability controller to control the metastability logic during the simulation.

Abstract: Systems and methods for a software development architecture enabling users to locally test and develop software, can include using a multitude of remote devices of choice. The user can choose the remote devices, including the hardware and software on the remote device. The operator of the architecture can provide error analysis, without substantively inspecting the user's software calls and sensitive data. In some embodiments, traffic routing data is used to detect the source and type of a test session error, without inspecting the payload in the traffic.

Abstract: Embodiments disclosed herein describe systems and methods for tuning phases of interface clocks of ASICs in an emulation system for a low latency channel and to avoid read errors. During a bring-up time (e.g., powering up) of the emulation system, one or more training processors may execute a software application to iteratively tune the phases of the interface clocks such that data is written to the interface buffers prior to being read out. To mitigate the problem of higher latency, the training processors may execute software application to tune the clock phases such that there is a small time lag between the writes and reads. The training processors may set the time lag to account for factors such as memory setup and hold, clock skews, clock jitters, and the predicted margin required to account for future clock drift due to carrying operating conditions.

Abstract: Embodiments are directed to a processor having a functional slice architecture. The processor is divided into tiles (or functional units) organized into a plurality of functional slices. The functional slices are configured to perform specific operations within the processor, which includes memory slices for storing operand data and arithmetic logic slices for performing operations on received operand data (e.g., vector processing, matrix manipulation). The processor includes a plurality of functional slices of a module type, each functional slice having a plurality of tiles. The processor further includes a plurality of data transport lanes for transporting data in a direction indicated in a corresponding instruction. The processor also includes a plurality of instruction queues, each instruction queue associated with a corresponding functional slice of the plurality of functional slices, wherein the instructions in the instruction queues comprise a functional slice specific operation code.

Abstract: A method for emulating threats in virtual network computing environment is provided. The method comprises creating a number of virtual machines in the virtual network computing environment. A number of threat actors are emulated, wherein each threat actor comprises a number of threat artifacts that form a sequence of attack steps against the virtual network computing environment. The threat actors are then deployed against the virtual network computing environment. Behavioral data about actions of the threat actors in the virtual network computing environment is collected, as is performance data about the virtual network computing environment in response to the threat actors. The collected behavioral and performance data is then presented to a user via an interface.

Abstract: Aspects disclosed in the detailed description include power saving techniques in computing devices. In particular, as data is received by a modem processor in a computing device, the data is held until the expiration of a modem timer. The data is then passed to an application processor in the computing device over a peripheral component interconnect express (PCIe) interconnectivity bus. On receipt of the data from the modem processor, the application processor sends data held by the application processor to the modem processor over the PCIe interconnectivity bus. The application processor also has an uplink timer. If no data is received from the modem processor before expiration of the uplink timer, the application processor sends any collected data to the modem processor at expiration of the uplink timer. However, if data is received from the modem processor, the uplink timer is reset.

Abstract: Aspects disclosed in the detailed description include power saving techniques in computing devices. In particular, as data is received by a modem processor in a computing device, the data is held until the expiration of a modem timer. The data is then passed to an application processor in the computing device over a peripheral component interconnect express (PCIe) interconnectivity bus. On receipt of the data from the modem processor, the application processor sends data held by the application processor to the modem processor over the PCIe interconnectivity bus. The application processor also has an uplink timer. If no data is received from the modem processor before expiration of the uplink timer, the application processor sends any collected data to the modem processor at expiration of the uplink timer. However, if data is received from the modem processor, the uplink timer is reset.