Linear Patents (Class 708/274)
  • Patent number: 11334318
    Abstract: The present disclosure relates generally to techniques for enhancing adders implemented on an integrated circuit. In particular, arithmetic performed by an adder implemented to receive operands having a first precision is restructured so that a set of sub-adders performs the arithmetic on a respective segment of the operands. More specifically, the adder is restructured, and a decoder determines a generate signal and a propagate signal for each of the sub-adders and routes the generate signal and the propagate signal to a prefix network. The prefix network determines respective carry bit(s), which carries into and/or select a sum at a subsequent sub-adder.
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: May 17, 2022
    Assignee: Intel Corporation
    Inventors: Martin Langhammer, Bogdan Mihai Pasca, Sergey Vladimirovich Gribok
  • Patent number: 10587255
    Abstract: A PAM (Pulse Amplitude Modulation) modulator driver is configured to receive a PAM input signal having N input amplitude levels and provide a PAM output signal having N output amplitude levels, where N is an integer. The PAM modulator driver circuit configured to electrically adjust amplitude levels in the PAM output signal.
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: March 10, 2020
    Assignee: Skorpios Technologies, Inc.
    Inventors: Andrew Bonthron, Phuoc Nguyen, Viktor Novozhilov, Michael Nilsson, Wei-Min Kuo
  • Patent number: 10235345
    Abstract: A method, system, and processor-readable storage medium are directed towards calculating approximate order statistics on a collection of real numbers. In one embodiment, the collection of real numbers is processed to create a digest comprising hierarchy of buckets. Each bucket is assigned a real number N having P digits of precision and ordinality O. The hierarchy is defined by grouping buckets into levels, where each level contains all buckets of a given ordinality. Each individual bucket in the hierarchy defines a range of numbers—all numbers that, after being truncated to that bucket's P digits of precision, are equal to that bucket's N. Each bucket additionally maintains a count of how many numbers have fallen within that bucket's range. Approximate order statistics may then be calculated by traversing the hierarchy and performing an operation on some or all of the ranges and counts associated with each bucket.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: March 19, 2019
    Assignee: Splunk Inc.
    Inventor: Steve Yu Zhang
  • Patent number: 9948570
    Abstract: An input tuple including a data time stamp is assigned by a data source; a pending tuple in which a system time stamp at the time the input tuple was received is assigned to the input tuple; and the pending tuple is stored in a queue, one queue for each data source. The queues are sorted in the order of the data time stamps of the pending tuples at the head of each queue; and if, in the queue at the head of which is stored the pending tuple having the smallest data time stamp value, the value of the current system time stamp is greater than the value of a processing pending period added to the system time stamp of the pending tuple at the head of the queue, then the input tuple is acquired from the pending tuple at the head of the queue for an input stream.
    Type: Grant
    Filed: October 27, 2014
    Date of Patent: April 17, 2018
    Assignee: Hitachi, Ltd.
    Inventor: Tsuneyuki Imaki
  • Patent number: 9841946
    Abstract: In some applications, such as randomization and cryptography, remainder computation for a number is required. The remainder computation is also used in modulo arithmetic. The remainder computation can be simplified when the divisor belongs to a certain class of numbers. A method and apparatus are disclosed that enable low complexity implementation of remainder computation of any number when the divisor belongs to a type of numbers that can be represented as 2k+1.
    Type: Grant
    Filed: November 11, 2015
    Date of Patent: December 12, 2017
    Assignee: MBIT WIRELESS, INC.
    Inventors: Bhaskar Patel, Arumugam Govindswamy
  • Patent number: 9275011
    Abstract: A quantum phase estimator may include at least one phase gate, at least one controlled unitary gate, and at least one measurement device. The quantum phase estimator receives at least one ancillary qubit and a calculational state comprised of multiple qubits. The phase gate may apply random phases to the ancillary qubit, which is used as a control to the controlled unitary gate. The controlled unitary gate applies a second random phase to the calculational state. The measurement device may measure a state of the ancillary qubit from which a phase of the calculational state may be determined.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: March 1, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Krysta M. Svore, Matthew B. Hastings, Michael H. Freedman
  • Patent number: 8990277
    Abstract: Methods and apparatus are provided in which a computed vector index (CVI) can be generated/computed based on an input value being searched for within an index vector of a lookup table. When the CVI is greater than a length of an index vector, the CVI can be re-computed to generate a re-computed vector index (RVI). When the value of the CVI is determined to be correct, or when the RVI is generated, an interpolation routine for a linearly indexed index vector can be executed using a presently computed vector index (e.g., either the CVI or the RVI) to determine an interpolated output value that corresponds to the input value. By contrast, when the value of the CVI is determined to be incorrect, an interpolation routine for a piecewise indexed index vector can be executed to determine the interpolated output value.
    Type: Grant
    Filed: May 8, 2012
    Date of Patent: March 24, 2015
    Assignee: GM Global Technology Operations LLC
    Inventors: Gabriel Gallegos-Lopez, Michael H. Kinoshita
  • Patent number: 8675877
    Abstract: A method and system distributes shares of a secret among cooperating entities using linear interpolation. In one embodiment, a linear equation is formed using the secret and random elements. The linear equation represents a K-dimensional secret hyperplane, where K is the number of shares to reconstruct the secret. Shares of the secrets are created, with each share containing a point on the secret hyperplane. The shares are then distributed to cooperating entities for secret sharing.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: March 18, 2014
    Assignee: Red Hat, Inc.
    Inventor: James P. Schneider
  • Patent number: 8572144
    Abstract: A circuit includes a signal processing circuit for accepting an input and for generating a set of outputs. The input is provided in an input range that has a set of representative values, and each output represents a measure of an association of the input with one or more of the representative values. The signal processing circuit includes a group of output sections, each output section being responsive to the input of the signal processing circuit. Each output section includes one or more sigmoid generators. Each sigmoid generator is responsive to an input of the output section to generate an output that represents a sigmoid function of the input of the output section. Each output section also includes a circuitry for combining the outputs of the one or more sigmoid generators to form one of the set of outputs of the signal processing circuit. An input transformation circuit is coupled to the plurality of output sections.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: October 29, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Benjamin Vigoda, Jeffrey Bernstein, Alexander Alexeyev
  • Patent number: 8560687
    Abstract: A performance management system and method for generating a plurality of forecasts for one or more electronic devices is presented. The forecasts are generated from stored performance data and analyzed to determine which devices are likely to experience performance degradation within a predetermined period of time. A single forecast is extracted for further analysis such that computer modeling may be performed upon the performance data to enable the user to predict when device performance will begin to degrade. In one embodiment, graphical displays are created for those devices forecasted to perform at an undesirable level such that suspect devices may be subjected to further analysis.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: October 15, 2013
    Assignee: United Services Automobile Association (USAA)
    Inventor: Glen Alan Becker
  • Patent number: 8543627
    Abstract: We describe a method for using a classical computer to generate a sequence of elementary operation (SEO) that can be used to operate a quantum computer, thereby inducing the quantum computer to sample an arbitrary probability distribution. The probability distribution being sampled is specified in the form of a Bayesian network.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: September 24, 2013
    Inventor: Robert R. Tucci
  • Patent number: 8484269
    Abstract: Aggregates are calculated from a data stream in which data is sent in a sequence of tuples, in which each tuple comprises an item identifier and a timestamp indicating when the tuple was transmitted. The tuples may arrive at a data receiver out-of-order, that is, the sequence in which the tuples arrive are not necessarily in the same sequence as their corresponding timestamps. In calculating aggregates, more recent data may be given more weight by a decay function which is a function of the timestamp associated with the tuple and the current time. The statistical characteristics of the tuples are summarized by a set of linear data summaries. The set of linear data summaries are generated such that only a single linear data summary falls between a set of boundaries calculated from the decay function and a set of timestamps. Aggregates are calculated from the set of linear data summaries.
    Type: Grant
    Filed: January 2, 2008
    Date of Patent: July 9, 2013
    Assignee: AT&T Intellectual Property I, L.P.
    Inventors: Graham Cormode, Philip Korn, Srikanta Tirthapura
  • Patent number: 8423328
    Abstract: Methods for modeling a random variable with spatially inhomogenous statistical correlation versus distance, standard deviation, and mean by spatial interpolation with statistical corrections. The method includes assigning statistically independent random variable to a set of seed points in a coordinate frame and defining a plurality of test points at respective spatial locations in the coordinate frame. A equation for a random variable is determined for each of the test points by spatial interpolation from one or more of the random variable assigned to the seed points. The method further includes adjusting the equation of the random variable at each of the test point with respective correction factor equations.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: April 16, 2013
    Assignee: International Business Machines Corporation
    Inventors: John M. Cohn, Ulrich A. Finkler, David J. Hathaway, Jeffrey G. Hemmett, Fook-Luen Heng, Jason D Hibbeler, Gie Lee, Wayne H. Woods, Jr., Cole E. Zemke
  • Patent number: 8359345
    Abstract: The use of the ordinary Poisson iterative reconstruction algorithm in PET requires the estimation of expected random coincidences. In a clinical environment, random coincidences are often acquired with a delayed coincidence technique, and expected randoms are estimated through variance reduction (VR) of measured delayed coincidences. In this paper we present iterative VR algorithms for random compressed sonograms, when previously known methods are not applicable. Iterative methods have the advantage of easy adaptation to any acquisition geometry and of allowing the estimation of singles rates at the crystal level when the number of crystals is relatively small. Two types of sonogram compression are considered: axial (span) rebinning and transaxial mashing. A monotonic sequential coordinate descent algorithm, which optimizes the Least Squares objective function, is investigated.
    Type: Grant
    Filed: May 11, 2009
    Date of Patent: January 22, 2013
    Assignee: Siemens Medical Solutions USA, Inc.
    Inventor: Vladimir Y. Panin
  • Patent number: 8352736
    Abstract: An authentication method of a first module by a second module includes the steps of generating a first random datum by the second module to be sent to the first module, generating a first number by the first module starting from the first datum and by way of a private key, and generating a second number by the second module to be compared with the first number, so as to authenticate the first module. The step of generating the second number is performed starting from public parameters and is independent of the step of generating the first number.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: January 8, 2013
    Assignees: STMicroelectronics S.R.L., Hewlett-Packard Development Company, L.P.
    Inventors: Liqun Chen, Keith Harrison, Guido Marco Bertoni, Pasqualina Fragneto, Gerardo Pelosi
  • Patent number: 8301675
    Abstract: The invention relates to a computer system for assisting prediction of the future of a chronological set (J) of numerical values which are stored in the memory (H) of a computer (O), such as to enable the generation of a topological structure, which can be displayed (V), using an algorithm-based analyzer (A). The topological structure comprises a dense network of regression-based curves in which characteristic figures, which can be used for prediction (P) purposes, can manifest.
    Type: Grant
    Filed: July 7, 2006
    Date of Patent: October 30, 2012
    Inventor: Wally Tzara
  • Patent number: 8041808
    Abstract: A performance management system and method for generating a plurality of forecasts for one or more electronic devices is presented. The forecasts are generated from stored performance data and analyzed to determine which devices are likely to experience performance degradation within a predetermined period of time. A single forecast is extracted for further analysis such that computer modeling may be performed upon the performance data to enable the user to predict when device performance will begin to degrade. In one embodiment, graphical displays are created for those devices forecasted to perform at an undesirable level such that suspect devices may be subjected to further analysis.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: October 18, 2011
    Assignee: United Services Automobile Association
    Inventor: Glen Alan Becker
  • Publication number: 20110077916
    Abstract: Methods for modeling a random variable with spatially inhomogenous statistical correlation versus distance, standard deviation, and mean by spatial interpolation with statistical corrections. The method includes assigning statistically independent random variable to a set of seed points in a coordinate frame and defining a plurality of test points at respective spatial locations in the coordinate frame. A equation for a random variable is determined for each of the test points by spatial interpolation from one or more of the random variable assigned to the seed points. The method further includes adjusting the equation of the random variable at each of the test point with respective correction factor equations.
    Type: Application
    Filed: September 30, 2009
    Publication date: March 31, 2011
    Applicant: International Business Machines Corporation
    Inventors: John M Cohn, Ulrich A. Finkler, David J. Hathaway, Jefrey G. Hemmett, Fook-Luen Heng, Jason D. Hibbeler, Gie Lee, Wayne H. Woods, JR., Cole E. Zemke
  • Patent number: 7844441
    Abstract: In general, the present invention provides a method, system and program product for approximating/estimating computer resource consumption of a computer system. Specifically, under the present invention, a more efficient or reduced computer work gradient matrix (hereinafter “matrix”) is first built. This occurs by creating load measurements for a set of computer resource metrics of the computer system to analyze dependencies between different computer resource metrics. Then, a correlation matrix between the set of computer resource metrics is created based on the dependencies. The set of computer system resource metrics in the correlation matrix is thereafter clustered into a set of clusters, and a reduced matrix is built based thereon. Once the reduced matrix is built, it can be restored to a “full” matrix using linear transformation or the like.
    Type: Grant
    Filed: March 27, 2006
    Date of Patent: November 30, 2010
    Assignee: International Business Machines Corporation
    Inventors: Genady Grabarnik, Moon Ju Kim, Lev Kozakov, Volodimir F. Lemberg, Larisa Shwartz
  • Publication number: 20100281086
    Abstract: A system and method for solving a decision problem having Boolean combinations of linear and non-linear operations includes translating the non-linear real operations using a COordinate Rotation DIgital Computer (CORDIC) method programmed on a computer device into linear operations maintaining a given accuracy. Linear and translated linear operations are combined into a formula. Satisfiablity of the formula is solved using a decision procedure for Boolean combinations of linear operations over integers and reals.
    Type: Application
    Filed: February 22, 2010
    Publication date: November 4, 2010
    Applicant: NEC Laboratories America, Inc.
    Inventors: MALAY K. GANAI, Franjo Ivancic
  • Publication number: 20100281089
    Abstract: A circuit includes a signal processing circuit for accepting an input and for generating a set of outputs. The input is provided in an input range that has a set of representative values, and each output represents a measure of an association of the input with one or more of the representative values. The signal processing circuit includes a group of output sections, each output section being responsive to the input of the signal processing circuit. Each output section includes one or more sigmoid generators. Each sigmoid generator is responsive to an input of the output section to generate an output that represents a sigmoid function of the input of the output section. Each output section also includes a circuitry for combining the outputs of the one or more sigmoid generators to form one of the set of outputs of the signal processing circuit. An input transformation circuit is coupled to the plurality of output sections.
    Type: Application
    Filed: March 2, 2010
    Publication date: November 4, 2010
    Applicant: Lyric Semiconductor, Inc.
    Inventors: Benjamin Vigoda, Jeffrey Bernstein, Alexander Alexeyev, Jeffrey Venuti
  • Publication number: 20100274538
    Abstract: There is provided a model that can evaluate properties of viscoelasticity and also rubber elasticity of an elastic material. A correlation equation between stress and strain that is calculated from: a correlation equation between stress, strain, elastic modulus and relaxation time, calculated based on a Maxwell model in which an elastic element and a viscous element are placed in series; and a correlation equation between strain and elastic modulus, including different moduli depending on properties, the correlation equation between stress and strain including different moduli depending on said properties as parameters is output as a stress-strain curve formula. There is one feature in finding a correlation between the strain and the elastic modulus, and this allows a large deformation behavior of an elastic material having properties of both rubber elasticity and viscoelasticity to be expressed with high quantitative characteristics on simulation.
    Type: Application
    Filed: October 27, 2009
    Publication date: October 28, 2010
    Applicants: NITTO DENKO CORPORATION, HIROSHIMA UNIVERSITY
    Inventors: Kazuhisa Maeda, Shigenobu Okazawa, Koji Nishiguchi
  • Patent number: 7778610
    Abstract: A novel and useful apparatus for and method of local oscillator (LO) generation with non-integer multiplication ratio between the local oscillator and RF frequencies. The LO generation schemes presented are operative to generate I and Q square waves at a designated frequency while avoiding the well known issue of harmonic pulling. The use of analog mixers of the prior art is avoided and replaced with an XOR gate configured to generate the correct average frequency. The edges are dynamically adjusted by ±T/12 or zero based on the state of the controlled oscillator down-divided clock.
    Type: Grant
    Filed: August 24, 2007
    Date of Patent: August 17, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Robert B. Staszewski, Nir Tal
  • Publication number: 20100191790
    Abstract: Systems, methods and computer readable storage media are provided for identifying, in a signal of interest, signal segments matching a reference signal segment. A processor coupled to memory is adapted to perform operations including: converting the reference signal segment to a first vector characterized by n pairs of data points, wherein n is an integer greater than zero and each pair of data points comprises a data point having a value along the first axis and a value along a second axis normal to the first axis. Segment of the signal of interest are converted to additional vectors, wherein each of the segments of the signal of interest has a first length in a direction along the first axis and has n pairs of data points. A correlation value is calculated between the reference signal segment and each of the segments of the signal of interest, using the first vector and the additional vectors, respectively.
    Type: Application
    Filed: January 29, 2009
    Publication date: July 29, 2010
    Applicant: Agilent Technologies, Inc.
    Inventor: Robert H. Kincaid
  • Publication number: 20090240640
    Abstract: An apparatus for evaluating deposit formation characteristics of lubricant samples. The apparatus includes a reactor chamber having a closed first end and a second end, said closed first end of said reactor chamber forming a lubricant sump and said second end open to the atmosphere, an electric heater for heating a test coupon positioned thereon, said electric heater positioned within said reactor chamber, above said lubricant sump, an air supply tube, said air supply tube having a first end in fluid communication with a source of air and a second end, said second end positioned adjacent the test coupon, said air supply tube having a sample orifice located between said first end and said second end of said air supply tube and a lubricant supply tube, said lubricant supply tube having a first end positioned within said lubricant sump and in fluid communication with a source of lubricant and a second end, said second end positioned within said sample orifice of said air supply tube.
    Type: Application
    Filed: March 17, 2009
    Publication date: September 24, 2009
    Inventors: David Alan Blain, Liepao Oscar Farng, Manuel A. Francisco, Glenn A. Murgacz, Peter A. Gordon, Eugenio Sanchez
  • Publication number: 20090172058
    Abstract: Aggregates are calculated from a data stream in which data is sent in a sequence of tuples, in which each tuple comprises an item identifier and a timestamp indicating when the tuple was transmitted. The tuples may arrive at a data receiver out-of-order, that is, the sequence in which the tuples arrive are not necessarily in the same sequence as their corresponding timestamps. In calculating aggregates, more recent data may be given more weight by a decay function which is a function of the timestamp associated with the tuple and the current time. The statistical characteristics of the tuples are summarized by a set of linear data summaries. The set of linear data summaries are generated such that only a single linear data summary falls between a set of boundaries calculated from the decay function and a set of timestamps.
    Type: Application
    Filed: January 2, 2008
    Publication date: July 2, 2009
    Inventors: Graham Cormode, Philip Korn, Srikanta Tirthapura
  • Publication number: 20090172059
    Abstract: Aggregates are calculated from a data stream in which data is sent in a sequence of tuples, in which each tuple comprises an item identifier and a timestamp indicating when the tuple was transmitted. The tuples may arrive out-of-order, that is, the sequence in which the tuples arrive are not necessarily in the sequence of their corresponding timestamps. In calculating aggregates, more recent data may be given more weight by multiplying each tuple by a decay function which is a function of the timestamp associated with the tuple and the current time. The tuples are recorded in a quantile-digest data structure. Aggregates are calculated from the data stored in the quantile-digest data structure.
    Type: Application
    Filed: January 2, 2008
    Publication date: July 2, 2009
    Inventors: Graham Cormode, Philip Korn, Srikanta Tirthapura
  • Publication number: 20090172057
    Abstract: The invention relates to a computer system for assisting prediction of the future of a chronological set (J) of numerical values which are stored in the memory (H) of a computer (O), such as to enable the generation of a topological structure, which can be displayed (V), using an algorithm-based analyzer (A). The topological structure comprises a dense network of regression-based curves in which characteristic figures, which can be used for prediction (P) purposes, can manifest.
    Type: Application
    Filed: July 7, 2006
    Publication date: July 2, 2009
    Inventor: Wally Tzara
  • Publication number: 20090106340
    Abstract: A schedule is generated by which physical items to be manufactured are assigned into production slots. The physical items have constraints governing manufacture of the physical items. The method generates coefficient matrix clusters from a mathematical programming problem based on an actual scheduling problem. Each coefficient matrix cluster defines a variable cluster-constraint cluster pair. A variable cluster of each coefficient matrix cluster defines production slot-physical item pairs. A constraint cluster of each coefficient matrix cluster defines a group of constraints. Each coefficient matrix cluster includes coefficient-binary variable pairs, each pair having a binary variable multiplied by a coefficient. For each coefficient matrix cluster, the method reduces non-zero factors within the cluster. Each non-zero factor within the coefficient matrix cluster is defined as a coefficient-binary variable pair such that the binary variable of the pair multiplied by the coefficient of the pair is non-zero.
    Type: Application
    Filed: October 21, 2007
    Publication date: April 23, 2009
    Inventor: Takayuki Yoshizumi
  • Patent number: 7221669
    Abstract: An inband signaling modem communicates digital data over a voice channel of a wireless telecommunications network. An input receives digital data. An encoder converts the digital data into audio tones that synthesize frequency characteristics of human speech. The digital data is also encoded to prevent voice encoding circuitry in the telecommunications network from corrupting the synthesized audio tones representing the digital data. An output then outputs the synthesized audio tones to a voice channel of a digital wireless telecommunications network.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: May 22, 2007
    Assignee: Airbiquity, Inc.
    Inventors: Dan A. Preston, Joseph Preston, Robert Leyendecker, Wayne Eatherly, Rod L. Proctor
  • Patent number: 7129879
    Abstract: An apparatus for characterising an analog to digital converter, comprising a signal generator for supplying an input signal having a first sinusoidal component to an analog to digital converter and an acquisition device for receiving and storing a plurality of output values from the analog to digital converter, and a data processor arranged to examine the output values in order to determine discrepancies due to bit weight errors and to calculate estimates of the bit weights or bit weight errors.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: October 31, 2006
    Assignee: Analog Devices, Inc.
    Inventor: Adam Glibbery
  • Patent number: 6978288
    Abstract: A system for updating a control coefficient to a target value during a prescribed number of periodic incremental update increments. The system divides the desired change in the value of the coefficient by the number of update increments. Specifically, the number of increments by the number of increments is limited to powers of two, so that the division can be accomplished simply by demarking the change in value according to the portion of number of increments, thereby separating the change into a quotient and a remainder. The value of each update increment is nominally equal to the quotient, with the remainder being distributed relatively evenly by adding one to selected updates.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: December 20, 2005
    Assignee: Young Chang Akki Co., LTD
    Inventor: Sivaraman Natarajan
  • Patent number: 6657573
    Abstract: A phase-to-sinusoid-amplitude conversion system and method for use in, for example, direct digital frequency synthesizer applications. The system and method convert phase data to signal amplitude data using an approximation of the first quadrant of a sine function using a plurality of linear line segments of preferably equal length. Each segment is defined with a lower horizontal-axis bound; a lower vertical-axis bound; and a slope represented as a sum of a plurality of slope elements. Based on the approximation and for a given phase angle a set of values are evaluated, for each linear line segment, representing a product of (i) a horizontal displacement representing a difference between the prescribed phase angle and the lower horizontal-axis bound xi of a selected linear line segment where, for example, xi<X<xi+1 and (ii) each one of the slope elements of the selected linear line segment.
    Type: Grant
    Filed: August 14, 2002
    Date of Patent: December 2, 2003
    Assignee: Her Majesty the Queen in right of Canada, as represented by the Minister of National Defence
    Inventors: Joseph Mathieu Pierre Langlois, Dhamin Al-Khalili
  • Patent number: 6591205
    Abstract: A method of waveform generation using a VLSI digital tester unit without an arbitrary waveform generator. A software application produces a series of vectors to drive a digital tester unit from a set of datapoints which defines a waveform needed in the test program. The set of datapoints can be generated in a test simulator such as SPICE or can be generated by digitizing the arbitrary waveform needed in a test program. The vectors describe the number of resistors of a pseudo arbitrary waveform generator (PAWG) circuit to be driven high in order to reproduce the desired waveform for input into the device under test. The software also determines the resolution, e.g., 5 ns, of the waveform.
    Type: Grant
    Filed: October 22, 1999
    Date of Patent: July 8, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: David D. Colby
  • Patent number: 6041337
    Abstract: A method for using linear functions with counter modules for efficient implementation in PALs (Programmable Array Logic), or FPGAs (Field Programmable Gate Arrays) which generate digital control signals to a targeted digital device.An input setting pulsed digital signal A is upcounted and then is reduced by a downcounted feedback pulsed digital signal to produce a difference digital signal which involves adding an intercept value. The difference signal is multiplied by a slope-sensitivity parameter, each time expanding the numeric range and scope of the output digital control signal to the target digital device.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: March 21, 2000
    Assignee: Unisys Corporation
    Inventor: Bruce Ernest Whittaker
  • Patent number: 5928310
    Abstract: A system and method in a digital network for developing a digital output control signal Y which is of greater range and sensitivity than an input digital difference signal X wherein Y has a linear functional relationship to X according to a slope parameter "b". A method is developed for implementing the network with Field Programmable Gate Arrays (FPGAs) to develop the output control signal Y equal to a+bX on an expanded digital bus, where "a" is the intercept value of Y when X=0.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: July 27, 1999
    Assignee: Unisys Corporation
    Inventor: Bruce Ernest Whittaker