Abstract: A method and system for managing Digital to Time Conversion (DTC) is provided. The method comprises receiving a first Radio Frequency (RF) signal and a second RF signal. The second RF signal is a phase-shifted first RF signal. The method further comprises converting the first RF signal to a first Intermediate Frequency (IF) signal and the second RF signal to a second IF signal. Further, a time delay between the first IF signal and the second IF signal is estimated based on a time difference measurement technique. The second RF signal is processed based on the estimated time delay to compensate for a delay error associated with the second RF signal.
Type:
Grant
Filed:
July 31, 2007
Date of Patent:
December 25, 2012
Assignee:
Motorola Solutions, Inc.
Inventors:
Geetha B. Nagaraj, Nicholas G. Cafaro, Ralf Hekmann, Robert E. Stengel, Scott Miller
Abstract: A novel and useful apparatus for and method of local oscillator (LO) generation with non-integer multiplication ratio between the local oscillator and RF frequencies. The LO generation schemes presented are operative to generate I and Q square waves at a designated frequency while avoiding the well known issue of harmonic pulling. An input baseband signal is interpolated and upconverted in the digital domain to an IF. The LO operates at a frequency which is a n/m division of the target RF frequency fRF. The IF frequency is configured to ½ of the LO frequency. The upconverted IF signal is then converted to the analog domain via digital power amplifiers followed by voltage combiners. The output of the combiners is band pass filtered to extract the desired replica.
Abstract: A novel and useful apparatus for and method of local oscillator (LO) generation with non-integer multiplication ratio between the local oscillator and RF frequencies. The LO generation schemes presented are operative to generate I and Q square waves at a designated frequency while avoiding the well known issue of harmonic pulling. The use of analog mixers of the prior art is avoided and replaced with an XOR gate configured to generate the correct average frequency. The edges are dynamically adjusted by ±T/12 or zero based on the state of the controlled oscillator down-divided clock.
Abstract: A method and apparatus for efficiently generating complex sinusoids of a desired frequency by multiplying a phasor by a predetermined value once every sampling interval, and using the highest order bits within the phasor to identify if the phasor is at an integer multiple 45 degrees and substituting components in the phasor if it is determined that the phasor is an integer multiple of 45 degrees. If the phasor is not identified as being an integer multiple of 45 degrees then an error factor for both the real and imaginary components is determined and the real and imaginary components are corrected by removing the error factor.
Type:
Grant
Filed:
January 25, 2005
Date of Patent:
April 27, 2010
Assignee:
NXP B. V.
Inventors:
Karl Raymond Wittig, Geoffrey Francis Burns
Abstract: An automatic test system that includes low cost and accurate circuitry for generating sinusoidal signals. Each sinusoidal signal generator produces a series of digital values approximating a sine wave. These values are computed, avoiding the need for large memories to store tables representing sine waves. Inaccuracies in the representation of the sine waves do not impact the accuracy of the resultant sine wave because circuitry used to correct for non-linearity errors in a digital-to-analog converter is programmed to also correct for errors introduced by approximating a sine wave with a computed function. A simple parabolic function may be used to compute approximations of a sine wave.
Abstract: An automatic test system that includes low cost and accurate circuitry for generating sinusoidal signals. Each sinusoidal signal generator includes a look-up table that can, for each phase on sine wave, output two digital values representing an in-phase and a quadrature-phase value of the sine wave. Simple circuitry can be used to address the look-up table to output in-phase and quadrature-phase values. The in-phase and quadrature-phase values can be applied to down-stream circuitry, such as error correction circuitry, that uses an in-phase and a quadrature-phase value to process the sine wave without the need for a relatively complex phase shifter in the down-stream circuitry. A dual-port memory may be used to implement the look-up table so that both an in-phase and a quadrature-phase value may be obtained from a single block of memory that stores a representation of a sine wave.
Abstract: A numerically controlled oscillator that generates an accurate digital representation of a repeating waveform such as a sinusoidal wave. Based on the desired output frequency, multiple samples are calculated from multiple cycles of the repeating waveform. As samples are taken, they are stored in a memory location until a sufficient number of samples are accumulated. After the samples are accumulated, they are output in a specified order, which generates an accurate digital representation of a sinusoidal wave at the desired output frequency.