Abstract: A processing unit to support inference acceleration for machine learning (ML) comprises an inline post processing unit configured to accept and maintain one or more lookup tables for performing a tanh and/or sigmoid operation/function. The inline post processing unit is further configured to accept data from a set of registers configured to maintain output from a processing block instead of streaming the data from an on-chip memory (OCM), perform the tanh and/or sigmoid operation on each element of the data from the processing block on a per-element basis via the one or more lookup tables, and stream post processing result of the per-element tanh and/or sigmoid operation back to the OCM after the tanh and/or sigmoid operation is complete.

Abstract: A processing unit to support inference acceleration for machine learning (ML) comprises an inline post processing unit configured to accept and maintain one or more lookup tables for performing a tanh and/or sigmoid operation/function. The inline post processing unit is further configured to accept data from a set of registers configured to maintain output from a processing block instead of streaming the data from an on-chip memory (OCM), perform the tanh and/or sigmoid operation on each element of the data from the processing block on a per-element basis via the one or more lookup tables, and stream post processing result of the per-element tanh and/or sigmoid operation back to the OCM after the tanh and/or sigmoid operation is complete.

Abstract: A method includes receiving, by a controller, a numerical coefficient to decompose into at least one mathematical expression. The method also includes decomposing, by the controller, the numerical coefficient into the at least one mathematical expression. Decomposing takes into account a complexity cost of the at least one mathematical expression. The method also includes generating an output data that comprises the at least one mathematical expression.

Abstract: A signal acquisition device includes: a light source that oscillates pulsed laser light at a specific repetition period; an optical system that focuses the laser light onto a sample, and that collects generated fluorescence; a photodetector that detects the fluorescence collected by the optical system; an A/D converter that samples an intensity signal of the detected fluorescence, in synchronization with the repetition period of the light source unit, at a period that is an integer multiple of the repetition period, and that generates a digital intensity signal; and one or more processors comprising hardware, the one or more processors being configured to: obtain a fluorescence lifetime waveform on a basis of the generated digital intensity signal; and calculate a fluorescence lifetime coefficient from a waveform obtained by removing a region not corresponding to an exponential function from the obtained fluorescence lifetime waveform.

Abstract: A method is provided for authenticating one device to another device. In the method, a first device proves to a second device that a first credential comprising multiple first attributes is valid. The second device proves to the first device that a second credential comprising multiple second attributes is valid. The first device reveals a first attribute of the multiple first attributes to the second device. The second device verifies the first attribute and decides whether to continue revealing attributes. If continuing, the second device reveals to the first device a first attribute of the multiple second attributes. The first device verifies the first attribute of the multiple second attributes. The first device decides whether to continue revealing attributes. Attributes can be revealed until one of the first or second devices end the method or until no attributes of the multiple first and second attributes remain to be revealed.

Abstract: A computer-implemented method for performing an exponential calculation using only two fully-pipelined instructions in a floating point unit that includes. The method includes computing an intermediate value y? by multiplying an input operand with a predetermined constant value. The input operand is received in floating point representation. The method further includes computing an exponential result for the input operand by executing a fused instruction. The fused instructions includes converting the intermediate value y? to an integer representation z represented by v most significant bits (MSB), and w least significant bits (LSB). The fused instruction further includes determining exponent bits of the exponential result based on the v MSB from the integer representation z. The method further includes determining mantissa bits of the exponential result according to a piece-wise linear mapping function using a predetermined number of segments based on the w LSB from the integer representation z.

Abstract: A processing unit to support inference acceleration for machine learning (ML) comprises an inline post processing unit configured to accept and maintain one or more lookup tables for performing each of one or more non-linear mathematical operations. The inline post processing unit is further configured to accept data from a set of registers maintaining output from a processing block instead of streaming the data from an on-chip memory (OCM), perform the one or more non-linear mathematical operations on elements of the data from the processing block via their corresponding lookup tables, and stream post processing result of the one or more non-linear mathematical operations back to the OCM after the one or more non-linear mathematical operations are complete.

Abstract: There is provision of a processing device including an instruction decoder and an arithmetic unit configured to process an immediate instruction for instructing a calculation of a product of an immediate value and a constant. In response to receiving the immediate instruction, the instruction decoder generates a first shift control information and a second shift control information based on the constant. The arithmetic unit generates a first shifted value by bit-shifting the immediate value received from the instruction decoder based on the first shift control information, and a second shifted value by bit-shifting the immediate value or a complement of the immediate value based on the second shift control information. By performing an addition of the first shifted value and the second shifted value, the arithmetic unit calculates the product.

Abstract: Systems and methods for efficient fixed-base multi-precision exponentiation are disclosed herein. An example method includes applying a multi-precision exponentiation algorithm to a base number, the multi-precision exponentiation algorithm comprises a pre-generated lookup table used to perform calculations on the base number, the pre-generated lookup table comprising pre-calculated exponentiated values of the base number.

Abstract: The present teachings relate to embodiments of systems and methods for the analysis of melt curve data for a plurality of samples. According to various embodiments, a melting temperature (Tm) may be determined across a range of different types of protein melt curve data, having variability over a plurality of analytical attributes in order to accommodate the complexity of protein melt curve data. The combination of a plurality of samples, coupled with the complexity of the data gives rise for a need to process the data in a manner that readily facilitates end-user to analysis of the data. Various embodiments of an interactive graphical user interface (GUI) according to the present teachings provide for rapid and sequential changes that may be made by an end user to displayed protein melt curve data to allow such analysis.

Abstract: A system and methods for unit of measurement conversion and search query expansion are described. The search query expansion may include identifying an initial unit of measurement associated with a property and an initial numeric value for the initial unit of measurement within a search query, automatically forming an expanded search query by expanding the search query to include at least one related unit of measurement associated with the property, and sending the expanded search query to a search engine to search a database. Other embodiments are described and claimed.

Abstract: A method of calculating data includes acquiring a difference between first data that is input and second data that was previously stored; determining a method of generating third data corresponding to a result of a calculation of the first data based on the difference; and performing a calculation corresponding to the determined method using a calculator.

Abstract: A method for transmitting broadcast signals includes LDPC (Low Density Parity Check) encoding broadcast data, where the broadcast data is carried by a physical layer pipe (PLP); padding zero bits to signaling data; LDPC encoding the zero padded signaling data; removing the padded zero bits; time interleaving the LDPC encoded broadcast data, where the time interleaving is performed based on a skip operation by using a twisting parameter; building at least one signal frame including the time interleaved broadcast data and the zero removed signaling data, where when a first PLP and a second PLP are multiplexed, and the signaling data includes information related to the second LP with which the first PLP is associated.

Abstract: A polynomial kernel generator is configured to mitigate nonlinearity in a receiver path from a transmitter path comprising a nonlinear component in a communication device or system. The polynomial kernel generator operates to generate polynomial kernels that can be utilized to model the nonlinearity as a function of a piecewise polynomial approximation applied to a nonlinear function of the nonlinearity. The polynomial kernel generator generates kernels in a multiplier less architecture with polynomial computations in a log domain using a fixed number of adders.

Abstract: Embodiments related to calculating node centralities in large and complex networks and graphs. An aspect includes approximating a product of a matrix exponential and a random probe vector of an adjacency matrix, wherein the adjacency matrix represents a graph. A diagonal of the adjacency matrix is computed based on the product of the matrix exponential and the random probe vector. The node centralities are then calculated based on the computed diagonal until a designated number of central nodes has been detected according to embodiments.

Abstract: Embodiments herein relate to a method in a radio base station for performing thermal noise power floor estimation in a radio communications network. The radio base station computes table entries for a table for a transcendental function evaluation, which table is of minimized size with a range of table entries defined by a smallest table entry, a largest table entry, and a number of table entries. The radio base station further estimates a thermal noise power floor by performing a transcendental function evaluation in computing a product representing a cumulative probability function, which cumulative probability function is related to the thermal noise power floor. The transcendental function evaluation is performed by using table look ups of the table with the computed table entries.

Abstract: Methods and circuitry for evaluating reciprocal, square root, inverse square root, logarithm, and exponential functions of an input value, Y. In one embodiment, an approximate value, RA, of the reciprocal of Y is generated. One Newton-Raphson iteration is performed as a function of RA and Y, resulting in a truncated approximate value, R. R is multiplied by Y and 1 is subtracted, resulting in a reduced argument, A. A Taylor series evaluation of A is performed, resulting in an evaluated argument, B. B is multiplied by a post-processing factor for the final result.

Abstract: Embodiments related to calculating node centralities in large and complex networks and graphs. An aspect includes approximating a product of a matrix exponential and a random probe vector of an adjacency matrix, wherein the adjacency matrix represents a graph. A diagonal of the adjacency matrix is computed based on the product of the matrix exponential and the random probe vector. The node centralities are then calculated based on the computed diagonal until a designated number of central nodes has been detected according to embodiments.

Abstract: A power function is approximated over an applicable data interval with polynomials determined by means of a Chebyshev minimax approximation technique. In some cases, multiple polynomials may be used to approximate the function over respective ranges of the desirable interval, in a piecewise manner. The appropriate polynomial that approximates the power function over the range of interest is derived and stored. When the power function is to be applied to a particular data value, the data value is first evaluated to determine where it lies within the applicable interval. The constants for the polynomial associated with that range of the interval are then retrieved and used to calculate the power of that data value.

Abstract: The technology described in this document relates to filters and functions that are based on exponential decay functions. In one aspect, the technology is embodied in a method that includes using a computing device to compute a first function as a combination of (i) an exponential decay function, a decay factor for which is chosen based on a Gaussian function, and (ii) at least a second function that is obtained by one or more convolution operations on the decay function. The first function provides an approximation of at least a portion of the Gaussian function.

Abstract: A system and method for implementing the Elliptic Curve scalar multiplication method in cryptography, where the Double Base Number System is expressed in decreasing order of exponents and further on using it to determine Elliptic curve scalar multiplication over a finite elliptic curve.

Abstract: A performance management system and method for generating a plurality of forecasts for one or more electronic devices is presented. The forecasts are generated from stored performance data and analyzed to determine which devices are likely to experience performance degradation within a predetermined period of time. A single forecast is extracted for further analysis such that computer modeling may be performed upon the performance data to enable the user to predict when device performance will begin to degrade. In one embodiment, graphical displays are created for those devices forecasted to perform at an undesirable level such that suspect devices may be subjected to further analysis.

Abstract: Techniques are disclosed for calculating large precision common logarithms. A common logarithm may be calculated using addition and/or subtraction of known logarithm values. Embodiments of the invention permit calculation of common logarithms of real numbers stored within character arrays, where each element of the array corresponds to a digit in the real number.

Abstract: In modern iterative coding systems such as LDPC decoder and turbo-convolutional decoder in which the invention may be used, the core computations can often be reduced to a sequence of additions and subtractions alternating between logarithm and linear domains A computationally efficient and robust approximation method for log and exp functions is described which involves using a simple bit mapping between fixed point fractional data format and floating point format. The method avoids costly lookup tables and complex computations and further reduces the core processing to a sequence of additions and subtractions using alternating fixed point and floating point processing units.

Abstract: An exponentiation circuit for computing an exponential power of a finite field element includes combinatory logic circuits that map input digits of a multi-digit field element ? to output digits of an output multi-digit field element ?2m. The exponentiation circuit is capable of computing a power of a field element without performing any multiplication operations and requires only exclusive-OR logic operations to generate the output exponential field element. A circuit for generating a multiplicative inverse of a finite field element can be constructed from a set of parallel exponentiation circuits, with each of the parallel exponentiation circuits generating a different multi-digit field element ?2m directly from the input field element ?. Multiplier circuits multiply together the outputs of the parallel exponentiation circuits to generate the multiplicative inverse of the field element ?.

Abstract: A logarithmic conversion circuit comprises: an operation amplifier; an input resistor connected at a preceding stage of an inverting input terminal, of the operation amplifier, to which a current signal is inputted; and a logarithmic conversion device and a current feedback device connected in series between the inverting input terminal and an output terminal of the operation amplifier, and an inverse-logarithmic conversion circuit comprises: a current/voltage conversion circuit which, after the current signal having passed through the current feedback device is inputted, converts the inputted current signal to a voltage value corresponding thereto; and a subtraction circuit outputting the difference between an output voltage of the current/voltage conversion circuit and a predetermined reference voltage, a circuit constant of the subtraction circuit being set such that the difference output of the subtraction circuit has a linearity proportional to the current signal.

Abstract: A method and system for managing Digital to Time Conversion (DTC) is provided. The method comprises receiving a first Radio Frequency (RF) signal and a second RF signal. The second RF signal is a phase-shifted first RF signal. The method further comprises converting the first RF signal to a first Intermediate Frequency (IF) signal and the second RF signal to a second IF signal. Further, a time delay between the first IF signal and the second IF signal is estimated based on a time difference measurement technique. The second RF signal is processed based on the estimated time delay to compensate for a delay error associated with the second RF signal.

Abstract: A method, computer-readable medium, and an apparatus for generating a transcendental value. The method includes receiving an input containing an input value and an opcode and determining whether the opcode corresponds to a trigonometric operation or a power-of-two operation. The method also includes calculating a fractional value and an integer value from the input value, generating the transcendental value based on the fractional value by adding at least a portion of the fractional value with at least one of a shifted fractional value produced by shifting the portion of the fractional value and a constant value, and providing the transcendental value in response to the request. In this fashion, the same circuit area may be used to carry out both trigonometric and power-of-two calculations, leading to greater circuit area savings and performance advantages while not sacrificing significant accuracy.

Abstract: Multipurpose arithmetic functional units can perform planar attribute interpolation and unary function approximation operations. In one embodiment, planar interpolation operations for coordinates (x, y) are executed by computing A*x+B*y+C, and unary function approximation operations for operand x are executed by computing F2(xb)*xh2+F1(xb)*xh+F0(xb), where xh=x?xb. Shared multiplier and adder circuits are advantageously used to implement the product and sum operations for both classes of operations.

Abstract: A function optimization method includes the operations of: constructing an upper bound using a double majorization bounding process to a sum-of-exponentials function including a summation of exponentials of the form ? k = 1 K ? ? ? k T ? x ; optimizing the constructed upper bound respective to parameters ? to generate optimized parameters ?; and outputting the optimized sum-of-exponentials function represented at least by the optimized parameters ?. An inference process includes the operations of: invoking the function optimization method respective to a softmax function constrained by discrete observations y defining categorization observation conditioned by continuous variables x representing at least one input object; and applying the optimized softmax function output by the invocation of the softmax function optimization method to the continuous variables x representing at least one input object to generate classification probabilities.

Abstract: Transforming an integer comprises receiving the integer, where the integer can be expressed as a modular factorization. The modular factorization comprises one or more factors, where each factor has an exponent. The integer is expressed as a product of residues. A discrete logarithm of the integer is established from a sum corresponding to the product of residues. A value for an exponent of a factor is determined from the discrete logarithm. The integer is represented as the modular factorization comprising the one or more factors, where each factor has a value for the exponent.

Abstract: A power function is approximated over an applicable data interval with polynomials determined by means of a Chebyshev minimax approximation technique. In some cases, multiple polynomials may be used to approximate the function over respective ranges of the desirable interval, in a piecewise manner. The appropriate polynomial that approximates the power function over the range of interest is derived and stored. When the power function is to be applied to a particular data value, the data value is first evaluated to determine where it lies within the applicable interval. The constants for the polynomial associated with that range of the interval are then retrieved and used to calculate the power of that data value.

Abstract: A performance management system and method for generating a plurality of forecasts for one or more electronic devices is presented. The forecasts are generated from stored performance data and analyzed to determine which devices are likely to experience performance degradation within a predetermined period of time. A single forecast is extracted for further analysis such that computer modeling may be performed upon the performance data to enable the user to predict when device performance will begin to degrade. In one embodiment, graphical displays are created for those devices forecasted to perform at an undesirable level such that suspect devices may be subjected to further analysis.

Abstract: The invention includes apparatus and methods for high-speed calculation of non-linear functions based upon a shifted adder and a offset generator. Various implementations may preferably include a input preprocessor and/or an output post processor. The invention includes a family of core cells built from instances of these calculators providing an upward, functionally compatible, extension to a family of Application Specific Integrated Circuit (ASIC) core cells. All of these core cells consistently provide the ability to perform high speed DSP tasks including Fast Fourier Transforms (FFTs), Finite Impulse Response (FIR) filters and Infinite Impulse Response (IIR) filters. The core cells built from the calculators can concurrently perform many non-linear function calculations. The core cells can switch between tasks every clock cycle.

Abstract: A method for generating, operating, and using a sparse w-NAF key for encryption is disclosed. The method for generating a key comprises generating a string of a number of coefficients, in which at most one coefficient, excluding 0, among a consecutive w number of coefficients, corresponds to a positive odd integer equal to or less than 2w (w being a natural number equal to or more than 2); and outputting the generated string as a key. Accordingly, an encryption is executed through an exponential operation or scalar multiplication using a sparse w-NAF key having the scarce coefficients, excluding 0, such that an encryption pace is improved.

Abstract: Embodiments of exponent processing systems and methods are disclosed. One method embodiment, among others, comprises performing a first table lookup using a first address to provide a first value corresponding to the first component part, setting an integer exponent to provide an integer-based value corresponding to the integer component, performing a second table lookup using a second and third address to provide a second value and a third value corresponding to the second component part and the third component part, respectively, expanding and normalizing the second and third values to provide expanded and normalized second and third values, combining the expanded and normalized second and third values to produce a first product, and computing the exponential function by combining the first value, the integer-based value, and the first product.

Abstract: For the determination of a result of a modular exponentiation, a randomization auxiliary number is employed for the randomization of the exponent on the basis of the product of the public key and the private key less “1”. This randomization auxiliary number may be derived from the private RSA dataset without special functionalities. Thus, low-overhead exponent randomization may be performed for each security protocol universally, to perform a digital signature secure against side-channel attacks.

Abstract: Disclosed is an apparatus and a method of calculating the square root of an element a, which is not zero, belonging to a finite extension field FpAk (where p is a prime number satisfying p?3(mod 4) and k is an odd number). The method includes: calculating a common exponentiation formula that is common to an exponentiation formula for calculating a quadratic residue, which is used to determine whether the square root of the element a is present, and an exponentiation formula for calculating the square root of the element a when it is determined that the square root of the element a is present; determining the result obtained by multiplying the square of the common exponentiation formula by the element a as the quadratic residue; and determining the result obtained by multiplying the common exponentiation formula by the element a as the square root of the element a.

Abstract: A novel and useful apparatus for and method of local oscillator (LO) generation with non-integer multiplication ratio between the local oscillator and RF frequencies. The LO generation schemes presented are operative to generate I and Q square waves at a designated frequency while avoiding the well known issue of harmonic pulling. An input baseband signal is interpolated and upconverted in the digital domain to an IF. The LO operates at a frequency which is a n/m division of the target RF frequency fRF. The IF frequency is configured to ½ of the LO frequency. The upconverted IF signal is then converted to the analog domain via digital power amplifiers followed by voltage combiners. The output of the combiners is band pass filtered to extract the desired replica.

Abstract: A novel and useful apparatus for and method of local oscillator (LO) generation with non-integer multiplication ratio between the local oscillator and RF frequencies. The LO generation schemes presented are operative to generate I and Q square waves at a designated frequency while avoiding the well known issue of harmonic pulling. The signal is input to a synthesizer timed to a rational multiplier of the RF frequency fRF. The signal is then divided to generate a plurality of phases of the divided signal. A plurality of combination signals are generated which are then multiplied by a set of weights and summed to cancel out some undersired products. The result is filtered to generate the LO output signal.

Abstract: A method is presented for adjusting the steady-state gains of a multivariable predictive control, planning or optimization model with uncertainty. The user selects a desired matrix relative gain criteria for the predictive model or sub-model. This is used to calculate a base number. Model gains are extracted from the predictive model and the magnitudes are modified to be rounded number powers of the calculated base number.

Abstract: A novel and useful apparatus for and method of local oscillator (LO) generation with non-integer multiplication ratio between the local oscillator and RF frequencies. The LO generation schemes presented are operative to generate I and Q square waves at a designated frequency while avoiding the well known issue of harmonic pulling. The use of analog mixers of the prior art is avoided and replaced with an XOR gate configured to generate the correct average frequency. The edges are dynamically adjusted by ±T/12 or zero based on the state of the controlled oscillator down-divided clock.

Abstract: A function optimization method includes the operations of: constructing an upper bound using a double majorization bounding process to a sum-of-exponentials function including a summation of exponentials of the form ? k = 1 K ? ? ? k T ? x ; optimizing the constructed upper bound respective to parameters ? to generate optimized parameters ?; and outputting the optimized sum-of-exponentials function represented at least by the optimized parameters ?. An inference process includes the operations of: invoking the function optimization method respective to a softmax function constrained by discrete observations y defining categorization observation conditioned by continuous variables x representing at least one input object; and applying the optimized softmax function output by the invocation of the softmax function optimization method to the continuous variables x representing at least one input object to generate classification probabilities.

Abstract: Provided are digital processing apparatuses and techniques for estimating the fractional exponentiation of the base number 2, i.e., 2f where f is a fractional value. In one representative embodiment, a calculation is made of a folded quantity, which is equal to 1?f if f is greater than a specified threshold and is equal to f otherwise; then, a function of the folded quantity is calculated; and finally, the function of the folded quantity is subtracted from the fraction f and 1 is added. In another embodiment, 2f is approximated by calculating 1+f? in the binary numbering system.

Abstract: A decoder for a wireless communication device comprising a calculator for calculating the modulo of a linear approximation of a MAX* function; and a selector for selecting a MAX* output value from the group a(n)mod F, b(n)mod F, and the calculated modulo based upon a determination as to whether a predetermined threshold value for |a(n)?b(n)| has been met, where a(n) is a first state metric, b(n) is a second state metric, C is the predetermined threshold value and F is a value greater than |a(n)?b(n)|.

Abstract: An apparatus for providing a base-2 logarithm approximation to a binary number is disclosed. A position k of the most significant bit within a binary number is located. Then, all bits that are less significant than position k within the binary number are assigned as a fractional portion of a base-2 logarithm approximation of the binary number. Next, a subset of the fractional portion is utilized to generate an adjustment value ?m for the fractional portion. The numeric value k is then converted to a binary value representing an integer portion of the base-2 logarithm approximation of the binary number. Finally, the integer portion is added to the fractional portion along with the adjustment value ?m for the fractional portion to form the base-2 logarithm approximation of the binary number.

Abstract: A system and methods are provided for melting curve genotyping analysis of nucleic acids. Melting curves are generated by plotting fluorescence of a sample as a function of temperature. In one illustrative example, an exponential algorithm is employed to remove the background from generated melting curves and thereby perform comparative analysis to other melting curves. Additional illustrative examples provide for measuring the differences between two or more melting curves and clustering the genotypes of the provided sample nucleic acids.

Abstract: A method and apparatus for generating a wide instruction controlling at least one data processing resource, local to that data processing resource, by accessing a local wide instruction memory based upon a narrow instruction, to generate at least part of the wide instruction. The local wide instruction memory can be accessed on every instruction cycle to reconfigure the controlled data processing resource(s). The data processing resources preferably includes arithmetic resources acting on the logarithms of various data inputs to generate a spectrum of non-additive results. A preferred embodiment permits the narrow instruction to include a designator field, a first narrow field and a second narrow field. The designator field is used by the local wide instruction memories to select which of the first and second narrow fields to use in accessing the memory for controls of a specific resource. Use in a graphics shader with four datapath columns is shown.

Abstract: Embodiments of logarithm processing systems and methods are disclosed. The system embodiments described herein include two tables corresponding to various base and derivative functions of a logarithm, with logic configured to access the tables and format and normalize the accessed values to evaluate the logarithm using a standard floating point, fused multiply-add (FMAD)unit.

Abstract: A exponentiation calculation apparatus includes a dividing unit which divides an input value as an element of a torus T2(Fq?r) (r is an odd prime, q is a power of a prime) into first and second elements (of Fq?r), a first calculating unit which calculates some multiplications on a base field based on the first and second elements, a second calculating unit which calculates, when the (q+1)th power of the input value as an element of Fq?2r is divided into third and fourth elements (of Fq?r), the third element based on a result of the multiplications, a third calculating unit which calculates the fourth element by Fq?r multiplication based on the first and second elements, and a coupling unit which couples the third element with the fourth element to obtain the (q+1)th power of the input value.